Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | # |
2 | # PINCTRL infrastructure and drivers | |
3 | # | |
4 | ||
45f034ef LW |
5 | config PINCTRL |
6 | bool | |
2744e8af LW |
7 | |
8 | if PINCTRL | |
9 | ||
45f034ef LW |
10 | menu "Pin controllers" |
11 | depends on PINCTRL | |
12 | ||
2744e8af | 13 | config PINMUX |
244e95a7 | 14 | bool "Support pin multiplexing controllers" if COMPILE_TEST |
ae6b4d85 LW |
15 | |
16 | config PINCONF | |
244e95a7 | 17 | bool "Support pin configuration controllers" if COMPILE_TEST |
2744e8af | 18 | |
394349f7 LW |
19 | config GENERIC_PINCONF |
20 | bool | |
21 | select PINCONF | |
22 | ||
2744e8af LW |
23 | config DEBUG_PINCTRL |
24 | bool "Debug PINCTRL calls" | |
25 | depends on DEBUG_KERNEL | |
26 | help | |
27 | Say Y here to add some extra checks and diagnostics to PINCTRL calls. | |
28 | ||
e9a03add SZ |
29 | config PINCTRL_ADI2 |
30 | bool "ADI pin controller driver" | |
9d7278d0 | 31 | depends on BLACKFIN |
e9a03add SZ |
32 | select PINMUX |
33 | select IRQ_DOMAIN | |
34 | help | |
35 | This is the pin controller and gpio driver for ADI BF54x, BF60x and | |
36 | future processors. This option is selected automatically when specific | |
37 | machine and arch are selected to build. | |
38 | ||
c8ce8782 LD |
39 | config PINCTRL_AS3722 |
40 | bool "Pinctrl and GPIO driver for ams AS3722 PMIC" | |
41 | depends on MFD_AS3722 && GPIOLIB | |
42 | select PINMUX | |
43 | select GENERIC_PINCONF | |
44 | help | |
45 | AS3722 device supports the configuration of GPIO pins for different | |
46 | functionality. This driver supports the pinmux, push-pull and | |
47 | open drain configuration for the GPIO pins of AS3722 devices. It also | |
48 | supports the GPIO functionality through gpiolib. | |
49 | ||
e9a03add SZ |
50 | config PINCTRL_BF54x |
51 | def_bool y if BF54x | |
52 | select PINCTRL_ADI2 | |
53 | ||
54 | config PINCTRL_BF60x | |
55 | def_bool y if BF60x | |
56 | select PINCTRL_ADI2 | |
57 | ||
6732ae5c JCPV |
58 | config PINCTRL_AT91 |
59 | bool "AT91 pinctrl driver" | |
60 | depends on OF | |
61 | depends on ARCH_AT91 | |
62 | select PINMUX | |
63 | select PINCONF | |
80cc3732 AS |
64 | select GPIOLIB |
65 | select OF_GPIO | |
66 | select GPIOLIB_IRQCHIP | |
6732ae5c JCPV |
67 | help |
68 | Say Y here to enable the at91 pinctrl driver | |
69 | ||
dbad75dd KX |
70 | config PINCTRL_AMD |
71 | bool "AMD GPIO pin control" | |
72 | depends on GPIOLIB | |
73 | select GPIOLIB_IRQCHIP | |
74 | select PINCONF | |
75 | select GENERIC_PINCONF | |
76 | help | |
77 | driver for memory mapped GPIO functionality on AMD platforms | |
78 | (x86 or arm).Most pins are usually muxed to some other | |
79 | functionality by firmware,so only a small amount is available | |
80 | for gpio use. | |
81 | ||
82 | Requires ACPI/FDT device enumeration code to set up a platform | |
83 | device. | |
84 | ||
3f8c50c9 JC |
85 | config PINCTRL_LANTIQ |
86 | bool | |
87 | depends on LANTIQ | |
88 | select PINMUX | |
89 | select PINCONF | |
90 | ||
e316cb2b JC |
91 | config PINCTRL_FALCON |
92 | bool | |
93 | depends on SOC_FALCON | |
94 | depends on PINCTRL_LANTIQ | |
95 | ||
6ac73095 BG |
96 | config PINCTRL_MESON |
97 | bool | |
98 | select PINMUX | |
99 | select PINCONF | |
100 | select GENERIC_PINCONF | |
101 | select OF_GPIO | |
102 | select REGMAP_MMIO | |
103 | ||
d3e51161 HS |
104 | config PINCTRL_ROCKCHIP |
105 | bool | |
106 | select PINMUX | |
107 | select GENERIC_PINCONF | |
108 | select GENERIC_IRQ_CHIP | |
751a99ab | 109 | select MFD_SYSCON |
d3e51161 | 110 | |
8b8b091b TL |
111 | config PINCTRL_SINGLE |
112 | tristate "One-register-per-pin type device tree based pinctrl driver" | |
113 | depends on OF | |
114 | select PINMUX | |
115 | select PINCONF | |
9dddb4df | 116 | select GENERIC_PINCONF |
8b8b091b TL |
117 | help |
118 | This selects the device tree based generic pinctrl driver. | |
119 | ||
3bece55a | 120 | config PINCTRL_SIRF |
a17272a4 | 121 | bool "CSR SiRFprimaII pin controller driver" |
d3e26f2f | 122 | depends on ARCH_SIRF |
393daa81 | 123 | select PINMUX |
7420d2d0 | 124 | select GPIOLIB_IRQCHIP |
393daa81 | 125 | |
701016c0 SK |
126 | config PINCTRL_ST |
127 | bool | |
128 | depends on OF | |
129 | select PINMUX | |
130 | select PINCONF | |
130cbe30 | 131 | select GPIOLIB_IRQCHIP |
701016c0 | 132 | |
971dac71 SW |
133 | config PINCTRL_TEGRA |
134 | bool | |
507ccdbf AL |
135 | select PINMUX |
136 | select PINCONF | |
971dac71 SW |
137 | |
138 | config PINCTRL_TEGRA20 | |
139 | bool | |
971dac71 SW |
140 | select PINCTRL_TEGRA |
141 | ||
142 | config PINCTRL_TEGRA30 | |
143 | bool | |
971dac71 SW |
144 | select PINCTRL_TEGRA |
145 | ||
b6ae7a26 PR |
146 | config PINCTRL_TEGRA114 |
147 | bool | |
148 | select PINCTRL_TEGRA | |
149 | ||
1a16bee6 AG |
150 | config PINCTRL_TEGRA124 |
151 | bool | |
152 | select PINCTRL_TEGRA | |
153 | ||
9184f756 SW |
154 | config PINCTRL_TEGRA210 |
155 | bool | |
156 | select PINCTRL_TEGRA | |
157 | ||
dc0a3938 TR |
158 | config PINCTRL_TEGRA_XUSB |
159 | def_bool y if ARCH_TEGRA | |
160 | select GENERIC_PHY | |
161 | select PINCONF | |
162 | select PINMUX | |
163 | ||
d5025f9f JH |
164 | config PINCTRL_TZ1090 |
165 | bool "Toumaz Xenif TZ1090 pin control driver" | |
166 | depends on SOC_TZ1090 | |
167 | select PINMUX | |
168 | select GENERIC_PINCONF | |
169 | ||
b58f0273 JH |
170 | config PINCTRL_TZ1090_PDC |
171 | bool "Toumaz Xenif TZ1090 PDC pin control driver" | |
172 | depends on SOC_TZ1090 | |
173 | select PINMUX | |
174 | select PINCONF | |
175 | ||
3bece55a LW |
176 | config PINCTRL_U300 |
177 | bool "U300 pin controller driver" | |
98da3529 LW |
178 | depends on ARCH_U300 |
179 | select PINMUX | |
dc0b1aa3 | 180 | select GENERIC_PINCONF |
45f034ef | 181 | |
ca402d37 LW |
182 | config PINCTRL_COH901 |
183 | bool "ST-Ericsson U300 COH 901 335/571 GPIO" | |
3c94d1bb | 184 | depends on GPIOLIB && ARCH_U300 && PINCTRL_U300 |
523dcce7 | 185 | select GPIOLIB_IRQCHIP |
ca402d37 LW |
186 | help |
187 | Say yes here to support GPIO interface on ST-Ericsson U300. | |
188 | The names of the two IP block variants supported are | |
189 | COH 901 335 and COH 901 571/3. They contain 3, 5 or 7 | |
190 | ports of 8 GPIO pins each. | |
191 | ||
0a8d3e24 | 192 | config PINCTRL_PALMAS |
736658c5 | 193 | bool "Pinctrl driver for the PALMAS Series MFD devices" |
0a8d3e24 | 194 | depends on OF && MFD_PALMAS |
63ca8db7 | 195 | select PINMUX |
0a8d3e24 LD |
196 | select GENERIC_PINCONF |
197 | help | |
198 | Palmas device supports the configuration of pins for different | |
199 | functionality. This driver supports the pinmux, push-pull and | |
200 | open drain configuration for the Palmas series devices like | |
201 | TPS65913, TPS80036 etc. | |
202 | ||
add958ce SB |
203 | config PINCTRL_ZYNQ |
204 | bool "Pinctrl driver for Xilinx Zynq" | |
205 | depends on ARCH_ZYNQ | |
206 | select PINMUX | |
207 | select GENERIC_PINCONF | |
208 | help | |
209 | This selectes the pinctrl driver for Xilinx Zynq. | |
210 | ||
b17f2f9b | 211 | source "drivers/pinctrl/bcm/Kconfig" |
3de68d33 | 212 | source "drivers/pinctrl/berlin/Kconfig" |
edad3b2a | 213 | source "drivers/pinctrl/freescale/Kconfig" |
5fae8b86 | 214 | source "drivers/pinctrl/intel/Kconfig" |
06763c74 | 215 | source "drivers/pinctrl/mvebu/Kconfig" |
3a198059 | 216 | source "drivers/pinctrl/nomadik/Kconfig" |
69b78b8d | 217 | source "drivers/pinctrl/qcom/Kconfig" |
ebe629a3 | 218 | source "drivers/pinctrl/samsung/Kconfig" |
6e54d8d2 | 219 | source "drivers/pinctrl/sh-pfc/Kconfig" |
deda8287 | 220 | source "drivers/pinctrl/spear/Kconfig" |
5f910777 | 221 | source "drivers/pinctrl/sunxi/Kconfig" |
170c6152 | 222 | source "drivers/pinctrl/vt8500/Kconfig" |
a6df410d | 223 | source "drivers/pinctrl/mediatek/Kconfig" |
deda8287 | 224 | |
3f8c50c9 JC |
225 | config PINCTRL_XWAY |
226 | bool | |
227 | depends on SOC_TYPE_XWAY | |
228 | depends on PINCTRL_LANTIQ | |
229 | ||
5aad0db1 CR |
230 | config PINCTRL_TB10X |
231 | bool | |
232 | depends on ARC_PLAT_TB10X | |
233 | ||
45f034ef | 234 | endmenu |
98da3529 | 235 | |
2744e8af | 236 | endif |