Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
42fed7ba | 43 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 44 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
45 | |
46 | /* Mutex taken to protect pinctrl_maps */ | |
47 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
48 | ||
49 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 50 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
51 | |
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 53 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 59 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 60 | |
befe5bdf | 61 | |
5b3aa5f7 DA |
62 | /** |
63 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
64 | * | |
65 | * Usually this function is called by platforms without pinctrl driver support | |
66 | * but run with some shared drivers using pinctrl APIs. | |
67 | * After calling this function, the pinctrl core will return successfully | |
68 | * with creating a dummy state for the driver to keep going smoothly. | |
69 | */ | |
70 | void pinctrl_provide_dummies(void) | |
71 | { | |
72 | pinctrl_dummy_state = true; | |
73 | } | |
74 | ||
2744e8af LW |
75 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
76 | { | |
77 | /* We're not allowed to register devices without name */ | |
78 | return pctldev->desc->name; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
81 | ||
d6e99abb HZ |
82 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return dev_name(pctldev->dev); | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
87 | ||
2744e8af LW |
88 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
89 | { | |
90 | return pctldev->driver_data; | |
91 | } | |
92 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
93 | ||
94 | /** | |
9dfac4fd LW |
95 | * get_pinctrl_dev_from_devname() - look up pin controller device |
96 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
97 | * |
98 | * Looks up a pin control device matching a certain device name or pure device | |
99 | * pointer, the pure device pointer will take precedence. | |
100 | */ | |
9dfac4fd | 101 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
102 | { |
103 | struct pinctrl_dev *pctldev = NULL; | |
2744e8af | 104 | |
9dfac4fd LW |
105 | if (!devname) |
106 | return NULL; | |
107 | ||
44d5f7bb LW |
108 | mutex_lock(&pinctrldev_list_mutex); |
109 | ||
2744e8af | 110 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 111 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 112 | /* Matched on device name */ |
44d5f7bb LW |
113 | mutex_unlock(&pinctrldev_list_mutex); |
114 | return pctldev; | |
2744e8af LW |
115 | } |
116 | } | |
2744e8af | 117 | |
44d5f7bb LW |
118 | mutex_unlock(&pinctrldev_list_mutex); |
119 | ||
120 | return NULL; | |
2744e8af LW |
121 | } |
122 | ||
42fed7ba PC |
123 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
124 | { | |
125 | struct pinctrl_dev *pctldev; | |
126 | ||
127 | mutex_lock(&pinctrldev_list_mutex); | |
128 | ||
129 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
130 | if (pctldev->dev->of_node == np) { | |
131 | mutex_unlock(&pinctrldev_list_mutex); | |
132 | return pctldev; | |
133 | } | |
134 | ||
d463f82d | 135 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
136 | |
137 | return NULL; | |
138 | } | |
139 | ||
ae6b4d85 LW |
140 | /** |
141 | * pin_get_from_name() - look up a pin number from a name | |
142 | * @pctldev: the pin control device to lookup the pin on | |
143 | * @name: the name of the pin to look up | |
144 | */ | |
145 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
146 | { | |
706e8520 | 147 | unsigned i, pin; |
ae6b4d85 | 148 | |
706e8520 CP |
149 | /* The pin number can be retrived from the pin controller descriptor */ |
150 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
151 | struct pin_desc *desc; |
152 | ||
706e8520 | 153 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
154 | desc = pin_desc_get(pctldev, pin); |
155 | /* Pin space may be sparse */ | |
6c325f87 | 156 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
157 | return pin; |
158 | } | |
159 | ||
160 | return -EINVAL; | |
161 | } | |
162 | ||
dcb5dbc3 DA |
163 | /** |
164 | * pin_get_name_from_id() - look up a pin name from a pin id | |
165 | * @pctldev: the pin control device to lookup the pin on | |
166 | * @name: the name of the pin to look up | |
167 | */ | |
168 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
169 | { | |
170 | const struct pin_desc *desc; | |
171 | ||
172 | desc = pin_desc_get(pctldev, pin); | |
173 | if (desc == NULL) { | |
174 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
175 | pin); | |
176 | return NULL; | |
177 | } | |
178 | ||
179 | return desc->name; | |
180 | } | |
181 | ||
2744e8af LW |
182 | /** |
183 | * pin_is_valid() - check if pin exists on controller | |
184 | * @pctldev: the pin control device to check the pin on | |
185 | * @pin: pin to check, use the local pin controller index number | |
186 | * | |
187 | * This tells us whether a certain pin exist on a certain pin controller or | |
188 | * not. Pin lists may be sparse, so some pins may not exist. | |
189 | */ | |
190 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
191 | { | |
192 | struct pin_desc *pindesc; | |
193 | ||
194 | if (pin < 0) | |
195 | return false; | |
196 | ||
42fed7ba | 197 | mutex_lock(&pctldev->mutex); |
2744e8af | 198 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 199 | mutex_unlock(&pctldev->mutex); |
2744e8af | 200 | |
57b676f9 | 201 | return pindesc != NULL; |
2744e8af LW |
202 | } |
203 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
204 | ||
205 | /* Deletes a range of pin descriptors */ | |
206 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
207 | const struct pinctrl_pin_desc *pins, | |
208 | unsigned num_pins) | |
209 | { | |
210 | int i; | |
211 | ||
2744e8af LW |
212 | for (i = 0; i < num_pins; i++) { |
213 | struct pin_desc *pindesc; | |
214 | ||
215 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
216 | pins[i].number); | |
217 | if (pindesc != NULL) { | |
218 | radix_tree_delete(&pctldev->pin_desc_tree, | |
219 | pins[i].number); | |
ca53c5f1 LW |
220 | if (pindesc->dynamic_name) |
221 | kfree(pindesc->name); | |
2744e8af LW |
222 | } |
223 | kfree(pindesc); | |
224 | } | |
2744e8af LW |
225 | } |
226 | ||
227 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
228 | unsigned number, const char *name) | |
229 | { | |
230 | struct pin_desc *pindesc; | |
231 | ||
232 | pindesc = pin_desc_get(pctldev, number); | |
233 | if (pindesc != NULL) { | |
2b38ca6d | 234 | dev_err(pctldev->dev, "pin %d already registered\n", number); |
2744e8af LW |
235 | return -EINVAL; |
236 | } | |
237 | ||
238 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
239 | if (pindesc == NULL) { |
240 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 241 | return -ENOMEM; |
95dcd4ae | 242 | } |
ae6b4d85 | 243 | |
2744e8af LW |
244 | /* Set owner */ |
245 | pindesc->pctldev = pctldev; | |
246 | ||
9af1e44f | 247 | /* Copy basic pin info */ |
8dc6ae4d | 248 | if (name) { |
ca53c5f1 LW |
249 | pindesc->name = name; |
250 | } else { | |
251 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
252 | if (pindesc->name == NULL) { |
253 | kfree(pindesc); | |
ca53c5f1 | 254 | return -ENOMEM; |
eb26cc9c | 255 | } |
ca53c5f1 LW |
256 | pindesc->dynamic_name = true; |
257 | } | |
2744e8af | 258 | |
2744e8af | 259 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 260 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 261 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
262 | return 0; |
263 | } | |
264 | ||
265 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
266 | struct pinctrl_pin_desc const *pins, | |
267 | unsigned num_descs) | |
268 | { | |
269 | unsigned i; | |
270 | int ret = 0; | |
271 | ||
272 | for (i = 0; i < num_descs; i++) { | |
273 | ret = pinctrl_register_one_pin(pctldev, | |
274 | pins[i].number, pins[i].name); | |
275 | if (ret) | |
276 | return ret; | |
277 | } | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
c8587eee CR |
282 | /** |
283 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
284 | * @range: GPIO range used for the translation | |
285 | * @gpio: gpio pin to translate to a pin number | |
286 | * | |
287 | * Finds the pin number for a given GPIO using the specified GPIO range | |
288 | * as a base for translation. The distinction between linear GPIO ranges | |
289 | * and pin list based GPIO ranges is managed correctly by this function. | |
290 | * | |
291 | * This function assumes the gpio is part of the specified GPIO range, use | |
292 | * only after making sure this is the case (e.g. by calling it on the | |
293 | * result of successful pinctrl_get_device_gpio_range calls)! | |
294 | */ | |
295 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
296 | unsigned int gpio) | |
297 | { | |
298 | unsigned int offset = gpio - range->base; | |
299 | if (range->pins) | |
300 | return range->pins[offset]; | |
301 | else | |
302 | return range->pin_base + offset; | |
303 | } | |
304 | ||
2744e8af LW |
305 | /** |
306 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
307 | * @pctldev: pin controller device to check | |
308 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
309 | * | |
310 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
311 | * controller, return the range or NULL | |
312 | */ | |
313 | static struct pinctrl_gpio_range * | |
314 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
315 | { | |
316 | struct pinctrl_gpio_range *range = NULL; | |
317 | ||
42fed7ba | 318 | mutex_lock(&pctldev->mutex); |
2744e8af | 319 | /* Loop over the ranges */ |
2744e8af LW |
320 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
321 | /* Check if we're in the valid range */ | |
322 | if (gpio >= range->base && | |
323 | gpio < range->base + range->npins) { | |
42fed7ba | 324 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
325 | return range; |
326 | } | |
327 | } | |
42fed7ba | 328 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
329 | return NULL; |
330 | } | |
331 | ||
51e13c24 HZ |
332 | /** |
333 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
334 | * the same GPIO chip are in range | |
335 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
336 | * | |
337 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
338 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
339 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
340 | * of the same GPIO chip don't have back-end pinctrl interface. | |
341 | * If the return value is true, it means that pinctrl device is ready & the | |
342 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
343 | * is false, it means that pinctrl device may not be ready. | |
344 | */ | |
2afe8229 | 345 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
346 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
347 | { | |
348 | struct pinctrl_dev *pctldev; | |
349 | struct pinctrl_gpio_range *range = NULL; | |
350 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
351 | ||
44d5f7bb LW |
352 | mutex_lock(&pinctrldev_list_mutex); |
353 | ||
51e13c24 HZ |
354 | /* Loop over the pin controllers */ |
355 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
356 | /* Loop over the ranges */ | |
5ffbe2e6 | 357 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
358 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
359 | /* Check if any gpio range overlapped with gpio chip */ | |
360 | if (range->base + range->npins - 1 < chip->base || | |
361 | range->base > chip->base + chip->ngpio - 1) | |
362 | continue; | |
5ffbe2e6 | 363 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 364 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
365 | return true; |
366 | } | |
5ffbe2e6 | 367 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 368 | } |
44d5f7bb LW |
369 | |
370 | mutex_unlock(&pinctrldev_list_mutex); | |
371 | ||
51e13c24 HZ |
372 | return false; |
373 | } | |
2afe8229 HZ |
374 | #else |
375 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
376 | #endif | |
51e13c24 | 377 | |
2744e8af LW |
378 | /** |
379 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
380 | * @gpio: the pin to locate the pin controller for | |
381 | * @outdev: the pin control device if found | |
382 | * @outrange: the GPIO range if found | |
383 | * | |
384 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
385 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
386 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
387 | * may still have not been registered. | |
2744e8af | 388 | */ |
4ecce45d SW |
389 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
390 | struct pinctrl_dev **outdev, | |
391 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
392 | { |
393 | struct pinctrl_dev *pctldev = NULL; | |
394 | ||
f0059021 AL |
395 | mutex_lock(&pinctrldev_list_mutex); |
396 | ||
2744e8af | 397 | /* Loop over the pin controllers */ |
2744e8af LW |
398 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
399 | struct pinctrl_gpio_range *range; | |
400 | ||
401 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
402 | if (range != NULL) { | |
403 | *outdev = pctldev; | |
404 | *outrange = range; | |
f0059021 | 405 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
406 | return 0; |
407 | } | |
408 | } | |
2744e8af | 409 | |
f0059021 AL |
410 | mutex_unlock(&pinctrldev_list_mutex); |
411 | ||
4650b7cb | 412 | return -EPROBE_DEFER; |
2744e8af LW |
413 | } |
414 | ||
415 | /** | |
416 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
417 | * @pctldev: pin controller device to add the range to | |
418 | * @range: the GPIO range to add | |
419 | * | |
420 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
421 | * this to register handled ranges after registering your pin controller. | |
422 | */ | |
423 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
424 | struct pinctrl_gpio_range *range) | |
425 | { | |
42fed7ba | 426 | mutex_lock(&pctldev->mutex); |
8b9c139f | 427 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 428 | mutex_unlock(&pctldev->mutex); |
2744e8af | 429 | } |
4ecce45d | 430 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 431 | |
3e5e00b6 DA |
432 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
433 | struct pinctrl_gpio_range *ranges, | |
434 | unsigned nranges) | |
435 | { | |
436 | int i; | |
437 | ||
438 | for (i = 0; i < nranges; i++) | |
439 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
440 | } | |
441 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
442 | ||
192c369c | 443 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
444 | struct pinctrl_gpio_range *range) |
445 | { | |
42fed7ba PC |
446 | struct pinctrl_dev *pctldev; |
447 | ||
42fed7ba | 448 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 449 | |
dfa97515 LW |
450 | /* |
451 | * If we can't find this device, let's assume that is because | |
452 | * it has not probed yet, so the driver trying to register this | |
453 | * range need to defer probing. | |
454 | */ | |
42fed7ba | 455 | if (!pctldev) { |
dfa97515 | 456 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 457 | } |
f23f1516 | 458 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 459 | |
f23f1516 SH |
460 | return pctldev; |
461 | } | |
192c369c | 462 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 463 | |
586a87e6 CR |
464 | int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, |
465 | const unsigned **pins, unsigned *num_pins) | |
466 | { | |
467 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
468 | int gs; | |
469 | ||
e5b3b2d9 AT |
470 | if (!pctlops->get_group_pins) |
471 | return -EINVAL; | |
472 | ||
586a87e6 CR |
473 | gs = pinctrl_get_group_selector(pctldev, pin_group); |
474 | if (gs < 0) | |
475 | return gs; | |
476 | ||
477 | return pctlops->get_group_pins(pctldev, gs, pins, num_pins); | |
478 | } | |
479 | EXPORT_SYMBOL_GPL(pinctrl_get_group_pins); | |
480 | ||
9afbefb2 LW |
481 | /** |
482 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
483 | * @pctldev: the pin controller device to look in | |
484 | * @pin: a controller-local number to find the range for | |
485 | */ | |
486 | struct pinctrl_gpio_range * | |
487 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
488 | unsigned int pin) | |
489 | { | |
c8f50e86 | 490 | struct pinctrl_gpio_range *range; |
9afbefb2 | 491 | |
42fed7ba | 492 | mutex_lock(&pctldev->mutex); |
9afbefb2 LW |
493 | /* Loop over the ranges */ |
494 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
495 | /* Check if we're in the valid range */ | |
c8587eee CR |
496 | if (range->pins) { |
497 | int a; | |
498 | for (a = 0; a < range->npins; a++) { | |
499 | if (range->pins[a] == pin) | |
c8f50e86 | 500 | goto out; |
c8587eee CR |
501 | } |
502 | } else if (pin >= range->pin_base && | |
c8f50e86 WY |
503 | pin < range->pin_base + range->npins) |
504 | goto out; | |
9afbefb2 | 505 | } |
c8f50e86 WY |
506 | range = NULL; |
507 | out: | |
42fed7ba | 508 | mutex_unlock(&pctldev->mutex); |
c8f50e86 | 509 | return range; |
9afbefb2 LW |
510 | } |
511 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
512 | ||
7e10ee68 VK |
513 | /** |
514 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
515 | * @pctldev: pin controller device to remove the range from | |
516 | * @range: the GPIO range to remove | |
517 | */ | |
518 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
519 | struct pinctrl_gpio_range *range) | |
520 | { | |
42fed7ba | 521 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 522 | list_del(&range->node); |
42fed7ba | 523 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
524 | } |
525 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
526 | ||
7afde8ba LW |
527 | /** |
528 | * pinctrl_get_group_selector() - returns the group selector for a group | |
529 | * @pctldev: the pin controller handling the group | |
530 | * @pin_group: the pin group to look up | |
531 | */ | |
532 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
533 | const char *pin_group) | |
534 | { | |
535 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 536 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
537 | unsigned group_selector = 0; |
538 | ||
d1e90e9e | 539 | while (group_selector < ngroups) { |
7afde8ba LW |
540 | const char *gname = pctlops->get_group_name(pctldev, |
541 | group_selector); | |
542 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 543 | dev_dbg(pctldev->dev, |
7afde8ba LW |
544 | "found group selector %u for %s\n", |
545 | group_selector, | |
546 | pin_group); | |
547 | return group_selector; | |
548 | } | |
549 | ||
550 | group_selector++; | |
551 | } | |
552 | ||
51cd24ee | 553 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
554 | pin_group); |
555 | ||
556 | return -EINVAL; | |
557 | } | |
558 | ||
befe5bdf | 559 | /** |
b217e438 | 560 | * pinctrl_request_gpio() - request a single pin to be used as GPIO |
befe5bdf LW |
561 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
562 | * | |
563 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
564 | * as part of their gpio_request() semantics, platforms and individual drivers | |
565 | * shall *NOT* request GPIO pins to be muxed in. | |
566 | */ | |
567 | int pinctrl_request_gpio(unsigned gpio) | |
568 | { | |
569 | struct pinctrl_dev *pctldev; | |
570 | struct pinctrl_gpio_range *range; | |
571 | int ret; | |
572 | int pin; | |
573 | ||
574 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 575 | if (ret) { |
51e13c24 HZ |
576 | if (pinctrl_ready_for_gpio_range(gpio)) |
577 | ret = 0; | |
4650b7cb | 578 | return ret; |
57b676f9 | 579 | } |
befe5bdf | 580 | |
9b77ace4 AL |
581 | mutex_lock(&pctldev->mutex); |
582 | ||
befe5bdf | 583 | /* Convert to the pin controllers number space */ |
c8587eee | 584 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 585 | |
57b676f9 SW |
586 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
587 | ||
9b77ace4 AL |
588 | mutex_unlock(&pctldev->mutex); |
589 | ||
57b676f9 | 590 | return ret; |
befe5bdf LW |
591 | } |
592 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
593 | ||
594 | /** | |
595 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
596 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
597 | * | |
598 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
599 | * as part of their gpio_free() semantics, platforms and individual drivers | |
600 | * shall *NOT* request GPIO pins to be muxed out. | |
601 | */ | |
602 | void pinctrl_free_gpio(unsigned gpio) | |
603 | { | |
604 | struct pinctrl_dev *pctldev; | |
605 | struct pinctrl_gpio_range *range; | |
606 | int ret; | |
607 | int pin; | |
608 | ||
609 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 610 | if (ret) { |
befe5bdf | 611 | return; |
57b676f9 | 612 | } |
42fed7ba | 613 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
614 | |
615 | /* Convert to the pin controllers number space */ | |
c8587eee | 616 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 617 | |
57b676f9 SW |
618 | pinmux_free_gpio(pctldev, pin, range); |
619 | ||
42fed7ba | 620 | mutex_unlock(&pctldev->mutex); |
befe5bdf LW |
621 | } |
622 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
623 | ||
624 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
625 | { | |
626 | struct pinctrl_dev *pctldev; | |
627 | struct pinctrl_gpio_range *range; | |
628 | int ret; | |
629 | int pin; | |
630 | ||
631 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 632 | if (ret) { |
befe5bdf | 633 | return ret; |
42fed7ba PC |
634 | } |
635 | ||
636 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
637 | |
638 | /* Convert to the pin controllers number space */ | |
c8587eee | 639 | pin = gpio_to_pin(range, gpio); |
42fed7ba PC |
640 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
641 | ||
642 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 643 | |
42fed7ba | 644 | return ret; |
befe5bdf LW |
645 | } |
646 | ||
647 | /** | |
648 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
649 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
650 | * | |
651 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
652 | * as part of their gpio_direction_input() semantics, platforms and individual | |
653 | * drivers shall *NOT* touch pin control GPIO calls. | |
654 | */ | |
655 | int pinctrl_gpio_direction_input(unsigned gpio) | |
656 | { | |
42fed7ba | 657 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
658 | } |
659 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
660 | ||
661 | /** | |
662 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
663 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
664 | * | |
665 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
666 | * as part of their gpio_direction_output() semantics, platforms and individual | |
667 | * drivers shall *NOT* touch pin control GPIO calls. | |
668 | */ | |
669 | int pinctrl_gpio_direction_output(unsigned gpio) | |
670 | { | |
42fed7ba | 671 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
672 | } |
673 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
674 | ||
6e5e959d SW |
675 | static struct pinctrl_state *find_state(struct pinctrl *p, |
676 | const char *name) | |
befe5bdf | 677 | { |
6e5e959d SW |
678 | struct pinctrl_state *state; |
679 | ||
680 | list_for_each_entry(state, &p->states, node) | |
681 | if (!strcmp(state->name, name)) | |
682 | return state; | |
683 | ||
684 | return NULL; | |
685 | } | |
686 | ||
687 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
688 | const char *name) | |
689 | { | |
690 | struct pinctrl_state *state; | |
691 | ||
692 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
693 | if (state == NULL) { | |
694 | dev_err(p->dev, | |
695 | "failed to alloc struct pinctrl_state\n"); | |
696 | return ERR_PTR(-ENOMEM); | |
697 | } | |
698 | ||
699 | state->name = name; | |
700 | INIT_LIST_HEAD(&state->settings); | |
701 | ||
702 | list_add_tail(&state->node, &p->states); | |
703 | ||
704 | return state; | |
705 | } | |
706 | ||
707 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
708 | { | |
709 | struct pinctrl_state *state; | |
7ecdb16f | 710 | struct pinctrl_setting *setting; |
6e5e959d | 711 | int ret; |
befe5bdf | 712 | |
6e5e959d SW |
713 | state = find_state(p, map->name); |
714 | if (!state) | |
715 | state = create_state(p, map->name); | |
716 | if (IS_ERR(state)) | |
717 | return PTR_ERR(state); | |
befe5bdf | 718 | |
1e2082b5 SW |
719 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
720 | return 0; | |
721 | ||
6e5e959d SW |
722 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
723 | if (setting == NULL) { | |
724 | dev_err(p->dev, | |
725 | "failed to alloc struct pinctrl_setting\n"); | |
726 | return -ENOMEM; | |
727 | } | |
befe5bdf | 728 | |
1e2082b5 SW |
729 | setting->type = map->type; |
730 | ||
6e5e959d SW |
731 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
732 | if (setting->pctldev == NULL) { | |
6e5e959d | 733 | kfree(setting); |
89216494 LW |
734 | /* Do not defer probing of hogs (circular loop) */ |
735 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
736 | return -ENODEV; | |
c05127c4 LW |
737 | /* |
738 | * OK let us guess that the driver is not there yet, and | |
739 | * let's defer obtaining this pinctrl handle to later... | |
740 | */ | |
89216494 LW |
741 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
742 | map->ctrl_dev_name); | |
c05127c4 | 743 | return -EPROBE_DEFER; |
6e5e959d SW |
744 | } |
745 | ||
1a78958d LW |
746 | setting->dev_name = map->dev_name; |
747 | ||
1e2082b5 SW |
748 | switch (map->type) { |
749 | case PIN_MAP_TYPE_MUX_GROUP: | |
750 | ret = pinmux_map_to_setting(map, setting); | |
751 | break; | |
752 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
753 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
754 | ret = pinconf_map_to_setting(map, setting); | |
755 | break; | |
756 | default: | |
757 | ret = -EINVAL; | |
758 | break; | |
759 | } | |
6e5e959d SW |
760 | if (ret < 0) { |
761 | kfree(setting); | |
762 | return ret; | |
763 | } | |
764 | ||
765 | list_add_tail(&setting->node, &state->settings); | |
766 | ||
767 | return 0; | |
768 | } | |
769 | ||
770 | static struct pinctrl *find_pinctrl(struct device *dev) | |
771 | { | |
772 | struct pinctrl *p; | |
773 | ||
42fed7ba | 774 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 775 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
776 | if (p->dev == dev) { |
777 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 778 | return p; |
42fed7ba | 779 | } |
6e5e959d | 780 | |
42fed7ba | 781 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
782 | return NULL; |
783 | } | |
784 | ||
42fed7ba | 785 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d SW |
786 | |
787 | static struct pinctrl *create_pinctrl(struct device *dev) | |
788 | { | |
789 | struct pinctrl *p; | |
790 | const char *devname; | |
791 | struct pinctrl_maps *maps_node; | |
792 | int i; | |
793 | struct pinctrl_map const *map; | |
794 | int ret; | |
befe5bdf LW |
795 | |
796 | /* | |
797 | * create the state cookie holder struct pinctrl for each | |
798 | * mapping, this is what consumers will get when requesting | |
799 | * a pin control handle with pinctrl_get() | |
800 | */ | |
02f5b989 | 801 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
802 | if (p == NULL) { |
803 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 804 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 805 | } |
7ecdb16f | 806 | p->dev = dev; |
6e5e959d | 807 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
808 | INIT_LIST_HEAD(&p->dt_maps); |
809 | ||
810 | ret = pinctrl_dt_to_map(p); | |
811 | if (ret < 0) { | |
812 | kfree(p); | |
813 | return ERR_PTR(ret); | |
814 | } | |
6e5e959d SW |
815 | |
816 | devname = dev_name(dev); | |
befe5bdf | 817 | |
42fed7ba | 818 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 819 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 820 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
821 | /* Map must be for this device */ |
822 | if (strcmp(map->dev_name, devname)) | |
823 | continue; | |
824 | ||
6e5e959d | 825 | ret = add_setting(p, map); |
89216494 LW |
826 | /* |
827 | * At this point the adding of a setting may: | |
828 | * | |
829 | * - Defer, if the pinctrl device is not yet available | |
830 | * - Fail, if the pinctrl device is not yet available, | |
831 | * AND the setting is a hog. We cannot defer that, since | |
832 | * the hog will kick in immediately after the device | |
833 | * is registered. | |
834 | * | |
835 | * If the error returned was not -EPROBE_DEFER then we | |
836 | * accumulate the errors to see if we end up with | |
837 | * an -EPROBE_DEFER later, as that is the worst case. | |
838 | */ | |
839 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
840 | pinctrl_free(p, false); |
841 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 842 | return ERR_PTR(ret); |
7ecdb16f | 843 | } |
befe5bdf | 844 | } |
42fed7ba PC |
845 | mutex_unlock(&pinctrl_maps_mutex); |
846 | ||
89216494 LW |
847 | if (ret < 0) { |
848 | /* If some other error than deferral occured, return here */ | |
42fed7ba | 849 | pinctrl_free(p, false); |
89216494 LW |
850 | return ERR_PTR(ret); |
851 | } | |
befe5bdf | 852 | |
ab78029e LW |
853 | kref_init(&p->users); |
854 | ||
b0666ba4 | 855 | /* Add the pinctrl handle to the global list */ |
7b320cb1 | 856 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 857 | list_add_tail(&p->node, &pinctrl_list); |
7b320cb1 | 858 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
859 | |
860 | return p; | |
6e5e959d | 861 | } |
7ecdb16f | 862 | |
42fed7ba PC |
863 | /** |
864 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
865 | * @dev: the device to obtain the handle for | |
866 | */ | |
867 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
868 | { |
869 | struct pinctrl *p; | |
7ecdb16f | 870 | |
6e5e959d SW |
871 | if (WARN_ON(!dev)) |
872 | return ERR_PTR(-EINVAL); | |
873 | ||
ab78029e LW |
874 | /* |
875 | * See if somebody else (such as the device core) has already | |
876 | * obtained a handle to the pinctrl for this device. In that case, | |
877 | * return another pointer to it. | |
878 | */ | |
6e5e959d | 879 | p = find_pinctrl(dev); |
ab78029e LW |
880 | if (p != NULL) { |
881 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
882 | kref_get(&p->users); | |
883 | return p; | |
884 | } | |
7ecdb16f | 885 | |
d599bfb3 | 886 | return create_pinctrl(dev); |
befe5bdf LW |
887 | } |
888 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
889 | ||
d3cee830 RG |
890 | static void pinctrl_free_setting(bool disable_setting, |
891 | struct pinctrl_setting *setting) | |
892 | { | |
893 | switch (setting->type) { | |
894 | case PIN_MAP_TYPE_MUX_GROUP: | |
895 | if (disable_setting) | |
896 | pinmux_disable_setting(setting); | |
897 | pinmux_free_setting(setting); | |
898 | break; | |
899 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
900 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
901 | pinconf_free_setting(setting); | |
902 | break; | |
903 | default: | |
904 | break; | |
905 | } | |
906 | } | |
907 | ||
42fed7ba | 908 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 909 | { |
6e5e959d SW |
910 | struct pinctrl_state *state, *n1; |
911 | struct pinctrl_setting *setting, *n2; | |
912 | ||
42fed7ba | 913 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
914 | list_for_each_entry_safe(state, n1, &p->states, node) { |
915 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 916 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
917 | list_del(&setting->node); |
918 | kfree(setting); | |
919 | } | |
920 | list_del(&state->node); | |
921 | kfree(state); | |
7ecdb16f | 922 | } |
befe5bdf | 923 | |
57291ce2 SW |
924 | pinctrl_dt_free_maps(p); |
925 | ||
6e5e959d SW |
926 | if (inlist) |
927 | list_del(&p->node); | |
befe5bdf | 928 | kfree(p); |
42fed7ba | 929 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 930 | } |
befe5bdf LW |
931 | |
932 | /** | |
ab78029e LW |
933 | * pinctrl_release() - release the pinctrl handle |
934 | * @kref: the kref in the pinctrl being released | |
935 | */ | |
2917e833 | 936 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
937 | { |
938 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
939 | ||
42fed7ba | 940 | pinctrl_free(p, true); |
ab78029e LW |
941 | } |
942 | ||
943 | /** | |
944 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 945 | * @p: the pinctrl handle to release |
befe5bdf | 946 | */ |
57b676f9 SW |
947 | void pinctrl_put(struct pinctrl *p) |
948 | { | |
ab78029e | 949 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
950 | } |
951 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
952 | ||
42fed7ba PC |
953 | /** |
954 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
955 | * @p: the pinctrl handle to retrieve the state from | |
956 | * @name: the state name to retrieve | |
957 | */ | |
958 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
959 | const char *name) | |
befe5bdf | 960 | { |
6e5e959d | 961 | struct pinctrl_state *state; |
befe5bdf | 962 | |
6e5e959d | 963 | state = find_state(p, name); |
5b3aa5f7 DA |
964 | if (!state) { |
965 | if (pinctrl_dummy_state) { | |
966 | /* create dummy state */ | |
967 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
968 | name); | |
969 | state = create_state(p, name); | |
d599bfb3 RG |
970 | } else |
971 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 972 | } |
57b676f9 | 973 | |
6e5e959d | 974 | return state; |
befe5bdf | 975 | } |
42fed7ba | 976 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
977 | |
978 | /** | |
42fed7ba PC |
979 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW |
980 | * @p: the pinctrl handle for the device that requests configuration | |
981 | * @state: the state handle to select/activate/program | |
befe5bdf | 982 | */ |
42fed7ba | 983 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 984 | { |
6e5e959d | 985 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 986 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 987 | int ret; |
7ecdb16f | 988 | |
6e5e959d SW |
989 | if (p->state == state) |
990 | return 0; | |
befe5bdf | 991 | |
6e5e959d SW |
992 | if (p->state) { |
993 | /* | |
2243a87d FW |
994 | * For each pinmux setting in the old state, forget SW's record |
995 | * of mux owner for that pingroup. Any pingroups which are | |
996 | * still owned by the new state will be re-acquired by the call | |
997 | * to pinmux_enable_setting() in the loop below. | |
6e5e959d SW |
998 | */ |
999 | list_for_each_entry(setting, &p->state->settings, node) { | |
1e2082b5 SW |
1000 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
1001 | continue; | |
2243a87d | 1002 | pinmux_disable_setting(setting); |
6e5e959d SW |
1003 | } |
1004 | } | |
1005 | ||
3102a76c | 1006 | p->state = NULL; |
6e5e959d SW |
1007 | |
1008 | /* Apply all the settings for the new state */ | |
1009 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
1010 | switch (setting->type) { |
1011 | case PIN_MAP_TYPE_MUX_GROUP: | |
1012 | ret = pinmux_enable_setting(setting); | |
1013 | break; | |
1014 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1015 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1016 | ret = pinconf_apply_setting(setting); | |
1017 | break; | |
1018 | default: | |
1019 | ret = -EINVAL; | |
1020 | break; | |
1021 | } | |
3102a76c | 1022 | |
42fed7ba | 1023 | if (ret < 0) { |
3102a76c | 1024 | goto unapply_new_state; |
42fed7ba | 1025 | } |
befe5bdf | 1026 | } |
6e5e959d | 1027 | |
3102a76c RG |
1028 | p->state = state; |
1029 | ||
6e5e959d | 1030 | return 0; |
3102a76c RG |
1031 | |
1032 | unapply_new_state: | |
da58751c | 1033 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1034 | |
3102a76c RG |
1035 | list_for_each_entry(setting2, &state->settings, node) { |
1036 | if (&setting2->node == &setting->node) | |
1037 | break; | |
af606177 RG |
1038 | /* |
1039 | * All we can do here is pinmux_disable_setting. | |
1040 | * That means that some pins are muxed differently now | |
1041 | * than they were before applying the setting (We can't | |
1042 | * "unmux a pin"!), but it's not a big deal since the pins | |
1043 | * are free to be muxed by another apply_setting. | |
1044 | */ | |
1045 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1046 | pinmux_disable_setting(setting2); | |
3102a76c | 1047 | } |
8009d5ff | 1048 | |
385d9424 RG |
1049 | /* There's no infinite recursive loop here because p->state is NULL */ |
1050 | if (old_state) | |
42fed7ba | 1051 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1052 | |
1053 | return ret; | |
befe5bdf | 1054 | } |
6e5e959d | 1055 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1056 | |
6d4ca1fb SW |
1057 | static void devm_pinctrl_release(struct device *dev, void *res) |
1058 | { | |
1059 | pinctrl_put(*(struct pinctrl **)res); | |
1060 | } | |
1061 | ||
1062 | /** | |
1063 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1064 | * @dev: the device to obtain the handle for | |
1065 | * | |
1066 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1067 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1068 | */ | |
1069 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1070 | { | |
1071 | struct pinctrl **ptr, *p; | |
1072 | ||
1073 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1074 | if (!ptr) | |
1075 | return ERR_PTR(-ENOMEM); | |
1076 | ||
1077 | p = pinctrl_get(dev); | |
1078 | if (!IS_ERR(p)) { | |
1079 | *ptr = p; | |
1080 | devres_add(dev, ptr); | |
1081 | } else { | |
1082 | devres_free(ptr); | |
1083 | } | |
1084 | ||
1085 | return p; | |
1086 | } | |
1087 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1088 | ||
1089 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1090 | { | |
1091 | struct pinctrl **p = res; | |
1092 | ||
1093 | return *p == data; | |
1094 | } | |
1095 | ||
1096 | /** | |
1097 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1098 | * @p: the pinctrl handle to release | |
1099 | * | |
1100 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1101 | * this function will not need to be called and the resource management | |
1102 | * code will ensure that the resource is freed. | |
1103 | */ | |
1104 | void devm_pinctrl_put(struct pinctrl *p) | |
1105 | { | |
a72149e8 | 1106 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1107 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1108 | } |
1109 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1110 | ||
57291ce2 | 1111 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
c5272a28 | 1112 | bool dup) |
befe5bdf | 1113 | { |
1e2082b5 | 1114 | int i, ret; |
b2b3e66e | 1115 | struct pinctrl_maps *maps_node; |
befe5bdf | 1116 | |
7e9236ff | 1117 | pr_debug("add %u pinctrl maps\n", num_maps); |
befe5bdf LW |
1118 | |
1119 | /* First sanity check the new mapping */ | |
1120 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1121 | if (!maps[i].dev_name) { |
1122 | pr_err("failed to register map %s (%d): no device given\n", | |
1123 | maps[i].name, i); | |
1124 | return -EINVAL; | |
1125 | } | |
1126 | ||
befe5bdf LW |
1127 | if (!maps[i].name) { |
1128 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1129 | i); |
befe5bdf LW |
1130 | return -EINVAL; |
1131 | } | |
1132 | ||
1e2082b5 SW |
1133 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1134 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1135 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1136 | maps[i].name, i); | |
1137 | return -EINVAL; | |
1138 | } | |
1139 | ||
1e2082b5 SW |
1140 | switch (maps[i].type) { |
1141 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1142 | break; | |
1143 | case PIN_MAP_TYPE_MUX_GROUP: | |
1144 | ret = pinmux_validate_map(&maps[i], i); | |
1145 | if (ret < 0) | |
fde04f41 | 1146 | return ret; |
1e2082b5 SW |
1147 | break; |
1148 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1149 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1150 | ret = pinconf_validate_map(&maps[i], i); | |
1151 | if (ret < 0) | |
fde04f41 | 1152 | return ret; |
1e2082b5 SW |
1153 | break; |
1154 | default: | |
1155 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1156 | maps[i].name, i); |
1681f5ae SW |
1157 | return -EINVAL; |
1158 | } | |
befe5bdf LW |
1159 | } |
1160 | ||
b2b3e66e SW |
1161 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1162 | if (!maps_node) { | |
1163 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1164 | return -ENOMEM; | |
1165 | } | |
befe5bdf | 1166 | |
b2b3e66e | 1167 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1168 | if (dup) { |
1169 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1170 | GFP_KERNEL); | |
1171 | if (!maps_node->maps) { | |
1172 | pr_err("failed to duplicate mapping table\n"); | |
1173 | kfree(maps_node); | |
1174 | return -ENOMEM; | |
1175 | } | |
1176 | } else { | |
1177 | maps_node->maps = maps; | |
befe5bdf LW |
1178 | } |
1179 | ||
c5272a28 | 1180 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1181 | list_add_tail(&maps_node->node, &pinctrl_maps); |
c5272a28 | 1182 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1183 | |
befe5bdf LW |
1184 | return 0; |
1185 | } | |
1186 | ||
57291ce2 SW |
1187 | /** |
1188 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1189 | * @maps: the pincontrol mappings table to register. This should probably be | |
1190 | * marked with __initdata so it can be discarded after boot. This | |
1191 | * function will perform a shallow copy for the mapping entries. | |
1192 | * @num_maps: the number of maps in the mapping table | |
1193 | */ | |
1194 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1195 | unsigned num_maps) | |
1196 | { | |
c5272a28 | 1197 | return pinctrl_register_map(maps, num_maps, true); |
57291ce2 SW |
1198 | } |
1199 | ||
1200 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1201 | { | |
1202 | struct pinctrl_maps *maps_node; | |
1203 | ||
42fed7ba | 1204 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1205 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1206 | if (maps_node->maps == map) { | |
1207 | list_del(&maps_node->node); | |
db6c2c69 | 1208 | kfree(maps_node); |
42fed7ba | 1209 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1210 | return; |
1211 | } | |
1212 | } | |
42fed7ba | 1213 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1214 | } |
1215 | ||
840a47ba JD |
1216 | /** |
1217 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1218 | * @pctldev: pin controller device | |
1219 | */ | |
1220 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1221 | { | |
1222 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1223 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1224 | return 0; | |
1225 | } | |
1226 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1227 | ||
1228 | /** | |
1229 | * pinctrl_force_default() - turn a given controller device into default state | |
1230 | * @pctldev: pin controller device | |
1231 | */ | |
1232 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1233 | { | |
1234 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1235 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1236 | return 0; | |
1237 | } | |
1238 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1239 | ||
14005ee2 LW |
1240 | #ifdef CONFIG_PM |
1241 | ||
1242 | /** | |
f3333497 | 1243 | * pinctrl_pm_select_state() - select pinctrl state for PM |
14005ee2 | 1244 | * @dev: device to select default state for |
f3333497 | 1245 | * @state: state to set |
14005ee2 | 1246 | */ |
f3333497 TL |
1247 | static int pinctrl_pm_select_state(struct device *dev, |
1248 | struct pinctrl_state *state) | |
14005ee2 LW |
1249 | { |
1250 | struct dev_pin_info *pins = dev->pins; | |
1251 | int ret; | |
1252 | ||
f3333497 TL |
1253 | if (IS_ERR(state)) |
1254 | return 0; /* No such state */ | |
1255 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1256 | if (ret) |
f3333497 TL |
1257 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1258 | state->name); | |
14005ee2 LW |
1259 | return ret; |
1260 | } | |
f3333497 TL |
1261 | |
1262 | /** | |
1263 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1264 | * @dev: device to select default state for | |
1265 | */ | |
1266 | int pinctrl_pm_select_default_state(struct device *dev) | |
1267 | { | |
1268 | if (!dev->pins) | |
1269 | return 0; | |
1270 | ||
1271 | return pinctrl_pm_select_state(dev, dev->pins->default_state); | |
1272 | } | |
f472dead | 1273 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1274 | |
1275 | /** | |
1276 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1277 | * @dev: device to select sleep state for | |
1278 | */ | |
1279 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1280 | { | |
f3333497 | 1281 | if (!dev->pins) |
14005ee2 | 1282 | return 0; |
f3333497 TL |
1283 | |
1284 | return pinctrl_pm_select_state(dev, dev->pins->sleep_state); | |
14005ee2 | 1285 | } |
f472dead | 1286 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1287 | |
1288 | /** | |
1289 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1290 | * @dev: device to select idle state for | |
1291 | */ | |
1292 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1293 | { | |
f3333497 | 1294 | if (!dev->pins) |
14005ee2 | 1295 | return 0; |
f3333497 TL |
1296 | |
1297 | return pinctrl_pm_select_state(dev, dev->pins->idle_state); | |
14005ee2 | 1298 | } |
f472dead | 1299 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1300 | #endif |
1301 | ||
2744e8af LW |
1302 | #ifdef CONFIG_DEBUG_FS |
1303 | ||
1304 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1305 | { | |
1306 | struct pinctrl_dev *pctldev = s->private; | |
1307 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1308 | unsigned i, pin; |
2744e8af LW |
1309 | |
1310 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1311 | |
42fed7ba | 1312 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1313 | |
706e8520 CP |
1314 | /* The pin number can be retrived from the pin controller descriptor */ |
1315 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1316 | struct pin_desc *desc; |
1317 | ||
706e8520 | 1318 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1319 | desc = pin_desc_get(pctldev, pin); |
1320 | /* Pin space may be sparse */ | |
1321 | if (desc == NULL) | |
1322 | continue; | |
1323 | ||
1324 | seq_printf(s, "pin %d (%s) ", pin, | |
1325 | desc->name ? desc->name : "unnamed"); | |
1326 | ||
1327 | /* Driver-specific info per pin */ | |
1328 | if (ops->pin_dbg_show) | |
1329 | ops->pin_dbg_show(pctldev, s, pin); | |
1330 | ||
1331 | seq_puts(s, "\n"); | |
1332 | } | |
1333 | ||
42fed7ba | 1334 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1335 | |
2744e8af LW |
1336 | return 0; |
1337 | } | |
1338 | ||
1339 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1340 | { | |
1341 | struct pinctrl_dev *pctldev = s->private; | |
1342 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1343 | unsigned ngroups, selector = 0; |
2744e8af | 1344 | |
42fed7ba PC |
1345 | mutex_lock(&pctldev->mutex); |
1346 | ||
d1e90e9e | 1347 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1348 | |
2744e8af | 1349 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1350 | while (selector < ngroups) { |
e5b3b2d9 AT |
1351 | const unsigned *pins = NULL; |
1352 | unsigned num_pins = 0; | |
2744e8af | 1353 | const char *gname = ops->get_group_name(pctldev, selector); |
dcb5dbc3 | 1354 | const char *pname; |
e5b3b2d9 | 1355 | int ret = 0; |
2744e8af LW |
1356 | int i; |
1357 | ||
e5b3b2d9 AT |
1358 | if (ops->get_group_pins) |
1359 | ret = ops->get_group_pins(pctldev, selector, | |
1360 | &pins, &num_pins); | |
2744e8af LW |
1361 | if (ret) |
1362 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1363 | gname); | |
1364 | else { | |
dcb5dbc3 DA |
1365 | seq_printf(s, "group: %s\n", gname); |
1366 | for (i = 0; i < num_pins; i++) { | |
1367 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1368 | if (WARN_ON(!pname)) { |
42fed7ba | 1369 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1370 | return -EINVAL; |
b4dd784b | 1371 | } |
dcb5dbc3 DA |
1372 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1373 | } | |
1374 | seq_puts(s, "\n"); | |
2744e8af LW |
1375 | } |
1376 | selector++; | |
1377 | } | |
1378 | ||
42fed7ba | 1379 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1380 | |
1381 | return 0; | |
1382 | } | |
1383 | ||
1384 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1385 | { | |
1386 | struct pinctrl_dev *pctldev = s->private; | |
1387 | struct pinctrl_gpio_range *range = NULL; | |
1388 | ||
1389 | seq_puts(s, "GPIO ranges handled:\n"); | |
1390 | ||
42fed7ba | 1391 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1392 | |
2744e8af | 1393 | /* Loop over the ranges */ |
2744e8af | 1394 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1395 | if (range->pins) { |
1396 | int a; | |
1397 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1398 | range->id, range->name, | |
1399 | range->base, (range->base + range->npins - 1)); | |
1400 | for (a = 0; a < range->npins - 1; a++) | |
1401 | seq_printf(s, "%u, ", range->pins[a]); | |
1402 | seq_printf(s, "%u}\n", range->pins[a]); | |
1403 | } | |
1404 | else | |
1405 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1406 | range->id, range->name, | |
1407 | range->base, (range->base + range->npins - 1), | |
1408 | range->pin_base, | |
1409 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1410 | } |
57b676f9 | 1411 | |
42fed7ba | 1412 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1413 | |
1414 | return 0; | |
1415 | } | |
1416 | ||
1417 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1418 | { | |
1419 | struct pinctrl_dev *pctldev; | |
1420 | ||
ae6b4d85 | 1421 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1422 | |
42fed7ba | 1423 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1424 | |
2744e8af LW |
1425 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1426 | seq_printf(s, "%s ", pctldev->desc->name); | |
1427 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1428 | seq_puts(s, "yes "); |
1429 | else | |
1430 | seq_puts(s, "no "); | |
1431 | if (pctldev->desc->confops) | |
2744e8af LW |
1432 | seq_puts(s, "yes"); |
1433 | else | |
1434 | seq_puts(s, "no"); | |
1435 | seq_puts(s, "\n"); | |
1436 | } | |
57b676f9 | 1437 | |
42fed7ba | 1438 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1439 | |
1440 | return 0; | |
1441 | } | |
1442 | ||
1e2082b5 SW |
1443 | static inline const char *map_type(enum pinctrl_map_type type) |
1444 | { | |
1445 | static const char * const names[] = { | |
1446 | "INVALID", | |
1447 | "DUMMY_STATE", | |
1448 | "MUX_GROUP", | |
1449 | "CONFIGS_PIN", | |
1450 | "CONFIGS_GROUP", | |
1451 | }; | |
1452 | ||
1453 | if (type >= ARRAY_SIZE(names)) | |
1454 | return "UNKNOWN"; | |
1455 | ||
1456 | return names[type]; | |
1457 | } | |
1458 | ||
3eedb437 SW |
1459 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1460 | { | |
1461 | struct pinctrl_maps *maps_node; | |
1462 | int i; | |
1463 | struct pinctrl_map const *map; | |
1464 | ||
1465 | seq_puts(s, "Pinctrl maps:\n"); | |
1466 | ||
42fed7ba | 1467 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1468 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1469 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1470 | map->dev_name, map->name, map_type(map->type), | |
1471 | map->type); | |
1472 | ||
1473 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1474 | seq_printf(s, "controlling device %s\n", | |
1475 | map->ctrl_dev_name); | |
1476 | ||
1477 | switch (map->type) { | |
1478 | case PIN_MAP_TYPE_MUX_GROUP: | |
1479 | pinmux_show_map(s, map); | |
1480 | break; | |
1481 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1482 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1483 | pinconf_show_map(s, map); | |
1484 | break; | |
1485 | default: | |
1486 | break; | |
1487 | } | |
1488 | ||
1489 | seq_printf(s, "\n"); | |
3eedb437 | 1490 | } |
42fed7ba | 1491 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1492 | |
1493 | return 0; | |
1494 | } | |
1495 | ||
befe5bdf LW |
1496 | static int pinctrl_show(struct seq_file *s, void *what) |
1497 | { | |
1498 | struct pinctrl *p; | |
6e5e959d | 1499 | struct pinctrl_state *state; |
7ecdb16f | 1500 | struct pinctrl_setting *setting; |
befe5bdf LW |
1501 | |
1502 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1503 | |
42fed7ba | 1504 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1505 | |
befe5bdf | 1506 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1507 | seq_printf(s, "device: %s current state: %s\n", |
1508 | dev_name(p->dev), | |
1509 | p->state ? p->state->name : "none"); | |
1510 | ||
1511 | list_for_each_entry(state, &p->states, node) { | |
1512 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1513 | |
6e5e959d | 1514 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1515 | struct pinctrl_dev *pctldev = setting->pctldev; |
1516 | ||
1517 | seq_printf(s, " type: %s controller %s ", | |
1518 | map_type(setting->type), | |
1519 | pinctrl_dev_get_name(pctldev)); | |
1520 | ||
1521 | switch (setting->type) { | |
1522 | case PIN_MAP_TYPE_MUX_GROUP: | |
1523 | pinmux_show_setting(s, setting); | |
1524 | break; | |
1525 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1526 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1527 | pinconf_show_setting(s, setting); | |
1528 | break; | |
1529 | default: | |
1530 | break; | |
1531 | } | |
6e5e959d | 1532 | } |
befe5bdf | 1533 | } |
befe5bdf LW |
1534 | } |
1535 | ||
42fed7ba | 1536 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1537 | |
befe5bdf LW |
1538 | return 0; |
1539 | } | |
1540 | ||
2744e8af LW |
1541 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1542 | { | |
1543 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1544 | } | |
1545 | ||
1546 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1547 | { | |
1548 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1549 | } | |
1550 | ||
1551 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1552 | { | |
1553 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1554 | } | |
1555 | ||
1556 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1557 | { | |
1558 | return single_open(file, pinctrl_devices_show, NULL); | |
1559 | } | |
1560 | ||
3eedb437 SW |
1561 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1562 | { | |
1563 | return single_open(file, pinctrl_maps_show, NULL); | |
1564 | } | |
1565 | ||
befe5bdf LW |
1566 | static int pinctrl_open(struct inode *inode, struct file *file) |
1567 | { | |
1568 | return single_open(file, pinctrl_show, NULL); | |
1569 | } | |
1570 | ||
2744e8af LW |
1571 | static const struct file_operations pinctrl_pins_ops = { |
1572 | .open = pinctrl_pins_open, | |
1573 | .read = seq_read, | |
1574 | .llseek = seq_lseek, | |
1575 | .release = single_release, | |
1576 | }; | |
1577 | ||
1578 | static const struct file_operations pinctrl_groups_ops = { | |
1579 | .open = pinctrl_groups_open, | |
1580 | .read = seq_read, | |
1581 | .llseek = seq_lseek, | |
1582 | .release = single_release, | |
1583 | }; | |
1584 | ||
1585 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1586 | .open = pinctrl_gpioranges_open, | |
1587 | .read = seq_read, | |
1588 | .llseek = seq_lseek, | |
1589 | .release = single_release, | |
1590 | }; | |
1591 | ||
3eedb437 SW |
1592 | static const struct file_operations pinctrl_devices_ops = { |
1593 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1594 | .read = seq_read, |
1595 | .llseek = seq_lseek, | |
1596 | .release = single_release, | |
1597 | }; | |
1598 | ||
3eedb437 SW |
1599 | static const struct file_operations pinctrl_maps_ops = { |
1600 | .open = pinctrl_maps_open, | |
2744e8af LW |
1601 | .read = seq_read, |
1602 | .llseek = seq_lseek, | |
1603 | .release = single_release, | |
1604 | }; | |
1605 | ||
befe5bdf LW |
1606 | static const struct file_operations pinctrl_ops = { |
1607 | .open = pinctrl_open, | |
1608 | .read = seq_read, | |
1609 | .llseek = seq_lseek, | |
1610 | .release = single_release, | |
1611 | }; | |
1612 | ||
2744e8af LW |
1613 | static struct dentry *debugfs_root; |
1614 | ||
1615 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1616 | { | |
02157160 | 1617 | struct dentry *device_root; |
2744e8af | 1618 | |
51cd24ee | 1619 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1620 | debugfs_root); |
02157160 TL |
1621 | pctldev->device_root = device_root; |
1622 | ||
2744e8af LW |
1623 | if (IS_ERR(device_root) || !device_root) { |
1624 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1625 | dev_name(pctldev->dev)); |
2744e8af LW |
1626 | return; |
1627 | } | |
1628 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1629 | device_root, pctldev, &pinctrl_pins_ops); | |
1630 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1631 | device_root, pctldev, &pinctrl_groups_ops); | |
1632 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1633 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
e7f2a444 FV |
1634 | if (pctldev->desc->pmxops) |
1635 | pinmux_init_device_debugfs(device_root, pctldev); | |
1636 | if (pctldev->desc->confops) | |
1637 | pinconf_init_device_debugfs(device_root, pctldev); | |
2744e8af LW |
1638 | } |
1639 | ||
02157160 TL |
1640 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1641 | { | |
1642 | debugfs_remove_recursive(pctldev->device_root); | |
1643 | } | |
1644 | ||
2744e8af LW |
1645 | static void pinctrl_init_debugfs(void) |
1646 | { | |
1647 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1648 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1649 | pr_warn("failed to create debugfs directory\n"); | |
1650 | debugfs_root = NULL; | |
1651 | return; | |
1652 | } | |
1653 | ||
1654 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1655 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1656 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1657 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1658 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1659 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1660 | } |
1661 | ||
1662 | #else /* CONFIG_DEBUG_FS */ | |
1663 | ||
1664 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1665 | { | |
1666 | } | |
1667 | ||
1668 | static void pinctrl_init_debugfs(void) | |
1669 | { | |
1670 | } | |
1671 | ||
02157160 TL |
1672 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1673 | { | |
1674 | } | |
1675 | ||
2744e8af LW |
1676 | #endif |
1677 | ||
d26bc49f SW |
1678 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1679 | { | |
1680 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1681 | ||
1682 | if (!ops || | |
d1e90e9e | 1683 | !ops->get_groups_count || |
e5b3b2d9 | 1684 | !ops->get_group_name) |
d26bc49f SW |
1685 | return -EINVAL; |
1686 | ||
57291ce2 SW |
1687 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1688 | return -EINVAL; | |
1689 | ||
d26bc49f SW |
1690 | return 0; |
1691 | } | |
1692 | ||
2744e8af LW |
1693 | /** |
1694 | * pinctrl_register() - register a pin controller device | |
1695 | * @pctldesc: descriptor for this pin controller | |
1696 | * @dev: parent device for this pin controller | |
1697 | * @driver_data: private pin controller data for this pin controller | |
1698 | */ | |
1699 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1700 | struct device *dev, void *driver_data) | |
1701 | { | |
2744e8af LW |
1702 | struct pinctrl_dev *pctldev; |
1703 | int ret; | |
1704 | ||
da9aecb0 | 1705 | if (!pctldesc) |
323de9ef | 1706 | return ERR_PTR(-EINVAL); |
da9aecb0 | 1707 | if (!pctldesc->name) |
323de9ef | 1708 | return ERR_PTR(-EINVAL); |
2744e8af | 1709 | |
02f5b989 | 1710 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1711 | if (pctldev == NULL) { |
1712 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
323de9ef | 1713 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 1714 | } |
b9130b77 TL |
1715 | |
1716 | /* Initialize pin control device struct */ | |
1717 | pctldev->owner = pctldesc->owner; | |
1718 | pctldev->desc = pctldesc; | |
1719 | pctldev->driver_data = driver_data; | |
1720 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1721 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 | 1722 | pctldev->dev = dev; |
42fed7ba | 1723 | mutex_init(&pctldev->mutex); |
b9130b77 | 1724 | |
d26bc49f | 1725 | /* check core ops for sanity */ |
323de9ef MY |
1726 | ret = pinctrl_check_ops(pctldev); |
1727 | if (ret) { | |
ad6e1107 | 1728 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1729 | goto out_err; |
1730 | } | |
1731 | ||
2744e8af LW |
1732 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1733 | if (pctldesc->pmxops) { | |
323de9ef MY |
1734 | ret = pinmux_check_ops(pctldev); |
1735 | if (ret) | |
b9130b77 | 1736 | goto out_err; |
2744e8af LW |
1737 | } |
1738 | ||
ae6b4d85 LW |
1739 | /* If we're implementing pinconfig, check the ops for sanity */ |
1740 | if (pctldesc->confops) { | |
323de9ef MY |
1741 | ret = pinconf_check_ops(pctldev); |
1742 | if (ret) | |
b9130b77 | 1743 | goto out_err; |
ae6b4d85 LW |
1744 | } |
1745 | ||
2744e8af | 1746 | /* Register all the pins */ |
ad6e1107 | 1747 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1748 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1749 | if (ret) { | |
ad6e1107 | 1750 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1751 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1752 | pctldesc->npins); | |
51cd24ee | 1753 | goto out_err; |
2744e8af LW |
1754 | } |
1755 | ||
42fed7ba | 1756 | mutex_lock(&pinctrldev_list_mutex); |
8b9c139f | 1757 | list_add_tail(&pctldev->node, &pinctrldev_list); |
42fed7ba PC |
1758 | mutex_unlock(&pinctrldev_list_mutex); |
1759 | ||
1760 | pctldev->p = pinctrl_get(pctldev->dev); | |
57b676f9 | 1761 | |
6e5e959d | 1762 | if (!IS_ERR(pctldev->p)) { |
840a47ba | 1763 | pctldev->hog_default = |
42fed7ba | 1764 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); |
840a47ba | 1765 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1766 | dev_dbg(dev, "failed to lookup the default state\n"); |
1767 | } else { | |
42fed7ba | 1768 | if (pinctrl_select_state(pctldev->p, |
840a47ba | 1769 | pctldev->hog_default)) |
ad6e1107 JC |
1770 | dev_err(dev, |
1771 | "failed to select default state\n"); | |
ad6e1107 | 1772 | } |
840a47ba JD |
1773 | |
1774 | pctldev->hog_sleep = | |
42fed7ba | 1775 | pinctrl_lookup_state(pctldev->p, |
840a47ba JD |
1776 | PINCTRL_STATE_SLEEP); |
1777 | if (IS_ERR(pctldev->hog_sleep)) | |
1778 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1779 | } |
57b676f9 | 1780 | |
2304b473 SW |
1781 | pinctrl_init_device_debugfs(pctldev); |
1782 | ||
2744e8af LW |
1783 | return pctldev; |
1784 | ||
51cd24ee | 1785 | out_err: |
42fed7ba | 1786 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 1787 | kfree(pctldev); |
323de9ef | 1788 | return ERR_PTR(ret); |
2744e8af LW |
1789 | } |
1790 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1791 | ||
1792 | /** | |
1793 | * pinctrl_unregister() - unregister pinmux | |
1794 | * @pctldev: pin controller to unregister | |
1795 | * | |
1796 | * Called by pinmux drivers to unregister a pinmux. | |
1797 | */ | |
1798 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1799 | { | |
5d589b09 | 1800 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1801 | if (pctldev == NULL) |
1802 | return; | |
1803 | ||
42fed7ba | 1804 | mutex_lock(&pctldev->mutex); |
42fed7ba | 1805 | pinctrl_remove_device_debugfs(pctldev); |
db93facf | 1806 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1807 | |
6e5e959d | 1808 | if (!IS_ERR(pctldev->p)) |
42fed7ba | 1809 | pinctrl_put(pctldev->p); |
57b676f9 | 1810 | |
db93facf JL |
1811 | mutex_lock(&pinctrldev_list_mutex); |
1812 | mutex_lock(&pctldev->mutex); | |
2744e8af | 1813 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1814 | list_del(&pctldev->node); |
2744e8af LW |
1815 | /* Destroy descriptor tree */ |
1816 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1817 | pctldev->desc->npins); | |
5d589b09 DA |
1818 | /* remove gpio ranges map */ |
1819 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1820 | list_del(&range->node); | |
1821 | ||
42fed7ba PC |
1822 | mutex_unlock(&pctldev->mutex); |
1823 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 1824 | kfree(pctldev); |
42fed7ba | 1825 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1826 | } |
1827 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1828 | ||
1829 | static int __init pinctrl_init(void) | |
1830 | { | |
1831 | pr_info("initialized pinctrl subsystem\n"); | |
1832 | pinctrl_init_debugfs(); | |
1833 | return 0; | |
1834 | } | |
1835 | ||
1836 | /* init early since many drivers really need to initialized pinmux early */ | |
1837 | core_initcall(pinctrl_init); |