Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
42fed7ba | 43 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 44 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
45 | |
46 | /* Mutex taken to protect pinctrl_maps */ | |
47 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
48 | ||
49 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 50 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
51 | |
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 53 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 59 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 60 | |
befe5bdf | 61 | |
5b3aa5f7 DA |
62 | /** |
63 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
64 | * | |
65 | * Usually this function is called by platforms without pinctrl driver support | |
66 | * but run with some shared drivers using pinctrl APIs. | |
67 | * After calling this function, the pinctrl core will return successfully | |
68 | * with creating a dummy state for the driver to keep going smoothly. | |
69 | */ | |
70 | void pinctrl_provide_dummies(void) | |
71 | { | |
72 | pinctrl_dummy_state = true; | |
73 | } | |
74 | ||
2744e8af LW |
75 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
76 | { | |
77 | /* We're not allowed to register devices without name */ | |
78 | return pctldev->desc->name; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
81 | ||
d6e99abb HZ |
82 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return dev_name(pctldev->dev); | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
87 | ||
2744e8af LW |
88 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
89 | { | |
90 | return pctldev->driver_data; | |
91 | } | |
92 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
93 | ||
94 | /** | |
9dfac4fd LW |
95 | * get_pinctrl_dev_from_devname() - look up pin controller device |
96 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
97 | * |
98 | * Looks up a pin control device matching a certain device name or pure device | |
99 | * pointer, the pure device pointer will take precedence. | |
100 | */ | |
9dfac4fd | 101 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
102 | { |
103 | struct pinctrl_dev *pctldev = NULL; | |
2744e8af | 104 | |
9dfac4fd LW |
105 | if (!devname) |
106 | return NULL; | |
107 | ||
44d5f7bb LW |
108 | mutex_lock(&pinctrldev_list_mutex); |
109 | ||
2744e8af | 110 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 111 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 112 | /* Matched on device name */ |
44d5f7bb LW |
113 | mutex_unlock(&pinctrldev_list_mutex); |
114 | return pctldev; | |
2744e8af LW |
115 | } |
116 | } | |
2744e8af | 117 | |
44d5f7bb LW |
118 | mutex_unlock(&pinctrldev_list_mutex); |
119 | ||
120 | return NULL; | |
2744e8af LW |
121 | } |
122 | ||
42fed7ba PC |
123 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
124 | { | |
125 | struct pinctrl_dev *pctldev; | |
126 | ||
127 | mutex_lock(&pinctrldev_list_mutex); | |
128 | ||
129 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
130 | if (pctldev->dev->of_node == np) { | |
131 | mutex_unlock(&pinctrldev_list_mutex); | |
132 | return pctldev; | |
133 | } | |
134 | ||
d463f82d | 135 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
136 | |
137 | return NULL; | |
138 | } | |
139 | ||
ae6b4d85 LW |
140 | /** |
141 | * pin_get_from_name() - look up a pin number from a name | |
142 | * @pctldev: the pin control device to lookup the pin on | |
143 | * @name: the name of the pin to look up | |
144 | */ | |
145 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
146 | { | |
706e8520 | 147 | unsigned i, pin; |
ae6b4d85 | 148 | |
706e8520 CP |
149 | /* The pin number can be retrived from the pin controller descriptor */ |
150 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
151 | struct pin_desc *desc; |
152 | ||
706e8520 | 153 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
154 | desc = pin_desc_get(pctldev, pin); |
155 | /* Pin space may be sparse */ | |
6c325f87 | 156 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
157 | return pin; |
158 | } | |
159 | ||
160 | return -EINVAL; | |
161 | } | |
162 | ||
dcb5dbc3 DA |
163 | /** |
164 | * pin_get_name_from_id() - look up a pin name from a pin id | |
165 | * @pctldev: the pin control device to lookup the pin on | |
166 | * @name: the name of the pin to look up | |
167 | */ | |
168 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
169 | { | |
170 | const struct pin_desc *desc; | |
171 | ||
172 | desc = pin_desc_get(pctldev, pin); | |
173 | if (desc == NULL) { | |
174 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
175 | pin); | |
176 | return NULL; | |
177 | } | |
178 | ||
179 | return desc->name; | |
180 | } | |
181 | ||
2744e8af LW |
182 | /** |
183 | * pin_is_valid() - check if pin exists on controller | |
184 | * @pctldev: the pin control device to check the pin on | |
185 | * @pin: pin to check, use the local pin controller index number | |
186 | * | |
187 | * This tells us whether a certain pin exist on a certain pin controller or | |
188 | * not. Pin lists may be sparse, so some pins may not exist. | |
189 | */ | |
190 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
191 | { | |
192 | struct pin_desc *pindesc; | |
193 | ||
194 | if (pin < 0) | |
195 | return false; | |
196 | ||
42fed7ba | 197 | mutex_lock(&pctldev->mutex); |
2744e8af | 198 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 199 | mutex_unlock(&pctldev->mutex); |
2744e8af | 200 | |
57b676f9 | 201 | return pindesc != NULL; |
2744e8af LW |
202 | } |
203 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
204 | ||
205 | /* Deletes a range of pin descriptors */ | |
206 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
207 | const struct pinctrl_pin_desc *pins, | |
208 | unsigned num_pins) | |
209 | { | |
210 | int i; | |
211 | ||
2744e8af LW |
212 | for (i = 0; i < num_pins; i++) { |
213 | struct pin_desc *pindesc; | |
214 | ||
215 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
216 | pins[i].number); | |
217 | if (pindesc != NULL) { | |
218 | radix_tree_delete(&pctldev->pin_desc_tree, | |
219 | pins[i].number); | |
ca53c5f1 LW |
220 | if (pindesc->dynamic_name) |
221 | kfree(pindesc->name); | |
2744e8af LW |
222 | } |
223 | kfree(pindesc); | |
224 | } | |
2744e8af LW |
225 | } |
226 | ||
227 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
cd8f61f1 | 228 | const struct pinctrl_pin_desc *pin) |
2744e8af LW |
229 | { |
230 | struct pin_desc *pindesc; | |
231 | ||
cd8f61f1 | 232 | pindesc = pin_desc_get(pctldev, pin->number); |
2744e8af | 233 | if (pindesc != NULL) { |
cd8f61f1 MY |
234 | dev_err(pctldev->dev, "pin %d already registered\n", |
235 | pin->number); | |
2744e8af LW |
236 | return -EINVAL; |
237 | } | |
238 | ||
239 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
240 | if (pindesc == NULL) { |
241 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 242 | return -ENOMEM; |
95dcd4ae | 243 | } |
ae6b4d85 | 244 | |
2744e8af LW |
245 | /* Set owner */ |
246 | pindesc->pctldev = pctldev; | |
247 | ||
9af1e44f | 248 | /* Copy basic pin info */ |
cd8f61f1 MY |
249 | if (pin->name) { |
250 | pindesc->name = pin->name; | |
ca53c5f1 | 251 | } else { |
cd8f61f1 | 252 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number); |
eb26cc9c SK |
253 | if (pindesc->name == NULL) { |
254 | kfree(pindesc); | |
ca53c5f1 | 255 | return -ENOMEM; |
eb26cc9c | 256 | } |
ca53c5f1 LW |
257 | pindesc->dynamic_name = true; |
258 | } | |
2744e8af | 259 | |
cd8f61f1 MY |
260 | pindesc->drv_data = pin->drv_data; |
261 | ||
262 | radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc); | |
2744e8af | 263 | pr_debug("registered pin %d (%s) on %s\n", |
cd8f61f1 | 264 | pin->number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
265 | return 0; |
266 | } | |
267 | ||
268 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
269 | struct pinctrl_pin_desc const *pins, | |
270 | unsigned num_descs) | |
271 | { | |
272 | unsigned i; | |
273 | int ret = 0; | |
274 | ||
275 | for (i = 0; i < num_descs; i++) { | |
cd8f61f1 | 276 | ret = pinctrl_register_one_pin(pctldev, &pins[i]); |
2744e8af LW |
277 | if (ret) |
278 | return ret; | |
279 | } | |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
c8587eee CR |
284 | /** |
285 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
286 | * @range: GPIO range used for the translation | |
287 | * @gpio: gpio pin to translate to a pin number | |
288 | * | |
289 | * Finds the pin number for a given GPIO using the specified GPIO range | |
290 | * as a base for translation. The distinction between linear GPIO ranges | |
291 | * and pin list based GPIO ranges is managed correctly by this function. | |
292 | * | |
293 | * This function assumes the gpio is part of the specified GPIO range, use | |
294 | * only after making sure this is the case (e.g. by calling it on the | |
295 | * result of successful pinctrl_get_device_gpio_range calls)! | |
296 | */ | |
297 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
298 | unsigned int gpio) | |
299 | { | |
300 | unsigned int offset = gpio - range->base; | |
301 | if (range->pins) | |
302 | return range->pins[offset]; | |
303 | else | |
304 | return range->pin_base + offset; | |
305 | } | |
306 | ||
2744e8af LW |
307 | /** |
308 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
309 | * @pctldev: pin controller device to check | |
310 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
311 | * | |
312 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
313 | * controller, return the range or NULL | |
314 | */ | |
315 | static struct pinctrl_gpio_range * | |
316 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
317 | { | |
318 | struct pinctrl_gpio_range *range = NULL; | |
319 | ||
42fed7ba | 320 | mutex_lock(&pctldev->mutex); |
2744e8af | 321 | /* Loop over the ranges */ |
2744e8af LW |
322 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
323 | /* Check if we're in the valid range */ | |
324 | if (gpio >= range->base && | |
325 | gpio < range->base + range->npins) { | |
42fed7ba | 326 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
327 | return range; |
328 | } | |
329 | } | |
42fed7ba | 330 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
331 | return NULL; |
332 | } | |
333 | ||
51e13c24 HZ |
334 | /** |
335 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
336 | * the same GPIO chip are in range | |
337 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
338 | * | |
339 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
340 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
341 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
342 | * of the same GPIO chip don't have back-end pinctrl interface. | |
343 | * If the return value is true, it means that pinctrl device is ready & the | |
344 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
345 | * is false, it means that pinctrl device may not be ready. | |
346 | */ | |
2afe8229 | 347 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
348 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
349 | { | |
350 | struct pinctrl_dev *pctldev; | |
351 | struct pinctrl_gpio_range *range = NULL; | |
352 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
353 | ||
942cde72 TL |
354 | if (WARN(!chip, "no gpio_chip for gpio%i?", gpio)) |
355 | return false; | |
356 | ||
44d5f7bb LW |
357 | mutex_lock(&pinctrldev_list_mutex); |
358 | ||
51e13c24 HZ |
359 | /* Loop over the pin controllers */ |
360 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
361 | /* Loop over the ranges */ | |
5ffbe2e6 | 362 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
363 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
364 | /* Check if any gpio range overlapped with gpio chip */ | |
365 | if (range->base + range->npins - 1 < chip->base || | |
366 | range->base > chip->base + chip->ngpio - 1) | |
367 | continue; | |
5ffbe2e6 | 368 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 369 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
370 | return true; |
371 | } | |
5ffbe2e6 | 372 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 373 | } |
44d5f7bb LW |
374 | |
375 | mutex_unlock(&pinctrldev_list_mutex); | |
376 | ||
51e13c24 HZ |
377 | return false; |
378 | } | |
2afe8229 HZ |
379 | #else |
380 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
381 | #endif | |
51e13c24 | 382 | |
2744e8af LW |
383 | /** |
384 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
385 | * @gpio: the pin to locate the pin controller for | |
386 | * @outdev: the pin control device if found | |
387 | * @outrange: the GPIO range if found | |
388 | * | |
389 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
390 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
391 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
392 | * may still have not been registered. | |
2744e8af | 393 | */ |
4ecce45d SW |
394 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
395 | struct pinctrl_dev **outdev, | |
396 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
397 | { |
398 | struct pinctrl_dev *pctldev = NULL; | |
399 | ||
f0059021 AL |
400 | mutex_lock(&pinctrldev_list_mutex); |
401 | ||
2744e8af | 402 | /* Loop over the pin controllers */ |
2744e8af LW |
403 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
404 | struct pinctrl_gpio_range *range; | |
405 | ||
406 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
407 | if (range != NULL) { | |
408 | *outdev = pctldev; | |
409 | *outrange = range; | |
f0059021 | 410 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
411 | return 0; |
412 | } | |
413 | } | |
2744e8af | 414 | |
f0059021 AL |
415 | mutex_unlock(&pinctrldev_list_mutex); |
416 | ||
4650b7cb | 417 | return -EPROBE_DEFER; |
2744e8af LW |
418 | } |
419 | ||
420 | /** | |
421 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
422 | * @pctldev: pin controller device to add the range to | |
423 | * @range: the GPIO range to add | |
424 | * | |
425 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
426 | * this to register handled ranges after registering your pin controller. | |
427 | */ | |
428 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
429 | struct pinctrl_gpio_range *range) | |
430 | { | |
42fed7ba | 431 | mutex_lock(&pctldev->mutex); |
8b9c139f | 432 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 433 | mutex_unlock(&pctldev->mutex); |
2744e8af | 434 | } |
4ecce45d | 435 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 436 | |
3e5e00b6 DA |
437 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
438 | struct pinctrl_gpio_range *ranges, | |
439 | unsigned nranges) | |
440 | { | |
441 | int i; | |
442 | ||
443 | for (i = 0; i < nranges; i++) | |
444 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
445 | } | |
446 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
447 | ||
192c369c | 448 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
449 | struct pinctrl_gpio_range *range) |
450 | { | |
42fed7ba PC |
451 | struct pinctrl_dev *pctldev; |
452 | ||
42fed7ba | 453 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 454 | |
dfa97515 LW |
455 | /* |
456 | * If we can't find this device, let's assume that is because | |
457 | * it has not probed yet, so the driver trying to register this | |
458 | * range need to defer probing. | |
459 | */ | |
42fed7ba | 460 | if (!pctldev) { |
dfa97515 | 461 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 462 | } |
f23f1516 | 463 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 464 | |
f23f1516 SH |
465 | return pctldev; |
466 | } | |
192c369c | 467 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 468 | |
586a87e6 CR |
469 | int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, |
470 | const unsigned **pins, unsigned *num_pins) | |
471 | { | |
472 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
473 | int gs; | |
474 | ||
e5b3b2d9 AT |
475 | if (!pctlops->get_group_pins) |
476 | return -EINVAL; | |
477 | ||
586a87e6 CR |
478 | gs = pinctrl_get_group_selector(pctldev, pin_group); |
479 | if (gs < 0) | |
480 | return gs; | |
481 | ||
482 | return pctlops->get_group_pins(pctldev, gs, pins, num_pins); | |
483 | } | |
484 | EXPORT_SYMBOL_GPL(pinctrl_get_group_pins); | |
485 | ||
9afbefb2 | 486 | struct pinctrl_gpio_range * |
b18537cd JE |
487 | pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, |
488 | unsigned int pin) | |
9afbefb2 | 489 | { |
c8f50e86 | 490 | struct pinctrl_gpio_range *range; |
9afbefb2 LW |
491 | |
492 | /* Loop over the ranges */ | |
493 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
494 | /* Check if we're in the valid range */ | |
c8587eee CR |
495 | if (range->pins) { |
496 | int a; | |
497 | for (a = 0; a < range->npins; a++) { | |
498 | if (range->pins[a] == pin) | |
b18537cd | 499 | return range; |
c8587eee CR |
500 | } |
501 | } else if (pin >= range->pin_base && | |
c8f50e86 | 502 | pin < range->pin_base + range->npins) |
b18537cd | 503 | return range; |
9afbefb2 | 504 | } |
b18537cd JE |
505 | |
506 | return NULL; | |
507 | } | |
508 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock); | |
509 | ||
510 | /** | |
511 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
512 | * @pctldev: the pin controller device to look in | |
513 | * @pin: a controller-local number to find the range for | |
514 | */ | |
515 | struct pinctrl_gpio_range * | |
516 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
517 | unsigned int pin) | |
518 | { | |
519 | struct pinctrl_gpio_range *range; | |
520 | ||
521 | mutex_lock(&pctldev->mutex); | |
522 | range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin); | |
42fed7ba | 523 | mutex_unlock(&pctldev->mutex); |
b18537cd | 524 | |
c8f50e86 | 525 | return range; |
9afbefb2 LW |
526 | } |
527 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
528 | ||
7e10ee68 VK |
529 | /** |
530 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
531 | * @pctldev: pin controller device to remove the range from | |
532 | * @range: the GPIO range to remove | |
533 | */ | |
534 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
535 | struct pinctrl_gpio_range *range) | |
536 | { | |
42fed7ba | 537 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 538 | list_del(&range->node); |
42fed7ba | 539 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
540 | } |
541 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
542 | ||
7afde8ba LW |
543 | /** |
544 | * pinctrl_get_group_selector() - returns the group selector for a group | |
545 | * @pctldev: the pin controller handling the group | |
546 | * @pin_group: the pin group to look up | |
547 | */ | |
548 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
549 | const char *pin_group) | |
550 | { | |
551 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 552 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
553 | unsigned group_selector = 0; |
554 | ||
d1e90e9e | 555 | while (group_selector < ngroups) { |
7afde8ba LW |
556 | const char *gname = pctlops->get_group_name(pctldev, |
557 | group_selector); | |
558 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 559 | dev_dbg(pctldev->dev, |
7afde8ba LW |
560 | "found group selector %u for %s\n", |
561 | group_selector, | |
562 | pin_group); | |
563 | return group_selector; | |
564 | } | |
565 | ||
566 | group_selector++; | |
567 | } | |
568 | ||
51cd24ee | 569 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
570 | pin_group); |
571 | ||
572 | return -EINVAL; | |
573 | } | |
574 | ||
befe5bdf | 575 | /** |
b217e438 | 576 | * pinctrl_request_gpio() - request a single pin to be used as GPIO |
befe5bdf LW |
577 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
578 | * | |
579 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
580 | * as part of their gpio_request() semantics, platforms and individual drivers | |
581 | * shall *NOT* request GPIO pins to be muxed in. | |
582 | */ | |
583 | int pinctrl_request_gpio(unsigned gpio) | |
584 | { | |
585 | struct pinctrl_dev *pctldev; | |
586 | struct pinctrl_gpio_range *range; | |
587 | int ret; | |
588 | int pin; | |
589 | ||
590 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 591 | if (ret) { |
51e13c24 HZ |
592 | if (pinctrl_ready_for_gpio_range(gpio)) |
593 | ret = 0; | |
4650b7cb | 594 | return ret; |
57b676f9 | 595 | } |
befe5bdf | 596 | |
9b77ace4 AL |
597 | mutex_lock(&pctldev->mutex); |
598 | ||
befe5bdf | 599 | /* Convert to the pin controllers number space */ |
c8587eee | 600 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 601 | |
57b676f9 SW |
602 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
603 | ||
9b77ace4 AL |
604 | mutex_unlock(&pctldev->mutex); |
605 | ||
57b676f9 | 606 | return ret; |
befe5bdf LW |
607 | } |
608 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
609 | ||
610 | /** | |
611 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
612 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
613 | * | |
614 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
615 | * as part of their gpio_free() semantics, platforms and individual drivers | |
616 | * shall *NOT* request GPIO pins to be muxed out. | |
617 | */ | |
618 | void pinctrl_free_gpio(unsigned gpio) | |
619 | { | |
620 | struct pinctrl_dev *pctldev; | |
621 | struct pinctrl_gpio_range *range; | |
622 | int ret; | |
623 | int pin; | |
624 | ||
625 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 626 | if (ret) { |
befe5bdf | 627 | return; |
57b676f9 | 628 | } |
42fed7ba | 629 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
630 | |
631 | /* Convert to the pin controllers number space */ | |
c8587eee | 632 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 633 | |
57b676f9 SW |
634 | pinmux_free_gpio(pctldev, pin, range); |
635 | ||
42fed7ba | 636 | mutex_unlock(&pctldev->mutex); |
befe5bdf LW |
637 | } |
638 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
639 | ||
640 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
641 | { | |
642 | struct pinctrl_dev *pctldev; | |
643 | struct pinctrl_gpio_range *range; | |
644 | int ret; | |
645 | int pin; | |
646 | ||
647 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 648 | if (ret) { |
befe5bdf | 649 | return ret; |
42fed7ba PC |
650 | } |
651 | ||
652 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
653 | |
654 | /* Convert to the pin controllers number space */ | |
c8587eee | 655 | pin = gpio_to_pin(range, gpio); |
42fed7ba PC |
656 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
657 | ||
658 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 659 | |
42fed7ba | 660 | return ret; |
befe5bdf LW |
661 | } |
662 | ||
663 | /** | |
664 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
665 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
666 | * | |
667 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
668 | * as part of their gpio_direction_input() semantics, platforms and individual | |
669 | * drivers shall *NOT* touch pin control GPIO calls. | |
670 | */ | |
671 | int pinctrl_gpio_direction_input(unsigned gpio) | |
672 | { | |
42fed7ba | 673 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
674 | } |
675 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
676 | ||
677 | /** | |
678 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
679 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
680 | * | |
681 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
682 | * as part of their gpio_direction_output() semantics, platforms and individual | |
683 | * drivers shall *NOT* touch pin control GPIO calls. | |
684 | */ | |
685 | int pinctrl_gpio_direction_output(unsigned gpio) | |
686 | { | |
42fed7ba | 687 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
688 | } |
689 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
690 | ||
6e5e959d SW |
691 | static struct pinctrl_state *find_state(struct pinctrl *p, |
692 | const char *name) | |
befe5bdf | 693 | { |
6e5e959d SW |
694 | struct pinctrl_state *state; |
695 | ||
696 | list_for_each_entry(state, &p->states, node) | |
697 | if (!strcmp(state->name, name)) | |
698 | return state; | |
699 | ||
700 | return NULL; | |
701 | } | |
702 | ||
703 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
704 | const char *name) | |
705 | { | |
706 | struct pinctrl_state *state; | |
707 | ||
708 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
709 | if (state == NULL) { | |
710 | dev_err(p->dev, | |
711 | "failed to alloc struct pinctrl_state\n"); | |
712 | return ERR_PTR(-ENOMEM); | |
713 | } | |
714 | ||
715 | state->name = name; | |
716 | INIT_LIST_HEAD(&state->settings); | |
717 | ||
718 | list_add_tail(&state->node, &p->states); | |
719 | ||
720 | return state; | |
721 | } | |
722 | ||
723 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
724 | { | |
725 | struct pinctrl_state *state; | |
7ecdb16f | 726 | struct pinctrl_setting *setting; |
6e5e959d | 727 | int ret; |
befe5bdf | 728 | |
6e5e959d SW |
729 | state = find_state(p, map->name); |
730 | if (!state) | |
731 | state = create_state(p, map->name); | |
732 | if (IS_ERR(state)) | |
733 | return PTR_ERR(state); | |
befe5bdf | 734 | |
1e2082b5 SW |
735 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
736 | return 0; | |
737 | ||
6e5e959d SW |
738 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
739 | if (setting == NULL) { | |
740 | dev_err(p->dev, | |
741 | "failed to alloc struct pinctrl_setting\n"); | |
742 | return -ENOMEM; | |
743 | } | |
befe5bdf | 744 | |
1e2082b5 SW |
745 | setting->type = map->type; |
746 | ||
6e5e959d SW |
747 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
748 | if (setting->pctldev == NULL) { | |
6e5e959d | 749 | kfree(setting); |
89216494 LW |
750 | /* Do not defer probing of hogs (circular loop) */ |
751 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
752 | return -ENODEV; | |
c05127c4 LW |
753 | /* |
754 | * OK let us guess that the driver is not there yet, and | |
755 | * let's defer obtaining this pinctrl handle to later... | |
756 | */ | |
89216494 LW |
757 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
758 | map->ctrl_dev_name); | |
c05127c4 | 759 | return -EPROBE_DEFER; |
6e5e959d SW |
760 | } |
761 | ||
1a78958d LW |
762 | setting->dev_name = map->dev_name; |
763 | ||
1e2082b5 SW |
764 | switch (map->type) { |
765 | case PIN_MAP_TYPE_MUX_GROUP: | |
766 | ret = pinmux_map_to_setting(map, setting); | |
767 | break; | |
768 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
769 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
770 | ret = pinconf_map_to_setting(map, setting); | |
771 | break; | |
772 | default: | |
773 | ret = -EINVAL; | |
774 | break; | |
775 | } | |
6e5e959d SW |
776 | if (ret < 0) { |
777 | kfree(setting); | |
778 | return ret; | |
779 | } | |
780 | ||
781 | list_add_tail(&setting->node, &state->settings); | |
782 | ||
783 | return 0; | |
784 | } | |
785 | ||
786 | static struct pinctrl *find_pinctrl(struct device *dev) | |
787 | { | |
788 | struct pinctrl *p; | |
789 | ||
42fed7ba | 790 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 791 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
792 | if (p->dev == dev) { |
793 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 794 | return p; |
42fed7ba | 795 | } |
6e5e959d | 796 | |
42fed7ba | 797 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
798 | return NULL; |
799 | } | |
800 | ||
42fed7ba | 801 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d SW |
802 | |
803 | static struct pinctrl *create_pinctrl(struct device *dev) | |
804 | { | |
805 | struct pinctrl *p; | |
806 | const char *devname; | |
807 | struct pinctrl_maps *maps_node; | |
808 | int i; | |
809 | struct pinctrl_map const *map; | |
810 | int ret; | |
befe5bdf LW |
811 | |
812 | /* | |
813 | * create the state cookie holder struct pinctrl for each | |
814 | * mapping, this is what consumers will get when requesting | |
815 | * a pin control handle with pinctrl_get() | |
816 | */ | |
02f5b989 | 817 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
818 | if (p == NULL) { |
819 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 820 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 821 | } |
7ecdb16f | 822 | p->dev = dev; |
6e5e959d | 823 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
824 | INIT_LIST_HEAD(&p->dt_maps); |
825 | ||
826 | ret = pinctrl_dt_to_map(p); | |
827 | if (ret < 0) { | |
828 | kfree(p); | |
829 | return ERR_PTR(ret); | |
830 | } | |
6e5e959d SW |
831 | |
832 | devname = dev_name(dev); | |
befe5bdf | 833 | |
42fed7ba | 834 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 835 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 836 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
837 | /* Map must be for this device */ |
838 | if (strcmp(map->dev_name, devname)) | |
839 | continue; | |
840 | ||
6e5e959d | 841 | ret = add_setting(p, map); |
89216494 LW |
842 | /* |
843 | * At this point the adding of a setting may: | |
844 | * | |
845 | * - Defer, if the pinctrl device is not yet available | |
846 | * - Fail, if the pinctrl device is not yet available, | |
847 | * AND the setting is a hog. We cannot defer that, since | |
848 | * the hog will kick in immediately after the device | |
849 | * is registered. | |
850 | * | |
851 | * If the error returned was not -EPROBE_DEFER then we | |
852 | * accumulate the errors to see if we end up with | |
853 | * an -EPROBE_DEFER later, as that is the worst case. | |
854 | */ | |
855 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
856 | pinctrl_free(p, false); |
857 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 858 | return ERR_PTR(ret); |
7ecdb16f | 859 | } |
befe5bdf | 860 | } |
42fed7ba PC |
861 | mutex_unlock(&pinctrl_maps_mutex); |
862 | ||
89216494 LW |
863 | if (ret < 0) { |
864 | /* If some other error than deferral occured, return here */ | |
42fed7ba | 865 | pinctrl_free(p, false); |
89216494 LW |
866 | return ERR_PTR(ret); |
867 | } | |
befe5bdf | 868 | |
ab78029e LW |
869 | kref_init(&p->users); |
870 | ||
b0666ba4 | 871 | /* Add the pinctrl handle to the global list */ |
7b320cb1 | 872 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 873 | list_add_tail(&p->node, &pinctrl_list); |
7b320cb1 | 874 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
875 | |
876 | return p; | |
6e5e959d | 877 | } |
7ecdb16f | 878 | |
42fed7ba PC |
879 | /** |
880 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
881 | * @dev: the device to obtain the handle for | |
882 | */ | |
883 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
884 | { |
885 | struct pinctrl *p; | |
7ecdb16f | 886 | |
6e5e959d SW |
887 | if (WARN_ON(!dev)) |
888 | return ERR_PTR(-EINVAL); | |
889 | ||
ab78029e LW |
890 | /* |
891 | * See if somebody else (such as the device core) has already | |
892 | * obtained a handle to the pinctrl for this device. In that case, | |
893 | * return another pointer to it. | |
894 | */ | |
6e5e959d | 895 | p = find_pinctrl(dev); |
ab78029e LW |
896 | if (p != NULL) { |
897 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
898 | kref_get(&p->users); | |
899 | return p; | |
900 | } | |
7ecdb16f | 901 | |
d599bfb3 | 902 | return create_pinctrl(dev); |
befe5bdf LW |
903 | } |
904 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
905 | ||
d3cee830 RG |
906 | static void pinctrl_free_setting(bool disable_setting, |
907 | struct pinctrl_setting *setting) | |
908 | { | |
909 | switch (setting->type) { | |
910 | case PIN_MAP_TYPE_MUX_GROUP: | |
911 | if (disable_setting) | |
912 | pinmux_disable_setting(setting); | |
913 | pinmux_free_setting(setting); | |
914 | break; | |
915 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
916 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
917 | pinconf_free_setting(setting); | |
918 | break; | |
919 | default: | |
920 | break; | |
921 | } | |
922 | } | |
923 | ||
42fed7ba | 924 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 925 | { |
6e5e959d SW |
926 | struct pinctrl_state *state, *n1; |
927 | struct pinctrl_setting *setting, *n2; | |
928 | ||
42fed7ba | 929 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
930 | list_for_each_entry_safe(state, n1, &p->states, node) { |
931 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 932 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
933 | list_del(&setting->node); |
934 | kfree(setting); | |
935 | } | |
936 | list_del(&state->node); | |
937 | kfree(state); | |
7ecdb16f | 938 | } |
befe5bdf | 939 | |
57291ce2 SW |
940 | pinctrl_dt_free_maps(p); |
941 | ||
6e5e959d SW |
942 | if (inlist) |
943 | list_del(&p->node); | |
befe5bdf | 944 | kfree(p); |
42fed7ba | 945 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 946 | } |
befe5bdf LW |
947 | |
948 | /** | |
ab78029e LW |
949 | * pinctrl_release() - release the pinctrl handle |
950 | * @kref: the kref in the pinctrl being released | |
951 | */ | |
2917e833 | 952 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
953 | { |
954 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
955 | ||
42fed7ba | 956 | pinctrl_free(p, true); |
ab78029e LW |
957 | } |
958 | ||
959 | /** | |
960 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 961 | * @p: the pinctrl handle to release |
befe5bdf | 962 | */ |
57b676f9 SW |
963 | void pinctrl_put(struct pinctrl *p) |
964 | { | |
ab78029e | 965 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
966 | } |
967 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
968 | ||
42fed7ba PC |
969 | /** |
970 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
971 | * @p: the pinctrl handle to retrieve the state from | |
972 | * @name: the state name to retrieve | |
973 | */ | |
974 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
975 | const char *name) | |
befe5bdf | 976 | { |
6e5e959d | 977 | struct pinctrl_state *state; |
befe5bdf | 978 | |
6e5e959d | 979 | state = find_state(p, name); |
5b3aa5f7 DA |
980 | if (!state) { |
981 | if (pinctrl_dummy_state) { | |
982 | /* create dummy state */ | |
983 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
984 | name); | |
985 | state = create_state(p, name); | |
d599bfb3 RG |
986 | } else |
987 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 988 | } |
57b676f9 | 989 | |
6e5e959d | 990 | return state; |
befe5bdf | 991 | } |
42fed7ba | 992 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
993 | |
994 | /** | |
42fed7ba PC |
995 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW |
996 | * @p: the pinctrl handle for the device that requests configuration | |
997 | * @state: the state handle to select/activate/program | |
befe5bdf | 998 | */ |
42fed7ba | 999 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 1000 | { |
6e5e959d | 1001 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 1002 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 1003 | int ret; |
7ecdb16f | 1004 | |
6e5e959d SW |
1005 | if (p->state == state) |
1006 | return 0; | |
befe5bdf | 1007 | |
6e5e959d SW |
1008 | if (p->state) { |
1009 | /* | |
2243a87d FW |
1010 | * For each pinmux setting in the old state, forget SW's record |
1011 | * of mux owner for that pingroup. Any pingroups which are | |
1012 | * still owned by the new state will be re-acquired by the call | |
1013 | * to pinmux_enable_setting() in the loop below. | |
6e5e959d SW |
1014 | */ |
1015 | list_for_each_entry(setting, &p->state->settings, node) { | |
1e2082b5 SW |
1016 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
1017 | continue; | |
2243a87d | 1018 | pinmux_disable_setting(setting); |
6e5e959d SW |
1019 | } |
1020 | } | |
1021 | ||
3102a76c | 1022 | p->state = NULL; |
6e5e959d SW |
1023 | |
1024 | /* Apply all the settings for the new state */ | |
1025 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
1026 | switch (setting->type) { |
1027 | case PIN_MAP_TYPE_MUX_GROUP: | |
1028 | ret = pinmux_enable_setting(setting); | |
1029 | break; | |
1030 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1031 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1032 | ret = pinconf_apply_setting(setting); | |
1033 | break; | |
1034 | default: | |
1035 | ret = -EINVAL; | |
1036 | break; | |
1037 | } | |
3102a76c | 1038 | |
42fed7ba | 1039 | if (ret < 0) { |
3102a76c | 1040 | goto unapply_new_state; |
42fed7ba | 1041 | } |
befe5bdf | 1042 | } |
6e5e959d | 1043 | |
3102a76c RG |
1044 | p->state = state; |
1045 | ||
6e5e959d | 1046 | return 0; |
3102a76c RG |
1047 | |
1048 | unapply_new_state: | |
da58751c | 1049 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1050 | |
3102a76c RG |
1051 | list_for_each_entry(setting2, &state->settings, node) { |
1052 | if (&setting2->node == &setting->node) | |
1053 | break; | |
af606177 RG |
1054 | /* |
1055 | * All we can do here is pinmux_disable_setting. | |
1056 | * That means that some pins are muxed differently now | |
1057 | * than they were before applying the setting (We can't | |
1058 | * "unmux a pin"!), but it's not a big deal since the pins | |
1059 | * are free to be muxed by another apply_setting. | |
1060 | */ | |
1061 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1062 | pinmux_disable_setting(setting2); | |
3102a76c | 1063 | } |
8009d5ff | 1064 | |
385d9424 RG |
1065 | /* There's no infinite recursive loop here because p->state is NULL */ |
1066 | if (old_state) | |
42fed7ba | 1067 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1068 | |
1069 | return ret; | |
befe5bdf | 1070 | } |
6e5e959d | 1071 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1072 | |
6d4ca1fb SW |
1073 | static void devm_pinctrl_release(struct device *dev, void *res) |
1074 | { | |
1075 | pinctrl_put(*(struct pinctrl **)res); | |
1076 | } | |
1077 | ||
1078 | /** | |
1079 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1080 | * @dev: the device to obtain the handle for | |
1081 | * | |
1082 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1083 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1084 | */ | |
1085 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1086 | { | |
1087 | struct pinctrl **ptr, *p; | |
1088 | ||
1089 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1090 | if (!ptr) | |
1091 | return ERR_PTR(-ENOMEM); | |
1092 | ||
1093 | p = pinctrl_get(dev); | |
1094 | if (!IS_ERR(p)) { | |
1095 | *ptr = p; | |
1096 | devres_add(dev, ptr); | |
1097 | } else { | |
1098 | devres_free(ptr); | |
1099 | } | |
1100 | ||
1101 | return p; | |
1102 | } | |
1103 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1104 | ||
1105 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1106 | { | |
1107 | struct pinctrl **p = res; | |
1108 | ||
1109 | return *p == data; | |
1110 | } | |
1111 | ||
1112 | /** | |
1113 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1114 | * @p: the pinctrl handle to release | |
1115 | * | |
1116 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1117 | * this function will not need to be called and the resource management | |
1118 | * code will ensure that the resource is freed. | |
1119 | */ | |
1120 | void devm_pinctrl_put(struct pinctrl *p) | |
1121 | { | |
a72149e8 | 1122 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1123 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1124 | } |
1125 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1126 | ||
57291ce2 | 1127 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
c5272a28 | 1128 | bool dup) |
befe5bdf | 1129 | { |
1e2082b5 | 1130 | int i, ret; |
b2b3e66e | 1131 | struct pinctrl_maps *maps_node; |
befe5bdf | 1132 | |
7e9236ff | 1133 | pr_debug("add %u pinctrl maps\n", num_maps); |
befe5bdf LW |
1134 | |
1135 | /* First sanity check the new mapping */ | |
1136 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1137 | if (!maps[i].dev_name) { |
1138 | pr_err("failed to register map %s (%d): no device given\n", | |
1139 | maps[i].name, i); | |
1140 | return -EINVAL; | |
1141 | } | |
1142 | ||
befe5bdf LW |
1143 | if (!maps[i].name) { |
1144 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1145 | i); |
befe5bdf LW |
1146 | return -EINVAL; |
1147 | } | |
1148 | ||
1e2082b5 SW |
1149 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1150 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1151 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1152 | maps[i].name, i); | |
1153 | return -EINVAL; | |
1154 | } | |
1155 | ||
1e2082b5 SW |
1156 | switch (maps[i].type) { |
1157 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1158 | break; | |
1159 | case PIN_MAP_TYPE_MUX_GROUP: | |
1160 | ret = pinmux_validate_map(&maps[i], i); | |
1161 | if (ret < 0) | |
fde04f41 | 1162 | return ret; |
1e2082b5 SW |
1163 | break; |
1164 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1165 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1166 | ret = pinconf_validate_map(&maps[i], i); | |
1167 | if (ret < 0) | |
fde04f41 | 1168 | return ret; |
1e2082b5 SW |
1169 | break; |
1170 | default: | |
1171 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1172 | maps[i].name, i); |
1681f5ae SW |
1173 | return -EINVAL; |
1174 | } | |
befe5bdf LW |
1175 | } |
1176 | ||
b2b3e66e SW |
1177 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1178 | if (!maps_node) { | |
1179 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1180 | return -ENOMEM; | |
1181 | } | |
befe5bdf | 1182 | |
b2b3e66e | 1183 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1184 | if (dup) { |
1185 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1186 | GFP_KERNEL); | |
1187 | if (!maps_node->maps) { | |
1188 | pr_err("failed to duplicate mapping table\n"); | |
1189 | kfree(maps_node); | |
1190 | return -ENOMEM; | |
1191 | } | |
1192 | } else { | |
1193 | maps_node->maps = maps; | |
befe5bdf LW |
1194 | } |
1195 | ||
c5272a28 | 1196 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1197 | list_add_tail(&maps_node->node, &pinctrl_maps); |
c5272a28 | 1198 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1199 | |
befe5bdf LW |
1200 | return 0; |
1201 | } | |
1202 | ||
57291ce2 SW |
1203 | /** |
1204 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1205 | * @maps: the pincontrol mappings table to register. This should probably be | |
1206 | * marked with __initdata so it can be discarded after boot. This | |
1207 | * function will perform a shallow copy for the mapping entries. | |
1208 | * @num_maps: the number of maps in the mapping table | |
1209 | */ | |
1210 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1211 | unsigned num_maps) | |
1212 | { | |
c5272a28 | 1213 | return pinctrl_register_map(maps, num_maps, true); |
57291ce2 SW |
1214 | } |
1215 | ||
1216 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1217 | { | |
1218 | struct pinctrl_maps *maps_node; | |
1219 | ||
42fed7ba | 1220 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1221 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1222 | if (maps_node->maps == map) { | |
1223 | list_del(&maps_node->node); | |
db6c2c69 | 1224 | kfree(maps_node); |
42fed7ba | 1225 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1226 | return; |
1227 | } | |
1228 | } | |
42fed7ba | 1229 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1230 | } |
1231 | ||
840a47ba JD |
1232 | /** |
1233 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1234 | * @pctldev: pin controller device | |
1235 | */ | |
1236 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1237 | { | |
1238 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1239 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1240 | return 0; | |
1241 | } | |
1242 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1243 | ||
1244 | /** | |
1245 | * pinctrl_force_default() - turn a given controller device into default state | |
1246 | * @pctldev: pin controller device | |
1247 | */ | |
1248 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1249 | { | |
1250 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1251 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1252 | return 0; | |
1253 | } | |
1254 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1255 | ||
ef0eebc0 DA |
1256 | /** |
1257 | * pinctrl_init_done() - tell pinctrl probe is done | |
1258 | * | |
1259 | * We'll use this time to switch the pins from "init" to "default" unless the | |
1260 | * driver selected some other state. | |
1261 | * | |
1262 | * @dev: device to that's done probing | |
1263 | */ | |
1264 | int pinctrl_init_done(struct device *dev) | |
1265 | { | |
1266 | struct dev_pin_info *pins = dev->pins; | |
1267 | int ret; | |
1268 | ||
1269 | if (!pins) | |
1270 | return 0; | |
1271 | ||
1272 | if (IS_ERR(pins->init_state)) | |
1273 | return 0; /* No such state */ | |
1274 | ||
1275 | if (pins->p->state != pins->init_state) | |
1276 | return 0; /* Not at init anyway */ | |
1277 | ||
1278 | if (IS_ERR(pins->default_state)) | |
1279 | return 0; /* No default state */ | |
1280 | ||
1281 | ret = pinctrl_select_state(pins->p, pins->default_state); | |
1282 | if (ret) | |
1283 | dev_err(dev, "failed to activate default pinctrl state\n"); | |
1284 | ||
1285 | return ret; | |
1286 | } | |
1287 | ||
14005ee2 LW |
1288 | #ifdef CONFIG_PM |
1289 | ||
1290 | /** | |
f3333497 | 1291 | * pinctrl_pm_select_state() - select pinctrl state for PM |
14005ee2 | 1292 | * @dev: device to select default state for |
f3333497 | 1293 | * @state: state to set |
14005ee2 | 1294 | */ |
f3333497 TL |
1295 | static int pinctrl_pm_select_state(struct device *dev, |
1296 | struct pinctrl_state *state) | |
14005ee2 LW |
1297 | { |
1298 | struct dev_pin_info *pins = dev->pins; | |
1299 | int ret; | |
1300 | ||
f3333497 TL |
1301 | if (IS_ERR(state)) |
1302 | return 0; /* No such state */ | |
1303 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1304 | if (ret) |
f3333497 TL |
1305 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1306 | state->name); | |
14005ee2 LW |
1307 | return ret; |
1308 | } | |
f3333497 TL |
1309 | |
1310 | /** | |
1311 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1312 | * @dev: device to select default state for | |
1313 | */ | |
1314 | int pinctrl_pm_select_default_state(struct device *dev) | |
1315 | { | |
1316 | if (!dev->pins) | |
1317 | return 0; | |
1318 | ||
1319 | return pinctrl_pm_select_state(dev, dev->pins->default_state); | |
1320 | } | |
f472dead | 1321 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1322 | |
1323 | /** | |
1324 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1325 | * @dev: device to select sleep state for | |
1326 | */ | |
1327 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1328 | { | |
f3333497 | 1329 | if (!dev->pins) |
14005ee2 | 1330 | return 0; |
f3333497 TL |
1331 | |
1332 | return pinctrl_pm_select_state(dev, dev->pins->sleep_state); | |
14005ee2 | 1333 | } |
f472dead | 1334 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1335 | |
1336 | /** | |
1337 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1338 | * @dev: device to select idle state for | |
1339 | */ | |
1340 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1341 | { | |
f3333497 | 1342 | if (!dev->pins) |
14005ee2 | 1343 | return 0; |
f3333497 TL |
1344 | |
1345 | return pinctrl_pm_select_state(dev, dev->pins->idle_state); | |
14005ee2 | 1346 | } |
f472dead | 1347 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1348 | #endif |
1349 | ||
2744e8af LW |
1350 | #ifdef CONFIG_DEBUG_FS |
1351 | ||
1352 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1353 | { | |
1354 | struct pinctrl_dev *pctldev = s->private; | |
1355 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1356 | unsigned i, pin; |
2744e8af LW |
1357 | |
1358 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1359 | |
42fed7ba | 1360 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1361 | |
706e8520 CP |
1362 | /* The pin number can be retrived from the pin controller descriptor */ |
1363 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1364 | struct pin_desc *desc; |
1365 | ||
706e8520 | 1366 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1367 | desc = pin_desc_get(pctldev, pin); |
1368 | /* Pin space may be sparse */ | |
1369 | if (desc == NULL) | |
1370 | continue; | |
1371 | ||
cf9d994d | 1372 | seq_printf(s, "pin %d (%s) ", pin, desc->name); |
2744e8af LW |
1373 | |
1374 | /* Driver-specific info per pin */ | |
1375 | if (ops->pin_dbg_show) | |
1376 | ops->pin_dbg_show(pctldev, s, pin); | |
1377 | ||
1378 | seq_puts(s, "\n"); | |
1379 | } | |
1380 | ||
42fed7ba | 1381 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1382 | |
2744e8af LW |
1383 | return 0; |
1384 | } | |
1385 | ||
1386 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1387 | { | |
1388 | struct pinctrl_dev *pctldev = s->private; | |
1389 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1390 | unsigned ngroups, selector = 0; |
2744e8af | 1391 | |
42fed7ba PC |
1392 | mutex_lock(&pctldev->mutex); |
1393 | ||
d1e90e9e | 1394 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1395 | |
2744e8af | 1396 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1397 | while (selector < ngroups) { |
e5b3b2d9 AT |
1398 | const unsigned *pins = NULL; |
1399 | unsigned num_pins = 0; | |
2744e8af | 1400 | const char *gname = ops->get_group_name(pctldev, selector); |
dcb5dbc3 | 1401 | const char *pname; |
e5b3b2d9 | 1402 | int ret = 0; |
2744e8af LW |
1403 | int i; |
1404 | ||
e5b3b2d9 AT |
1405 | if (ops->get_group_pins) |
1406 | ret = ops->get_group_pins(pctldev, selector, | |
1407 | &pins, &num_pins); | |
2744e8af LW |
1408 | if (ret) |
1409 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1410 | gname); | |
1411 | else { | |
dcb5dbc3 DA |
1412 | seq_printf(s, "group: %s\n", gname); |
1413 | for (i = 0; i < num_pins; i++) { | |
1414 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1415 | if (WARN_ON(!pname)) { |
42fed7ba | 1416 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1417 | return -EINVAL; |
b4dd784b | 1418 | } |
dcb5dbc3 DA |
1419 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1420 | } | |
1421 | seq_puts(s, "\n"); | |
2744e8af LW |
1422 | } |
1423 | selector++; | |
1424 | } | |
1425 | ||
42fed7ba | 1426 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1427 | |
1428 | return 0; | |
1429 | } | |
1430 | ||
1431 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1432 | { | |
1433 | struct pinctrl_dev *pctldev = s->private; | |
1434 | struct pinctrl_gpio_range *range = NULL; | |
1435 | ||
1436 | seq_puts(s, "GPIO ranges handled:\n"); | |
1437 | ||
42fed7ba | 1438 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1439 | |
2744e8af | 1440 | /* Loop over the ranges */ |
2744e8af | 1441 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1442 | if (range->pins) { |
1443 | int a; | |
1444 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1445 | range->id, range->name, | |
1446 | range->base, (range->base + range->npins - 1)); | |
1447 | for (a = 0; a < range->npins - 1; a++) | |
1448 | seq_printf(s, "%u, ", range->pins[a]); | |
1449 | seq_printf(s, "%u}\n", range->pins[a]); | |
1450 | } | |
1451 | else | |
1452 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1453 | range->id, range->name, | |
1454 | range->base, (range->base + range->npins - 1), | |
1455 | range->pin_base, | |
1456 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1457 | } |
57b676f9 | 1458 | |
42fed7ba | 1459 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1460 | |
1461 | return 0; | |
1462 | } | |
1463 | ||
1464 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1465 | { | |
1466 | struct pinctrl_dev *pctldev; | |
1467 | ||
ae6b4d85 | 1468 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1469 | |
42fed7ba | 1470 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1471 | |
2744e8af LW |
1472 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1473 | seq_printf(s, "%s ", pctldev->desc->name); | |
1474 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1475 | seq_puts(s, "yes "); |
1476 | else | |
1477 | seq_puts(s, "no "); | |
1478 | if (pctldev->desc->confops) | |
2744e8af LW |
1479 | seq_puts(s, "yes"); |
1480 | else | |
1481 | seq_puts(s, "no"); | |
1482 | seq_puts(s, "\n"); | |
1483 | } | |
57b676f9 | 1484 | |
42fed7ba | 1485 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1486 | |
1487 | return 0; | |
1488 | } | |
1489 | ||
1e2082b5 SW |
1490 | static inline const char *map_type(enum pinctrl_map_type type) |
1491 | { | |
1492 | static const char * const names[] = { | |
1493 | "INVALID", | |
1494 | "DUMMY_STATE", | |
1495 | "MUX_GROUP", | |
1496 | "CONFIGS_PIN", | |
1497 | "CONFIGS_GROUP", | |
1498 | }; | |
1499 | ||
1500 | if (type >= ARRAY_SIZE(names)) | |
1501 | return "UNKNOWN"; | |
1502 | ||
1503 | return names[type]; | |
1504 | } | |
1505 | ||
3eedb437 SW |
1506 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1507 | { | |
1508 | struct pinctrl_maps *maps_node; | |
1509 | int i; | |
1510 | struct pinctrl_map const *map; | |
1511 | ||
1512 | seq_puts(s, "Pinctrl maps:\n"); | |
1513 | ||
42fed7ba | 1514 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1515 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1516 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1517 | map->dev_name, map->name, map_type(map->type), | |
1518 | map->type); | |
1519 | ||
1520 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1521 | seq_printf(s, "controlling device %s\n", | |
1522 | map->ctrl_dev_name); | |
1523 | ||
1524 | switch (map->type) { | |
1525 | case PIN_MAP_TYPE_MUX_GROUP: | |
1526 | pinmux_show_map(s, map); | |
1527 | break; | |
1528 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1529 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1530 | pinconf_show_map(s, map); | |
1531 | break; | |
1532 | default: | |
1533 | break; | |
1534 | } | |
1535 | ||
1536 | seq_printf(s, "\n"); | |
3eedb437 | 1537 | } |
42fed7ba | 1538 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1539 | |
1540 | return 0; | |
1541 | } | |
1542 | ||
befe5bdf LW |
1543 | static int pinctrl_show(struct seq_file *s, void *what) |
1544 | { | |
1545 | struct pinctrl *p; | |
6e5e959d | 1546 | struct pinctrl_state *state; |
7ecdb16f | 1547 | struct pinctrl_setting *setting; |
befe5bdf LW |
1548 | |
1549 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1550 | |
42fed7ba | 1551 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1552 | |
befe5bdf | 1553 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1554 | seq_printf(s, "device: %s current state: %s\n", |
1555 | dev_name(p->dev), | |
1556 | p->state ? p->state->name : "none"); | |
1557 | ||
1558 | list_for_each_entry(state, &p->states, node) { | |
1559 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1560 | |
6e5e959d | 1561 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1562 | struct pinctrl_dev *pctldev = setting->pctldev; |
1563 | ||
1564 | seq_printf(s, " type: %s controller %s ", | |
1565 | map_type(setting->type), | |
1566 | pinctrl_dev_get_name(pctldev)); | |
1567 | ||
1568 | switch (setting->type) { | |
1569 | case PIN_MAP_TYPE_MUX_GROUP: | |
1570 | pinmux_show_setting(s, setting); | |
1571 | break; | |
1572 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1573 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1574 | pinconf_show_setting(s, setting); | |
1575 | break; | |
1576 | default: | |
1577 | break; | |
1578 | } | |
6e5e959d | 1579 | } |
befe5bdf | 1580 | } |
befe5bdf LW |
1581 | } |
1582 | ||
42fed7ba | 1583 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1584 | |
befe5bdf LW |
1585 | return 0; |
1586 | } | |
1587 | ||
2744e8af LW |
1588 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1589 | { | |
1590 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1591 | } | |
1592 | ||
1593 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1594 | { | |
1595 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1596 | } | |
1597 | ||
1598 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1599 | { | |
1600 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1601 | } | |
1602 | ||
1603 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1604 | { | |
1605 | return single_open(file, pinctrl_devices_show, NULL); | |
1606 | } | |
1607 | ||
3eedb437 SW |
1608 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1609 | { | |
1610 | return single_open(file, pinctrl_maps_show, NULL); | |
1611 | } | |
1612 | ||
befe5bdf LW |
1613 | static int pinctrl_open(struct inode *inode, struct file *file) |
1614 | { | |
1615 | return single_open(file, pinctrl_show, NULL); | |
1616 | } | |
1617 | ||
2744e8af LW |
1618 | static const struct file_operations pinctrl_pins_ops = { |
1619 | .open = pinctrl_pins_open, | |
1620 | .read = seq_read, | |
1621 | .llseek = seq_lseek, | |
1622 | .release = single_release, | |
1623 | }; | |
1624 | ||
1625 | static const struct file_operations pinctrl_groups_ops = { | |
1626 | .open = pinctrl_groups_open, | |
1627 | .read = seq_read, | |
1628 | .llseek = seq_lseek, | |
1629 | .release = single_release, | |
1630 | }; | |
1631 | ||
1632 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1633 | .open = pinctrl_gpioranges_open, | |
1634 | .read = seq_read, | |
1635 | .llseek = seq_lseek, | |
1636 | .release = single_release, | |
1637 | }; | |
1638 | ||
3eedb437 SW |
1639 | static const struct file_operations pinctrl_devices_ops = { |
1640 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1641 | .read = seq_read, |
1642 | .llseek = seq_lseek, | |
1643 | .release = single_release, | |
1644 | }; | |
1645 | ||
3eedb437 SW |
1646 | static const struct file_operations pinctrl_maps_ops = { |
1647 | .open = pinctrl_maps_open, | |
2744e8af LW |
1648 | .read = seq_read, |
1649 | .llseek = seq_lseek, | |
1650 | .release = single_release, | |
1651 | }; | |
1652 | ||
befe5bdf LW |
1653 | static const struct file_operations pinctrl_ops = { |
1654 | .open = pinctrl_open, | |
1655 | .read = seq_read, | |
1656 | .llseek = seq_lseek, | |
1657 | .release = single_release, | |
1658 | }; | |
1659 | ||
2744e8af LW |
1660 | static struct dentry *debugfs_root; |
1661 | ||
1662 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1663 | { | |
02157160 | 1664 | struct dentry *device_root; |
2744e8af | 1665 | |
51cd24ee | 1666 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1667 | debugfs_root); |
02157160 TL |
1668 | pctldev->device_root = device_root; |
1669 | ||
2744e8af LW |
1670 | if (IS_ERR(device_root) || !device_root) { |
1671 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1672 | dev_name(pctldev->dev)); |
2744e8af LW |
1673 | return; |
1674 | } | |
1675 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1676 | device_root, pctldev, &pinctrl_pins_ops); | |
1677 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1678 | device_root, pctldev, &pinctrl_groups_ops); | |
1679 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1680 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
e7f2a444 FV |
1681 | if (pctldev->desc->pmxops) |
1682 | pinmux_init_device_debugfs(device_root, pctldev); | |
1683 | if (pctldev->desc->confops) | |
1684 | pinconf_init_device_debugfs(device_root, pctldev); | |
2744e8af LW |
1685 | } |
1686 | ||
02157160 TL |
1687 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1688 | { | |
1689 | debugfs_remove_recursive(pctldev->device_root); | |
1690 | } | |
1691 | ||
2744e8af LW |
1692 | static void pinctrl_init_debugfs(void) |
1693 | { | |
1694 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1695 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1696 | pr_warn("failed to create debugfs directory\n"); | |
1697 | debugfs_root = NULL; | |
1698 | return; | |
1699 | } | |
1700 | ||
1701 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1702 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1703 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1704 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1705 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1706 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1707 | } |
1708 | ||
1709 | #else /* CONFIG_DEBUG_FS */ | |
1710 | ||
1711 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1712 | { | |
1713 | } | |
1714 | ||
1715 | static void pinctrl_init_debugfs(void) | |
1716 | { | |
1717 | } | |
1718 | ||
02157160 TL |
1719 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1720 | { | |
1721 | } | |
1722 | ||
2744e8af LW |
1723 | #endif |
1724 | ||
d26bc49f SW |
1725 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1726 | { | |
1727 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1728 | ||
1729 | if (!ops || | |
d1e90e9e | 1730 | !ops->get_groups_count || |
e5b3b2d9 | 1731 | !ops->get_group_name) |
d26bc49f SW |
1732 | return -EINVAL; |
1733 | ||
57291ce2 SW |
1734 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1735 | return -EINVAL; | |
1736 | ||
d26bc49f SW |
1737 | return 0; |
1738 | } | |
1739 | ||
2744e8af LW |
1740 | /** |
1741 | * pinctrl_register() - register a pin controller device | |
1742 | * @pctldesc: descriptor for this pin controller | |
1743 | * @dev: parent device for this pin controller | |
1744 | * @driver_data: private pin controller data for this pin controller | |
1745 | */ | |
1746 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1747 | struct device *dev, void *driver_data) | |
1748 | { | |
2744e8af LW |
1749 | struct pinctrl_dev *pctldev; |
1750 | int ret; | |
1751 | ||
da9aecb0 | 1752 | if (!pctldesc) |
323de9ef | 1753 | return ERR_PTR(-EINVAL); |
da9aecb0 | 1754 | if (!pctldesc->name) |
323de9ef | 1755 | return ERR_PTR(-EINVAL); |
2744e8af | 1756 | |
02f5b989 | 1757 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1758 | if (pctldev == NULL) { |
1759 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
323de9ef | 1760 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 1761 | } |
b9130b77 TL |
1762 | |
1763 | /* Initialize pin control device struct */ | |
1764 | pctldev->owner = pctldesc->owner; | |
1765 | pctldev->desc = pctldesc; | |
1766 | pctldev->driver_data = driver_data; | |
1767 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1768 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 | 1769 | pctldev->dev = dev; |
42fed7ba | 1770 | mutex_init(&pctldev->mutex); |
b9130b77 | 1771 | |
d26bc49f | 1772 | /* check core ops for sanity */ |
323de9ef MY |
1773 | ret = pinctrl_check_ops(pctldev); |
1774 | if (ret) { | |
ad6e1107 | 1775 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1776 | goto out_err; |
1777 | } | |
1778 | ||
2744e8af LW |
1779 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1780 | if (pctldesc->pmxops) { | |
323de9ef MY |
1781 | ret = pinmux_check_ops(pctldev); |
1782 | if (ret) | |
b9130b77 | 1783 | goto out_err; |
2744e8af LW |
1784 | } |
1785 | ||
ae6b4d85 LW |
1786 | /* If we're implementing pinconfig, check the ops for sanity */ |
1787 | if (pctldesc->confops) { | |
323de9ef MY |
1788 | ret = pinconf_check_ops(pctldev); |
1789 | if (ret) | |
b9130b77 | 1790 | goto out_err; |
ae6b4d85 LW |
1791 | } |
1792 | ||
2744e8af | 1793 | /* Register all the pins */ |
ad6e1107 | 1794 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1795 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1796 | if (ret) { | |
ad6e1107 | 1797 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1798 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1799 | pctldesc->npins); | |
51cd24ee | 1800 | goto out_err; |
2744e8af LW |
1801 | } |
1802 | ||
42fed7ba | 1803 | mutex_lock(&pinctrldev_list_mutex); |
8b9c139f | 1804 | list_add_tail(&pctldev->node, &pinctrldev_list); |
42fed7ba PC |
1805 | mutex_unlock(&pinctrldev_list_mutex); |
1806 | ||
1807 | pctldev->p = pinctrl_get(pctldev->dev); | |
57b676f9 | 1808 | |
6e5e959d | 1809 | if (!IS_ERR(pctldev->p)) { |
840a47ba | 1810 | pctldev->hog_default = |
42fed7ba | 1811 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); |
840a47ba | 1812 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1813 | dev_dbg(dev, "failed to lookup the default state\n"); |
1814 | } else { | |
42fed7ba | 1815 | if (pinctrl_select_state(pctldev->p, |
840a47ba | 1816 | pctldev->hog_default)) |
ad6e1107 JC |
1817 | dev_err(dev, |
1818 | "failed to select default state\n"); | |
ad6e1107 | 1819 | } |
840a47ba JD |
1820 | |
1821 | pctldev->hog_sleep = | |
42fed7ba | 1822 | pinctrl_lookup_state(pctldev->p, |
840a47ba JD |
1823 | PINCTRL_STATE_SLEEP); |
1824 | if (IS_ERR(pctldev->hog_sleep)) | |
1825 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1826 | } |
57b676f9 | 1827 | |
2304b473 SW |
1828 | pinctrl_init_device_debugfs(pctldev); |
1829 | ||
2744e8af LW |
1830 | return pctldev; |
1831 | ||
51cd24ee | 1832 | out_err: |
42fed7ba | 1833 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 1834 | kfree(pctldev); |
323de9ef | 1835 | return ERR_PTR(ret); |
2744e8af LW |
1836 | } |
1837 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1838 | ||
1839 | /** | |
1840 | * pinctrl_unregister() - unregister pinmux | |
1841 | * @pctldev: pin controller to unregister | |
1842 | * | |
1843 | * Called by pinmux drivers to unregister a pinmux. | |
1844 | */ | |
1845 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1846 | { | |
5d589b09 | 1847 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1848 | if (pctldev == NULL) |
1849 | return; | |
1850 | ||
42fed7ba | 1851 | mutex_lock(&pctldev->mutex); |
42fed7ba | 1852 | pinctrl_remove_device_debugfs(pctldev); |
db93facf | 1853 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1854 | |
6e5e959d | 1855 | if (!IS_ERR(pctldev->p)) |
42fed7ba | 1856 | pinctrl_put(pctldev->p); |
57b676f9 | 1857 | |
db93facf JL |
1858 | mutex_lock(&pinctrldev_list_mutex); |
1859 | mutex_lock(&pctldev->mutex); | |
2744e8af | 1860 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1861 | list_del(&pctldev->node); |
2744e8af LW |
1862 | /* Destroy descriptor tree */ |
1863 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1864 | pctldev->desc->npins); | |
5d589b09 DA |
1865 | /* remove gpio ranges map */ |
1866 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1867 | list_del(&range->node); | |
1868 | ||
42fed7ba PC |
1869 | mutex_unlock(&pctldev->mutex); |
1870 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 1871 | kfree(pctldev); |
42fed7ba | 1872 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1873 | } |
1874 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1875 | ||
80e0f8d9 LD |
1876 | static void devm_pinctrl_dev_release(struct device *dev, void *res) |
1877 | { | |
1878 | struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res; | |
1879 | ||
1880 | pinctrl_unregister(pctldev); | |
1881 | } | |
1882 | ||
1883 | static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data) | |
1884 | { | |
1885 | struct pctldev **r = res; | |
1886 | ||
3024f920 | 1887 | if (WARN_ON(!r || !*r)) |
80e0f8d9 LD |
1888 | return 0; |
1889 | ||
1890 | return *r == data; | |
1891 | } | |
1892 | ||
1893 | /** | |
1894 | * devm_pinctrl_register() - Resource managed version of pinctrl_register(). | |
1895 | * @dev: parent device for this pin controller | |
1896 | * @pctldesc: descriptor for this pin controller | |
1897 | * @driver_data: private pin controller data for this pin controller | |
1898 | * | |
1899 | * Returns an error pointer if pincontrol register failed. Otherwise | |
1900 | * it returns valid pinctrl handle. | |
1901 | * | |
1902 | * The pinctrl device will be automatically released when the device is unbound. | |
1903 | */ | |
1904 | struct pinctrl_dev *devm_pinctrl_register(struct device *dev, | |
1905 | struct pinctrl_desc *pctldesc, | |
1906 | void *driver_data) | |
1907 | { | |
1908 | struct pinctrl_dev **ptr, *pctldev; | |
1909 | ||
1910 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
1911 | if (!ptr) | |
1912 | return ERR_PTR(-ENOMEM); | |
1913 | ||
1914 | pctldev = pinctrl_register(pctldesc, dev, driver_data); | |
1915 | if (IS_ERR(pctldev)) { | |
1916 | devres_free(ptr); | |
1917 | return pctldev; | |
1918 | } | |
1919 | ||
1920 | *ptr = pctldev; | |
1921 | devres_add(dev, ptr); | |
1922 | ||
1923 | return pctldev; | |
1924 | } | |
1925 | EXPORT_SYMBOL_GPL(devm_pinctrl_register); | |
1926 | ||
1927 | /** | |
1928 | * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister(). | |
1929 | * @dev: device for which which resource was allocated | |
1930 | * @pctldev: the pinctrl device to unregister. | |
1931 | */ | |
1932 | void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev) | |
1933 | { | |
1934 | WARN_ON(devres_release(dev, devm_pinctrl_dev_release, | |
1935 | devm_pinctrl_dev_match, pctldev)); | |
1936 | } | |
1937 | EXPORT_SYMBOL_GPL(devm_pinctrl_unregister); | |
1938 | ||
2744e8af LW |
1939 | static int __init pinctrl_init(void) |
1940 | { | |
1941 | pr_info("initialized pinctrl subsystem\n"); | |
1942 | pinctrl_init_debugfs(); | |
1943 | return 0; | |
1944 | } | |
1945 | ||
1946 | /* init early since many drivers really need to initialized pinmux early */ | |
1947 | core_initcall(pinctrl_init); |