Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
6d4ca1fb | 26 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
27 | #include <linux/pinctrl/pinctrl.h> |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include "core.h" | |
57291ce2 | 30 | #include "devicetree.h" |
2744e8af | 31 | #include "pinmux.h" |
ae6b4d85 | 32 | #include "pinconf.h" |
2744e8af | 33 | |
b2b3e66e SW |
34 | /** |
35 | * struct pinctrl_maps - a list item containing part of the mapping table | |
36 | * @node: mapping table list node | |
37 | * @maps: array of mapping table entries | |
38 | * @num_maps: the number of entries in @maps | |
39 | */ | |
40 | struct pinctrl_maps { | |
41 | struct list_head node; | |
42 | struct pinctrl_map const *maps; | |
43 | unsigned num_maps; | |
44 | }; | |
45 | ||
5b3aa5f7 DA |
46 | static bool pinctrl_dummy_state; |
47 | ||
57b676f9 SW |
48 | /* Mutex taken by all entry points */ |
49 | DEFINE_MUTEX(pinctrl_mutex); | |
50 | ||
51 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
57291ce2 | 52 | LIST_HEAD(pinctrldev_list); |
2744e8af | 53 | |
57b676f9 | 54 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
55 | static LIST_HEAD(pinctrl_list); |
56 | ||
57b676f9 | 57 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
58 | static LIST_HEAD(pinctrl_maps); |
59 | ||
60 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
61 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
62 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
63 | _i_ < _maps_node_->num_maps; \ | |
bc66468c | 64 | _i_++, _map_ = &_maps_node_->maps[_i_]) |
befe5bdf | 65 | |
5b3aa5f7 DA |
66 | /** |
67 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
68 | * | |
69 | * Usually this function is called by platforms without pinctrl driver support | |
70 | * but run with some shared drivers using pinctrl APIs. | |
71 | * After calling this function, the pinctrl core will return successfully | |
72 | * with creating a dummy state for the driver to keep going smoothly. | |
73 | */ | |
74 | void pinctrl_provide_dummies(void) | |
75 | { | |
76 | pinctrl_dummy_state = true; | |
77 | } | |
78 | ||
2744e8af LW |
79 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
80 | { | |
81 | /* We're not allowed to register devices without name */ | |
82 | return pctldev->desc->name; | |
83 | } | |
84 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
85 | ||
86 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) | |
87 | { | |
88 | return pctldev->driver_data; | |
89 | } | |
90 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
91 | ||
92 | /** | |
9dfac4fd LW |
93 | * get_pinctrl_dev_from_devname() - look up pin controller device |
94 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
95 | * |
96 | * Looks up a pin control device matching a certain device name or pure device | |
97 | * pointer, the pure device pointer will take precedence. | |
98 | */ | |
9dfac4fd | 99 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
100 | { |
101 | struct pinctrl_dev *pctldev = NULL; | |
102 | bool found = false; | |
103 | ||
9dfac4fd LW |
104 | if (!devname) |
105 | return NULL; | |
106 | ||
2744e8af | 107 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 108 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
109 | /* Matched on device name */ |
110 | found = true; | |
111 | break; | |
112 | } | |
113 | } | |
2744e8af LW |
114 | |
115 | return found ? pctldev : NULL; | |
116 | } | |
117 | ||
ae6b4d85 LW |
118 | /** |
119 | * pin_get_from_name() - look up a pin number from a name | |
120 | * @pctldev: the pin control device to lookup the pin on | |
121 | * @name: the name of the pin to look up | |
122 | */ | |
123 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
124 | { | |
706e8520 | 125 | unsigned i, pin; |
ae6b4d85 | 126 | |
706e8520 CP |
127 | /* The pin number can be retrived from the pin controller descriptor */ |
128 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
129 | struct pin_desc *desc; |
130 | ||
706e8520 | 131 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
132 | desc = pin_desc_get(pctldev, pin); |
133 | /* Pin space may be sparse */ | |
134 | if (desc == NULL) | |
135 | continue; | |
136 | if (desc->name && !strcmp(name, desc->name)) | |
137 | return pin; | |
138 | } | |
139 | ||
140 | return -EINVAL; | |
141 | } | |
142 | ||
dcb5dbc3 DA |
143 | /** |
144 | * pin_get_name_from_id() - look up a pin name from a pin id | |
145 | * @pctldev: the pin control device to lookup the pin on | |
146 | * @name: the name of the pin to look up | |
147 | */ | |
148 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
149 | { | |
150 | const struct pin_desc *desc; | |
151 | ||
152 | desc = pin_desc_get(pctldev, pin); | |
153 | if (desc == NULL) { | |
154 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
155 | pin); | |
156 | return NULL; | |
157 | } | |
158 | ||
159 | return desc->name; | |
160 | } | |
161 | ||
2744e8af LW |
162 | /** |
163 | * pin_is_valid() - check if pin exists on controller | |
164 | * @pctldev: the pin control device to check the pin on | |
165 | * @pin: pin to check, use the local pin controller index number | |
166 | * | |
167 | * This tells us whether a certain pin exist on a certain pin controller or | |
168 | * not. Pin lists may be sparse, so some pins may not exist. | |
169 | */ | |
170 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
171 | { | |
172 | struct pin_desc *pindesc; | |
173 | ||
174 | if (pin < 0) | |
175 | return false; | |
176 | ||
57b676f9 | 177 | mutex_lock(&pinctrl_mutex); |
2744e8af | 178 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 179 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 180 | |
57b676f9 | 181 | return pindesc != NULL; |
2744e8af LW |
182 | } |
183 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
184 | ||
185 | /* Deletes a range of pin descriptors */ | |
186 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
187 | const struct pinctrl_pin_desc *pins, | |
188 | unsigned num_pins) | |
189 | { | |
190 | int i; | |
191 | ||
2744e8af LW |
192 | for (i = 0; i < num_pins; i++) { |
193 | struct pin_desc *pindesc; | |
194 | ||
195 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
196 | pins[i].number); | |
197 | if (pindesc != NULL) { | |
198 | radix_tree_delete(&pctldev->pin_desc_tree, | |
199 | pins[i].number); | |
ca53c5f1 LW |
200 | if (pindesc->dynamic_name) |
201 | kfree(pindesc->name); | |
2744e8af LW |
202 | } |
203 | kfree(pindesc); | |
204 | } | |
2744e8af LW |
205 | } |
206 | ||
207 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
208 | unsigned number, const char *name) | |
209 | { | |
210 | struct pin_desc *pindesc; | |
211 | ||
212 | pindesc = pin_desc_get(pctldev, number); | |
213 | if (pindesc != NULL) { | |
214 | pr_err("pin %d already registered on %s\n", number, | |
215 | pctldev->desc->name); | |
216 | return -EINVAL; | |
217 | } | |
218 | ||
219 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
220 | if (pindesc == NULL) { |
221 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 222 | return -ENOMEM; |
95dcd4ae | 223 | } |
ae6b4d85 | 224 | |
2744e8af LW |
225 | /* Set owner */ |
226 | pindesc->pctldev = pctldev; | |
227 | ||
9af1e44f | 228 | /* Copy basic pin info */ |
8dc6ae4d | 229 | if (name) { |
ca53c5f1 LW |
230 | pindesc->name = name; |
231 | } else { | |
232 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
233 | if (pindesc->name == NULL) { |
234 | kfree(pindesc); | |
ca53c5f1 | 235 | return -ENOMEM; |
eb26cc9c | 236 | } |
ca53c5f1 LW |
237 | pindesc->dynamic_name = true; |
238 | } | |
2744e8af | 239 | |
2744e8af | 240 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 241 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 242 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
243 | return 0; |
244 | } | |
245 | ||
246 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
247 | struct pinctrl_pin_desc const *pins, | |
248 | unsigned num_descs) | |
249 | { | |
250 | unsigned i; | |
251 | int ret = 0; | |
252 | ||
253 | for (i = 0; i < num_descs; i++) { | |
254 | ret = pinctrl_register_one_pin(pctldev, | |
255 | pins[i].number, pins[i].name); | |
256 | if (ret) | |
257 | return ret; | |
258 | } | |
259 | ||
260 | return 0; | |
261 | } | |
262 | ||
263 | /** | |
264 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
265 | * @pctldev: pin controller device to check | |
266 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
267 | * | |
268 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
269 | * controller, return the range or NULL | |
270 | */ | |
271 | static struct pinctrl_gpio_range * | |
272 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
273 | { | |
274 | struct pinctrl_gpio_range *range = NULL; | |
275 | ||
276 | /* Loop over the ranges */ | |
2744e8af LW |
277 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
278 | /* Check if we're in the valid range */ | |
279 | if (gpio >= range->base && | |
280 | gpio < range->base + range->npins) { | |
2744e8af LW |
281 | return range; |
282 | } | |
283 | } | |
2744e8af LW |
284 | |
285 | return NULL; | |
286 | } | |
287 | ||
288 | /** | |
289 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
290 | * @gpio: the pin to locate the pin controller for | |
291 | * @outdev: the pin control device if found | |
292 | * @outrange: the GPIO range if found | |
293 | * | |
294 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
295 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
296 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
297 | * may still have not been registered. | |
2744e8af | 298 | */ |
4ecce45d SW |
299 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
300 | struct pinctrl_dev **outdev, | |
301 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
302 | { |
303 | struct pinctrl_dev *pctldev = NULL; | |
304 | ||
305 | /* Loop over the pin controllers */ | |
2744e8af LW |
306 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
307 | struct pinctrl_gpio_range *range; | |
308 | ||
309 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
310 | if (range != NULL) { | |
311 | *outdev = pctldev; | |
312 | *outrange = range; | |
2744e8af LW |
313 | return 0; |
314 | } | |
315 | } | |
2744e8af | 316 | |
4650b7cb | 317 | return -EPROBE_DEFER; |
2744e8af LW |
318 | } |
319 | ||
320 | /** | |
321 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
322 | * @pctldev: pin controller device to add the range to | |
323 | * @range: the GPIO range to add | |
324 | * | |
325 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
326 | * this to register handled ranges after registering your pin controller. | |
327 | */ | |
328 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
329 | struct pinctrl_gpio_range *range) | |
330 | { | |
57b676f9 | 331 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 332 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 333 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 334 | } |
4ecce45d | 335 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 336 | |
3e5e00b6 DA |
337 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
338 | struct pinctrl_gpio_range *ranges, | |
339 | unsigned nranges) | |
340 | { | |
341 | int i; | |
342 | ||
343 | for (i = 0; i < nranges; i++) | |
344 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
345 | } | |
346 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
347 | ||
192c369c | 348 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
349 | struct pinctrl_gpio_range *range) |
350 | { | |
351 | struct pinctrl_dev *pctldev = get_pinctrl_dev_from_devname(devname); | |
352 | ||
dfa97515 LW |
353 | /* |
354 | * If we can't find this device, let's assume that is because | |
355 | * it has not probed yet, so the driver trying to register this | |
356 | * range need to defer probing. | |
357 | */ | |
f23f1516 | 358 | if (!pctldev) |
dfa97515 | 359 | return ERR_PTR(-EPROBE_DEFER); |
f23f1516 SH |
360 | |
361 | pinctrl_add_gpio_range(pctldev, range); | |
362 | return pctldev; | |
363 | } | |
192c369c | 364 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 365 | |
9afbefb2 LW |
366 | /** |
367 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
368 | * @pctldev: the pin controller device to look in | |
369 | * @pin: a controller-local number to find the range for | |
370 | */ | |
371 | struct pinctrl_gpio_range * | |
372 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
373 | unsigned int pin) | |
374 | { | |
375 | struct pinctrl_gpio_range *range = NULL; | |
376 | ||
377 | /* Loop over the ranges */ | |
378 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
379 | /* Check if we're in the valid range */ | |
380 | if (pin >= range->pin_base && | |
381 | pin < range->pin_base + range->npins) { | |
382 | return range; | |
383 | } | |
384 | } | |
385 | ||
386 | return NULL; | |
387 | } | |
388 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
389 | ||
7e10ee68 VK |
390 | /** |
391 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
392 | * @pctldev: pin controller device to remove the range from | |
393 | * @range: the GPIO range to remove | |
394 | */ | |
395 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
396 | struct pinctrl_gpio_range *range) | |
397 | { | |
398 | mutex_lock(&pinctrl_mutex); | |
399 | list_del(&range->node); | |
400 | mutex_unlock(&pinctrl_mutex); | |
401 | } | |
402 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
403 | ||
7afde8ba LW |
404 | /** |
405 | * pinctrl_get_group_selector() - returns the group selector for a group | |
406 | * @pctldev: the pin controller handling the group | |
407 | * @pin_group: the pin group to look up | |
408 | */ | |
409 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
410 | const char *pin_group) | |
411 | { | |
412 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 413 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
414 | unsigned group_selector = 0; |
415 | ||
d1e90e9e | 416 | while (group_selector < ngroups) { |
7afde8ba LW |
417 | const char *gname = pctlops->get_group_name(pctldev, |
418 | group_selector); | |
419 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 420 | dev_dbg(pctldev->dev, |
7afde8ba LW |
421 | "found group selector %u for %s\n", |
422 | group_selector, | |
423 | pin_group); | |
424 | return group_selector; | |
425 | } | |
426 | ||
427 | group_selector++; | |
428 | } | |
429 | ||
51cd24ee | 430 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
431 | pin_group); |
432 | ||
433 | return -EINVAL; | |
434 | } | |
435 | ||
befe5bdf LW |
436 | /** |
437 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
438 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
439 | * | |
440 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
441 | * as part of their gpio_request() semantics, platforms and individual drivers | |
442 | * shall *NOT* request GPIO pins to be muxed in. | |
443 | */ | |
444 | int pinctrl_request_gpio(unsigned gpio) | |
445 | { | |
446 | struct pinctrl_dev *pctldev; | |
447 | struct pinctrl_gpio_range *range; | |
448 | int ret; | |
449 | int pin; | |
450 | ||
57b676f9 SW |
451 | mutex_lock(&pinctrl_mutex); |
452 | ||
befe5bdf | 453 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
454 | if (ret) { |
455 | mutex_unlock(&pinctrl_mutex); | |
4650b7cb | 456 | return ret; |
57b676f9 | 457 | } |
befe5bdf LW |
458 | |
459 | /* Convert to the pin controllers number space */ | |
460 | pin = gpio - range->base + range->pin_base; | |
461 | ||
57b676f9 SW |
462 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
463 | ||
464 | mutex_unlock(&pinctrl_mutex); | |
465 | return ret; | |
befe5bdf LW |
466 | } |
467 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
468 | ||
469 | /** | |
470 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
471 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
472 | * | |
473 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
474 | * as part of their gpio_free() semantics, platforms and individual drivers | |
475 | * shall *NOT* request GPIO pins to be muxed out. | |
476 | */ | |
477 | void pinctrl_free_gpio(unsigned gpio) | |
478 | { | |
479 | struct pinctrl_dev *pctldev; | |
480 | struct pinctrl_gpio_range *range; | |
481 | int ret; | |
482 | int pin; | |
483 | ||
57b676f9 SW |
484 | mutex_lock(&pinctrl_mutex); |
485 | ||
befe5bdf | 486 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
487 | if (ret) { |
488 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 489 | return; |
57b676f9 | 490 | } |
befe5bdf LW |
491 | |
492 | /* Convert to the pin controllers number space */ | |
493 | pin = gpio - range->base + range->pin_base; | |
494 | ||
57b676f9 SW |
495 | pinmux_free_gpio(pctldev, pin, range); |
496 | ||
497 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
498 | } |
499 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
500 | ||
501 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
502 | { | |
503 | struct pinctrl_dev *pctldev; | |
504 | struct pinctrl_gpio_range *range; | |
505 | int ret; | |
506 | int pin; | |
507 | ||
508 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
509 | if (ret) | |
510 | return ret; | |
511 | ||
512 | /* Convert to the pin controllers number space */ | |
513 | pin = gpio - range->base + range->pin_base; | |
514 | ||
515 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
516 | } | |
517 | ||
518 | /** | |
519 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
520 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
521 | * | |
522 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
523 | * as part of their gpio_direction_input() semantics, platforms and individual | |
524 | * drivers shall *NOT* touch pin control GPIO calls. | |
525 | */ | |
526 | int pinctrl_gpio_direction_input(unsigned gpio) | |
527 | { | |
57b676f9 SW |
528 | int ret; |
529 | mutex_lock(&pinctrl_mutex); | |
530 | ret = pinctrl_gpio_direction(gpio, true); | |
531 | mutex_unlock(&pinctrl_mutex); | |
532 | return ret; | |
befe5bdf LW |
533 | } |
534 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
535 | ||
536 | /** | |
537 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
538 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
539 | * | |
540 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
541 | * as part of their gpio_direction_output() semantics, platforms and individual | |
542 | * drivers shall *NOT* touch pin control GPIO calls. | |
543 | */ | |
544 | int pinctrl_gpio_direction_output(unsigned gpio) | |
545 | { | |
57b676f9 SW |
546 | int ret; |
547 | mutex_lock(&pinctrl_mutex); | |
548 | ret = pinctrl_gpio_direction(gpio, false); | |
549 | mutex_unlock(&pinctrl_mutex); | |
550 | return ret; | |
befe5bdf LW |
551 | } |
552 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
553 | ||
6e5e959d SW |
554 | static struct pinctrl_state *find_state(struct pinctrl *p, |
555 | const char *name) | |
befe5bdf | 556 | { |
6e5e959d SW |
557 | struct pinctrl_state *state; |
558 | ||
559 | list_for_each_entry(state, &p->states, node) | |
560 | if (!strcmp(state->name, name)) | |
561 | return state; | |
562 | ||
563 | return NULL; | |
564 | } | |
565 | ||
566 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
567 | const char *name) | |
568 | { | |
569 | struct pinctrl_state *state; | |
570 | ||
571 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
572 | if (state == NULL) { | |
573 | dev_err(p->dev, | |
574 | "failed to alloc struct pinctrl_state\n"); | |
575 | return ERR_PTR(-ENOMEM); | |
576 | } | |
577 | ||
578 | state->name = name; | |
579 | INIT_LIST_HEAD(&state->settings); | |
580 | ||
581 | list_add_tail(&state->node, &p->states); | |
582 | ||
583 | return state; | |
584 | } | |
585 | ||
586 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
587 | { | |
588 | struct pinctrl_state *state; | |
7ecdb16f | 589 | struct pinctrl_setting *setting; |
6e5e959d | 590 | int ret; |
befe5bdf | 591 | |
6e5e959d SW |
592 | state = find_state(p, map->name); |
593 | if (!state) | |
594 | state = create_state(p, map->name); | |
595 | if (IS_ERR(state)) | |
596 | return PTR_ERR(state); | |
befe5bdf | 597 | |
1e2082b5 SW |
598 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
599 | return 0; | |
600 | ||
6e5e959d SW |
601 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
602 | if (setting == NULL) { | |
603 | dev_err(p->dev, | |
604 | "failed to alloc struct pinctrl_setting\n"); | |
605 | return -ENOMEM; | |
606 | } | |
befe5bdf | 607 | |
1e2082b5 SW |
608 | setting->type = map->type; |
609 | ||
6e5e959d SW |
610 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
611 | if (setting->pctldev == NULL) { | |
6e5e959d | 612 | kfree(setting); |
89216494 LW |
613 | /* Do not defer probing of hogs (circular loop) */ |
614 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
615 | return -ENODEV; | |
c05127c4 LW |
616 | /* |
617 | * OK let us guess that the driver is not there yet, and | |
618 | * let's defer obtaining this pinctrl handle to later... | |
619 | */ | |
89216494 LW |
620 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
621 | map->ctrl_dev_name); | |
c05127c4 | 622 | return -EPROBE_DEFER; |
6e5e959d SW |
623 | } |
624 | ||
1a78958d LW |
625 | setting->dev_name = map->dev_name; |
626 | ||
1e2082b5 SW |
627 | switch (map->type) { |
628 | case PIN_MAP_TYPE_MUX_GROUP: | |
629 | ret = pinmux_map_to_setting(map, setting); | |
630 | break; | |
631 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
632 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
633 | ret = pinconf_map_to_setting(map, setting); | |
634 | break; | |
635 | default: | |
636 | ret = -EINVAL; | |
637 | break; | |
638 | } | |
6e5e959d SW |
639 | if (ret < 0) { |
640 | kfree(setting); | |
641 | return ret; | |
642 | } | |
643 | ||
644 | list_add_tail(&setting->node, &state->settings); | |
645 | ||
646 | return 0; | |
647 | } | |
648 | ||
649 | static struct pinctrl *find_pinctrl(struct device *dev) | |
650 | { | |
651 | struct pinctrl *p; | |
652 | ||
1e2082b5 | 653 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
654 | if (p->dev == dev) |
655 | return p; | |
656 | ||
657 | return NULL; | |
658 | } | |
659 | ||
660 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
661 | ||
662 | static struct pinctrl *create_pinctrl(struct device *dev) | |
663 | { | |
664 | struct pinctrl *p; | |
665 | const char *devname; | |
666 | struct pinctrl_maps *maps_node; | |
667 | int i; | |
668 | struct pinctrl_map const *map; | |
669 | int ret; | |
befe5bdf LW |
670 | |
671 | /* | |
672 | * create the state cookie holder struct pinctrl for each | |
673 | * mapping, this is what consumers will get when requesting | |
674 | * a pin control handle with pinctrl_get() | |
675 | */ | |
02f5b989 | 676 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
677 | if (p == NULL) { |
678 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 679 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 680 | } |
7ecdb16f | 681 | p->dev = dev; |
6e5e959d | 682 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
683 | INIT_LIST_HEAD(&p->dt_maps); |
684 | ||
685 | ret = pinctrl_dt_to_map(p); | |
686 | if (ret < 0) { | |
687 | kfree(p); | |
688 | return ERR_PTR(ret); | |
689 | } | |
6e5e959d SW |
690 | |
691 | devname = dev_name(dev); | |
befe5bdf LW |
692 | |
693 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 694 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
695 | /* Map must be for this device */ |
696 | if (strcmp(map->dev_name, devname)) | |
697 | continue; | |
698 | ||
6e5e959d | 699 | ret = add_setting(p, map); |
89216494 LW |
700 | /* |
701 | * At this point the adding of a setting may: | |
702 | * | |
703 | * - Defer, if the pinctrl device is not yet available | |
704 | * - Fail, if the pinctrl device is not yet available, | |
705 | * AND the setting is a hog. We cannot defer that, since | |
706 | * the hog will kick in immediately after the device | |
707 | * is registered. | |
708 | * | |
709 | * If the error returned was not -EPROBE_DEFER then we | |
710 | * accumulate the errors to see if we end up with | |
711 | * an -EPROBE_DEFER later, as that is the worst case. | |
712 | */ | |
713 | if (ret == -EPROBE_DEFER) { | |
6e5e959d SW |
714 | pinctrl_put_locked(p, false); |
715 | return ERR_PTR(ret); | |
7ecdb16f | 716 | } |
befe5bdf | 717 | } |
89216494 LW |
718 | if (ret < 0) { |
719 | /* If some other error than deferral occured, return here */ | |
720 | pinctrl_put_locked(p, false); | |
721 | return ERR_PTR(ret); | |
722 | } | |
befe5bdf | 723 | |
b0666ba4 | 724 | /* Add the pinctrl handle to the global list */ |
8b9c139f | 725 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
726 | |
727 | return p; | |
6e5e959d | 728 | } |
7ecdb16f | 729 | |
6e5e959d SW |
730 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
731 | { | |
732 | struct pinctrl *p; | |
7ecdb16f | 733 | |
6e5e959d SW |
734 | if (WARN_ON(!dev)) |
735 | return ERR_PTR(-EINVAL); | |
736 | ||
737 | p = find_pinctrl(dev); | |
738 | if (p != NULL) | |
739 | return ERR_PTR(-EBUSY); | |
7ecdb16f | 740 | |
d599bfb3 | 741 | return create_pinctrl(dev); |
befe5bdf | 742 | } |
b2b3e66e SW |
743 | |
744 | /** | |
6e5e959d SW |
745 | * pinctrl_get() - retrieves the pinctrl handle for a device |
746 | * @dev: the device to obtain the handle for | |
b2b3e66e | 747 | */ |
6e5e959d | 748 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
749 | { |
750 | struct pinctrl *p; | |
751 | ||
57b676f9 | 752 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 753 | p = pinctrl_get_locked(dev); |
57b676f9 | 754 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
755 | |
756 | return p; | |
757 | } | |
befe5bdf LW |
758 | EXPORT_SYMBOL_GPL(pinctrl_get); |
759 | ||
6e5e959d | 760 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 761 | { |
6e5e959d SW |
762 | struct pinctrl_state *state, *n1; |
763 | struct pinctrl_setting *setting, *n2; | |
764 | ||
765 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
766 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
1e2082b5 SW |
767 | switch (setting->type) { |
768 | case PIN_MAP_TYPE_MUX_GROUP: | |
769 | if (state == p->state) | |
770 | pinmux_disable_setting(setting); | |
771 | pinmux_free_setting(setting); | |
772 | break; | |
773 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
774 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
775 | pinconf_free_setting(setting); | |
776 | break; | |
777 | default: | |
778 | break; | |
779 | } | |
6e5e959d SW |
780 | list_del(&setting->node); |
781 | kfree(setting); | |
782 | } | |
783 | list_del(&state->node); | |
784 | kfree(state); | |
7ecdb16f | 785 | } |
befe5bdf | 786 | |
57291ce2 SW |
787 | pinctrl_dt_free_maps(p); |
788 | ||
6e5e959d SW |
789 | if (inlist) |
790 | list_del(&p->node); | |
befe5bdf LW |
791 | kfree(p); |
792 | } | |
befe5bdf LW |
793 | |
794 | /** | |
6e5e959d SW |
795 | * pinctrl_put() - release a previously claimed pinctrl handle |
796 | * @p: the pinctrl handle to release | |
befe5bdf | 797 | */ |
57b676f9 SW |
798 | void pinctrl_put(struct pinctrl *p) |
799 | { | |
800 | mutex_lock(&pinctrl_mutex); | |
6e5e959d | 801 | pinctrl_put_locked(p, true); |
57b676f9 SW |
802 | mutex_unlock(&pinctrl_mutex); |
803 | } | |
804 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
805 | ||
6e5e959d SW |
806 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
807 | const char *name) | |
befe5bdf | 808 | { |
6e5e959d | 809 | struct pinctrl_state *state; |
befe5bdf | 810 | |
6e5e959d | 811 | state = find_state(p, name); |
5b3aa5f7 DA |
812 | if (!state) { |
813 | if (pinctrl_dummy_state) { | |
814 | /* create dummy state */ | |
815 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
816 | name); | |
817 | state = create_state(p, name); | |
d599bfb3 RG |
818 | } else |
819 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 820 | } |
57b676f9 | 821 | |
6e5e959d | 822 | return state; |
befe5bdf | 823 | } |
befe5bdf LW |
824 | |
825 | /** | |
6e5e959d SW |
826 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
827 | * @p: the pinctrl handle to retrieve the state from | |
828 | * @name: the state name to retrieve | |
befe5bdf | 829 | */ |
6e5e959d | 830 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 831 | { |
6e5e959d SW |
832 | struct pinctrl_state *s; |
833 | ||
57b676f9 | 834 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 835 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 836 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
837 | |
838 | return s; | |
57b676f9 | 839 | } |
6e5e959d | 840 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 841 | |
6e5e959d SW |
842 | static int pinctrl_select_state_locked(struct pinctrl *p, |
843 | struct pinctrl_state *state) | |
befe5bdf | 844 | { |
6e5e959d SW |
845 | struct pinctrl_setting *setting, *setting2; |
846 | int ret; | |
7ecdb16f | 847 | |
6e5e959d SW |
848 | if (p->state == state) |
849 | return 0; | |
befe5bdf | 850 | |
6e5e959d SW |
851 | if (p->state) { |
852 | /* | |
853 | * The set of groups with a mux configuration in the old state | |
854 | * may not be identical to the set of groups with a mux setting | |
855 | * in the new state. While this might be unusual, it's entirely | |
856 | * possible for the "user"-supplied mapping table to be written | |
857 | * that way. For each group that was configured in the old state | |
858 | * but not in the new state, this code puts that group into a | |
859 | * safe/disabled state. | |
860 | */ | |
861 | list_for_each_entry(setting, &p->state->settings, node) { | |
862 | bool found = false; | |
1e2082b5 SW |
863 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
864 | continue; | |
6e5e959d | 865 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
866 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
867 | continue; | |
868 | if (setting2->data.mux.group == | |
869 | setting->data.mux.group) { | |
6e5e959d SW |
870 | found = true; |
871 | break; | |
872 | } | |
873 | } | |
874 | if (!found) | |
875 | pinmux_disable_setting(setting); | |
876 | } | |
877 | } | |
878 | ||
879 | p->state = state; | |
880 | ||
881 | /* Apply all the settings for the new state */ | |
882 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
883 | switch (setting->type) { |
884 | case PIN_MAP_TYPE_MUX_GROUP: | |
885 | ret = pinmux_enable_setting(setting); | |
886 | break; | |
887 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
888 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
889 | ret = pinconf_apply_setting(setting); | |
890 | break; | |
891 | default: | |
892 | ret = -EINVAL; | |
893 | break; | |
894 | } | |
6e5e959d SW |
895 | if (ret < 0) { |
896 | /* FIXME: Difficult to return to prev state */ | |
897 | return ret; | |
898 | } | |
befe5bdf | 899 | } |
6e5e959d SW |
900 | |
901 | return 0; | |
57b676f9 SW |
902 | } |
903 | ||
904 | /** | |
6e5e959d SW |
905 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
906 | * @p: the pinctrl handle for the device that requests configuratio | |
907 | * @state: the state handle to select/activate/program | |
57b676f9 | 908 | */ |
6e5e959d | 909 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 910 | { |
6e5e959d SW |
911 | int ret; |
912 | ||
57b676f9 | 913 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 914 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 915 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
916 | |
917 | return ret; | |
befe5bdf | 918 | } |
6e5e959d | 919 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 920 | |
6d4ca1fb SW |
921 | static void devm_pinctrl_release(struct device *dev, void *res) |
922 | { | |
923 | pinctrl_put(*(struct pinctrl **)res); | |
924 | } | |
925 | ||
926 | /** | |
927 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
928 | * @dev: the device to obtain the handle for | |
929 | * | |
930 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
931 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
932 | */ | |
933 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
934 | { | |
935 | struct pinctrl **ptr, *p; | |
936 | ||
937 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
938 | if (!ptr) | |
939 | return ERR_PTR(-ENOMEM); | |
940 | ||
941 | p = pinctrl_get(dev); | |
942 | if (!IS_ERR(p)) { | |
943 | *ptr = p; | |
944 | devres_add(dev, ptr); | |
945 | } else { | |
946 | devres_free(ptr); | |
947 | } | |
948 | ||
949 | return p; | |
950 | } | |
951 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
952 | ||
953 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
954 | { | |
955 | struct pinctrl **p = res; | |
956 | ||
957 | return *p == data; | |
958 | } | |
959 | ||
960 | /** | |
961 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
962 | * @p: the pinctrl handle to release | |
963 | * | |
964 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
965 | * this function will not need to be called and the resource management | |
966 | * code will ensure that the resource is freed. | |
967 | */ | |
968 | void devm_pinctrl_put(struct pinctrl *p) | |
969 | { | |
970 | WARN_ON(devres_destroy(p->dev, devm_pinctrl_release, | |
971 | devm_pinctrl_match, p)); | |
972 | pinctrl_put(p); | |
973 | } | |
974 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
975 | ||
57291ce2 SW |
976 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
977 | bool dup, bool locked) | |
befe5bdf | 978 | { |
1e2082b5 | 979 | int i, ret; |
b2b3e66e | 980 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
981 | |
982 | pr_debug("add %d pinmux maps\n", num_maps); | |
983 | ||
984 | /* First sanity check the new mapping */ | |
985 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
986 | if (!maps[i].dev_name) { |
987 | pr_err("failed to register map %s (%d): no device given\n", | |
988 | maps[i].name, i); | |
989 | return -EINVAL; | |
990 | } | |
991 | ||
befe5bdf LW |
992 | if (!maps[i].name) { |
993 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 994 | i); |
befe5bdf LW |
995 | return -EINVAL; |
996 | } | |
997 | ||
1e2082b5 SW |
998 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
999 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1000 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1001 | maps[i].name, i); | |
1002 | return -EINVAL; | |
1003 | } | |
1004 | ||
1e2082b5 SW |
1005 | switch (maps[i].type) { |
1006 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1007 | break; | |
1008 | case PIN_MAP_TYPE_MUX_GROUP: | |
1009 | ret = pinmux_validate_map(&maps[i], i); | |
1010 | if (ret < 0) | |
fde04f41 | 1011 | return ret; |
1e2082b5 SW |
1012 | break; |
1013 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1014 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1015 | ret = pinconf_validate_map(&maps[i], i); | |
1016 | if (ret < 0) | |
fde04f41 | 1017 | return ret; |
1e2082b5 SW |
1018 | break; |
1019 | default: | |
1020 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1021 | maps[i].name, i); |
1681f5ae SW |
1022 | return -EINVAL; |
1023 | } | |
befe5bdf LW |
1024 | } |
1025 | ||
b2b3e66e SW |
1026 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1027 | if (!maps_node) { | |
1028 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1029 | return -ENOMEM; | |
1030 | } | |
befe5bdf | 1031 | |
b2b3e66e | 1032 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1033 | if (dup) { |
1034 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1035 | GFP_KERNEL); | |
1036 | if (!maps_node->maps) { | |
1037 | pr_err("failed to duplicate mapping table\n"); | |
1038 | kfree(maps_node); | |
1039 | return -ENOMEM; | |
1040 | } | |
1041 | } else { | |
1042 | maps_node->maps = maps; | |
befe5bdf LW |
1043 | } |
1044 | ||
57291ce2 SW |
1045 | if (!locked) |
1046 | mutex_lock(&pinctrl_mutex); | |
b2b3e66e | 1047 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 SW |
1048 | if (!locked) |
1049 | mutex_unlock(&pinctrl_mutex); | |
b2b3e66e | 1050 | |
befe5bdf LW |
1051 | return 0; |
1052 | } | |
1053 | ||
57291ce2 SW |
1054 | /** |
1055 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1056 | * @maps: the pincontrol mappings table to register. This should probably be | |
1057 | * marked with __initdata so it can be discarded after boot. This | |
1058 | * function will perform a shallow copy for the mapping entries. | |
1059 | * @num_maps: the number of maps in the mapping table | |
1060 | */ | |
1061 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1062 | unsigned num_maps) | |
1063 | { | |
1064 | return pinctrl_register_map(maps, num_maps, true, false); | |
1065 | } | |
1066 | ||
1067 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1068 | { | |
1069 | struct pinctrl_maps *maps_node; | |
1070 | ||
1071 | list_for_each_entry(maps_node, &pinctrl_maps, node) { | |
1072 | if (maps_node->maps == map) { | |
1073 | list_del(&maps_node->node); | |
1074 | return; | |
1075 | } | |
1076 | } | |
1077 | } | |
1078 | ||
840a47ba JD |
1079 | /** |
1080 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1081 | * @pctldev: pin controller device | |
1082 | */ | |
1083 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1084 | { | |
1085 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1086 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1087 | return 0; | |
1088 | } | |
1089 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1090 | ||
1091 | /** | |
1092 | * pinctrl_force_default() - turn a given controller device into default state | |
1093 | * @pctldev: pin controller device | |
1094 | */ | |
1095 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1096 | { | |
1097 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1098 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1099 | return 0; | |
1100 | } | |
1101 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1102 | ||
2744e8af LW |
1103 | #ifdef CONFIG_DEBUG_FS |
1104 | ||
1105 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1106 | { | |
1107 | struct pinctrl_dev *pctldev = s->private; | |
1108 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1109 | unsigned i, pin; |
2744e8af LW |
1110 | |
1111 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1112 | |
57b676f9 SW |
1113 | mutex_lock(&pinctrl_mutex); |
1114 | ||
706e8520 CP |
1115 | /* The pin number can be retrived from the pin controller descriptor */ |
1116 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1117 | struct pin_desc *desc; |
1118 | ||
706e8520 | 1119 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1120 | desc = pin_desc_get(pctldev, pin); |
1121 | /* Pin space may be sparse */ | |
1122 | if (desc == NULL) | |
1123 | continue; | |
1124 | ||
1125 | seq_printf(s, "pin %d (%s) ", pin, | |
1126 | desc->name ? desc->name : "unnamed"); | |
1127 | ||
1128 | /* Driver-specific info per pin */ | |
1129 | if (ops->pin_dbg_show) | |
1130 | ops->pin_dbg_show(pctldev, s, pin); | |
1131 | ||
1132 | seq_puts(s, "\n"); | |
1133 | } | |
1134 | ||
57b676f9 SW |
1135 | mutex_unlock(&pinctrl_mutex); |
1136 | ||
2744e8af LW |
1137 | return 0; |
1138 | } | |
1139 | ||
1140 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1141 | { | |
1142 | struct pinctrl_dev *pctldev = s->private; | |
1143 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1144 | unsigned ngroups, selector = 0; |
2744e8af | 1145 | |
d1e90e9e | 1146 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 SW |
1147 | mutex_lock(&pinctrl_mutex); |
1148 | ||
2744e8af | 1149 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1150 | while (selector < ngroups) { |
a5818a8b | 1151 | const unsigned *pins; |
2744e8af LW |
1152 | unsigned num_pins; |
1153 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1154 | const char *pname; |
2744e8af LW |
1155 | int ret; |
1156 | int i; | |
1157 | ||
1158 | ret = ops->get_group_pins(pctldev, selector, | |
1159 | &pins, &num_pins); | |
1160 | if (ret) | |
1161 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1162 | gname); | |
1163 | else { | |
dcb5dbc3 DA |
1164 | seq_printf(s, "group: %s\n", gname); |
1165 | for (i = 0; i < num_pins; i++) { | |
1166 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b WY |
1167 | if (WARN_ON(!pname)) { |
1168 | mutex_unlock(&pinctrl_mutex); | |
dcb5dbc3 | 1169 | return -EINVAL; |
b4dd784b | 1170 | } |
dcb5dbc3 DA |
1171 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1172 | } | |
1173 | seq_puts(s, "\n"); | |
2744e8af LW |
1174 | } |
1175 | selector++; | |
1176 | } | |
1177 | ||
57b676f9 | 1178 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
1179 | |
1180 | return 0; | |
1181 | } | |
1182 | ||
1183 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1184 | { | |
1185 | struct pinctrl_dev *pctldev = s->private; | |
1186 | struct pinctrl_gpio_range *range = NULL; | |
1187 | ||
1188 | seq_puts(s, "GPIO ranges handled:\n"); | |
1189 | ||
57b676f9 SW |
1190 | mutex_lock(&pinctrl_mutex); |
1191 | ||
2744e8af | 1192 | /* Loop over the ranges */ |
2744e8af | 1193 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1194 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1195 | range->id, range->name, | |
1196 | range->base, (range->base + range->npins - 1), | |
1197 | range->pin_base, | |
1198 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1199 | } |
57b676f9 SW |
1200 | |
1201 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1202 | |
1203 | return 0; | |
1204 | } | |
1205 | ||
1206 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1207 | { | |
1208 | struct pinctrl_dev *pctldev; | |
1209 | ||
ae6b4d85 | 1210 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
1211 | |
1212 | mutex_lock(&pinctrl_mutex); | |
1213 | ||
2744e8af LW |
1214 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1215 | seq_printf(s, "%s ", pctldev->desc->name); | |
1216 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1217 | seq_puts(s, "yes "); |
1218 | else | |
1219 | seq_puts(s, "no "); | |
1220 | if (pctldev->desc->confops) | |
2744e8af LW |
1221 | seq_puts(s, "yes"); |
1222 | else | |
1223 | seq_puts(s, "no"); | |
1224 | seq_puts(s, "\n"); | |
1225 | } | |
57b676f9 SW |
1226 | |
1227 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1228 | |
1229 | return 0; | |
1230 | } | |
1231 | ||
1e2082b5 SW |
1232 | static inline const char *map_type(enum pinctrl_map_type type) |
1233 | { | |
1234 | static const char * const names[] = { | |
1235 | "INVALID", | |
1236 | "DUMMY_STATE", | |
1237 | "MUX_GROUP", | |
1238 | "CONFIGS_PIN", | |
1239 | "CONFIGS_GROUP", | |
1240 | }; | |
1241 | ||
1242 | if (type >= ARRAY_SIZE(names)) | |
1243 | return "UNKNOWN"; | |
1244 | ||
1245 | return names[type]; | |
1246 | } | |
1247 | ||
3eedb437 SW |
1248 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1249 | { | |
1250 | struct pinctrl_maps *maps_node; | |
1251 | int i; | |
1252 | struct pinctrl_map const *map; | |
1253 | ||
1254 | seq_puts(s, "Pinctrl maps:\n"); | |
1255 | ||
57b676f9 SW |
1256 | mutex_lock(&pinctrl_mutex); |
1257 | ||
3eedb437 | 1258 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1259 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1260 | map->dev_name, map->name, map_type(map->type), | |
1261 | map->type); | |
1262 | ||
1263 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1264 | seq_printf(s, "controlling device %s\n", | |
1265 | map->ctrl_dev_name); | |
1266 | ||
1267 | switch (map->type) { | |
1268 | case PIN_MAP_TYPE_MUX_GROUP: | |
1269 | pinmux_show_map(s, map); | |
1270 | break; | |
1271 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1272 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1273 | pinconf_show_map(s, map); | |
1274 | break; | |
1275 | default: | |
1276 | break; | |
1277 | } | |
1278 | ||
1279 | seq_printf(s, "\n"); | |
3eedb437 | 1280 | } |
57b676f9 SW |
1281 | |
1282 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1283 | |
1284 | return 0; | |
1285 | } | |
1286 | ||
befe5bdf LW |
1287 | static int pinctrl_show(struct seq_file *s, void *what) |
1288 | { | |
1289 | struct pinctrl *p; | |
6e5e959d | 1290 | struct pinctrl_state *state; |
7ecdb16f | 1291 | struct pinctrl_setting *setting; |
befe5bdf LW |
1292 | |
1293 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1294 | |
1295 | mutex_lock(&pinctrl_mutex); | |
1296 | ||
befe5bdf | 1297 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1298 | seq_printf(s, "device: %s current state: %s\n", |
1299 | dev_name(p->dev), | |
1300 | p->state ? p->state->name : "none"); | |
1301 | ||
1302 | list_for_each_entry(state, &p->states, node) { | |
1303 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1304 | |
6e5e959d | 1305 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1306 | struct pinctrl_dev *pctldev = setting->pctldev; |
1307 | ||
1308 | seq_printf(s, " type: %s controller %s ", | |
1309 | map_type(setting->type), | |
1310 | pinctrl_dev_get_name(pctldev)); | |
1311 | ||
1312 | switch (setting->type) { | |
1313 | case PIN_MAP_TYPE_MUX_GROUP: | |
1314 | pinmux_show_setting(s, setting); | |
1315 | break; | |
1316 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1317 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1318 | pinconf_show_setting(s, setting); | |
1319 | break; | |
1320 | default: | |
1321 | break; | |
1322 | } | |
6e5e959d | 1323 | } |
befe5bdf | 1324 | } |
befe5bdf LW |
1325 | } |
1326 | ||
57b676f9 SW |
1327 | mutex_unlock(&pinctrl_mutex); |
1328 | ||
befe5bdf LW |
1329 | return 0; |
1330 | } | |
1331 | ||
2744e8af LW |
1332 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1333 | { | |
1334 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1335 | } | |
1336 | ||
1337 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1338 | { | |
1339 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1340 | } | |
1341 | ||
1342 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1343 | { | |
1344 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1345 | } | |
1346 | ||
1347 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1348 | { | |
1349 | return single_open(file, pinctrl_devices_show, NULL); | |
1350 | } | |
1351 | ||
3eedb437 SW |
1352 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1353 | { | |
1354 | return single_open(file, pinctrl_maps_show, NULL); | |
1355 | } | |
1356 | ||
befe5bdf LW |
1357 | static int pinctrl_open(struct inode *inode, struct file *file) |
1358 | { | |
1359 | return single_open(file, pinctrl_show, NULL); | |
1360 | } | |
1361 | ||
2744e8af LW |
1362 | static const struct file_operations pinctrl_pins_ops = { |
1363 | .open = pinctrl_pins_open, | |
1364 | .read = seq_read, | |
1365 | .llseek = seq_lseek, | |
1366 | .release = single_release, | |
1367 | }; | |
1368 | ||
1369 | static const struct file_operations pinctrl_groups_ops = { | |
1370 | .open = pinctrl_groups_open, | |
1371 | .read = seq_read, | |
1372 | .llseek = seq_lseek, | |
1373 | .release = single_release, | |
1374 | }; | |
1375 | ||
1376 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1377 | .open = pinctrl_gpioranges_open, | |
1378 | .read = seq_read, | |
1379 | .llseek = seq_lseek, | |
1380 | .release = single_release, | |
1381 | }; | |
1382 | ||
3eedb437 SW |
1383 | static const struct file_operations pinctrl_devices_ops = { |
1384 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1385 | .read = seq_read, |
1386 | .llseek = seq_lseek, | |
1387 | .release = single_release, | |
1388 | }; | |
1389 | ||
3eedb437 SW |
1390 | static const struct file_operations pinctrl_maps_ops = { |
1391 | .open = pinctrl_maps_open, | |
2744e8af LW |
1392 | .read = seq_read, |
1393 | .llseek = seq_lseek, | |
1394 | .release = single_release, | |
1395 | }; | |
1396 | ||
befe5bdf LW |
1397 | static const struct file_operations pinctrl_ops = { |
1398 | .open = pinctrl_open, | |
1399 | .read = seq_read, | |
1400 | .llseek = seq_lseek, | |
1401 | .release = single_release, | |
1402 | }; | |
1403 | ||
2744e8af LW |
1404 | static struct dentry *debugfs_root; |
1405 | ||
1406 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1407 | { | |
02157160 | 1408 | struct dentry *device_root; |
2744e8af | 1409 | |
51cd24ee | 1410 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1411 | debugfs_root); |
02157160 TL |
1412 | pctldev->device_root = device_root; |
1413 | ||
2744e8af LW |
1414 | if (IS_ERR(device_root) || !device_root) { |
1415 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1416 | dev_name(pctldev->dev)); |
2744e8af LW |
1417 | return; |
1418 | } | |
1419 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1420 | device_root, pctldev, &pinctrl_pins_ops); | |
1421 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1422 | device_root, pctldev, &pinctrl_groups_ops); | |
1423 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1424 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1425 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1426 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1427 | } |
1428 | ||
02157160 TL |
1429 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1430 | { | |
1431 | debugfs_remove_recursive(pctldev->device_root); | |
1432 | } | |
1433 | ||
2744e8af LW |
1434 | static void pinctrl_init_debugfs(void) |
1435 | { | |
1436 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1437 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1438 | pr_warn("failed to create debugfs directory\n"); | |
1439 | debugfs_root = NULL; | |
1440 | return; | |
1441 | } | |
1442 | ||
1443 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1444 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1445 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1446 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1447 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1448 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1449 | } |
1450 | ||
1451 | #else /* CONFIG_DEBUG_FS */ | |
1452 | ||
1453 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1454 | { | |
1455 | } | |
1456 | ||
1457 | static void pinctrl_init_debugfs(void) | |
1458 | { | |
1459 | } | |
1460 | ||
02157160 TL |
1461 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1462 | { | |
1463 | } | |
1464 | ||
2744e8af LW |
1465 | #endif |
1466 | ||
d26bc49f SW |
1467 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1468 | { | |
1469 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1470 | ||
1471 | if (!ops || | |
d1e90e9e | 1472 | !ops->get_groups_count || |
d26bc49f SW |
1473 | !ops->get_group_name || |
1474 | !ops->get_group_pins) | |
1475 | return -EINVAL; | |
1476 | ||
57291ce2 SW |
1477 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1478 | return -EINVAL; | |
1479 | ||
d26bc49f SW |
1480 | return 0; |
1481 | } | |
1482 | ||
2744e8af LW |
1483 | /** |
1484 | * pinctrl_register() - register a pin controller device | |
1485 | * @pctldesc: descriptor for this pin controller | |
1486 | * @dev: parent device for this pin controller | |
1487 | * @driver_data: private pin controller data for this pin controller | |
1488 | */ | |
1489 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1490 | struct device *dev, void *driver_data) | |
1491 | { | |
2744e8af LW |
1492 | struct pinctrl_dev *pctldev; |
1493 | int ret; | |
1494 | ||
da9aecb0 | 1495 | if (!pctldesc) |
2744e8af | 1496 | return NULL; |
da9aecb0 | 1497 | if (!pctldesc->name) |
2744e8af LW |
1498 | return NULL; |
1499 | ||
02f5b989 | 1500 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1501 | if (pctldev == NULL) { |
1502 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1503 | return NULL; |
95dcd4ae | 1504 | } |
b9130b77 TL |
1505 | |
1506 | /* Initialize pin control device struct */ | |
1507 | pctldev->owner = pctldesc->owner; | |
1508 | pctldev->desc = pctldesc; | |
1509 | pctldev->driver_data = driver_data; | |
1510 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1511 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1512 | pctldev->dev = dev; |
1513 | ||
d26bc49f | 1514 | /* check core ops for sanity */ |
da9aecb0 | 1515 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1516 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1517 | goto out_err; |
1518 | } | |
1519 | ||
2744e8af LW |
1520 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1521 | if (pctldesc->pmxops) { | |
da9aecb0 | 1522 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1523 | goto out_err; |
2744e8af LW |
1524 | } |
1525 | ||
ae6b4d85 LW |
1526 | /* If we're implementing pinconfig, check the ops for sanity */ |
1527 | if (pctldesc->confops) { | |
da9aecb0 | 1528 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1529 | goto out_err; |
ae6b4d85 LW |
1530 | } |
1531 | ||
2744e8af | 1532 | /* Register all the pins */ |
ad6e1107 | 1533 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1534 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1535 | if (ret) { | |
ad6e1107 | 1536 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1537 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1538 | pctldesc->npins); | |
51cd24ee | 1539 | goto out_err; |
2744e8af LW |
1540 | } |
1541 | ||
57b676f9 SW |
1542 | mutex_lock(&pinctrl_mutex); |
1543 | ||
8b9c139f | 1544 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1545 | |
6e5e959d SW |
1546 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1547 | if (!IS_ERR(pctldev->p)) { | |
840a47ba | 1548 | pctldev->hog_default = |
6e5e959d SW |
1549 | pinctrl_lookup_state_locked(pctldev->p, |
1550 | PINCTRL_STATE_DEFAULT); | |
840a47ba | 1551 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1552 | dev_dbg(dev, "failed to lookup the default state\n"); |
1553 | } else { | |
840a47ba JD |
1554 | if (pinctrl_select_state_locked(pctldev->p, |
1555 | pctldev->hog_default)) | |
ad6e1107 JC |
1556 | dev_err(dev, |
1557 | "failed to select default state\n"); | |
ad6e1107 | 1558 | } |
840a47ba JD |
1559 | |
1560 | pctldev->hog_sleep = | |
1561 | pinctrl_lookup_state_locked(pctldev->p, | |
1562 | PINCTRL_STATE_SLEEP); | |
1563 | if (IS_ERR(pctldev->hog_sleep)) | |
1564 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1565 | } |
57b676f9 SW |
1566 | |
1567 | mutex_unlock(&pinctrl_mutex); | |
1568 | ||
2304b473 SW |
1569 | pinctrl_init_device_debugfs(pctldev); |
1570 | ||
2744e8af LW |
1571 | return pctldev; |
1572 | ||
51cd24ee SW |
1573 | out_err: |
1574 | kfree(pctldev); | |
2744e8af LW |
1575 | return NULL; |
1576 | } | |
1577 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1578 | ||
1579 | /** | |
1580 | * pinctrl_unregister() - unregister pinmux | |
1581 | * @pctldev: pin controller to unregister | |
1582 | * | |
1583 | * Called by pinmux drivers to unregister a pinmux. | |
1584 | */ | |
1585 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1586 | { | |
5d589b09 | 1587 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1588 | if (pctldev == NULL) |
1589 | return; | |
1590 | ||
02157160 | 1591 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1592 | |
1593 | mutex_lock(&pinctrl_mutex); | |
1594 | ||
6e5e959d SW |
1595 | if (!IS_ERR(pctldev->p)) |
1596 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1597 | |
2744e8af | 1598 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1599 | list_del(&pctldev->node); |
2744e8af LW |
1600 | /* Destroy descriptor tree */ |
1601 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1602 | pctldev->desc->npins); | |
5d589b09 DA |
1603 | /* remove gpio ranges map */ |
1604 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1605 | list_del(&range->node); | |
1606 | ||
51cd24ee | 1607 | kfree(pctldev); |
57b676f9 SW |
1608 | |
1609 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1610 | } |
1611 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1612 | ||
1613 | static int __init pinctrl_init(void) | |
1614 | { | |
1615 | pr_info("initialized pinctrl subsystem\n"); | |
1616 | pinctrl_init_debugfs(); | |
1617 | return 0; | |
1618 | } | |
1619 | ||
1620 | /* init early since many drivers really need to initialized pinmux early */ | |
1621 | core_initcall(pinctrl_init); |