Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/pinctrl/pinctrl.h> | |
27 | #include <linux/pinctrl/machine.h> | |
28 | #include "core.h" | |
29 | #include "pinmux.h" | |
ae6b4d85 | 30 | #include "pinconf.h" |
2744e8af | 31 | |
b2b3e66e SW |
32 | /** |
33 | * struct pinctrl_maps - a list item containing part of the mapping table | |
34 | * @node: mapping table list node | |
35 | * @maps: array of mapping table entries | |
36 | * @num_maps: the number of entries in @maps | |
37 | */ | |
38 | struct pinctrl_maps { | |
39 | struct list_head node; | |
40 | struct pinctrl_map const *maps; | |
41 | unsigned num_maps; | |
42 | }; | |
43 | ||
57b676f9 SW |
44 | /* Mutex taken by all entry points */ |
45 | DEFINE_MUTEX(pinctrl_mutex); | |
46 | ||
47 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
2744e8af LW |
48 | static LIST_HEAD(pinctrldev_list); |
49 | ||
57b676f9 | 50 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
51 | static LIST_HEAD(pinctrl_list); |
52 | ||
57b676f9 | 53 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
54 | static LIST_HEAD(pinctrl_maps); |
55 | ||
56 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
57 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
58 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
59 | _i_ < _maps_node_->num_maps; \ | |
60 | i++, _map_ = &_maps_node_->maps[_i_]) | |
befe5bdf | 61 | |
2744e8af LW |
62 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
63 | { | |
64 | /* We're not allowed to register devices without name */ | |
65 | return pctldev->desc->name; | |
66 | } | |
67 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
68 | ||
69 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) | |
70 | { | |
71 | return pctldev->driver_data; | |
72 | } | |
73 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
74 | ||
75 | /** | |
9dfac4fd LW |
76 | * get_pinctrl_dev_from_devname() - look up pin controller device |
77 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
78 | * |
79 | * Looks up a pin control device matching a certain device name or pure device | |
80 | * pointer, the pure device pointer will take precedence. | |
81 | */ | |
9dfac4fd | 82 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
83 | { |
84 | struct pinctrl_dev *pctldev = NULL; | |
85 | bool found = false; | |
86 | ||
9dfac4fd LW |
87 | if (!devname) |
88 | return NULL; | |
89 | ||
2744e8af | 90 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 91 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
92 | /* Matched on device name */ |
93 | found = true; | |
94 | break; | |
95 | } | |
96 | } | |
2744e8af LW |
97 | |
98 | return found ? pctldev : NULL; | |
99 | } | |
100 | ||
ae6b4d85 LW |
101 | /** |
102 | * pin_get_from_name() - look up a pin number from a name | |
103 | * @pctldev: the pin control device to lookup the pin on | |
104 | * @name: the name of the pin to look up | |
105 | */ | |
106 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
107 | { | |
706e8520 | 108 | unsigned i, pin; |
ae6b4d85 | 109 | |
706e8520 CP |
110 | /* The pin number can be retrived from the pin controller descriptor */ |
111 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
112 | struct pin_desc *desc; |
113 | ||
706e8520 | 114 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
115 | desc = pin_desc_get(pctldev, pin); |
116 | /* Pin space may be sparse */ | |
117 | if (desc == NULL) | |
118 | continue; | |
119 | if (desc->name && !strcmp(name, desc->name)) | |
120 | return pin; | |
121 | } | |
122 | ||
123 | return -EINVAL; | |
124 | } | |
125 | ||
2744e8af LW |
126 | /** |
127 | * pin_is_valid() - check if pin exists on controller | |
128 | * @pctldev: the pin control device to check the pin on | |
129 | * @pin: pin to check, use the local pin controller index number | |
130 | * | |
131 | * This tells us whether a certain pin exist on a certain pin controller or | |
132 | * not. Pin lists may be sparse, so some pins may not exist. | |
133 | */ | |
134 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
135 | { | |
136 | struct pin_desc *pindesc; | |
137 | ||
138 | if (pin < 0) | |
139 | return false; | |
140 | ||
57b676f9 | 141 | mutex_lock(&pinctrl_mutex); |
2744e8af | 142 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 143 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 144 | |
57b676f9 | 145 | return pindesc != NULL; |
2744e8af LW |
146 | } |
147 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
148 | ||
149 | /* Deletes a range of pin descriptors */ | |
150 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
151 | const struct pinctrl_pin_desc *pins, | |
152 | unsigned num_pins) | |
153 | { | |
154 | int i; | |
155 | ||
2744e8af LW |
156 | for (i = 0; i < num_pins; i++) { |
157 | struct pin_desc *pindesc; | |
158 | ||
159 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
160 | pins[i].number); | |
161 | if (pindesc != NULL) { | |
162 | radix_tree_delete(&pctldev->pin_desc_tree, | |
163 | pins[i].number); | |
ca53c5f1 LW |
164 | if (pindesc->dynamic_name) |
165 | kfree(pindesc->name); | |
2744e8af LW |
166 | } |
167 | kfree(pindesc); | |
168 | } | |
2744e8af LW |
169 | } |
170 | ||
171 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
172 | unsigned number, const char *name) | |
173 | { | |
174 | struct pin_desc *pindesc; | |
175 | ||
176 | pindesc = pin_desc_get(pctldev, number); | |
177 | if (pindesc != NULL) { | |
178 | pr_err("pin %d already registered on %s\n", number, | |
179 | pctldev->desc->name); | |
180 | return -EINVAL; | |
181 | } | |
182 | ||
183 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
184 | if (pindesc == NULL) { |
185 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 186 | return -ENOMEM; |
95dcd4ae | 187 | } |
ae6b4d85 | 188 | |
2744e8af LW |
189 | /* Set owner */ |
190 | pindesc->pctldev = pctldev; | |
191 | ||
9af1e44f | 192 | /* Copy basic pin info */ |
8dc6ae4d | 193 | if (name) { |
ca53c5f1 LW |
194 | pindesc->name = name; |
195 | } else { | |
196 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
197 | if (pindesc->name == NULL) | |
198 | return -ENOMEM; | |
199 | pindesc->dynamic_name = true; | |
200 | } | |
2744e8af | 201 | |
2744e8af | 202 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 203 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 204 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
205 | return 0; |
206 | } | |
207 | ||
208 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
209 | struct pinctrl_pin_desc const *pins, | |
210 | unsigned num_descs) | |
211 | { | |
212 | unsigned i; | |
213 | int ret = 0; | |
214 | ||
215 | for (i = 0; i < num_descs; i++) { | |
216 | ret = pinctrl_register_one_pin(pctldev, | |
217 | pins[i].number, pins[i].name); | |
218 | if (ret) | |
219 | return ret; | |
220 | } | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
225 | /** | |
226 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
227 | * @pctldev: pin controller device to check | |
228 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
229 | * | |
230 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
231 | * controller, return the range or NULL | |
232 | */ | |
233 | static struct pinctrl_gpio_range * | |
234 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
235 | { | |
236 | struct pinctrl_gpio_range *range = NULL; | |
237 | ||
238 | /* Loop over the ranges */ | |
2744e8af LW |
239 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
240 | /* Check if we're in the valid range */ | |
241 | if (gpio >= range->base && | |
242 | gpio < range->base + range->npins) { | |
2744e8af LW |
243 | return range; |
244 | } | |
245 | } | |
2744e8af LW |
246 | |
247 | return NULL; | |
248 | } | |
249 | ||
250 | /** | |
251 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
252 | * @gpio: the pin to locate the pin controller for | |
253 | * @outdev: the pin control device if found | |
254 | * @outrange: the GPIO range if found | |
255 | * | |
256 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
257 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
258 | * negative if the GPIO range could not be found in any device. | |
259 | */ | |
4ecce45d SW |
260 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
261 | struct pinctrl_dev **outdev, | |
262 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
263 | { |
264 | struct pinctrl_dev *pctldev = NULL; | |
265 | ||
266 | /* Loop over the pin controllers */ | |
2744e8af LW |
267 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
268 | struct pinctrl_gpio_range *range; | |
269 | ||
270 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
271 | if (range != NULL) { | |
272 | *outdev = pctldev; | |
273 | *outrange = range; | |
2744e8af LW |
274 | return 0; |
275 | } | |
276 | } | |
2744e8af LW |
277 | |
278 | return -EINVAL; | |
279 | } | |
280 | ||
281 | /** | |
282 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
283 | * @pctldev: pin controller device to add the range to | |
284 | * @range: the GPIO range to add | |
285 | * | |
286 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
287 | * this to register handled ranges after registering your pin controller. | |
288 | */ | |
289 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
290 | struct pinctrl_gpio_range *range) | |
291 | { | |
57b676f9 | 292 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 293 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 294 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 295 | } |
4ecce45d | 296 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af LW |
297 | |
298 | /** | |
299 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
300 | * @pctldev: pin controller device to remove the range from | |
301 | * @range: the GPIO range to remove | |
302 | */ | |
303 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
304 | struct pinctrl_gpio_range *range) | |
305 | { | |
57b676f9 | 306 | mutex_lock(&pinctrl_mutex); |
2744e8af | 307 | list_del(&range->node); |
57b676f9 | 308 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 309 | } |
4ecce45d | 310 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); |
2744e8af | 311 | |
7afde8ba LW |
312 | /** |
313 | * pinctrl_get_group_selector() - returns the group selector for a group | |
314 | * @pctldev: the pin controller handling the group | |
315 | * @pin_group: the pin group to look up | |
316 | */ | |
317 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
318 | const char *pin_group) | |
319 | { | |
320 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
321 | unsigned group_selector = 0; | |
322 | ||
323 | while (pctlops->list_groups(pctldev, group_selector) >= 0) { | |
324 | const char *gname = pctlops->get_group_name(pctldev, | |
325 | group_selector); | |
326 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 327 | dev_dbg(pctldev->dev, |
7afde8ba LW |
328 | "found group selector %u for %s\n", |
329 | group_selector, | |
330 | pin_group); | |
331 | return group_selector; | |
332 | } | |
333 | ||
334 | group_selector++; | |
335 | } | |
336 | ||
51cd24ee | 337 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
338 | pin_group); |
339 | ||
340 | return -EINVAL; | |
341 | } | |
342 | ||
befe5bdf LW |
343 | /** |
344 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
345 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
346 | * | |
347 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
348 | * as part of their gpio_request() semantics, platforms and individual drivers | |
349 | * shall *NOT* request GPIO pins to be muxed in. | |
350 | */ | |
351 | int pinctrl_request_gpio(unsigned gpio) | |
352 | { | |
353 | struct pinctrl_dev *pctldev; | |
354 | struct pinctrl_gpio_range *range; | |
355 | int ret; | |
356 | int pin; | |
357 | ||
57b676f9 SW |
358 | mutex_lock(&pinctrl_mutex); |
359 | ||
befe5bdf | 360 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
361 | if (ret) { |
362 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 363 | return -EINVAL; |
57b676f9 | 364 | } |
befe5bdf LW |
365 | |
366 | /* Convert to the pin controllers number space */ | |
367 | pin = gpio - range->base + range->pin_base; | |
368 | ||
57b676f9 SW |
369 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
370 | ||
371 | mutex_unlock(&pinctrl_mutex); | |
372 | return ret; | |
befe5bdf LW |
373 | } |
374 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
375 | ||
376 | /** | |
377 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
378 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
379 | * | |
380 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
381 | * as part of their gpio_free() semantics, platforms and individual drivers | |
382 | * shall *NOT* request GPIO pins to be muxed out. | |
383 | */ | |
384 | void pinctrl_free_gpio(unsigned gpio) | |
385 | { | |
386 | struct pinctrl_dev *pctldev; | |
387 | struct pinctrl_gpio_range *range; | |
388 | int ret; | |
389 | int pin; | |
390 | ||
57b676f9 SW |
391 | mutex_lock(&pinctrl_mutex); |
392 | ||
befe5bdf | 393 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
394 | if (ret) { |
395 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 396 | return; |
57b676f9 | 397 | } |
befe5bdf LW |
398 | |
399 | /* Convert to the pin controllers number space */ | |
400 | pin = gpio - range->base + range->pin_base; | |
401 | ||
57b676f9 SW |
402 | pinmux_free_gpio(pctldev, pin, range); |
403 | ||
404 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
405 | } |
406 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
407 | ||
408 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
409 | { | |
410 | struct pinctrl_dev *pctldev; | |
411 | struct pinctrl_gpio_range *range; | |
412 | int ret; | |
413 | int pin; | |
414 | ||
415 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
416 | if (ret) | |
417 | return ret; | |
418 | ||
419 | /* Convert to the pin controllers number space */ | |
420 | pin = gpio - range->base + range->pin_base; | |
421 | ||
422 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
423 | } | |
424 | ||
425 | /** | |
426 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
427 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
428 | * | |
429 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
430 | * as part of their gpio_direction_input() semantics, platforms and individual | |
431 | * drivers shall *NOT* touch pin control GPIO calls. | |
432 | */ | |
433 | int pinctrl_gpio_direction_input(unsigned gpio) | |
434 | { | |
57b676f9 SW |
435 | int ret; |
436 | mutex_lock(&pinctrl_mutex); | |
437 | ret = pinctrl_gpio_direction(gpio, true); | |
438 | mutex_unlock(&pinctrl_mutex); | |
439 | return ret; | |
befe5bdf LW |
440 | } |
441 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
442 | ||
443 | /** | |
444 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
445 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
446 | * | |
447 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
448 | * as part of their gpio_direction_output() semantics, platforms and individual | |
449 | * drivers shall *NOT* touch pin control GPIO calls. | |
450 | */ | |
451 | int pinctrl_gpio_direction_output(unsigned gpio) | |
452 | { | |
57b676f9 SW |
453 | int ret; |
454 | mutex_lock(&pinctrl_mutex); | |
455 | ret = pinctrl_gpio_direction(gpio, false); | |
456 | mutex_unlock(&pinctrl_mutex); | |
457 | return ret; | |
befe5bdf LW |
458 | } |
459 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
460 | ||
6e5e959d SW |
461 | static struct pinctrl_state *find_state(struct pinctrl *p, |
462 | const char *name) | |
befe5bdf | 463 | { |
6e5e959d SW |
464 | struct pinctrl_state *state; |
465 | ||
466 | list_for_each_entry(state, &p->states, node) | |
467 | if (!strcmp(state->name, name)) | |
468 | return state; | |
469 | ||
470 | return NULL; | |
471 | } | |
472 | ||
473 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
474 | const char *name) | |
475 | { | |
476 | struct pinctrl_state *state; | |
477 | ||
478 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
479 | if (state == NULL) { | |
480 | dev_err(p->dev, | |
481 | "failed to alloc struct pinctrl_state\n"); | |
482 | return ERR_PTR(-ENOMEM); | |
483 | } | |
484 | ||
485 | state->name = name; | |
486 | INIT_LIST_HEAD(&state->settings); | |
487 | ||
488 | list_add_tail(&state->node, &p->states); | |
489 | ||
490 | return state; | |
491 | } | |
492 | ||
493 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
494 | { | |
495 | struct pinctrl_state *state; | |
7ecdb16f | 496 | struct pinctrl_setting *setting; |
6e5e959d | 497 | int ret; |
befe5bdf | 498 | |
6e5e959d SW |
499 | state = find_state(p, map->name); |
500 | if (!state) | |
501 | state = create_state(p, map->name); | |
502 | if (IS_ERR(state)) | |
503 | return PTR_ERR(state); | |
befe5bdf | 504 | |
1e2082b5 SW |
505 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
506 | return 0; | |
507 | ||
6e5e959d SW |
508 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
509 | if (setting == NULL) { | |
510 | dev_err(p->dev, | |
511 | "failed to alloc struct pinctrl_setting\n"); | |
512 | return -ENOMEM; | |
513 | } | |
befe5bdf | 514 | |
1e2082b5 SW |
515 | setting->type = map->type; |
516 | ||
6e5e959d SW |
517 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
518 | if (setting->pctldev == NULL) { | |
519 | dev_err(p->dev, "unknown pinctrl device %s in map entry", | |
520 | map->ctrl_dev_name); | |
521 | kfree(setting); | |
522 | /* Eventually, this should trigger deferred probe */ | |
523 | return -ENODEV; | |
524 | } | |
525 | ||
1e2082b5 SW |
526 | switch (map->type) { |
527 | case PIN_MAP_TYPE_MUX_GROUP: | |
528 | ret = pinmux_map_to_setting(map, setting); | |
529 | break; | |
530 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
531 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
532 | ret = pinconf_map_to_setting(map, setting); | |
533 | break; | |
534 | default: | |
535 | ret = -EINVAL; | |
536 | break; | |
537 | } | |
6e5e959d SW |
538 | if (ret < 0) { |
539 | kfree(setting); | |
540 | return ret; | |
541 | } | |
542 | ||
543 | list_add_tail(&setting->node, &state->settings); | |
544 | ||
545 | return 0; | |
546 | } | |
547 | ||
548 | static struct pinctrl *find_pinctrl(struct device *dev) | |
549 | { | |
550 | struct pinctrl *p; | |
551 | ||
1e2082b5 | 552 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
553 | if (p->dev == dev) |
554 | return p; | |
555 | ||
556 | return NULL; | |
557 | } | |
558 | ||
559 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
560 | ||
561 | static struct pinctrl *create_pinctrl(struct device *dev) | |
562 | { | |
563 | struct pinctrl *p; | |
564 | const char *devname; | |
565 | struct pinctrl_maps *maps_node; | |
566 | int i; | |
567 | struct pinctrl_map const *map; | |
568 | int ret; | |
befe5bdf LW |
569 | |
570 | /* | |
571 | * create the state cookie holder struct pinctrl for each | |
572 | * mapping, this is what consumers will get when requesting | |
573 | * a pin control handle with pinctrl_get() | |
574 | */ | |
02f5b989 | 575 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
576 | if (p == NULL) { |
577 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 578 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 579 | } |
7ecdb16f | 580 | p->dev = dev; |
6e5e959d SW |
581 | INIT_LIST_HEAD(&p->states); |
582 | ||
583 | devname = dev_name(dev); | |
befe5bdf LW |
584 | |
585 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 586 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
587 | /* Map must be for this device */ |
588 | if (strcmp(map->dev_name, devname)) | |
589 | continue; | |
590 | ||
6e5e959d SW |
591 | ret = add_setting(p, map); |
592 | if (ret < 0) { | |
593 | pinctrl_put_locked(p, false); | |
594 | return ERR_PTR(ret); | |
7ecdb16f | 595 | } |
befe5bdf LW |
596 | } |
597 | ||
befe5bdf | 598 | /* Add the pinmux to the global list */ |
8b9c139f | 599 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
600 | |
601 | return p; | |
6e5e959d | 602 | } |
7ecdb16f | 603 | |
6e5e959d SW |
604 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
605 | { | |
606 | struct pinctrl *p; | |
7ecdb16f | 607 | |
6e5e959d SW |
608 | if (WARN_ON(!dev)) |
609 | return ERR_PTR(-EINVAL); | |
610 | ||
611 | p = find_pinctrl(dev); | |
612 | if (p != NULL) | |
613 | return ERR_PTR(-EBUSY); | |
7ecdb16f | 614 | |
6e5e959d SW |
615 | p = create_pinctrl(dev); |
616 | if (IS_ERR(p)) | |
617 | return p; | |
618 | ||
619 | return p; | |
befe5bdf | 620 | } |
b2b3e66e SW |
621 | |
622 | /** | |
6e5e959d SW |
623 | * pinctrl_get() - retrieves the pinctrl handle for a device |
624 | * @dev: the device to obtain the handle for | |
b2b3e66e | 625 | */ |
6e5e959d | 626 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
627 | { |
628 | struct pinctrl *p; | |
629 | ||
57b676f9 | 630 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 631 | p = pinctrl_get_locked(dev); |
57b676f9 | 632 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
633 | |
634 | return p; | |
635 | } | |
befe5bdf LW |
636 | EXPORT_SYMBOL_GPL(pinctrl_get); |
637 | ||
6e5e959d | 638 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 639 | { |
6e5e959d SW |
640 | struct pinctrl_state *state, *n1; |
641 | struct pinctrl_setting *setting, *n2; | |
642 | ||
643 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
644 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
1e2082b5 SW |
645 | switch (setting->type) { |
646 | case PIN_MAP_TYPE_MUX_GROUP: | |
647 | if (state == p->state) | |
648 | pinmux_disable_setting(setting); | |
649 | pinmux_free_setting(setting); | |
650 | break; | |
651 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
652 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
653 | pinconf_free_setting(setting); | |
654 | break; | |
655 | default: | |
656 | break; | |
657 | } | |
6e5e959d SW |
658 | list_del(&setting->node); |
659 | kfree(setting); | |
660 | } | |
661 | list_del(&state->node); | |
662 | kfree(state); | |
7ecdb16f | 663 | } |
befe5bdf | 664 | |
6e5e959d SW |
665 | if (inlist) |
666 | list_del(&p->node); | |
befe5bdf LW |
667 | kfree(p); |
668 | } | |
befe5bdf LW |
669 | |
670 | /** | |
6e5e959d SW |
671 | * pinctrl_put() - release a previously claimed pinctrl handle |
672 | * @p: the pinctrl handle to release | |
befe5bdf | 673 | */ |
57b676f9 SW |
674 | void pinctrl_put(struct pinctrl *p) |
675 | { | |
676 | mutex_lock(&pinctrl_mutex); | |
6e5e959d | 677 | pinctrl_put_locked(p, true); |
57b676f9 SW |
678 | mutex_unlock(&pinctrl_mutex); |
679 | } | |
680 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
681 | ||
6e5e959d SW |
682 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
683 | const char *name) | |
befe5bdf | 684 | { |
6e5e959d | 685 | struct pinctrl_state *state; |
befe5bdf | 686 | |
6e5e959d SW |
687 | state = find_state(p, name); |
688 | if (!state) | |
689 | return ERR_PTR(-ENODEV); | |
57b676f9 | 690 | |
6e5e959d | 691 | return state; |
befe5bdf | 692 | } |
befe5bdf LW |
693 | |
694 | /** | |
6e5e959d SW |
695 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
696 | * @p: the pinctrl handle to retrieve the state from | |
697 | * @name: the state name to retrieve | |
befe5bdf | 698 | */ |
6e5e959d | 699 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 700 | { |
6e5e959d SW |
701 | struct pinctrl_state *s; |
702 | ||
57b676f9 | 703 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 704 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 705 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
706 | |
707 | return s; | |
57b676f9 | 708 | } |
6e5e959d | 709 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 710 | |
6e5e959d SW |
711 | static int pinctrl_select_state_locked(struct pinctrl *p, |
712 | struct pinctrl_state *state) | |
befe5bdf | 713 | { |
6e5e959d SW |
714 | struct pinctrl_setting *setting, *setting2; |
715 | int ret; | |
7ecdb16f | 716 | |
6e5e959d SW |
717 | if (p->state == state) |
718 | return 0; | |
befe5bdf | 719 | |
6e5e959d SW |
720 | if (p->state) { |
721 | /* | |
722 | * The set of groups with a mux configuration in the old state | |
723 | * may not be identical to the set of groups with a mux setting | |
724 | * in the new state. While this might be unusual, it's entirely | |
725 | * possible for the "user"-supplied mapping table to be written | |
726 | * that way. For each group that was configured in the old state | |
727 | * but not in the new state, this code puts that group into a | |
728 | * safe/disabled state. | |
729 | */ | |
730 | list_for_each_entry(setting, &p->state->settings, node) { | |
731 | bool found = false; | |
1e2082b5 SW |
732 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
733 | continue; | |
6e5e959d | 734 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
735 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
736 | continue; | |
737 | if (setting2->data.mux.group == | |
738 | setting->data.mux.group) { | |
6e5e959d SW |
739 | found = true; |
740 | break; | |
741 | } | |
742 | } | |
743 | if (!found) | |
744 | pinmux_disable_setting(setting); | |
745 | } | |
746 | } | |
747 | ||
748 | p->state = state; | |
749 | ||
750 | /* Apply all the settings for the new state */ | |
751 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
752 | switch (setting->type) { |
753 | case PIN_MAP_TYPE_MUX_GROUP: | |
754 | ret = pinmux_enable_setting(setting); | |
755 | break; | |
756 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
757 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
758 | ret = pinconf_apply_setting(setting); | |
759 | break; | |
760 | default: | |
761 | ret = -EINVAL; | |
762 | break; | |
763 | } | |
6e5e959d SW |
764 | if (ret < 0) { |
765 | /* FIXME: Difficult to return to prev state */ | |
766 | return ret; | |
767 | } | |
befe5bdf | 768 | } |
6e5e959d SW |
769 | |
770 | return 0; | |
57b676f9 SW |
771 | } |
772 | ||
773 | /** | |
6e5e959d SW |
774 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
775 | * @p: the pinctrl handle for the device that requests configuratio | |
776 | * @state: the state handle to select/activate/program | |
57b676f9 | 777 | */ |
6e5e959d | 778 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 779 | { |
6e5e959d SW |
780 | int ret; |
781 | ||
57b676f9 | 782 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 783 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 784 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
785 | |
786 | return ret; | |
befe5bdf | 787 | } |
6e5e959d | 788 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf LW |
789 | |
790 | /** | |
791 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
13398a4b SW |
792 | * @maps: the pincontrol mappings table to register. This should probably be |
793 | * marked with __initdata so it can be discarded after boot. This | |
794 | * function will perform a shallow copy for the mapping entries. | |
befe5bdf | 795 | * @num_maps: the number of maps in the mapping table |
befe5bdf | 796 | */ |
13398a4b SW |
797 | int pinctrl_register_mappings(struct pinctrl_map const *maps, |
798 | unsigned num_maps) | |
befe5bdf | 799 | { |
1e2082b5 | 800 | int i, ret; |
b2b3e66e | 801 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
802 | |
803 | pr_debug("add %d pinmux maps\n", num_maps); | |
804 | ||
805 | /* First sanity check the new mapping */ | |
806 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
807 | if (!maps[i].dev_name) { |
808 | pr_err("failed to register map %s (%d): no device given\n", | |
809 | maps[i].name, i); | |
810 | return -EINVAL; | |
811 | } | |
812 | ||
befe5bdf LW |
813 | if (!maps[i].name) { |
814 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 815 | i); |
befe5bdf LW |
816 | return -EINVAL; |
817 | } | |
818 | ||
1e2082b5 SW |
819 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
820 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
821 | pr_err("failed to register map %s (%d): no pin control device given\n", |
822 | maps[i].name, i); | |
823 | return -EINVAL; | |
824 | } | |
825 | ||
1e2082b5 SW |
826 | switch (maps[i].type) { |
827 | case PIN_MAP_TYPE_DUMMY_STATE: | |
828 | break; | |
829 | case PIN_MAP_TYPE_MUX_GROUP: | |
830 | ret = pinmux_validate_map(&maps[i], i); | |
831 | if (ret < 0) | |
832 | return 0; | |
833 | break; | |
834 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
835 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
836 | ret = pinconf_validate_map(&maps[i], i); | |
837 | if (ret < 0) | |
838 | return 0; | |
839 | break; | |
840 | default: | |
841 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 842 | maps[i].name, i); |
1681f5ae SW |
843 | return -EINVAL; |
844 | } | |
befe5bdf LW |
845 | } |
846 | ||
b2b3e66e SW |
847 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
848 | if (!maps_node) { | |
849 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
850 | return -ENOMEM; | |
851 | } | |
befe5bdf | 852 | |
b2b3e66e SW |
853 | maps_node->num_maps = num_maps; |
854 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, GFP_KERNEL); | |
855 | if (!maps_node->maps) { | |
95dcd4ae | 856 | pr_err("failed to duplicate mapping table\n"); |
b2b3e66e SW |
857 | kfree(maps_node); |
858 | return -ENOMEM; | |
befe5bdf LW |
859 | } |
860 | ||
57b676f9 | 861 | mutex_lock(&pinctrl_mutex); |
b2b3e66e | 862 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57b676f9 | 863 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e | 864 | |
befe5bdf LW |
865 | return 0; |
866 | } | |
867 | ||
2744e8af LW |
868 | #ifdef CONFIG_DEBUG_FS |
869 | ||
870 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
871 | { | |
872 | struct pinctrl_dev *pctldev = s->private; | |
873 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 874 | unsigned i, pin; |
2744e8af LW |
875 | |
876 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 877 | |
57b676f9 SW |
878 | mutex_lock(&pinctrl_mutex); |
879 | ||
706e8520 CP |
880 | /* The pin number can be retrived from the pin controller descriptor */ |
881 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
882 | struct pin_desc *desc; |
883 | ||
706e8520 | 884 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
885 | desc = pin_desc_get(pctldev, pin); |
886 | /* Pin space may be sparse */ | |
887 | if (desc == NULL) | |
888 | continue; | |
889 | ||
890 | seq_printf(s, "pin %d (%s) ", pin, | |
891 | desc->name ? desc->name : "unnamed"); | |
892 | ||
893 | /* Driver-specific info per pin */ | |
894 | if (ops->pin_dbg_show) | |
895 | ops->pin_dbg_show(pctldev, s, pin); | |
896 | ||
897 | seq_puts(s, "\n"); | |
898 | } | |
899 | ||
57b676f9 SW |
900 | mutex_unlock(&pinctrl_mutex); |
901 | ||
2744e8af LW |
902 | return 0; |
903 | } | |
904 | ||
905 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
906 | { | |
907 | struct pinctrl_dev *pctldev = s->private; | |
908 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
909 | unsigned selector = 0; | |
910 | ||
57b676f9 SW |
911 | mutex_lock(&pinctrl_mutex); |
912 | ||
2744e8af LW |
913 | seq_puts(s, "registered pin groups:\n"); |
914 | while (ops->list_groups(pctldev, selector) >= 0) { | |
a5818a8b | 915 | const unsigned *pins; |
2744e8af LW |
916 | unsigned num_pins; |
917 | const char *gname = ops->get_group_name(pctldev, selector); | |
918 | int ret; | |
919 | int i; | |
920 | ||
921 | ret = ops->get_group_pins(pctldev, selector, | |
922 | &pins, &num_pins); | |
923 | if (ret) | |
924 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
925 | gname); | |
926 | else { | |
927 | seq_printf(s, "group: %s, pins = [ ", gname); | |
928 | for (i = 0; i < num_pins; i++) | |
929 | seq_printf(s, "%d ", pins[i]); | |
930 | seq_puts(s, "]\n"); | |
931 | } | |
932 | selector++; | |
933 | } | |
934 | ||
57b676f9 | 935 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
936 | |
937 | return 0; | |
938 | } | |
939 | ||
940 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
941 | { | |
942 | struct pinctrl_dev *pctldev = s->private; | |
943 | struct pinctrl_gpio_range *range = NULL; | |
944 | ||
945 | seq_puts(s, "GPIO ranges handled:\n"); | |
946 | ||
57b676f9 SW |
947 | mutex_lock(&pinctrl_mutex); |
948 | ||
2744e8af | 949 | /* Loop over the ranges */ |
2744e8af | 950 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
951 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
952 | range->id, range->name, | |
953 | range->base, (range->base + range->npins - 1), | |
954 | range->pin_base, | |
955 | (range->pin_base + range->npins - 1)); | |
2744e8af | 956 | } |
57b676f9 SW |
957 | |
958 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
959 | |
960 | return 0; | |
961 | } | |
962 | ||
963 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
964 | { | |
965 | struct pinctrl_dev *pctldev; | |
966 | ||
ae6b4d85 | 967 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
968 | |
969 | mutex_lock(&pinctrl_mutex); | |
970 | ||
2744e8af LW |
971 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
972 | seq_printf(s, "%s ", pctldev->desc->name); | |
973 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
974 | seq_puts(s, "yes "); |
975 | else | |
976 | seq_puts(s, "no "); | |
977 | if (pctldev->desc->confops) | |
2744e8af LW |
978 | seq_puts(s, "yes"); |
979 | else | |
980 | seq_puts(s, "no"); | |
981 | seq_puts(s, "\n"); | |
982 | } | |
57b676f9 SW |
983 | |
984 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
985 | |
986 | return 0; | |
987 | } | |
988 | ||
1e2082b5 SW |
989 | static inline const char *map_type(enum pinctrl_map_type type) |
990 | { | |
991 | static const char * const names[] = { | |
992 | "INVALID", | |
993 | "DUMMY_STATE", | |
994 | "MUX_GROUP", | |
995 | "CONFIGS_PIN", | |
996 | "CONFIGS_GROUP", | |
997 | }; | |
998 | ||
999 | if (type >= ARRAY_SIZE(names)) | |
1000 | return "UNKNOWN"; | |
1001 | ||
1002 | return names[type]; | |
1003 | } | |
1004 | ||
3eedb437 SW |
1005 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1006 | { | |
1007 | struct pinctrl_maps *maps_node; | |
1008 | int i; | |
1009 | struct pinctrl_map const *map; | |
1010 | ||
1011 | seq_puts(s, "Pinctrl maps:\n"); | |
1012 | ||
57b676f9 SW |
1013 | mutex_lock(&pinctrl_mutex); |
1014 | ||
3eedb437 | 1015 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1016 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1017 | map->dev_name, map->name, map_type(map->type), | |
1018 | map->type); | |
1019 | ||
1020 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1021 | seq_printf(s, "controlling device %s\n", | |
1022 | map->ctrl_dev_name); | |
1023 | ||
1024 | switch (map->type) { | |
1025 | case PIN_MAP_TYPE_MUX_GROUP: | |
1026 | pinmux_show_map(s, map); | |
1027 | break; | |
1028 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1029 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1030 | pinconf_show_map(s, map); | |
1031 | break; | |
1032 | default: | |
1033 | break; | |
1034 | } | |
1035 | ||
1036 | seq_printf(s, "\n"); | |
3eedb437 | 1037 | } |
57b676f9 SW |
1038 | |
1039 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1040 | |
1041 | return 0; | |
1042 | } | |
1043 | ||
befe5bdf LW |
1044 | static int pinctrl_show(struct seq_file *s, void *what) |
1045 | { | |
1046 | struct pinctrl *p; | |
6e5e959d | 1047 | struct pinctrl_state *state; |
7ecdb16f | 1048 | struct pinctrl_setting *setting; |
befe5bdf LW |
1049 | |
1050 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1051 | |
1052 | mutex_lock(&pinctrl_mutex); | |
1053 | ||
befe5bdf | 1054 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1055 | seq_printf(s, "device: %s current state: %s\n", |
1056 | dev_name(p->dev), | |
1057 | p->state ? p->state->name : "none"); | |
1058 | ||
1059 | list_for_each_entry(state, &p->states, node) { | |
1060 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1061 | |
6e5e959d | 1062 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1063 | struct pinctrl_dev *pctldev = setting->pctldev; |
1064 | ||
1065 | seq_printf(s, " type: %s controller %s ", | |
1066 | map_type(setting->type), | |
1067 | pinctrl_dev_get_name(pctldev)); | |
1068 | ||
1069 | switch (setting->type) { | |
1070 | case PIN_MAP_TYPE_MUX_GROUP: | |
1071 | pinmux_show_setting(s, setting); | |
1072 | break; | |
1073 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1074 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1075 | pinconf_show_setting(s, setting); | |
1076 | break; | |
1077 | default: | |
1078 | break; | |
1079 | } | |
6e5e959d | 1080 | } |
befe5bdf | 1081 | } |
befe5bdf LW |
1082 | } |
1083 | ||
57b676f9 SW |
1084 | mutex_unlock(&pinctrl_mutex); |
1085 | ||
befe5bdf LW |
1086 | return 0; |
1087 | } | |
1088 | ||
2744e8af LW |
1089 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1090 | { | |
1091 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1092 | } | |
1093 | ||
1094 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1095 | { | |
1096 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1097 | } | |
1098 | ||
1099 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1100 | { | |
1101 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1102 | } | |
1103 | ||
1104 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1105 | { | |
1106 | return single_open(file, pinctrl_devices_show, NULL); | |
1107 | } | |
1108 | ||
3eedb437 SW |
1109 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1110 | { | |
1111 | return single_open(file, pinctrl_maps_show, NULL); | |
1112 | } | |
1113 | ||
befe5bdf LW |
1114 | static int pinctrl_open(struct inode *inode, struct file *file) |
1115 | { | |
1116 | return single_open(file, pinctrl_show, NULL); | |
1117 | } | |
1118 | ||
2744e8af LW |
1119 | static const struct file_operations pinctrl_pins_ops = { |
1120 | .open = pinctrl_pins_open, | |
1121 | .read = seq_read, | |
1122 | .llseek = seq_lseek, | |
1123 | .release = single_release, | |
1124 | }; | |
1125 | ||
1126 | static const struct file_operations pinctrl_groups_ops = { | |
1127 | .open = pinctrl_groups_open, | |
1128 | .read = seq_read, | |
1129 | .llseek = seq_lseek, | |
1130 | .release = single_release, | |
1131 | }; | |
1132 | ||
1133 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1134 | .open = pinctrl_gpioranges_open, | |
1135 | .read = seq_read, | |
1136 | .llseek = seq_lseek, | |
1137 | .release = single_release, | |
1138 | }; | |
1139 | ||
3eedb437 SW |
1140 | static const struct file_operations pinctrl_devices_ops = { |
1141 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1142 | .read = seq_read, |
1143 | .llseek = seq_lseek, | |
1144 | .release = single_release, | |
1145 | }; | |
1146 | ||
3eedb437 SW |
1147 | static const struct file_operations pinctrl_maps_ops = { |
1148 | .open = pinctrl_maps_open, | |
2744e8af LW |
1149 | .read = seq_read, |
1150 | .llseek = seq_lseek, | |
1151 | .release = single_release, | |
1152 | }; | |
1153 | ||
befe5bdf LW |
1154 | static const struct file_operations pinctrl_ops = { |
1155 | .open = pinctrl_open, | |
1156 | .read = seq_read, | |
1157 | .llseek = seq_lseek, | |
1158 | .release = single_release, | |
1159 | }; | |
1160 | ||
2744e8af LW |
1161 | static struct dentry *debugfs_root; |
1162 | ||
1163 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1164 | { | |
02157160 | 1165 | struct dentry *device_root; |
2744e8af | 1166 | |
51cd24ee | 1167 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1168 | debugfs_root); |
02157160 TL |
1169 | pctldev->device_root = device_root; |
1170 | ||
2744e8af LW |
1171 | if (IS_ERR(device_root) || !device_root) { |
1172 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1173 | dev_name(pctldev->dev)); |
2744e8af LW |
1174 | return; |
1175 | } | |
1176 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1177 | device_root, pctldev, &pinctrl_pins_ops); | |
1178 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1179 | device_root, pctldev, &pinctrl_groups_ops); | |
1180 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1181 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1182 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1183 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1184 | } |
1185 | ||
02157160 TL |
1186 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1187 | { | |
1188 | debugfs_remove_recursive(pctldev->device_root); | |
1189 | } | |
1190 | ||
2744e8af LW |
1191 | static void pinctrl_init_debugfs(void) |
1192 | { | |
1193 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1194 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1195 | pr_warn("failed to create debugfs directory\n"); | |
1196 | debugfs_root = NULL; | |
1197 | return; | |
1198 | } | |
1199 | ||
1200 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1201 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1202 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1203 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1204 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1205 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1206 | } |
1207 | ||
1208 | #else /* CONFIG_DEBUG_FS */ | |
1209 | ||
1210 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1211 | { | |
1212 | } | |
1213 | ||
1214 | static void pinctrl_init_debugfs(void) | |
1215 | { | |
1216 | } | |
1217 | ||
02157160 TL |
1218 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1219 | { | |
1220 | } | |
1221 | ||
2744e8af LW |
1222 | #endif |
1223 | ||
d26bc49f SW |
1224 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1225 | { | |
1226 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1227 | ||
1228 | if (!ops || | |
1229 | !ops->list_groups || | |
1230 | !ops->get_group_name || | |
1231 | !ops->get_group_pins) | |
1232 | return -EINVAL; | |
1233 | ||
1234 | return 0; | |
1235 | } | |
1236 | ||
2744e8af LW |
1237 | /** |
1238 | * pinctrl_register() - register a pin controller device | |
1239 | * @pctldesc: descriptor for this pin controller | |
1240 | * @dev: parent device for this pin controller | |
1241 | * @driver_data: private pin controller data for this pin controller | |
1242 | */ | |
1243 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1244 | struct device *dev, void *driver_data) | |
1245 | { | |
2744e8af LW |
1246 | struct pinctrl_dev *pctldev; |
1247 | int ret; | |
1248 | ||
1249 | if (pctldesc == NULL) | |
1250 | return NULL; | |
1251 | if (pctldesc->name == NULL) | |
1252 | return NULL; | |
1253 | ||
02f5b989 | 1254 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1255 | if (pctldev == NULL) { |
1256 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1257 | return NULL; |
95dcd4ae | 1258 | } |
b9130b77 TL |
1259 | |
1260 | /* Initialize pin control device struct */ | |
1261 | pctldev->owner = pctldesc->owner; | |
1262 | pctldev->desc = pctldesc; | |
1263 | pctldev->driver_data = driver_data; | |
1264 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1265 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1266 | pctldev->dev = dev; |
1267 | ||
d26bc49f SW |
1268 | /* check core ops for sanity */ |
1269 | ret = pinctrl_check_ops(pctldev); | |
1270 | if (ret) { | |
1271 | pr_err("%s pinctrl ops lacks necessary functions\n", | |
1272 | pctldesc->name); | |
1273 | goto out_err; | |
1274 | } | |
1275 | ||
2744e8af LW |
1276 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1277 | if (pctldesc->pmxops) { | |
b9130b77 | 1278 | ret = pinmux_check_ops(pctldev); |
2744e8af LW |
1279 | if (ret) { |
1280 | pr_err("%s pinmux ops lacks necessary functions\n", | |
1281 | pctldesc->name); | |
b9130b77 | 1282 | goto out_err; |
2744e8af LW |
1283 | } |
1284 | } | |
1285 | ||
ae6b4d85 LW |
1286 | /* If we're implementing pinconfig, check the ops for sanity */ |
1287 | if (pctldesc->confops) { | |
b9130b77 | 1288 | ret = pinconf_check_ops(pctldev); |
ae6b4d85 LW |
1289 | if (ret) { |
1290 | pr_err("%s pin config ops lacks necessary functions\n", | |
1291 | pctldesc->name); | |
b9130b77 | 1292 | goto out_err; |
ae6b4d85 LW |
1293 | } |
1294 | } | |
1295 | ||
2744e8af LW |
1296 | /* Register all the pins */ |
1297 | pr_debug("try to register %d pins on %s...\n", | |
1298 | pctldesc->npins, pctldesc->name); | |
1299 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); | |
1300 | if (ret) { | |
1301 | pr_err("error during pin registration\n"); | |
1302 | pinctrl_free_pindescs(pctldev, pctldesc->pins, | |
1303 | pctldesc->npins); | |
51cd24ee | 1304 | goto out_err; |
2744e8af LW |
1305 | } |
1306 | ||
57b676f9 SW |
1307 | mutex_lock(&pinctrl_mutex); |
1308 | ||
8b9c139f | 1309 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1310 | |
6e5e959d SW |
1311 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1312 | if (!IS_ERR(pctldev->p)) { | |
1313 | struct pinctrl_state *s = | |
1314 | pinctrl_lookup_state_locked(pctldev->p, | |
1315 | PINCTRL_STATE_DEFAULT); | |
1316 | if (!IS_ERR(s)) | |
1317 | pinctrl_select_state_locked(pctldev->p, s); | |
1318 | } | |
57b676f9 SW |
1319 | |
1320 | mutex_unlock(&pinctrl_mutex); | |
1321 | ||
2304b473 SW |
1322 | pinctrl_init_device_debugfs(pctldev); |
1323 | ||
2744e8af LW |
1324 | return pctldev; |
1325 | ||
51cd24ee SW |
1326 | out_err: |
1327 | kfree(pctldev); | |
2744e8af LW |
1328 | return NULL; |
1329 | } | |
1330 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1331 | ||
1332 | /** | |
1333 | * pinctrl_unregister() - unregister pinmux | |
1334 | * @pctldev: pin controller to unregister | |
1335 | * | |
1336 | * Called by pinmux drivers to unregister a pinmux. | |
1337 | */ | |
1338 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1339 | { | |
1340 | if (pctldev == NULL) | |
1341 | return; | |
1342 | ||
02157160 | 1343 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1344 | |
1345 | mutex_lock(&pinctrl_mutex); | |
1346 | ||
6e5e959d SW |
1347 | if (!IS_ERR(pctldev->p)) |
1348 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1349 | |
2744e8af | 1350 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1351 | list_del(&pctldev->node); |
2744e8af LW |
1352 | /* Destroy descriptor tree */ |
1353 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1354 | pctldev->desc->npins); | |
51cd24ee | 1355 | kfree(pctldev); |
57b676f9 SW |
1356 | |
1357 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1358 | } |
1359 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1360 | ||
1361 | static int __init pinctrl_init(void) | |
1362 | { | |
1363 | pr_info("initialized pinctrl subsystem\n"); | |
1364 | pinctrl_init_debugfs(); | |
1365 | return 0; | |
1366 | } | |
1367 | ||
1368 | /* init early since many drivers really need to initialized pinmux early */ | |
1369 | core_initcall(pinctrl_init); |