Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
57b676f9 SW |
43 | /* Mutex taken by all entry points */ |
44 | DEFINE_MUTEX(pinctrl_mutex); | |
45 | ||
46 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
57291ce2 | 47 | LIST_HEAD(pinctrldev_list); |
2744e8af | 48 | |
57b676f9 | 49 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
50 | static LIST_HEAD(pinctrl_list); |
51 | ||
57b676f9 | 52 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 53 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 54 | |
befe5bdf | 55 | |
5b3aa5f7 DA |
56 | /** |
57 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
58 | * | |
59 | * Usually this function is called by platforms without pinctrl driver support | |
60 | * but run with some shared drivers using pinctrl APIs. | |
61 | * After calling this function, the pinctrl core will return successfully | |
62 | * with creating a dummy state for the driver to keep going smoothly. | |
63 | */ | |
64 | void pinctrl_provide_dummies(void) | |
65 | { | |
66 | pinctrl_dummy_state = true; | |
67 | } | |
68 | ||
2744e8af LW |
69 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
70 | { | |
71 | /* We're not allowed to register devices without name */ | |
72 | return pctldev->desc->name; | |
73 | } | |
74 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
75 | ||
d6e99abb HZ |
76 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
77 | { | |
78 | return dev_name(pctldev->dev); | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
81 | ||
2744e8af LW |
82 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return pctldev->driver_data; | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
87 | ||
88 | /** | |
9dfac4fd LW |
89 | * get_pinctrl_dev_from_devname() - look up pin controller device |
90 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
91 | * |
92 | * Looks up a pin control device matching a certain device name or pure device | |
93 | * pointer, the pure device pointer will take precedence. | |
94 | */ | |
9dfac4fd | 95 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
96 | { |
97 | struct pinctrl_dev *pctldev = NULL; | |
98 | bool found = false; | |
99 | ||
9dfac4fd LW |
100 | if (!devname) |
101 | return NULL; | |
102 | ||
2744e8af | 103 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 104 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
105 | /* Matched on device name */ |
106 | found = true; | |
107 | break; | |
108 | } | |
109 | } | |
2744e8af LW |
110 | |
111 | return found ? pctldev : NULL; | |
112 | } | |
113 | ||
ae6b4d85 LW |
114 | /** |
115 | * pin_get_from_name() - look up a pin number from a name | |
116 | * @pctldev: the pin control device to lookup the pin on | |
117 | * @name: the name of the pin to look up | |
118 | */ | |
119 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
120 | { | |
706e8520 | 121 | unsigned i, pin; |
ae6b4d85 | 122 | |
706e8520 CP |
123 | /* The pin number can be retrived from the pin controller descriptor */ |
124 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
125 | struct pin_desc *desc; |
126 | ||
706e8520 | 127 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
128 | desc = pin_desc_get(pctldev, pin); |
129 | /* Pin space may be sparse */ | |
130 | if (desc == NULL) | |
131 | continue; | |
132 | if (desc->name && !strcmp(name, desc->name)) | |
133 | return pin; | |
134 | } | |
135 | ||
136 | return -EINVAL; | |
137 | } | |
138 | ||
dcb5dbc3 DA |
139 | /** |
140 | * pin_get_name_from_id() - look up a pin name from a pin id | |
141 | * @pctldev: the pin control device to lookup the pin on | |
142 | * @name: the name of the pin to look up | |
143 | */ | |
144 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
145 | { | |
146 | const struct pin_desc *desc; | |
147 | ||
148 | desc = pin_desc_get(pctldev, pin); | |
149 | if (desc == NULL) { | |
150 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
151 | pin); | |
152 | return NULL; | |
153 | } | |
154 | ||
155 | return desc->name; | |
156 | } | |
157 | ||
2744e8af LW |
158 | /** |
159 | * pin_is_valid() - check if pin exists on controller | |
160 | * @pctldev: the pin control device to check the pin on | |
161 | * @pin: pin to check, use the local pin controller index number | |
162 | * | |
163 | * This tells us whether a certain pin exist on a certain pin controller or | |
164 | * not. Pin lists may be sparse, so some pins may not exist. | |
165 | */ | |
166 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
167 | { | |
168 | struct pin_desc *pindesc; | |
169 | ||
170 | if (pin < 0) | |
171 | return false; | |
172 | ||
57b676f9 | 173 | mutex_lock(&pinctrl_mutex); |
2744e8af | 174 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 175 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 176 | |
57b676f9 | 177 | return pindesc != NULL; |
2744e8af LW |
178 | } |
179 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
180 | ||
181 | /* Deletes a range of pin descriptors */ | |
182 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
183 | const struct pinctrl_pin_desc *pins, | |
184 | unsigned num_pins) | |
185 | { | |
186 | int i; | |
187 | ||
2744e8af LW |
188 | for (i = 0; i < num_pins; i++) { |
189 | struct pin_desc *pindesc; | |
190 | ||
191 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
192 | pins[i].number); | |
193 | if (pindesc != NULL) { | |
194 | radix_tree_delete(&pctldev->pin_desc_tree, | |
195 | pins[i].number); | |
ca53c5f1 LW |
196 | if (pindesc->dynamic_name) |
197 | kfree(pindesc->name); | |
2744e8af LW |
198 | } |
199 | kfree(pindesc); | |
200 | } | |
2744e8af LW |
201 | } |
202 | ||
203 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
204 | unsigned number, const char *name) | |
205 | { | |
206 | struct pin_desc *pindesc; | |
207 | ||
208 | pindesc = pin_desc_get(pctldev, number); | |
209 | if (pindesc != NULL) { | |
210 | pr_err("pin %d already registered on %s\n", number, | |
211 | pctldev->desc->name); | |
212 | return -EINVAL; | |
213 | } | |
214 | ||
215 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
216 | if (pindesc == NULL) { |
217 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 218 | return -ENOMEM; |
95dcd4ae | 219 | } |
ae6b4d85 | 220 | |
2744e8af LW |
221 | /* Set owner */ |
222 | pindesc->pctldev = pctldev; | |
223 | ||
9af1e44f | 224 | /* Copy basic pin info */ |
8dc6ae4d | 225 | if (name) { |
ca53c5f1 LW |
226 | pindesc->name = name; |
227 | } else { | |
228 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
229 | if (pindesc->name == NULL) { |
230 | kfree(pindesc); | |
ca53c5f1 | 231 | return -ENOMEM; |
eb26cc9c | 232 | } |
ca53c5f1 LW |
233 | pindesc->dynamic_name = true; |
234 | } | |
2744e8af | 235 | |
2744e8af | 236 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 237 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 238 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
239 | return 0; |
240 | } | |
241 | ||
242 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
243 | struct pinctrl_pin_desc const *pins, | |
244 | unsigned num_descs) | |
245 | { | |
246 | unsigned i; | |
247 | int ret = 0; | |
248 | ||
249 | for (i = 0; i < num_descs; i++) { | |
250 | ret = pinctrl_register_one_pin(pctldev, | |
251 | pins[i].number, pins[i].name); | |
252 | if (ret) | |
253 | return ret; | |
254 | } | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
259 | /** | |
260 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
261 | * @pctldev: pin controller device to check | |
262 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
263 | * | |
264 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
265 | * controller, return the range or NULL | |
266 | */ | |
267 | static struct pinctrl_gpio_range * | |
268 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
269 | { | |
270 | struct pinctrl_gpio_range *range = NULL; | |
271 | ||
272 | /* Loop over the ranges */ | |
2744e8af LW |
273 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
274 | /* Check if we're in the valid range */ | |
275 | if (gpio >= range->base && | |
276 | gpio < range->base + range->npins) { | |
2744e8af LW |
277 | return range; |
278 | } | |
279 | } | |
2744e8af LW |
280 | |
281 | return NULL; | |
282 | } | |
283 | ||
51e13c24 HZ |
284 | /** |
285 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
286 | * the same GPIO chip are in range | |
287 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
288 | * | |
289 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
290 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
291 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
292 | * of the same GPIO chip don't have back-end pinctrl interface. | |
293 | * If the return value is true, it means that pinctrl device is ready & the | |
294 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
295 | * is false, it means that pinctrl device may not be ready. | |
296 | */ | |
2afe8229 | 297 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
298 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
299 | { | |
300 | struct pinctrl_dev *pctldev; | |
301 | struct pinctrl_gpio_range *range = NULL; | |
302 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
303 | ||
304 | /* Loop over the pin controllers */ | |
305 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
306 | /* Loop over the ranges */ | |
307 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
308 | /* Check if any gpio range overlapped with gpio chip */ | |
309 | if (range->base + range->npins - 1 < chip->base || | |
310 | range->base > chip->base + chip->ngpio - 1) | |
311 | continue; | |
312 | return true; | |
313 | } | |
314 | } | |
315 | return false; | |
316 | } | |
2afe8229 HZ |
317 | #else |
318 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
319 | #endif | |
51e13c24 | 320 | |
2744e8af LW |
321 | /** |
322 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
323 | * @gpio: the pin to locate the pin controller for | |
324 | * @outdev: the pin control device if found | |
325 | * @outrange: the GPIO range if found | |
326 | * | |
327 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
328 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
329 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
330 | * may still have not been registered. | |
2744e8af | 331 | */ |
4ecce45d SW |
332 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
333 | struct pinctrl_dev **outdev, | |
334 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
335 | { |
336 | struct pinctrl_dev *pctldev = NULL; | |
337 | ||
338 | /* Loop over the pin controllers */ | |
2744e8af LW |
339 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
340 | struct pinctrl_gpio_range *range; | |
341 | ||
342 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
343 | if (range != NULL) { | |
344 | *outdev = pctldev; | |
345 | *outrange = range; | |
2744e8af LW |
346 | return 0; |
347 | } | |
348 | } | |
2744e8af | 349 | |
4650b7cb | 350 | return -EPROBE_DEFER; |
2744e8af LW |
351 | } |
352 | ||
353 | /** | |
354 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
355 | * @pctldev: pin controller device to add the range to | |
356 | * @range: the GPIO range to add | |
357 | * | |
358 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
359 | * this to register handled ranges after registering your pin controller. | |
360 | */ | |
361 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
362 | struct pinctrl_gpio_range *range) | |
363 | { | |
57b676f9 | 364 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 365 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 366 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 367 | } |
4ecce45d | 368 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 369 | |
3e5e00b6 DA |
370 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
371 | struct pinctrl_gpio_range *ranges, | |
372 | unsigned nranges) | |
373 | { | |
374 | int i; | |
375 | ||
376 | for (i = 0; i < nranges; i++) | |
377 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
378 | } | |
379 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
380 | ||
192c369c | 381 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
382 | struct pinctrl_gpio_range *range) |
383 | { | |
384 | struct pinctrl_dev *pctldev = get_pinctrl_dev_from_devname(devname); | |
385 | ||
dfa97515 LW |
386 | /* |
387 | * If we can't find this device, let's assume that is because | |
388 | * it has not probed yet, so the driver trying to register this | |
389 | * range need to defer probing. | |
390 | */ | |
f23f1516 | 391 | if (!pctldev) |
dfa97515 | 392 | return ERR_PTR(-EPROBE_DEFER); |
f23f1516 SH |
393 | |
394 | pinctrl_add_gpio_range(pctldev, range); | |
395 | return pctldev; | |
396 | } | |
192c369c | 397 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 398 | |
9afbefb2 LW |
399 | /** |
400 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
401 | * @pctldev: the pin controller device to look in | |
402 | * @pin: a controller-local number to find the range for | |
403 | */ | |
404 | struct pinctrl_gpio_range * | |
405 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
406 | unsigned int pin) | |
407 | { | |
408 | struct pinctrl_gpio_range *range = NULL; | |
409 | ||
410 | /* Loop over the ranges */ | |
411 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
412 | /* Check if we're in the valid range */ | |
413 | if (pin >= range->pin_base && | |
414 | pin < range->pin_base + range->npins) { | |
415 | return range; | |
416 | } | |
417 | } | |
418 | ||
419 | return NULL; | |
420 | } | |
421 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
422 | ||
7e10ee68 VK |
423 | /** |
424 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
425 | * @pctldev: pin controller device to remove the range from | |
426 | * @range: the GPIO range to remove | |
427 | */ | |
428 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
429 | struct pinctrl_gpio_range *range) | |
430 | { | |
431 | mutex_lock(&pinctrl_mutex); | |
432 | list_del(&range->node); | |
433 | mutex_unlock(&pinctrl_mutex); | |
434 | } | |
435 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
436 | ||
7afde8ba LW |
437 | /** |
438 | * pinctrl_get_group_selector() - returns the group selector for a group | |
439 | * @pctldev: the pin controller handling the group | |
440 | * @pin_group: the pin group to look up | |
441 | */ | |
442 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
443 | const char *pin_group) | |
444 | { | |
445 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 446 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
447 | unsigned group_selector = 0; |
448 | ||
d1e90e9e | 449 | while (group_selector < ngroups) { |
7afde8ba LW |
450 | const char *gname = pctlops->get_group_name(pctldev, |
451 | group_selector); | |
452 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 453 | dev_dbg(pctldev->dev, |
7afde8ba LW |
454 | "found group selector %u for %s\n", |
455 | group_selector, | |
456 | pin_group); | |
457 | return group_selector; | |
458 | } | |
459 | ||
460 | group_selector++; | |
461 | } | |
462 | ||
51cd24ee | 463 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
464 | pin_group); |
465 | ||
466 | return -EINVAL; | |
467 | } | |
468 | ||
befe5bdf LW |
469 | /** |
470 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
471 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
472 | * | |
473 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
474 | * as part of their gpio_request() semantics, platforms and individual drivers | |
475 | * shall *NOT* request GPIO pins to be muxed in. | |
476 | */ | |
477 | int pinctrl_request_gpio(unsigned gpio) | |
478 | { | |
479 | struct pinctrl_dev *pctldev; | |
480 | struct pinctrl_gpio_range *range; | |
481 | int ret; | |
482 | int pin; | |
483 | ||
57b676f9 SW |
484 | mutex_lock(&pinctrl_mutex); |
485 | ||
befe5bdf | 486 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 | 487 | if (ret) { |
51e13c24 HZ |
488 | if (pinctrl_ready_for_gpio_range(gpio)) |
489 | ret = 0; | |
57b676f9 | 490 | mutex_unlock(&pinctrl_mutex); |
4650b7cb | 491 | return ret; |
57b676f9 | 492 | } |
befe5bdf LW |
493 | |
494 | /* Convert to the pin controllers number space */ | |
495 | pin = gpio - range->base + range->pin_base; | |
496 | ||
57b676f9 SW |
497 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
498 | ||
499 | mutex_unlock(&pinctrl_mutex); | |
500 | return ret; | |
befe5bdf LW |
501 | } |
502 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
503 | ||
504 | /** | |
505 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
506 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
507 | * | |
508 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
509 | * as part of their gpio_free() semantics, platforms and individual drivers | |
510 | * shall *NOT* request GPIO pins to be muxed out. | |
511 | */ | |
512 | void pinctrl_free_gpio(unsigned gpio) | |
513 | { | |
514 | struct pinctrl_dev *pctldev; | |
515 | struct pinctrl_gpio_range *range; | |
516 | int ret; | |
517 | int pin; | |
518 | ||
57b676f9 SW |
519 | mutex_lock(&pinctrl_mutex); |
520 | ||
befe5bdf | 521 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
522 | if (ret) { |
523 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 524 | return; |
57b676f9 | 525 | } |
befe5bdf LW |
526 | |
527 | /* Convert to the pin controllers number space */ | |
528 | pin = gpio - range->base + range->pin_base; | |
529 | ||
57b676f9 SW |
530 | pinmux_free_gpio(pctldev, pin, range); |
531 | ||
532 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
533 | } |
534 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
535 | ||
536 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
537 | { | |
538 | struct pinctrl_dev *pctldev; | |
539 | struct pinctrl_gpio_range *range; | |
540 | int ret; | |
541 | int pin; | |
542 | ||
543 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
544 | if (ret) | |
545 | return ret; | |
546 | ||
547 | /* Convert to the pin controllers number space */ | |
548 | pin = gpio - range->base + range->pin_base; | |
549 | ||
550 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
551 | } | |
552 | ||
553 | /** | |
554 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
555 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
556 | * | |
557 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
558 | * as part of their gpio_direction_input() semantics, platforms and individual | |
559 | * drivers shall *NOT* touch pin control GPIO calls. | |
560 | */ | |
561 | int pinctrl_gpio_direction_input(unsigned gpio) | |
562 | { | |
57b676f9 SW |
563 | int ret; |
564 | mutex_lock(&pinctrl_mutex); | |
565 | ret = pinctrl_gpio_direction(gpio, true); | |
566 | mutex_unlock(&pinctrl_mutex); | |
567 | return ret; | |
befe5bdf LW |
568 | } |
569 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
570 | ||
571 | /** | |
572 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
573 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
574 | * | |
575 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
576 | * as part of their gpio_direction_output() semantics, platforms and individual | |
577 | * drivers shall *NOT* touch pin control GPIO calls. | |
578 | */ | |
579 | int pinctrl_gpio_direction_output(unsigned gpio) | |
580 | { | |
57b676f9 SW |
581 | int ret; |
582 | mutex_lock(&pinctrl_mutex); | |
583 | ret = pinctrl_gpio_direction(gpio, false); | |
584 | mutex_unlock(&pinctrl_mutex); | |
585 | return ret; | |
befe5bdf LW |
586 | } |
587 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
588 | ||
6e5e959d SW |
589 | static struct pinctrl_state *find_state(struct pinctrl *p, |
590 | const char *name) | |
befe5bdf | 591 | { |
6e5e959d SW |
592 | struct pinctrl_state *state; |
593 | ||
594 | list_for_each_entry(state, &p->states, node) | |
595 | if (!strcmp(state->name, name)) | |
596 | return state; | |
597 | ||
598 | return NULL; | |
599 | } | |
600 | ||
601 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
602 | const char *name) | |
603 | { | |
604 | struct pinctrl_state *state; | |
605 | ||
606 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
607 | if (state == NULL) { | |
608 | dev_err(p->dev, | |
609 | "failed to alloc struct pinctrl_state\n"); | |
610 | return ERR_PTR(-ENOMEM); | |
611 | } | |
612 | ||
613 | state->name = name; | |
614 | INIT_LIST_HEAD(&state->settings); | |
615 | ||
616 | list_add_tail(&state->node, &p->states); | |
617 | ||
618 | return state; | |
619 | } | |
620 | ||
621 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
622 | { | |
623 | struct pinctrl_state *state; | |
7ecdb16f | 624 | struct pinctrl_setting *setting; |
6e5e959d | 625 | int ret; |
befe5bdf | 626 | |
6e5e959d SW |
627 | state = find_state(p, map->name); |
628 | if (!state) | |
629 | state = create_state(p, map->name); | |
630 | if (IS_ERR(state)) | |
631 | return PTR_ERR(state); | |
befe5bdf | 632 | |
1e2082b5 SW |
633 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
634 | return 0; | |
635 | ||
6e5e959d SW |
636 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
637 | if (setting == NULL) { | |
638 | dev_err(p->dev, | |
639 | "failed to alloc struct pinctrl_setting\n"); | |
640 | return -ENOMEM; | |
641 | } | |
befe5bdf | 642 | |
1e2082b5 SW |
643 | setting->type = map->type; |
644 | ||
6e5e959d SW |
645 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
646 | if (setting->pctldev == NULL) { | |
6e5e959d | 647 | kfree(setting); |
89216494 LW |
648 | /* Do not defer probing of hogs (circular loop) */ |
649 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
650 | return -ENODEV; | |
c05127c4 LW |
651 | /* |
652 | * OK let us guess that the driver is not there yet, and | |
653 | * let's defer obtaining this pinctrl handle to later... | |
654 | */ | |
89216494 LW |
655 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
656 | map->ctrl_dev_name); | |
c05127c4 | 657 | return -EPROBE_DEFER; |
6e5e959d SW |
658 | } |
659 | ||
1a78958d LW |
660 | setting->dev_name = map->dev_name; |
661 | ||
1e2082b5 SW |
662 | switch (map->type) { |
663 | case PIN_MAP_TYPE_MUX_GROUP: | |
664 | ret = pinmux_map_to_setting(map, setting); | |
665 | break; | |
666 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
667 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
668 | ret = pinconf_map_to_setting(map, setting); | |
669 | break; | |
670 | default: | |
671 | ret = -EINVAL; | |
672 | break; | |
673 | } | |
6e5e959d SW |
674 | if (ret < 0) { |
675 | kfree(setting); | |
676 | return ret; | |
677 | } | |
678 | ||
679 | list_add_tail(&setting->node, &state->settings); | |
680 | ||
681 | return 0; | |
682 | } | |
683 | ||
684 | static struct pinctrl *find_pinctrl(struct device *dev) | |
685 | { | |
686 | struct pinctrl *p; | |
687 | ||
1e2082b5 | 688 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
689 | if (p->dev == dev) |
690 | return p; | |
691 | ||
692 | return NULL; | |
693 | } | |
694 | ||
695 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
696 | ||
697 | static struct pinctrl *create_pinctrl(struct device *dev) | |
698 | { | |
699 | struct pinctrl *p; | |
700 | const char *devname; | |
701 | struct pinctrl_maps *maps_node; | |
702 | int i; | |
703 | struct pinctrl_map const *map; | |
704 | int ret; | |
befe5bdf LW |
705 | |
706 | /* | |
707 | * create the state cookie holder struct pinctrl for each | |
708 | * mapping, this is what consumers will get when requesting | |
709 | * a pin control handle with pinctrl_get() | |
710 | */ | |
02f5b989 | 711 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
712 | if (p == NULL) { |
713 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 714 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 715 | } |
7ecdb16f | 716 | p->dev = dev; |
6e5e959d | 717 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
718 | INIT_LIST_HEAD(&p->dt_maps); |
719 | ||
720 | ret = pinctrl_dt_to_map(p); | |
721 | if (ret < 0) { | |
722 | kfree(p); | |
723 | return ERR_PTR(ret); | |
724 | } | |
6e5e959d SW |
725 | |
726 | devname = dev_name(dev); | |
befe5bdf LW |
727 | |
728 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 729 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
730 | /* Map must be for this device */ |
731 | if (strcmp(map->dev_name, devname)) | |
732 | continue; | |
733 | ||
6e5e959d | 734 | ret = add_setting(p, map); |
89216494 LW |
735 | /* |
736 | * At this point the adding of a setting may: | |
737 | * | |
738 | * - Defer, if the pinctrl device is not yet available | |
739 | * - Fail, if the pinctrl device is not yet available, | |
740 | * AND the setting is a hog. We cannot defer that, since | |
741 | * the hog will kick in immediately after the device | |
742 | * is registered. | |
743 | * | |
744 | * If the error returned was not -EPROBE_DEFER then we | |
745 | * accumulate the errors to see if we end up with | |
746 | * an -EPROBE_DEFER later, as that is the worst case. | |
747 | */ | |
748 | if (ret == -EPROBE_DEFER) { | |
6e5e959d SW |
749 | pinctrl_put_locked(p, false); |
750 | return ERR_PTR(ret); | |
7ecdb16f | 751 | } |
befe5bdf | 752 | } |
89216494 LW |
753 | if (ret < 0) { |
754 | /* If some other error than deferral occured, return here */ | |
755 | pinctrl_put_locked(p, false); | |
756 | return ERR_PTR(ret); | |
757 | } | |
befe5bdf | 758 | |
ab78029e LW |
759 | kref_init(&p->users); |
760 | ||
b0666ba4 | 761 | /* Add the pinctrl handle to the global list */ |
8b9c139f | 762 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
763 | |
764 | return p; | |
6e5e959d | 765 | } |
7ecdb16f | 766 | |
6e5e959d SW |
767 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
768 | { | |
769 | struct pinctrl *p; | |
7ecdb16f | 770 | |
6e5e959d SW |
771 | if (WARN_ON(!dev)) |
772 | return ERR_PTR(-EINVAL); | |
773 | ||
ab78029e LW |
774 | /* |
775 | * See if somebody else (such as the device core) has already | |
776 | * obtained a handle to the pinctrl for this device. In that case, | |
777 | * return another pointer to it. | |
778 | */ | |
6e5e959d | 779 | p = find_pinctrl(dev); |
ab78029e LW |
780 | if (p != NULL) { |
781 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
782 | kref_get(&p->users); | |
783 | return p; | |
784 | } | |
7ecdb16f | 785 | |
d599bfb3 | 786 | return create_pinctrl(dev); |
befe5bdf | 787 | } |
b2b3e66e SW |
788 | |
789 | /** | |
6e5e959d SW |
790 | * pinctrl_get() - retrieves the pinctrl handle for a device |
791 | * @dev: the device to obtain the handle for | |
b2b3e66e | 792 | */ |
6e5e959d | 793 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
794 | { |
795 | struct pinctrl *p; | |
796 | ||
57b676f9 | 797 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 798 | p = pinctrl_get_locked(dev); |
57b676f9 | 799 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
800 | |
801 | return p; | |
802 | } | |
befe5bdf LW |
803 | EXPORT_SYMBOL_GPL(pinctrl_get); |
804 | ||
d3cee830 RG |
805 | static void pinctrl_free_setting(bool disable_setting, |
806 | struct pinctrl_setting *setting) | |
807 | { | |
808 | switch (setting->type) { | |
809 | case PIN_MAP_TYPE_MUX_GROUP: | |
810 | if (disable_setting) | |
811 | pinmux_disable_setting(setting); | |
812 | pinmux_free_setting(setting); | |
813 | break; | |
814 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
815 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
816 | pinconf_free_setting(setting); | |
817 | break; | |
818 | default: | |
819 | break; | |
820 | } | |
821 | } | |
822 | ||
6e5e959d | 823 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 824 | { |
6e5e959d SW |
825 | struct pinctrl_state *state, *n1; |
826 | struct pinctrl_setting *setting, *n2; | |
827 | ||
828 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
829 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 830 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
831 | list_del(&setting->node); |
832 | kfree(setting); | |
833 | } | |
834 | list_del(&state->node); | |
835 | kfree(state); | |
7ecdb16f | 836 | } |
befe5bdf | 837 | |
57291ce2 SW |
838 | pinctrl_dt_free_maps(p); |
839 | ||
6e5e959d SW |
840 | if (inlist) |
841 | list_del(&p->node); | |
befe5bdf LW |
842 | kfree(p); |
843 | } | |
befe5bdf LW |
844 | |
845 | /** | |
ab78029e LW |
846 | * pinctrl_release() - release the pinctrl handle |
847 | * @kref: the kref in the pinctrl being released | |
848 | */ | |
2917e833 | 849 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
850 | { |
851 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
852 | ||
853 | pinctrl_put_locked(p, true); | |
854 | } | |
855 | ||
856 | /** | |
857 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 858 | * @p: the pinctrl handle to release |
befe5bdf | 859 | */ |
57b676f9 SW |
860 | void pinctrl_put(struct pinctrl *p) |
861 | { | |
862 | mutex_lock(&pinctrl_mutex); | |
ab78029e | 863 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
864 | mutex_unlock(&pinctrl_mutex); |
865 | } | |
866 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
867 | ||
6e5e959d SW |
868 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
869 | const char *name) | |
befe5bdf | 870 | { |
6e5e959d | 871 | struct pinctrl_state *state; |
befe5bdf | 872 | |
6e5e959d | 873 | state = find_state(p, name); |
5b3aa5f7 DA |
874 | if (!state) { |
875 | if (pinctrl_dummy_state) { | |
876 | /* create dummy state */ | |
877 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
878 | name); | |
879 | state = create_state(p, name); | |
d599bfb3 RG |
880 | } else |
881 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 882 | } |
57b676f9 | 883 | |
6e5e959d | 884 | return state; |
befe5bdf | 885 | } |
befe5bdf LW |
886 | |
887 | /** | |
6e5e959d SW |
888 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
889 | * @p: the pinctrl handle to retrieve the state from | |
890 | * @name: the state name to retrieve | |
befe5bdf | 891 | */ |
6e5e959d | 892 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 893 | { |
6e5e959d SW |
894 | struct pinctrl_state *s; |
895 | ||
57b676f9 | 896 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 897 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 898 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
899 | |
900 | return s; | |
57b676f9 | 901 | } |
6e5e959d | 902 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 903 | |
6e5e959d SW |
904 | static int pinctrl_select_state_locked(struct pinctrl *p, |
905 | struct pinctrl_state *state) | |
befe5bdf | 906 | { |
6e5e959d | 907 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 908 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 909 | int ret; |
7ecdb16f | 910 | |
6e5e959d SW |
911 | if (p->state == state) |
912 | return 0; | |
befe5bdf | 913 | |
6e5e959d SW |
914 | if (p->state) { |
915 | /* | |
916 | * The set of groups with a mux configuration in the old state | |
917 | * may not be identical to the set of groups with a mux setting | |
918 | * in the new state. While this might be unusual, it's entirely | |
919 | * possible for the "user"-supplied mapping table to be written | |
920 | * that way. For each group that was configured in the old state | |
921 | * but not in the new state, this code puts that group into a | |
922 | * safe/disabled state. | |
923 | */ | |
924 | list_for_each_entry(setting, &p->state->settings, node) { | |
925 | bool found = false; | |
1e2082b5 SW |
926 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
927 | continue; | |
6e5e959d | 928 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
929 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
930 | continue; | |
931 | if (setting2->data.mux.group == | |
932 | setting->data.mux.group) { | |
6e5e959d SW |
933 | found = true; |
934 | break; | |
935 | } | |
936 | } | |
937 | if (!found) | |
938 | pinmux_disable_setting(setting); | |
939 | } | |
940 | } | |
941 | ||
3102a76c | 942 | p->state = NULL; |
6e5e959d SW |
943 | |
944 | /* Apply all the settings for the new state */ | |
945 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
946 | switch (setting->type) { |
947 | case PIN_MAP_TYPE_MUX_GROUP: | |
948 | ret = pinmux_enable_setting(setting); | |
949 | break; | |
950 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
951 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
952 | ret = pinconf_apply_setting(setting); | |
953 | break; | |
954 | default: | |
955 | ret = -EINVAL; | |
956 | break; | |
957 | } | |
3102a76c | 958 | |
da58751c | 959 | if (ret < 0) |
3102a76c | 960 | goto unapply_new_state; |
befe5bdf | 961 | } |
6e5e959d | 962 | |
3102a76c RG |
963 | p->state = state; |
964 | ||
6e5e959d | 965 | return 0; |
3102a76c RG |
966 | |
967 | unapply_new_state: | |
da58751c | 968 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c RG |
969 | |
970 | /* | |
971 | * If the loop stopped on the 1st entry, nothing has been enabled, | |
972 | * so jump directly to the 2nd phase | |
973 | */ | |
974 | if (list_entry(&setting->node, typeof(*setting), node) == | |
975 | list_first_entry(&state->settings, typeof(*setting), node)) | |
976 | goto reapply_old_state; | |
977 | ||
978 | list_for_each_entry(setting2, &state->settings, node) { | |
979 | if (&setting2->node == &setting->node) | |
980 | break; | |
981 | pinctrl_free_setting(true, setting2); | |
982 | } | |
983 | reapply_old_state: | |
50cf7c8a RG |
984 | if (old_state) { |
985 | list_for_each_entry(setting, &old_state->settings, node) { | |
986 | bool found = false; | |
987 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) | |
988 | continue; | |
989 | list_for_each_entry(setting2, &state->settings, node) { | |
990 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) | |
991 | continue; | |
992 | if (setting2->data.mux.group == | |
993 | setting->data.mux.group) { | |
994 | found = true; | |
995 | break; | |
996 | } | |
997 | } | |
998 | if (!found) | |
999 | pinmux_enable_setting(setting); | |
1000 | } | |
1001 | } | |
3102a76c | 1002 | return ret; |
57b676f9 SW |
1003 | } |
1004 | ||
1005 | /** | |
6e5e959d SW |
1006 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
1007 | * @p: the pinctrl handle for the device that requests configuratio | |
1008 | * @state: the state handle to select/activate/program | |
57b676f9 | 1009 | */ |
6e5e959d | 1010 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 1011 | { |
6e5e959d SW |
1012 | int ret; |
1013 | ||
57b676f9 | 1014 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 1015 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 1016 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
1017 | |
1018 | return ret; | |
befe5bdf | 1019 | } |
6e5e959d | 1020 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1021 | |
6d4ca1fb SW |
1022 | static void devm_pinctrl_release(struct device *dev, void *res) |
1023 | { | |
1024 | pinctrl_put(*(struct pinctrl **)res); | |
1025 | } | |
1026 | ||
1027 | /** | |
1028 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1029 | * @dev: the device to obtain the handle for | |
1030 | * | |
1031 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1032 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1033 | */ | |
1034 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1035 | { | |
1036 | struct pinctrl **ptr, *p; | |
1037 | ||
1038 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1039 | if (!ptr) | |
1040 | return ERR_PTR(-ENOMEM); | |
1041 | ||
1042 | p = pinctrl_get(dev); | |
1043 | if (!IS_ERR(p)) { | |
1044 | *ptr = p; | |
1045 | devres_add(dev, ptr); | |
1046 | } else { | |
1047 | devres_free(ptr); | |
1048 | } | |
1049 | ||
1050 | return p; | |
1051 | } | |
1052 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1053 | ||
1054 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1055 | { | |
1056 | struct pinctrl **p = res; | |
1057 | ||
1058 | return *p == data; | |
1059 | } | |
1060 | ||
1061 | /** | |
1062 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1063 | * @p: the pinctrl handle to release | |
1064 | * | |
1065 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1066 | * this function will not need to be called and the resource management | |
1067 | * code will ensure that the resource is freed. | |
1068 | */ | |
1069 | void devm_pinctrl_put(struct pinctrl *p) | |
1070 | { | |
a72149e8 | 1071 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1072 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1073 | } |
1074 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1075 | ||
57291ce2 SW |
1076 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
1077 | bool dup, bool locked) | |
befe5bdf | 1078 | { |
1e2082b5 | 1079 | int i, ret; |
b2b3e66e | 1080 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
1081 | |
1082 | pr_debug("add %d pinmux maps\n", num_maps); | |
1083 | ||
1084 | /* First sanity check the new mapping */ | |
1085 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1086 | if (!maps[i].dev_name) { |
1087 | pr_err("failed to register map %s (%d): no device given\n", | |
1088 | maps[i].name, i); | |
1089 | return -EINVAL; | |
1090 | } | |
1091 | ||
befe5bdf LW |
1092 | if (!maps[i].name) { |
1093 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1094 | i); |
befe5bdf LW |
1095 | return -EINVAL; |
1096 | } | |
1097 | ||
1e2082b5 SW |
1098 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1099 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1100 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1101 | maps[i].name, i); | |
1102 | return -EINVAL; | |
1103 | } | |
1104 | ||
1e2082b5 SW |
1105 | switch (maps[i].type) { |
1106 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1107 | break; | |
1108 | case PIN_MAP_TYPE_MUX_GROUP: | |
1109 | ret = pinmux_validate_map(&maps[i], i); | |
1110 | if (ret < 0) | |
fde04f41 | 1111 | return ret; |
1e2082b5 SW |
1112 | break; |
1113 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1114 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1115 | ret = pinconf_validate_map(&maps[i], i); | |
1116 | if (ret < 0) | |
fde04f41 | 1117 | return ret; |
1e2082b5 SW |
1118 | break; |
1119 | default: | |
1120 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1121 | maps[i].name, i); |
1681f5ae SW |
1122 | return -EINVAL; |
1123 | } | |
befe5bdf LW |
1124 | } |
1125 | ||
b2b3e66e SW |
1126 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1127 | if (!maps_node) { | |
1128 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1129 | return -ENOMEM; | |
1130 | } | |
befe5bdf | 1131 | |
b2b3e66e | 1132 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1133 | if (dup) { |
1134 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1135 | GFP_KERNEL); | |
1136 | if (!maps_node->maps) { | |
1137 | pr_err("failed to duplicate mapping table\n"); | |
1138 | kfree(maps_node); | |
1139 | return -ENOMEM; | |
1140 | } | |
1141 | } else { | |
1142 | maps_node->maps = maps; | |
befe5bdf LW |
1143 | } |
1144 | ||
57291ce2 SW |
1145 | if (!locked) |
1146 | mutex_lock(&pinctrl_mutex); | |
b2b3e66e | 1147 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 SW |
1148 | if (!locked) |
1149 | mutex_unlock(&pinctrl_mutex); | |
b2b3e66e | 1150 | |
befe5bdf LW |
1151 | return 0; |
1152 | } | |
1153 | ||
57291ce2 SW |
1154 | /** |
1155 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1156 | * @maps: the pincontrol mappings table to register. This should probably be | |
1157 | * marked with __initdata so it can be discarded after boot. This | |
1158 | * function will perform a shallow copy for the mapping entries. | |
1159 | * @num_maps: the number of maps in the mapping table | |
1160 | */ | |
1161 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1162 | unsigned num_maps) | |
1163 | { | |
1164 | return pinctrl_register_map(maps, num_maps, true, false); | |
1165 | } | |
1166 | ||
1167 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1168 | { | |
1169 | struct pinctrl_maps *maps_node; | |
1170 | ||
1171 | list_for_each_entry(maps_node, &pinctrl_maps, node) { | |
1172 | if (maps_node->maps == map) { | |
1173 | list_del(&maps_node->node); | |
1174 | return; | |
1175 | } | |
1176 | } | |
1177 | } | |
1178 | ||
840a47ba JD |
1179 | /** |
1180 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1181 | * @pctldev: pin controller device | |
1182 | */ | |
1183 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1184 | { | |
1185 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1186 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1187 | return 0; | |
1188 | } | |
1189 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1190 | ||
1191 | /** | |
1192 | * pinctrl_force_default() - turn a given controller device into default state | |
1193 | * @pctldev: pin controller device | |
1194 | */ | |
1195 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1196 | { | |
1197 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1198 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1199 | return 0; | |
1200 | } | |
1201 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1202 | ||
2744e8af LW |
1203 | #ifdef CONFIG_DEBUG_FS |
1204 | ||
1205 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1206 | { | |
1207 | struct pinctrl_dev *pctldev = s->private; | |
1208 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1209 | unsigned i, pin; |
2744e8af LW |
1210 | |
1211 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1212 | |
57b676f9 SW |
1213 | mutex_lock(&pinctrl_mutex); |
1214 | ||
706e8520 CP |
1215 | /* The pin number can be retrived from the pin controller descriptor */ |
1216 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1217 | struct pin_desc *desc; |
1218 | ||
706e8520 | 1219 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1220 | desc = pin_desc_get(pctldev, pin); |
1221 | /* Pin space may be sparse */ | |
1222 | if (desc == NULL) | |
1223 | continue; | |
1224 | ||
1225 | seq_printf(s, "pin %d (%s) ", pin, | |
1226 | desc->name ? desc->name : "unnamed"); | |
1227 | ||
1228 | /* Driver-specific info per pin */ | |
1229 | if (ops->pin_dbg_show) | |
1230 | ops->pin_dbg_show(pctldev, s, pin); | |
1231 | ||
1232 | seq_puts(s, "\n"); | |
1233 | } | |
1234 | ||
57b676f9 SW |
1235 | mutex_unlock(&pinctrl_mutex); |
1236 | ||
2744e8af LW |
1237 | return 0; |
1238 | } | |
1239 | ||
1240 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1241 | { | |
1242 | struct pinctrl_dev *pctldev = s->private; | |
1243 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1244 | unsigned ngroups, selector = 0; |
2744e8af | 1245 | |
d1e90e9e | 1246 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 SW |
1247 | mutex_lock(&pinctrl_mutex); |
1248 | ||
2744e8af | 1249 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1250 | while (selector < ngroups) { |
a5818a8b | 1251 | const unsigned *pins; |
2744e8af LW |
1252 | unsigned num_pins; |
1253 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1254 | const char *pname; |
2744e8af LW |
1255 | int ret; |
1256 | int i; | |
1257 | ||
1258 | ret = ops->get_group_pins(pctldev, selector, | |
1259 | &pins, &num_pins); | |
1260 | if (ret) | |
1261 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1262 | gname); | |
1263 | else { | |
dcb5dbc3 DA |
1264 | seq_printf(s, "group: %s\n", gname); |
1265 | for (i = 0; i < num_pins; i++) { | |
1266 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b WY |
1267 | if (WARN_ON(!pname)) { |
1268 | mutex_unlock(&pinctrl_mutex); | |
dcb5dbc3 | 1269 | return -EINVAL; |
b4dd784b | 1270 | } |
dcb5dbc3 DA |
1271 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1272 | } | |
1273 | seq_puts(s, "\n"); | |
2744e8af LW |
1274 | } |
1275 | selector++; | |
1276 | } | |
1277 | ||
57b676f9 | 1278 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
1279 | |
1280 | return 0; | |
1281 | } | |
1282 | ||
1283 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1284 | { | |
1285 | struct pinctrl_dev *pctldev = s->private; | |
1286 | struct pinctrl_gpio_range *range = NULL; | |
1287 | ||
1288 | seq_puts(s, "GPIO ranges handled:\n"); | |
1289 | ||
57b676f9 SW |
1290 | mutex_lock(&pinctrl_mutex); |
1291 | ||
2744e8af | 1292 | /* Loop over the ranges */ |
2744e8af | 1293 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1294 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1295 | range->id, range->name, | |
1296 | range->base, (range->base + range->npins - 1), | |
1297 | range->pin_base, | |
1298 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1299 | } |
57b676f9 SW |
1300 | |
1301 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1302 | |
1303 | return 0; | |
1304 | } | |
1305 | ||
1306 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1307 | { | |
1308 | struct pinctrl_dev *pctldev; | |
1309 | ||
ae6b4d85 | 1310 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
1311 | |
1312 | mutex_lock(&pinctrl_mutex); | |
1313 | ||
2744e8af LW |
1314 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1315 | seq_printf(s, "%s ", pctldev->desc->name); | |
1316 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1317 | seq_puts(s, "yes "); |
1318 | else | |
1319 | seq_puts(s, "no "); | |
1320 | if (pctldev->desc->confops) | |
2744e8af LW |
1321 | seq_puts(s, "yes"); |
1322 | else | |
1323 | seq_puts(s, "no"); | |
1324 | seq_puts(s, "\n"); | |
1325 | } | |
57b676f9 SW |
1326 | |
1327 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1328 | |
1329 | return 0; | |
1330 | } | |
1331 | ||
1e2082b5 SW |
1332 | static inline const char *map_type(enum pinctrl_map_type type) |
1333 | { | |
1334 | static const char * const names[] = { | |
1335 | "INVALID", | |
1336 | "DUMMY_STATE", | |
1337 | "MUX_GROUP", | |
1338 | "CONFIGS_PIN", | |
1339 | "CONFIGS_GROUP", | |
1340 | }; | |
1341 | ||
1342 | if (type >= ARRAY_SIZE(names)) | |
1343 | return "UNKNOWN"; | |
1344 | ||
1345 | return names[type]; | |
1346 | } | |
1347 | ||
3eedb437 SW |
1348 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1349 | { | |
1350 | struct pinctrl_maps *maps_node; | |
1351 | int i; | |
1352 | struct pinctrl_map const *map; | |
1353 | ||
1354 | seq_puts(s, "Pinctrl maps:\n"); | |
1355 | ||
57b676f9 SW |
1356 | mutex_lock(&pinctrl_mutex); |
1357 | ||
3eedb437 | 1358 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1359 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1360 | map->dev_name, map->name, map_type(map->type), | |
1361 | map->type); | |
1362 | ||
1363 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1364 | seq_printf(s, "controlling device %s\n", | |
1365 | map->ctrl_dev_name); | |
1366 | ||
1367 | switch (map->type) { | |
1368 | case PIN_MAP_TYPE_MUX_GROUP: | |
1369 | pinmux_show_map(s, map); | |
1370 | break; | |
1371 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1372 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1373 | pinconf_show_map(s, map); | |
1374 | break; | |
1375 | default: | |
1376 | break; | |
1377 | } | |
1378 | ||
1379 | seq_printf(s, "\n"); | |
3eedb437 | 1380 | } |
57b676f9 SW |
1381 | |
1382 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1383 | |
1384 | return 0; | |
1385 | } | |
1386 | ||
befe5bdf LW |
1387 | static int pinctrl_show(struct seq_file *s, void *what) |
1388 | { | |
1389 | struct pinctrl *p; | |
6e5e959d | 1390 | struct pinctrl_state *state; |
7ecdb16f | 1391 | struct pinctrl_setting *setting; |
befe5bdf LW |
1392 | |
1393 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1394 | |
1395 | mutex_lock(&pinctrl_mutex); | |
1396 | ||
befe5bdf | 1397 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1398 | seq_printf(s, "device: %s current state: %s\n", |
1399 | dev_name(p->dev), | |
1400 | p->state ? p->state->name : "none"); | |
1401 | ||
1402 | list_for_each_entry(state, &p->states, node) { | |
1403 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1404 | |
6e5e959d | 1405 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1406 | struct pinctrl_dev *pctldev = setting->pctldev; |
1407 | ||
1408 | seq_printf(s, " type: %s controller %s ", | |
1409 | map_type(setting->type), | |
1410 | pinctrl_dev_get_name(pctldev)); | |
1411 | ||
1412 | switch (setting->type) { | |
1413 | case PIN_MAP_TYPE_MUX_GROUP: | |
1414 | pinmux_show_setting(s, setting); | |
1415 | break; | |
1416 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1417 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1418 | pinconf_show_setting(s, setting); | |
1419 | break; | |
1420 | default: | |
1421 | break; | |
1422 | } | |
6e5e959d | 1423 | } |
befe5bdf | 1424 | } |
befe5bdf LW |
1425 | } |
1426 | ||
57b676f9 SW |
1427 | mutex_unlock(&pinctrl_mutex); |
1428 | ||
befe5bdf LW |
1429 | return 0; |
1430 | } | |
1431 | ||
2744e8af LW |
1432 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1433 | { | |
1434 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1435 | } | |
1436 | ||
1437 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1438 | { | |
1439 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1440 | } | |
1441 | ||
1442 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1443 | { | |
1444 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1445 | } | |
1446 | ||
1447 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1448 | { | |
1449 | return single_open(file, pinctrl_devices_show, NULL); | |
1450 | } | |
1451 | ||
3eedb437 SW |
1452 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1453 | { | |
1454 | return single_open(file, pinctrl_maps_show, NULL); | |
1455 | } | |
1456 | ||
befe5bdf LW |
1457 | static int pinctrl_open(struct inode *inode, struct file *file) |
1458 | { | |
1459 | return single_open(file, pinctrl_show, NULL); | |
1460 | } | |
1461 | ||
2744e8af LW |
1462 | static const struct file_operations pinctrl_pins_ops = { |
1463 | .open = pinctrl_pins_open, | |
1464 | .read = seq_read, | |
1465 | .llseek = seq_lseek, | |
1466 | .release = single_release, | |
1467 | }; | |
1468 | ||
1469 | static const struct file_operations pinctrl_groups_ops = { | |
1470 | .open = pinctrl_groups_open, | |
1471 | .read = seq_read, | |
1472 | .llseek = seq_lseek, | |
1473 | .release = single_release, | |
1474 | }; | |
1475 | ||
1476 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1477 | .open = pinctrl_gpioranges_open, | |
1478 | .read = seq_read, | |
1479 | .llseek = seq_lseek, | |
1480 | .release = single_release, | |
1481 | }; | |
1482 | ||
3eedb437 SW |
1483 | static const struct file_operations pinctrl_devices_ops = { |
1484 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1485 | .read = seq_read, |
1486 | .llseek = seq_lseek, | |
1487 | .release = single_release, | |
1488 | }; | |
1489 | ||
3eedb437 SW |
1490 | static const struct file_operations pinctrl_maps_ops = { |
1491 | .open = pinctrl_maps_open, | |
2744e8af LW |
1492 | .read = seq_read, |
1493 | .llseek = seq_lseek, | |
1494 | .release = single_release, | |
1495 | }; | |
1496 | ||
befe5bdf LW |
1497 | static const struct file_operations pinctrl_ops = { |
1498 | .open = pinctrl_open, | |
1499 | .read = seq_read, | |
1500 | .llseek = seq_lseek, | |
1501 | .release = single_release, | |
1502 | }; | |
1503 | ||
2744e8af LW |
1504 | static struct dentry *debugfs_root; |
1505 | ||
1506 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1507 | { | |
02157160 | 1508 | struct dentry *device_root; |
2744e8af | 1509 | |
51cd24ee | 1510 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1511 | debugfs_root); |
02157160 TL |
1512 | pctldev->device_root = device_root; |
1513 | ||
2744e8af LW |
1514 | if (IS_ERR(device_root) || !device_root) { |
1515 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1516 | dev_name(pctldev->dev)); |
2744e8af LW |
1517 | return; |
1518 | } | |
1519 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1520 | device_root, pctldev, &pinctrl_pins_ops); | |
1521 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1522 | device_root, pctldev, &pinctrl_groups_ops); | |
1523 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1524 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1525 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1526 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1527 | } |
1528 | ||
02157160 TL |
1529 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1530 | { | |
1531 | debugfs_remove_recursive(pctldev->device_root); | |
1532 | } | |
1533 | ||
2744e8af LW |
1534 | static void pinctrl_init_debugfs(void) |
1535 | { | |
1536 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1537 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1538 | pr_warn("failed to create debugfs directory\n"); | |
1539 | debugfs_root = NULL; | |
1540 | return; | |
1541 | } | |
1542 | ||
1543 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1544 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1545 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1546 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1547 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1548 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1549 | } |
1550 | ||
1551 | #else /* CONFIG_DEBUG_FS */ | |
1552 | ||
1553 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1554 | { | |
1555 | } | |
1556 | ||
1557 | static void pinctrl_init_debugfs(void) | |
1558 | { | |
1559 | } | |
1560 | ||
02157160 TL |
1561 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1562 | { | |
1563 | } | |
1564 | ||
2744e8af LW |
1565 | #endif |
1566 | ||
d26bc49f SW |
1567 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1568 | { | |
1569 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1570 | ||
1571 | if (!ops || | |
d1e90e9e | 1572 | !ops->get_groups_count || |
d26bc49f SW |
1573 | !ops->get_group_name || |
1574 | !ops->get_group_pins) | |
1575 | return -EINVAL; | |
1576 | ||
57291ce2 SW |
1577 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1578 | return -EINVAL; | |
1579 | ||
d26bc49f SW |
1580 | return 0; |
1581 | } | |
1582 | ||
2744e8af LW |
1583 | /** |
1584 | * pinctrl_register() - register a pin controller device | |
1585 | * @pctldesc: descriptor for this pin controller | |
1586 | * @dev: parent device for this pin controller | |
1587 | * @driver_data: private pin controller data for this pin controller | |
1588 | */ | |
1589 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1590 | struct device *dev, void *driver_data) | |
1591 | { | |
2744e8af LW |
1592 | struct pinctrl_dev *pctldev; |
1593 | int ret; | |
1594 | ||
da9aecb0 | 1595 | if (!pctldesc) |
2744e8af | 1596 | return NULL; |
da9aecb0 | 1597 | if (!pctldesc->name) |
2744e8af LW |
1598 | return NULL; |
1599 | ||
02f5b989 | 1600 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1601 | if (pctldev == NULL) { |
1602 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1603 | return NULL; |
95dcd4ae | 1604 | } |
b9130b77 TL |
1605 | |
1606 | /* Initialize pin control device struct */ | |
1607 | pctldev->owner = pctldesc->owner; | |
1608 | pctldev->desc = pctldesc; | |
1609 | pctldev->driver_data = driver_data; | |
1610 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1611 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1612 | pctldev->dev = dev; |
1613 | ||
d26bc49f | 1614 | /* check core ops for sanity */ |
da9aecb0 | 1615 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1616 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1617 | goto out_err; |
1618 | } | |
1619 | ||
2744e8af LW |
1620 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1621 | if (pctldesc->pmxops) { | |
da9aecb0 | 1622 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1623 | goto out_err; |
2744e8af LW |
1624 | } |
1625 | ||
ae6b4d85 LW |
1626 | /* If we're implementing pinconfig, check the ops for sanity */ |
1627 | if (pctldesc->confops) { | |
da9aecb0 | 1628 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1629 | goto out_err; |
ae6b4d85 LW |
1630 | } |
1631 | ||
2744e8af | 1632 | /* Register all the pins */ |
ad6e1107 | 1633 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1634 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1635 | if (ret) { | |
ad6e1107 | 1636 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1637 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1638 | pctldesc->npins); | |
51cd24ee | 1639 | goto out_err; |
2744e8af LW |
1640 | } |
1641 | ||
57b676f9 SW |
1642 | mutex_lock(&pinctrl_mutex); |
1643 | ||
8b9c139f | 1644 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1645 | |
6e5e959d SW |
1646 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1647 | if (!IS_ERR(pctldev->p)) { | |
840a47ba | 1648 | pctldev->hog_default = |
6e5e959d SW |
1649 | pinctrl_lookup_state_locked(pctldev->p, |
1650 | PINCTRL_STATE_DEFAULT); | |
840a47ba | 1651 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1652 | dev_dbg(dev, "failed to lookup the default state\n"); |
1653 | } else { | |
840a47ba JD |
1654 | if (pinctrl_select_state_locked(pctldev->p, |
1655 | pctldev->hog_default)) | |
ad6e1107 JC |
1656 | dev_err(dev, |
1657 | "failed to select default state\n"); | |
ad6e1107 | 1658 | } |
840a47ba JD |
1659 | |
1660 | pctldev->hog_sleep = | |
1661 | pinctrl_lookup_state_locked(pctldev->p, | |
1662 | PINCTRL_STATE_SLEEP); | |
1663 | if (IS_ERR(pctldev->hog_sleep)) | |
1664 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1665 | } |
57b676f9 SW |
1666 | |
1667 | mutex_unlock(&pinctrl_mutex); | |
1668 | ||
2304b473 SW |
1669 | pinctrl_init_device_debugfs(pctldev); |
1670 | ||
2744e8af LW |
1671 | return pctldev; |
1672 | ||
51cd24ee SW |
1673 | out_err: |
1674 | kfree(pctldev); | |
2744e8af LW |
1675 | return NULL; |
1676 | } | |
1677 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1678 | ||
1679 | /** | |
1680 | * pinctrl_unregister() - unregister pinmux | |
1681 | * @pctldev: pin controller to unregister | |
1682 | * | |
1683 | * Called by pinmux drivers to unregister a pinmux. | |
1684 | */ | |
1685 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1686 | { | |
5d589b09 | 1687 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1688 | if (pctldev == NULL) |
1689 | return; | |
1690 | ||
02157160 | 1691 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1692 | |
1693 | mutex_lock(&pinctrl_mutex); | |
1694 | ||
6e5e959d SW |
1695 | if (!IS_ERR(pctldev->p)) |
1696 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1697 | |
2744e8af | 1698 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1699 | list_del(&pctldev->node); |
2744e8af LW |
1700 | /* Destroy descriptor tree */ |
1701 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1702 | pctldev->desc->npins); | |
5d589b09 DA |
1703 | /* remove gpio ranges map */ |
1704 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1705 | list_del(&range->node); | |
1706 | ||
51cd24ee | 1707 | kfree(pctldev); |
57b676f9 SW |
1708 | |
1709 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1710 | } |
1711 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1712 | ||
1713 | static int __init pinctrl_init(void) | |
1714 | { | |
1715 | pr_info("initialized pinctrl subsystem\n"); | |
1716 | pinctrl_init_debugfs(); | |
1717 | return 0; | |
1718 | } | |
1719 | ||
1720 | /* init early since many drivers really need to initialized pinmux early */ | |
1721 | core_initcall(pinctrl_init); |