[deliverable/linux.git] / drivers / pinctrl / mediatek / pinctrl-mtk-common.h

/*
 * Copyright (c) 2014 MediaTek Inc.
 * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __PINCTRL_MTK_COMMON_H
#define __PINCTRL_MTK_COMMON_H

#include <linux/pinctrl/pinctrl.h>
#include <linux/regmap.h>

#define NO_EINT_SUPPORT    255
#define MT_EDGE_SENSITIVE           0
#define MT_LEVEL_SENSITIVE          1
#define EINT_DBNC_SET_DBNC_BITS     4
#define EINT_DBNC_RST_BIT           (0x1 << 1)
#define EINT_DBNC_SET_EN            (0x1 << 0)

struct mtk_desc_function {
	const char *name;
	unsigned char muxval;
};

struct mtk_desc_eint {
	unsigned char eintmux;
	unsigned char eintnum;
};

struct mtk_desc_pin {
	struct pinctrl_pin_desc	pin;
	const struct mtk_desc_eint eint;
	const struct mtk_desc_function	*functions;
};

#define MTK_PIN(_pin, _pad, _chip, _eint, ...)		\
	{							\
		.pin = _pin,					\
		.eint = _eint,					\
		.functions = (struct mtk_desc_function[]){	\
			__VA_ARGS__, { } },			\
	}

#define MTK_EINT_FUNCTION(_eintmux, _eintnum)				\
	{							\
		.eintmux = _eintmux,					\
		.eintnum = _eintnum,					\
	}

#define MTK_FUNCTION(_val, _name)				\
	{							\
		.muxval = _val,					\
		.name = _name,					\
	}

#define SET_ADDR(x, y)  (x + (y->devdata->port_align))
#define CLR_ADDR(x, y)  (x + (y->devdata->port_align << 1))

struct mtk_pinctrl_group {
	const char	*name;
	unsigned long	config;
	unsigned	pin;
};

/**
 * struct mtk_drv_group_desc - Provide driving group data.
 * @max_drv: The maximum current of this group.
 * @min_drv: The minimum current of this group.
 * @low_bit: The lowest bit of this group.
 * @high_bit: The highest bit of this group.
 * @step: The step current of this group.
 */
struct mtk_drv_group_desc {
	unsigned char min_drv;
	unsigned char max_drv;
	unsigned char low_bit;
	unsigned char high_bit;
	unsigned char step;
};

#define MTK_DRV_GRP(_min, _max, _low, _high, _step)	\
	{	\
		.min_drv = _min,	\
		.max_drv = _max,	\
		.low_bit = _low,	\
		.high_bit = _high,	\
		.step = _step,		\
	}

/**
 * struct mtk_pin_drv_grp - Provide each pin driving info.
 * @pin: The pin number.
 * @offset: The offset of driving register for this pin.
 * @bit: The bit of driving register for this pin.
 * @grp: The group for this pin belongs to.
 */
struct mtk_pin_drv_grp {
	unsigned short pin;
	unsigned short offset;
	unsigned char bit;
	unsigned char grp;
};

#define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp)	\
	{	\
		.pin = _pin,	\
		.offset = _offset,	\
		.bit = _bit,	\
		.grp = _grp,	\
	}

/**
 * struct mtk_pin_spec_pupd_set_samereg
 * - For special pins' pull up/down setting which resides in same register
 * @pin: The pin number.
 * @offset: The offset of special pull up/down setting register.
 * @pupd_bit: The pull up/down bit in this register.
 * @r0_bit: The r0 bit of pull resistor.
 * @r1_bit: The r1 bit of pull resistor.
 */
struct mtk_pin_spec_pupd_set_samereg {
	unsigned short pin;
	unsigned short offset;
	unsigned char pupd_bit;
	unsigned char r1_bit;
	unsigned char r0_bit;
};

#define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0)	\
	{	\
		.pin = _pin,	\
		.offset = _offset,	\
		.pupd_bit = _pupd,	\
		.r1_bit = _r1,		\
		.r0_bit = _r0,		\
	}

struct mtk_eint_offsets {
	const char *name;
	unsigned int  stat;
	unsigned int  ack;
	unsigned int  mask;
	unsigned int  mask_set;
	unsigned int  mask_clr;
	unsigned int  sens;
	unsigned int  sens_set;
	unsigned int  sens_clr;
	unsigned int  soft;
	unsigned int  soft_set;
	unsigned int  soft_clr;
	unsigned int  pol;
	unsigned int  pol_set;
	unsigned int  pol_clr;
	unsigned int  dom_en;
	unsigned int  dbnc_ctrl;
	unsigned int  dbnc_set;
	unsigned int  dbnc_clr;
	u8  port_mask;
	u8  ports;
};

/**
 * struct mtk_pinctrl_devdata - Provide HW GPIO related data.
 * @pins: An array describing all pins the pin controller affects.
 * @npins: The number of entries in @pins.
 *
 * @grp_desc: The driving group info.
 * @pin_drv_grp: The driving group for all pins.
 * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
 *  these pins' pull setting are very different, they have separate pull
 *  up/down bit, R0 and R1 resistor bit, so they need special pull setting.
 *  If special setting is success, this should return 0, otherwise it should
 *  return non-zero value.
 * @spec_ies_smt_set: Some pins are irregular, their input enable and smt
 * control register are discontinuous, but they are mapping together. That
 * means when user set smt, input enable is set at the same time. So they
 * also need special control. If special control is success, this should
 * return 0, otherwise return non-zero value.
 *
 * @dir_offset: The direction register offset.
 * @pullen_offset: The pull-up/pull-down enable register offset.
 * @pinmux_offset: The pinmux register offset.
 *
 * @type1_start: Some chips have two base addresses for pull select register,
 *  that means some pins use the first address and others use the second. This
 *  member record the start of pin number to use the second address.
 * @type1_end: The end of pin number to use the second address.
 *
 * @port_shf: The shift between two registers.
 * @port_mask: The mask of register.
 * @port_align: Provide clear register and set register step.
 */
struct mtk_pinctrl_devdata {
	const struct mtk_desc_pin	*pins;
	unsigned int				npins;
	const struct mtk_drv_group_desc	*grp_desc;
	unsigned int	n_grp_cls;
	const struct mtk_pin_drv_grp	*pin_drv_grp;
	unsigned int	n_pin_drv_grps;
	int (*spec_pull_set)(struct regmap *reg, unsigned int pin,
			unsigned char align, bool isup, unsigned int arg);
	int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin,
			unsigned char align, int value);
	unsigned int dir_offset;
	unsigned int ies_offset;
	unsigned int smt_offset;
	unsigned int pullen_offset;
	unsigned int pullsel_offset;
	unsigned int drv_offset;
	unsigned int dout_offset;
	unsigned int din_offset;
	unsigned int pinmux_offset;
	unsigned short type1_start;
	unsigned short type1_end;
	unsigned char  port_shf;
	unsigned char  port_mask;
	unsigned char  port_align;
	struct mtk_eint_offsets eint_offsets;
	unsigned int	ap_num;
	unsigned int	db_cnt;
};

struct mtk_pinctrl {
	struct regmap	*regmap1;
	struct regmap	*regmap2;
	struct device           *dev;
	struct gpio_chip	*chip;
	struct mtk_pinctrl_group	*groups;
	unsigned			ngroups;
	const char          **grp_names;
	struct pinctrl_dev      *pctl_dev;
	const struct mtk_pinctrl_devdata  *devdata;
	void __iomem		*eint_reg_base;
	struct irq_domain	*domain;
	int			*eint_dual_edges;
};

int mtk_pctrl_init(struct platform_device *pdev,
		const struct mtk_pinctrl_devdata *data);

int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap,
		const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
		unsigned int info_num, unsigned int pin,
		unsigned char align, bool isup, unsigned int r1r0);

#endif /* __PINCTRL_MTK_COMMON_H */
Commit	Line	Data
a6df410d HY	1	/*
	2	* Copyright (c) 2014 MediaTek Inc.
	3	* Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*/
	14
	15	#ifndef __PINCTRL_MTK_COMMON_H
	16	#define __PINCTRL_MTK_COMMON_H
	17
	18	#include <linux/pinctrl/pinctrl.h>
a6df410d HY	19	#include <linux/regmap.h>
	20
	21	#define NO_EINT_SUPPORT 255
d9819eb9 MM	22	#define MT_EDGE_SENSITIVE 0
	23	#define MT_LEVEL_SENSITIVE 1
	24	#define EINT_DBNC_SET_DBNC_BITS 4
	25	#define EINT_DBNC_RST_BIT (0x1 << 1)
	26	#define EINT_DBNC_SET_EN (0x1 << 0)
a6df410d HY	27
	28	struct mtk_desc_function {
	29	const char *name;
	30	unsigned char muxval;
	31	};
	32
	33	struct mtk_desc_eint {
	34	unsigned char eintmux;
	35	unsigned char eintnum;
	36	};
	37
	38	struct mtk_desc_pin {
	39	struct pinctrl_pin_desc pin;
a6df410d HY	40	const struct mtk_desc_eint eint;
	41	const struct mtk_desc_function *functions;
	42	};
	43
	44	#define MTK_PIN(_pin, _pad, _chip, _eint, ...) \
	45	{ \
	46	.pin = _pin, \
a6df410d HY	47	.eint = _eint, \
	48	.functions = (struct mtk_desc_function[]){ \
	49	__VA_ARGS__, { } }, \
	50	}
	51
	52	#define MTK_EINT_FUNCTION(_eintmux, _eintnum) \
	53	{ \
	54	.eintmux = _eintmux, \
	55	.eintnum = _eintnum, \
	56	}
	57
	58	#define MTK_FUNCTION(_val, _name) \
	59	{ \
	60	.muxval = _val, \
	61	.name = _name, \
	62	}
	63
	64	#define SET_ADDR(x, y) (x + (y->devdata->port_align))
	65	#define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1))
	66
	67	struct mtk_pinctrl_group {
	68	const char *name;
	69	unsigned long config;
	70	unsigned pin;
	71	};
	72
	73	/**
	74	* struct mtk_drv_group_desc - Provide driving group data.
	75	* @max_drv: The maximum current of this group.
	76	* @min_drv: The minimum current of this group.
	77	* @low_bit: The lowest bit of this group.
	78	* @high_bit: The highest bit of this group.
	79	* @step: The step current of this group.
	80	*/
	81	struct mtk_drv_group_desc {
	82	unsigned char min_drv;
	83	unsigned char max_drv;
	84	unsigned char low_bit;
	85	unsigned char high_bit;
	86	unsigned char step;
	87	};
	88
	89	#define MTK_DRV_GRP(_min, _max, _low, _high, _step) \
	90	{ \
	91	.min_drv = _min, \
	92	.max_drv = _max, \
	93	.low_bit = _low, \
	94	.high_bit = _high, \
	95	.step = _step, \
	96	}
	97
	98	/**
	99	* struct mtk_pin_drv_grp - Provide each pin driving info.
	100	* @pin: The pin number.
	101	* @offset: The offset of driving register for this pin.
	102	* @bit: The bit of driving register for this pin.
	103	* @grp: The group for this pin belongs to.
	104	*/
	105	struct mtk_pin_drv_grp {
4b9b5268 YC	106	unsigned short pin;
4b9b5268 YC	107	unsigned short offset;
a6df410d HY	108	unsigned char bit;
	109	unsigned char grp;
	110	};
	111
	112	#define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \
	113	{ \
	114	.pin = _pin, \
	115	.offset = _offset, \
	116	.bit = _bit, \
	117	.grp = _grp, \
	118	}
	119
e73fe271 YC	120	/**
	121	* struct mtk_pin_spec_pupd_set_samereg
	122	* - For special pins' pull up/down setting which resides in same register
	123	* @pin: The pin number.
	124	* @offset: The offset of special pull up/down setting register.
	125	* @pupd_bit: The pull up/down bit in this register.
	126	* @r0_bit: The r0 bit of pull resistor.
	127	* @r1_bit: The r1 bit of pull resistor.
	128	*/
	129	struct mtk_pin_spec_pupd_set_samereg {
	130	unsigned short pin;
	131	unsigned short offset;
	132	unsigned char pupd_bit;
	133	unsigned char r1_bit;
	134	unsigned char r0_bit;
	135	};
	136
	137	#define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \
	138	{ \
	139	.pin = _pin, \
	140	.offset = _offset, \
	141	.pupd_bit = _pupd, \
	142	.r1_bit = _r1, \
	143	.r0_bit = _r0, \
	144	}
	145
d9819eb9 MM	146	struct mtk_eint_offsets {
	147	const char *name;
	148	unsigned int stat;
	149	unsigned int ack;
	150	unsigned int mask;
	151	unsigned int mask_set;
	152	unsigned int mask_clr;
	153	unsigned int sens;
	154	unsigned int sens_set;
	155	unsigned int sens_clr;
3221f40b YC	156	unsigned int soft;
	157	unsigned int soft_set;
	158	unsigned int soft_clr;
d9819eb9 MM	159	unsigned int pol;
	160	unsigned int pol_set;
	161	unsigned int pol_clr;
	162	unsigned int dom_en;
	163	unsigned int dbnc_ctrl;
	164	unsigned int dbnc_set;
	165	unsigned int dbnc_clr;
	166	u8 port_mask;
	167	u8 ports;
	168	};
	169
a6df410d HY	170	/**
	171	* struct mtk_pinctrl_devdata - Provide HW GPIO related data.
	172	* @pins: An array describing all pins the pin controller affects.
	173	* @npins: The number of entries in @pins.
	174	*
	175	* @grp_desc: The driving group info.
	176	* @pin_drv_grp: The driving group for all pins.
	177	* @spec_pull_set: Each SoC may have special pins for pull up/down setting,
	178	* these pins' pull setting are very different, they have separate pull
	179	* up/down bit, R0 and R1 resistor bit, so they need special pull setting.
	180	* If special setting is success, this should return 0, otherwise it should
	181	* return non-zero value.
30f010f5 HY	182	* @spec_ies_smt_set: Some pins are irregular, their input enable and smt
	183	* control register are discontinuous, but they are mapping together. That
	184	* means when user set smt, input enable is set at the same time. So they
	185	* also need special control. If special control is success, this should
	186	* return 0, otherwise return non-zero value.
a6df410d HY	187	*
	188	* @dir_offset: The direction register offset.
	189	* @pullen_offset: The pull-up/pull-down enable register offset.
	190	* @pinmux_offset: The pinmux register offset.
	191	*
	192	* @type1_start: Some chips have two base addresses for pull select register,
	193	* that means some pins use the first address and others use the second. This
	194	* member record the start of pin number to use the second address.
	195	* @type1_end: The end of pin number to use the second address.
	196	*
	197	* @port_shf: The shift between two registers.
	198	* @port_mask: The mask of register.
	199	* @port_align: Provide clear register and set register step.
	200	*/
	201	struct mtk_pinctrl_devdata {
	202	const struct mtk_desc_pin *pins;
	203	unsigned int npins;
	204	const struct mtk_drv_group_desc *grp_desc;
	205	unsigned int n_grp_cls;
	206	const struct mtk_pin_drv_grp *pin_drv_grp;
	207	unsigned int n_pin_drv_grps;
	208	int (spec_pull_set)(struct regmap reg, unsigned int pin,
	209	unsigned char align, bool isup, unsigned int arg);
30f010f5 HY	210	int (spec_ies_smt_set)(struct regmap reg, unsigned int pin,
30f010f5 HY	211	unsigned char align, int value);
a6df410d HY	212	unsigned int dir_offset;
	213	unsigned int ies_offset;
	214	unsigned int smt_offset;
	215	unsigned int pullen_offset;
	216	unsigned int pullsel_offset;
	217	unsigned int drv_offset;
a6df410d HY	218	unsigned int dout_offset;
	219	unsigned int din_offset;
	220	unsigned int pinmux_offset;
	221	unsigned short type1_start;
	222	unsigned short type1_end;
	223	unsigned char port_shf;
	224	unsigned char port_mask;
	225	unsigned char port_align;
d9819eb9 MM	226	struct mtk_eint_offsets eint_offsets;
	227	unsigned int ap_num;
	228	unsigned int db_cnt;
a6df410d HY	229	};
	230
	231	struct mtk_pinctrl {
	232	struct regmap *regmap1;
	233	struct regmap *regmap2;
	234	struct device *dev;
	235	struct gpio_chip *chip;
	236	struct mtk_pinctrl_group *groups;
	237	unsigned ngroups;
	238	const char **grp_names;
	239	struct pinctrl_dev *pctl_dev;
	240	const struct mtk_pinctrl_devdata *devdata;
d9819eb9 MM	241	void __iomem *eint_reg_base;
d9819eb9 MM	242	struct irq_domain *domain;
3221f40b	243	int *eint_dual_edges;
a6df410d HY	244	};
	245
	246	int mtk_pctrl_init(struct platform_device *pdev,
	247	const struct mtk_pinctrl_devdata *data);
	248
e73fe271 YC	249	int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap,
	250	const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
	251	unsigned int info_num, unsigned int pin,
	252	unsigned char align, bool isup, unsigned int r1r0);
	253
a6df410d	254	#endif /* __PINCTRL_MTK_COMMON_H */