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e9a03add SZ |
1 | /* |
2 | * Pinctrl Driver for ADI GPIO2 controller | |
3 | * | |
4 | * Copyright 2007-2013 Analog Devices Inc. | |
5 | * | |
6 | * Licensed under the GPLv2 or later | |
7 | */ | |
8 | ||
9 | #include <asm/portmux.h> | |
10 | #include "pinctrl-adi2.h" | |
11 | ||
12 | static const struct pinctrl_pin_desc adi_pads[] = { | |
13 | PINCTRL_PIN(0, "PA0"), | |
14 | PINCTRL_PIN(1, "PA1"), | |
15 | PINCTRL_PIN(2, "PA2"), | |
16 | PINCTRL_PIN(3, "PG3"), | |
17 | PINCTRL_PIN(4, "PA4"), | |
18 | PINCTRL_PIN(5, "PA5"), | |
19 | PINCTRL_PIN(6, "PA6"), | |
20 | PINCTRL_PIN(7, "PA7"), | |
21 | PINCTRL_PIN(8, "PA8"), | |
22 | PINCTRL_PIN(9, "PA9"), | |
23 | PINCTRL_PIN(10, "PA10"), | |
24 | PINCTRL_PIN(11, "PA11"), | |
25 | PINCTRL_PIN(12, "PA12"), | |
26 | PINCTRL_PIN(13, "PA13"), | |
27 | PINCTRL_PIN(14, "PA14"), | |
28 | PINCTRL_PIN(15, "PA15"), | |
29 | PINCTRL_PIN(16, "PB0"), | |
30 | PINCTRL_PIN(17, "PB1"), | |
31 | PINCTRL_PIN(18, "PB2"), | |
32 | PINCTRL_PIN(19, "PB3"), | |
33 | PINCTRL_PIN(20, "PB4"), | |
34 | PINCTRL_PIN(21, "PB5"), | |
35 | PINCTRL_PIN(22, "PB6"), | |
36 | PINCTRL_PIN(23, "PB7"), | |
37 | PINCTRL_PIN(24, "PB8"), | |
38 | PINCTRL_PIN(25, "PB9"), | |
39 | PINCTRL_PIN(26, "PB10"), | |
40 | PINCTRL_PIN(27, "PB11"), | |
41 | PINCTRL_PIN(28, "PB12"), | |
42 | PINCTRL_PIN(29, "PB13"), | |
43 | PINCTRL_PIN(30, "PB14"), | |
44 | PINCTRL_PIN(32, "PC0"), | |
45 | PINCTRL_PIN(33, "PC1"), | |
46 | PINCTRL_PIN(34, "PC2"), | |
47 | PINCTRL_PIN(35, "PC3"), | |
48 | PINCTRL_PIN(36, "PC4"), | |
49 | PINCTRL_PIN(37, "PC5"), | |
50 | PINCTRL_PIN(38, "PC6"), | |
51 | PINCTRL_PIN(39, "PC7"), | |
52 | PINCTRL_PIN(40, "PC8"), | |
53 | PINCTRL_PIN(41, "PC9"), | |
54 | PINCTRL_PIN(42, "PC10"), | |
55 | PINCTRL_PIN(43, "PC11"), | |
56 | PINCTRL_PIN(44, "PC12"), | |
57 | PINCTRL_PIN(45, "PC13"), | |
58 | PINCTRL_PIN(48, "PD0"), | |
59 | PINCTRL_PIN(49, "PD1"), | |
60 | PINCTRL_PIN(50, "PD2"), | |
61 | PINCTRL_PIN(51, "PD3"), | |
62 | PINCTRL_PIN(52, "PD4"), | |
63 | PINCTRL_PIN(53, "PD5"), | |
64 | PINCTRL_PIN(54, "PD6"), | |
65 | PINCTRL_PIN(55, "PD7"), | |
66 | PINCTRL_PIN(56, "PD8"), | |
67 | PINCTRL_PIN(57, "PD9"), | |
68 | PINCTRL_PIN(58, "PD10"), | |
69 | PINCTRL_PIN(59, "PD11"), | |
70 | PINCTRL_PIN(60, "PD12"), | |
71 | PINCTRL_PIN(61, "PD13"), | |
72 | PINCTRL_PIN(62, "PD14"), | |
73 | PINCTRL_PIN(63, "PD15"), | |
74 | PINCTRL_PIN(64, "PE0"), | |
75 | PINCTRL_PIN(65, "PE1"), | |
76 | PINCTRL_PIN(66, "PE2"), | |
77 | PINCTRL_PIN(67, "PE3"), | |
78 | PINCTRL_PIN(68, "PE4"), | |
79 | PINCTRL_PIN(69, "PE5"), | |
80 | PINCTRL_PIN(70, "PE6"), | |
81 | PINCTRL_PIN(71, "PE7"), | |
82 | PINCTRL_PIN(72, "PE8"), | |
83 | PINCTRL_PIN(73, "PE9"), | |
84 | PINCTRL_PIN(74, "PE10"), | |
85 | PINCTRL_PIN(75, "PE11"), | |
86 | PINCTRL_PIN(76, "PE12"), | |
87 | PINCTRL_PIN(77, "PE13"), | |
88 | PINCTRL_PIN(78, "PE14"), | |
89 | PINCTRL_PIN(79, "PE15"), | |
90 | PINCTRL_PIN(80, "PF0"), | |
91 | PINCTRL_PIN(81, "PF1"), | |
92 | PINCTRL_PIN(82, "PF2"), | |
93 | PINCTRL_PIN(83, "PF3"), | |
94 | PINCTRL_PIN(84, "PF4"), | |
95 | PINCTRL_PIN(85, "PF5"), | |
96 | PINCTRL_PIN(86, "PF6"), | |
97 | PINCTRL_PIN(87, "PF7"), | |
98 | PINCTRL_PIN(88, "PF8"), | |
99 | PINCTRL_PIN(89, "PF9"), | |
100 | PINCTRL_PIN(90, "PF10"), | |
101 | PINCTRL_PIN(91, "PF11"), | |
102 | PINCTRL_PIN(92, "PF12"), | |
103 | PINCTRL_PIN(93, "PF13"), | |
104 | PINCTRL_PIN(94, "PF14"), | |
105 | PINCTRL_PIN(95, "PF15"), | |
106 | PINCTRL_PIN(96, "PG0"), | |
107 | PINCTRL_PIN(97, "PG1"), | |
108 | PINCTRL_PIN(98, "PG2"), | |
109 | PINCTRL_PIN(99, "PG3"), | |
110 | PINCTRL_PIN(100, "PG4"), | |
111 | PINCTRL_PIN(101, "PG5"), | |
112 | PINCTRL_PIN(102, "PG6"), | |
113 | PINCTRL_PIN(103, "PG7"), | |
114 | PINCTRL_PIN(104, "PG8"), | |
115 | PINCTRL_PIN(105, "PG9"), | |
116 | PINCTRL_PIN(106, "PG10"), | |
117 | PINCTRL_PIN(107, "PG11"), | |
118 | PINCTRL_PIN(108, "PG12"), | |
119 | PINCTRL_PIN(109, "PG13"), | |
120 | PINCTRL_PIN(110, "PG14"), | |
121 | PINCTRL_PIN(111, "PG15"), | |
122 | PINCTRL_PIN(112, "PH0"), | |
123 | PINCTRL_PIN(113, "PH1"), | |
124 | PINCTRL_PIN(114, "PH2"), | |
125 | PINCTRL_PIN(115, "PH3"), | |
126 | PINCTRL_PIN(116, "PH4"), | |
127 | PINCTRL_PIN(117, "PH5"), | |
128 | PINCTRL_PIN(118, "PH6"), | |
129 | PINCTRL_PIN(119, "PH7"), | |
130 | PINCTRL_PIN(120, "PH8"), | |
131 | PINCTRL_PIN(121, "PH9"), | |
132 | PINCTRL_PIN(122, "PH10"), | |
133 | PINCTRL_PIN(123, "PH11"), | |
134 | PINCTRL_PIN(124, "PH12"), | |
135 | PINCTRL_PIN(125, "PH13"), | |
136 | PINCTRL_PIN(128, "PI0"), | |
137 | PINCTRL_PIN(129, "PI1"), | |
138 | PINCTRL_PIN(130, "PI2"), | |
139 | PINCTRL_PIN(131, "PI3"), | |
140 | PINCTRL_PIN(132, "PI4"), | |
141 | PINCTRL_PIN(133, "PI5"), | |
142 | PINCTRL_PIN(134, "PI6"), | |
143 | PINCTRL_PIN(135, "PI7"), | |
144 | PINCTRL_PIN(136, "PI8"), | |
145 | PINCTRL_PIN(137, "PI9"), | |
146 | PINCTRL_PIN(138, "PI10"), | |
147 | PINCTRL_PIN(139, "PI11"), | |
148 | PINCTRL_PIN(140, "PI12"), | |
149 | PINCTRL_PIN(141, "PI13"), | |
150 | PINCTRL_PIN(142, "PI14"), | |
151 | PINCTRL_PIN(143, "PI15"), | |
152 | PINCTRL_PIN(144, "PJ0"), | |
153 | PINCTRL_PIN(145, "PJ1"), | |
154 | PINCTRL_PIN(146, "PJ2"), | |
155 | PINCTRL_PIN(147, "PJ3"), | |
156 | PINCTRL_PIN(148, "PJ4"), | |
157 | PINCTRL_PIN(149, "PJ5"), | |
158 | PINCTRL_PIN(150, "PJ6"), | |
159 | PINCTRL_PIN(151, "PJ7"), | |
160 | PINCTRL_PIN(152, "PJ8"), | |
161 | PINCTRL_PIN(153, "PJ9"), | |
162 | PINCTRL_PIN(154, "PJ10"), | |
163 | PINCTRL_PIN(155, "PJ11"), | |
164 | PINCTRL_PIN(156, "PJ12"), | |
165 | PINCTRL_PIN(157, "PJ13"), | |
166 | }; | |
167 | ||
168 | static const unsigned uart0_pins[] = { | |
169 | GPIO_PE7, GPIO_PE8, | |
170 | }; | |
171 | ||
172 | static const unsigned uart1_pins[] = { | |
173 | GPIO_PH0, GPIO_PH1, | |
174 | }; | |
175 | ||
176 | static const unsigned uart1_ctsrts_pins[] = { | |
177 | GPIO_PE9, GPIO_PE10, | |
178 | }; | |
179 | ||
180 | static const unsigned uart2_pins[] = { | |
181 | GPIO_PB4, GPIO_PB5, | |
182 | }; | |
183 | ||
184 | static const unsigned uart3_pins[] = { | |
185 | GPIO_PB6, GPIO_PB7, | |
186 | }; | |
187 | ||
188 | static const unsigned uart3_ctsrts_pins[] = { | |
189 | GPIO_PB2, GPIO_PB3, | |
190 | }; | |
191 | ||
192 | static const unsigned rsi0_pins[] = { | |
193 | GPIO_PC8, GPIO_PC9, GPIO_PC10, GPIO_PC11, GPIO_PC12, GPIO_PC13, | |
194 | }; | |
195 | ||
196 | static const unsigned spi0_pins[] = { | |
197 | GPIO_PE0, GPIO_PE1, GPIO_PE2, | |
198 | }; | |
199 | ||
200 | static const unsigned spi1_pins[] = { | |
201 | GPIO_PG8, GPIO_PG9, GPIO_PG10, | |
202 | }; | |
203 | ||
204 | static const unsigned twi0_pins[] = { | |
205 | GPIO_PE14, GPIO_PE15, | |
206 | }; | |
207 | ||
208 | static const unsigned twi1_pins[] = { | |
209 | GPIO_PB0, GPIO_PB1, | |
210 | }; | |
211 | ||
212 | static const unsigned rotary_pins[] = { | |
213 | GPIO_PH4, GPIO_PH3, GPIO_PH5, | |
214 | }; | |
215 | ||
216 | static const unsigned can0_pins[] = { | |
217 | GPIO_PG13, GPIO_PG12, | |
218 | }; | |
219 | ||
220 | static const unsigned can1_pins[] = { | |
221 | GPIO_PG14, GPIO_PG15, | |
222 | }; | |
223 | ||
224 | static const unsigned smc0_pins[] = { | |
225 | GPIO_PH8, GPIO_PH9, GPIO_PH10, GPIO_PH11, GPIO_PH12, GPIO_PH13, | |
226 | GPIO_PI0, GPIO_PI1, GPIO_PI2, GPIO_PI3, GPIO_PI4, GPIO_PI5, GPIO_PI6, | |
227 | GPIO_PI7, GPIO_PI8, GPIO_PI9, GPIO_PI10, GPIO_PI11, | |
228 | GPIO_PI12, GPIO_PI13, GPIO_PI14, GPIO_PI15, | |
229 | }; | |
230 | ||
231 | static const unsigned sport0_pins[] = { | |
232 | GPIO_PC0, GPIO_PC2, GPIO_PC3, GPIO_PC4, GPIO_PC6, GPIO_PC7, | |
233 | }; | |
234 | ||
235 | static const unsigned sport1_pins[] = { | |
236 | GPIO_PD0, GPIO_PD2, GPIO_PD3, GPIO_PD4, GPIO_PD6, GPIO_PD7, | |
237 | }; | |
238 | ||
239 | static const unsigned sport2_pins[] = { | |
240 | GPIO_PA0, GPIO_PA2, GPIO_PA3, GPIO_PA4, GPIO_PA6, GPIO_PA7, | |
241 | }; | |
242 | ||
243 | static const unsigned sport3_pins[] = { | |
244 | GPIO_PA8, GPIO_PA10, GPIO_PA11, GPIO_PA12, GPIO_PA14, GPIO_PA15, | |
245 | }; | |
246 | ||
247 | static const unsigned ppi0_8b_pins[] = { | |
248 | GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6, | |
249 | GPIO_PF7, GPIO_PF13, GPIO_PG0, GPIO_PG1, GPIO_PG2, | |
250 | }; | |
251 | ||
252 | static const unsigned ppi0_16b_pins[] = { | |
253 | GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6, | |
254 | GPIO_PF7, GPIO_PF9, GPIO_PF10, GPIO_PF11, GPIO_PF12, | |
255 | GPIO_PF13, GPIO_PF14, GPIO_PF15, | |
256 | GPIO_PG0, GPIO_PG1, GPIO_PG2, | |
257 | }; | |
258 | ||
259 | static const unsigned ppi0_24b_pins[] = { | |
260 | GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6, | |
261 | GPIO_PF7, GPIO_PF8, GPIO_PF9, GPIO_PF10, GPIO_PF11, GPIO_PF12, | |
262 | GPIO_PF13, GPIO_PF14, GPIO_PF15, GPIO_PD0, GPIO_PD1, GPIO_PD2, | |
263 | GPIO_PD3, GPIO_PD4, GPIO_PD5, GPIO_PG3, GPIO_PG4, | |
264 | GPIO_PG0, GPIO_PG1, GPIO_PG2, | |
265 | }; | |
266 | ||
267 | static const unsigned ppi1_8b_pins[] = { | |
268 | GPIO_PD0, GPIO_PD1, GPIO_PD2, GPIO_PD3, GPIO_PD4, GPIO_PD5, GPIO_PD6, | |
269 | GPIO_PD7, GPIO_PE11, GPIO_PE12, GPIO_PE13, | |
270 | }; | |
271 | ||
272 | static const unsigned ppi1_16b_pins[] = { | |
273 | GPIO_PD0, GPIO_PD1, GPIO_PD2, GPIO_PD3, GPIO_PD4, GPIO_PD5, GPIO_PD6, | |
274 | GPIO_PD7, GPIO_PD8, GPIO_PD9, GPIO_PD10, GPIO_PD11, GPIO_PD12, | |
275 | GPIO_PD13, GPIO_PD14, GPIO_PD15, | |
276 | GPIO_PE11, GPIO_PE12, GPIO_PE13, | |
277 | }; | |
278 | ||
279 | static const unsigned ppi2_8b_pins[] = { | |
280 | GPIO_PD8, GPIO_PD9, GPIO_PD10, GPIO_PD11, GPIO_PD12, | |
281 | GPIO_PD13, GPIO_PD14, GPIO_PD15, | |
282 | GPIO_PA7, GPIO_PB0, GPIO_PB1, GPIO_PB2, GPIO_PB3, | |
283 | }; | |
284 | ||
285 | static const unsigned atapi_pins[] = { | |
286 | GPIO_PH2, GPIO_PJ3, GPIO_PJ4, GPIO_PJ5, GPIO_PJ6, | |
287 | GPIO_PJ7, GPIO_PJ8, GPIO_PJ9, GPIO_PJ10, | |
288 | }; | |
289 | ||
290 | static const unsigned atapi_alter_pins[] = { | |
291 | GPIO_PF0, GPIO_PF1, GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, GPIO_PF6, | |
292 | GPIO_PF7, GPIO_PF8, GPIO_PF9, GPIO_PF10, GPIO_PF11, GPIO_PF12, | |
293 | GPIO_PF13, GPIO_PF14, GPIO_PF15, GPIO_PG2, GPIO_PG3, GPIO_PG4, | |
294 | }; | |
295 | ||
296 | static const unsigned nfc0_pins[] = { | |
297 | GPIO_PJ1, GPIO_PJ2, | |
298 | }; | |
299 | ||
300 | static const unsigned keys_4x4_pins[] = { | |
301 | GPIO_PD8, GPIO_PD9, GPIO_PD10, GPIO_PD11, | |
302 | GPIO_PD12, GPIO_PD13, GPIO_PD14, GPIO_PD15, | |
303 | }; | |
304 | ||
305 | static const unsigned keys_8x8_pins[] = { | |
306 | GPIO_PD8, GPIO_PD9, GPIO_PD10, GPIO_PD11, | |
307 | GPIO_PD12, GPIO_PD13, GPIO_PD14, GPIO_PD15, | |
308 | GPIO_PE0, GPIO_PE1, GPIO_PE2, GPIO_PE3, | |
309 | GPIO_PE4, GPIO_PE5, GPIO_PE6, GPIO_PE7, | |
310 | }; | |
311 | ||
e9a03add SZ |
312 | static const unsigned short uart0_mux[] = { |
313 | P_UART0_TX, P_UART0_RX, | |
314 | 0 | |
315 | }; | |
316 | ||
317 | static const unsigned short uart1_mux[] = { | |
318 | P_UART1_TX, P_UART1_RX, | |
319 | 0 | |
320 | }; | |
321 | ||
322 | static const unsigned short uart1_ctsrts_mux[] = { | |
323 | P_UART1_RTS, P_UART1_CTS, | |
324 | 0 | |
325 | }; | |
326 | ||
327 | static const unsigned short uart2_mux[] = { | |
328 | P_UART2_TX, P_UART2_RX, | |
329 | 0 | |
330 | }; | |
331 | ||
332 | static const unsigned short uart3_mux[] = { | |
333 | P_UART3_TX, P_UART3_RX, | |
334 | 0 | |
335 | }; | |
336 | ||
337 | static const unsigned short uart3_ctsrts_mux[] = { | |
338 | P_UART3_RTS, P_UART3_CTS, | |
339 | 0 | |
340 | }; | |
341 | ||
342 | static const unsigned short rsi0_mux[] = { | |
343 | P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, | |
344 | 0 | |
345 | }; | |
346 | ||
347 | static const unsigned short spi0_mux[] = { | |
348 | P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0 | |
349 | }; | |
350 | ||
351 | static const unsigned short spi1_mux[] = { | |
352 | P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0 | |
353 | }; | |
354 | ||
355 | static const unsigned short twi0_mux[] = { | |
356 | P_TWI0_SCL, P_TWI0_SDA, 0 | |
357 | }; | |
358 | ||
359 | static const unsigned short twi1_mux[] = { | |
360 | P_TWI1_SCL, P_TWI1_SDA, 0 | |
361 | }; | |
362 | ||
363 | static const unsigned short rotary_mux[] = { | |
364 | P_CNT_CUD, P_CNT_CDG, P_CNT_CZM, 0 | |
365 | }; | |
366 | ||
367 | static const unsigned short sport0_mux[] = { | |
368 | P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, | |
369 | P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 | |
370 | }; | |
371 | ||
372 | static const unsigned short sport1_mux[] = { | |
373 | P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, | |
374 | P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 | |
375 | }; | |
376 | ||
377 | static const unsigned short sport2_mux[] = { | |
378 | P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS, | |
379 | P_SPORT2_DRPRI, P_SPORT2_RSCLK, 0 | |
380 | }; | |
381 | ||
382 | static const unsigned short sport3_mux[] = { | |
383 | P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS, | |
384 | P_SPORT3_DRPRI, P_SPORT3_RSCLK, 0 | |
385 | }; | |
386 | ||
387 | static const unsigned short can0_mux[] = { | |
388 | P_CAN0_RX, P_CAN0_TX, 0 | |
389 | }; | |
390 | ||
391 | static const unsigned short can1_mux[] = { | |
392 | P_CAN1_RX, P_CAN1_TX, 0 | |
393 | }; | |
394 | ||
395 | static const unsigned short smc0_mux[] = { | |
396 | P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, | |
397 | P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21, | |
398 | P_A22, P_A23, P_A24, P_A25, P_NOR_CLK, 0, | |
399 | }; | |
400 | ||
401 | static const unsigned short ppi0_8b_mux[] = { | |
402 | P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, | |
403 | P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, | |
404 | P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, | |
405 | 0, | |
406 | }; | |
407 | ||
408 | static const unsigned short ppi0_16b_mux[] = { | |
409 | P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, | |
410 | P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, | |
411 | P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11, | |
412 | P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, | |
413 | P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, | |
414 | 0, | |
415 | }; | |
416 | ||
417 | static const unsigned short ppi0_24b_mux[] = { | |
418 | P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, | |
419 | P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, | |
420 | P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11, | |
421 | P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, | |
422 | P_PPI0_D16, P_PPI0_D17, P_PPI0_D18, P_PPI0_D19, | |
423 | P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23, | |
424 | P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, | |
425 | 0, | |
426 | }; | |
427 | ||
428 | static const unsigned short ppi1_8b_mux[] = { | |
429 | P_PPI1_D0, P_PPI1_D1, P_PPI1_D2, P_PPI1_D3, | |
430 | P_PPI1_D4, P_PPI1_D5, P_PPI1_D6, P_PPI1_D7, | |
431 | P_PPI1_CLK, P_PPI1_FS1, P_PPI1_FS2, | |
432 | 0, | |
433 | }; | |
434 | ||
435 | static const unsigned short ppi1_16b_mux[] = { | |
436 | P_PPI1_D0, P_PPI1_D1, P_PPI1_D2, P_PPI1_D3, | |
437 | P_PPI1_D4, P_PPI1_D5, P_PPI1_D6, P_PPI1_D7, | |
438 | P_PPI1_D8, P_PPI1_D9, P_PPI1_D10, P_PPI1_D11, | |
439 | P_PPI1_D12, P_PPI1_D13, P_PPI1_D14, P_PPI1_D15, | |
440 | P_PPI1_CLK, P_PPI1_FS1, P_PPI1_FS2, | |
441 | 0, | |
442 | }; | |
443 | ||
444 | static const unsigned short ppi2_8b_mux[] = { | |
445 | P_PPI2_D0, P_PPI2_D1, P_PPI2_D2, P_PPI2_D3, | |
446 | P_PPI2_D4, P_PPI2_D5, P_PPI2_D6, P_PPI2_D7, | |
447 | P_PPI2_CLK, P_PPI2_FS1, P_PPI2_FS2, | |
448 | 0, | |
449 | }; | |
450 | ||
451 | static const unsigned short atapi_mux[] = { | |
452 | P_ATAPI_RESET, P_ATAPI_DIOR, P_ATAPI_DIOW, P_ATAPI_CS0, P_ATAPI_CS1, | |
453 | P_ATAPI_DMACK, P_ATAPI_DMARQ, P_ATAPI_INTRQ, P_ATAPI_IORDY, | |
454 | }; | |
455 | ||
456 | static const unsigned short atapi_alter_mux[] = { | |
457 | P_ATAPI_D0A, P_ATAPI_D1A, P_ATAPI_D2A, P_ATAPI_D3A, P_ATAPI_D4A, | |
458 | P_ATAPI_D5A, P_ATAPI_D6A, P_ATAPI_D7A, P_ATAPI_D8A, P_ATAPI_D9A, | |
459 | P_ATAPI_D10A, P_ATAPI_D11A, P_ATAPI_D12A, P_ATAPI_D13A, P_ATAPI_D14A, | |
460 | P_ATAPI_D15A, P_ATAPI_A0A, P_ATAPI_A1A, P_ATAPI_A2A, | |
461 | 0 | |
462 | }; | |
463 | ||
464 | static const unsigned short nfc0_mux[] = { | |
465 | P_NAND_CE, P_NAND_RB, | |
466 | 0 | |
467 | }; | |
468 | ||
469 | static const unsigned short keys_4x4_mux[] = { | |
470 | P_KEY_ROW3, P_KEY_ROW2, P_KEY_ROW1, P_KEY_ROW0, | |
471 | P_KEY_COL3, P_KEY_COL2, P_KEY_COL1, P_KEY_COL0, | |
472 | 0 | |
473 | }; | |
474 | ||
475 | static const unsigned short keys_8x8_mux[] = { | |
476 | P_KEY_ROW7, P_KEY_ROW6, P_KEY_ROW5, P_KEY_ROW4, | |
477 | P_KEY_ROW3, P_KEY_ROW2, P_KEY_ROW1, P_KEY_ROW0, | |
478 | P_KEY_COL7, P_KEY_COL6, P_KEY_COL5, P_KEY_COL4, | |
479 | P_KEY_COL3, P_KEY_COL2, P_KEY_COL1, P_KEY_COL0, | |
480 | 0 | |
481 | }; | |
482 | ||
e3653749 SZ |
483 | static const struct adi_pin_group adi_pin_groups[] = { |
484 | ADI_PIN_GROUP("uart0grp", uart0_pins, uart0_mux), | |
485 | ADI_PIN_GROUP("uart1grp", uart1_pins, uart1_mux), | |
486 | ADI_PIN_GROUP("uart1ctsrtsgrp", uart1_ctsrts_pins, uart1_ctsrts_mux), | |
487 | ADI_PIN_GROUP("uart2grp", uart2_pins, uart2_mux), | |
488 | ADI_PIN_GROUP("uart3grp", uart3_pins, uart3_mux), | |
489 | ADI_PIN_GROUP("uart3ctsrtsgrp", uart3_ctsrts_pins, uart3_ctsrts_mux), | |
490 | ADI_PIN_GROUP("rsi0grp", rsi0_pins, rsi0_mux), | |
491 | ADI_PIN_GROUP("spi0grp", spi0_pins, spi0_mux), | |
492 | ADI_PIN_GROUP("spi1grp", spi1_pins, spi1_mux), | |
493 | ADI_PIN_GROUP("twi0grp", twi0_pins, twi0_mux), | |
494 | ADI_PIN_GROUP("twi1grp", twi1_pins, twi1_mux), | |
495 | ADI_PIN_GROUP("rotarygrp", rotary_pins, rotary_mux), | |
496 | ADI_PIN_GROUP("can0grp", can0_pins, can0_mux), | |
497 | ADI_PIN_GROUP("can1grp", can1_pins, can1_mux), | |
498 | ADI_PIN_GROUP("smc0grp", smc0_pins, smc0_mux), | |
499 | ADI_PIN_GROUP("sport0grp", sport0_pins, sport0_mux), | |
500 | ADI_PIN_GROUP("sport1grp", sport1_pins, sport1_mux), | |
501 | ADI_PIN_GROUP("sport2grp", sport2_pins, sport2_mux), | |
502 | ADI_PIN_GROUP("sport3grp", sport3_pins, sport3_mux), | |
503 | ADI_PIN_GROUP("ppi0_8bgrp", ppi0_8b_pins, ppi0_8b_mux), | |
504 | ADI_PIN_GROUP("ppi0_16bgrp", ppi0_16b_pins, ppi0_16b_mux), | |
505 | ADI_PIN_GROUP("ppi0_24bgrp", ppi0_24b_pins, ppi0_24b_mux), | |
506 | ADI_PIN_GROUP("ppi1_8bgrp", ppi1_8b_pins, ppi1_8b_mux), | |
507 | ADI_PIN_GROUP("ppi1_16bgrp", ppi1_16b_pins, ppi1_16b_mux), | |
508 | ADI_PIN_GROUP("ppi2_8bgrp", ppi2_8b_pins, ppi2_8b_mux), | |
509 | ADI_PIN_GROUP("atapigrp", atapi_pins, atapi_mux), | |
510 | ADI_PIN_GROUP("atapialtergrp", atapi_alter_pins, atapi_alter_mux), | |
511 | ADI_PIN_GROUP("nfc0grp", nfc0_pins, nfc0_mux), | |
512 | ADI_PIN_GROUP("keys_4x4grp", keys_4x4_pins, keys_4x4_mux), | |
513 | ADI_PIN_GROUP("keys_8x8grp", keys_8x8_pins, keys_8x8_mux), | |
514 | }; | |
515 | ||
e9a03add SZ |
516 | static const char * const uart0grp[] = { "uart0grp" }; |
517 | static const char * const uart1grp[] = { "uart1grp" }; | |
518 | static const char * const uart1ctsrtsgrp[] = { "uart1ctsrtsgrp" }; | |
519 | static const char * const uart2grp[] = { "uart2grp" }; | |
520 | static const char * const uart3grp[] = { "uart3grp" }; | |
521 | static const char * const uart3ctsrtsgrp[] = { "uart3ctsrtsgrp" }; | |
522 | static const char * const rsi0grp[] = { "rsi0grp" }; | |
523 | static const char * const spi0grp[] = { "spi0grp" }; | |
524 | static const char * const spi1grp[] = { "spi1grp" }; | |
525 | static const char * const twi0grp[] = { "twi0grp" }; | |
526 | static const char * const twi1grp[] = { "twi1grp" }; | |
527 | static const char * const rotarygrp[] = { "rotarygrp" }; | |
528 | static const char * const can0grp[] = { "can0grp" }; | |
529 | static const char * const can1grp[] = { "can1grp" }; | |
530 | static const char * const smc0grp[] = { "smc0grp" }; | |
531 | static const char * const sport0grp[] = { "sport0grp" }; | |
532 | static const char * const sport1grp[] = { "sport1grp" }; | |
533 | static const char * const sport2grp[] = { "sport2grp" }; | |
534 | static const char * const sport3grp[] = { "sport3grp" }; | |
e3653749 SZ |
535 | static const char * const ppi0grp[] = { "ppi0_8bgrp", |
536 | "ppi0_16bgrp", | |
537 | "ppi0_24bgrp" }; | |
538 | static const char * const ppi1grp[] = { "ppi1_8bgrp", | |
539 | "ppi1_16bgrp" }; | |
540 | static const char * const ppi2grp[] = { "ppi2_8bgrp" }; | |
e9a03add SZ |
541 | static const char * const atapigrp[] = { "atapigrp" }; |
542 | static const char * const atapialtergrp[] = { "atapialtergrp" }; | |
543 | static const char * const nfc0grp[] = { "nfc0grp" }; | |
e3653749 SZ |
544 | static const char * const keysgrp[] = { "keys_4x4grp", |
545 | "keys_8x8grp" }; | |
e9a03add SZ |
546 | |
547 | static const struct adi_pmx_func adi_pmx_functions[] = { | |
e3653749 SZ |
548 | ADI_PMX_FUNCTION("uart0", uart0grp), |
549 | ADI_PMX_FUNCTION("uart1", uart1grp), | |
550 | ADI_PMX_FUNCTION("uart1_ctsrts", uart1ctsrtsgrp), | |
551 | ADI_PMX_FUNCTION("uart2", uart2grp), | |
552 | ADI_PMX_FUNCTION("uart3", uart3grp), | |
553 | ADI_PMX_FUNCTION("uart3_ctsrts", uart3ctsrtsgrp), | |
554 | ADI_PMX_FUNCTION("rsi0", rsi0grp), | |
555 | ADI_PMX_FUNCTION("spi0", spi0grp), | |
556 | ADI_PMX_FUNCTION("spi1", spi1grp), | |
557 | ADI_PMX_FUNCTION("twi0", twi0grp), | |
558 | ADI_PMX_FUNCTION("twi1", twi1grp), | |
559 | ADI_PMX_FUNCTION("rotary", rotarygrp), | |
560 | ADI_PMX_FUNCTION("can0", can0grp), | |
561 | ADI_PMX_FUNCTION("can1", can1grp), | |
562 | ADI_PMX_FUNCTION("smc0", smc0grp), | |
563 | ADI_PMX_FUNCTION("sport0", sport0grp), | |
564 | ADI_PMX_FUNCTION("sport1", sport1grp), | |
565 | ADI_PMX_FUNCTION("sport2", sport2grp), | |
566 | ADI_PMX_FUNCTION("sport3", sport3grp), | |
567 | ADI_PMX_FUNCTION("ppi0", ppi0grp), | |
568 | ADI_PMX_FUNCTION("ppi1", ppi1grp), | |
569 | ADI_PMX_FUNCTION("ppi2", ppi2grp), | |
570 | ADI_PMX_FUNCTION("atapi", atapigrp), | |
571 | ADI_PMX_FUNCTION("atapi_alter", atapialtergrp), | |
572 | ADI_PMX_FUNCTION("nfc0", nfc0grp), | |
573 | ADI_PMX_FUNCTION("keys", keysgrp), | |
e9a03add SZ |
574 | }; |
575 | ||
576 | static const struct adi_pinctrl_soc_data adi_bf54x_soc = { | |
577 | .functions = adi_pmx_functions, | |
578 | .nfunctions = ARRAY_SIZE(adi_pmx_functions), | |
579 | .groups = adi_pin_groups, | |
580 | .ngroups = ARRAY_SIZE(adi_pin_groups), | |
581 | .pins = adi_pads, | |
582 | .npins = ARRAY_SIZE(adi_pads), | |
583 | }; | |
584 | ||
585 | void adi_pinctrl_soc_init(const struct adi_pinctrl_soc_data **soc) | |
586 | { | |
587 | *soc = &adi_bf54x_soc; | |
588 | } |