[deliverable/linux.git] / drivers / pinctrl / pinctrl-digicolor.c

/*
 *  Driver for Conexant Digicolor General Purpose Pin Mapping
 *
 * Author: Baruch Siach <baruch@tkos.co.il>
 *
 * Copyright (C) 2015 Paradox Innovation Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * TODO:
 * - GPIO interrupt support
 * - Pin pad configuration (pull up/down, strength)
 */

#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/gpio/driver.h>
#include <linux/spinlock.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include "pinctrl-utils.h"

#define DRIVER_NAME	"pinctrl-digicolor"

#define GP_CLIENTSEL(clct)	((clct)*8 + 0x20)
#define GP_DRIVE0(clct)		(GP_CLIENTSEL(clct) + 2)
#define GP_OUTPUT0(clct)	(GP_CLIENTSEL(clct) + 3)
#define GP_INPUT(clct)		(GP_CLIENTSEL(clct) + 6)

#define PIN_COLLECTIONS		('R' - 'A' + 1)
#define PINS_PER_COLLECTION	8
#define PINS_COUNT		(PIN_COLLECTIONS * PINS_PER_COLLECTION)

struct dc_pinmap {
	void __iomem		*regs;
	struct device		*dev;
	struct pinctrl_dev	*pctl;

	struct pinctrl_desc	*desc;
	const char		*pin_names[PINS_COUNT];

	struct gpio_chip	chip;
	spinlock_t		lock;
};

static int dc_get_groups_count(struct pinctrl_dev *pctldev)
{
	return PINS_COUNT;
}

static const char *dc_get_group_name(struct pinctrl_dev *pctldev,
				     unsigned selector)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);

	/* Exactly one group per pin */
	return pmap->desc->pins[selector].name;
}

static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
			     const unsigned **pins,
			     unsigned *num_pins)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);

	*pins = &pmap->desc->pins[selector].number;
	*num_pins = 1;

	return 0;
}

static struct pinctrl_ops dc_pinctrl_ops = {
	.get_groups_count	= dc_get_groups_count,
	.get_group_name		= dc_get_group_name,
	.get_group_pins		= dc_get_group_pins,
	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
	.dt_free_map		= pinctrl_utils_dt_free_map,
};

static const char *const dc_functions[] = {
	"gpio",
	"client_a",
	"client_b",
	"client_c",
};

static int dc_get_functions_count(struct pinctrl_dev *pctldev)
{
	return ARRAY_SIZE(dc_functions);
}

static const char *dc_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
{
	return dc_functions[selector];
}

static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
			 const char * const **groups,
			 unsigned * const num_groups)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);

	*groups = pmap->pin_names;
	*num_groups = PINS_COUNT;

	return 0;
}

static void dc_client_sel(int pin_num, int *reg, int *bit)
{
	*bit = (pin_num % PINS_PER_COLLECTION) * 2;
	*reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);

	if (*bit >= PINS_PER_COLLECTION) {
		*bit -= PINS_PER_COLLECTION;
		*reg += 1;
	}
}

static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
		      unsigned group)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
	int bit_off, reg_off;
	u8 reg;

	dc_client_sel(group, &reg_off, &bit_off);

	reg = readb_relaxed(pmap->regs + reg_off);
	reg &= ~(3 << bit_off);
	reg |= (selector << bit_off);
	writeb_relaxed(reg, pmap->regs + reg_off);

	return 0;
}

static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
			       struct pinctrl_gpio_range *range,
			       unsigned offset)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
	int bit_off, reg_off;
	u8 reg;

	dc_client_sel(offset, &reg_off, &bit_off);

	reg = readb_relaxed(pmap->regs + reg_off);
	if ((reg & (3 << bit_off)) != 0)
		return -EBUSY;

	return 0;
}

static struct pinmux_ops dc_pmxops = {
	.get_functions_count	= dc_get_functions_count,
	.get_function_name	= dc_get_fname,
	.get_function_groups	= dc_get_groups,
	.set_mux		= dc_set_mux,
	.gpio_request_enable	= dc_pmx_request_gpio,
};

static int dc_gpio_request(struct gpio_chip *chip, unsigned gpio)
{
	return pinctrl_request_gpio(chip->base + gpio);
}

static void dc_gpio_free(struct gpio_chip *chip, unsigned gpio)
{
	pinctrl_free_gpio(chip->base + gpio);
}

static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
{
	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 drive;
	unsigned long flags;

	spin_lock_irqsave(&pmap->lock, flags);
	drive = readb_relaxed(pmap->regs + reg_off);
	drive &= ~BIT(bit_off);
	writeb_relaxed(drive, pmap->regs + reg_off);
	spin_unlock_irqrestore(&pmap->lock, flags);

	return 0;
}

static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);

static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
				    int value)
{
	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 drive;
	unsigned long flags;

	dc_gpio_set(chip, gpio, value);

	spin_lock_irqsave(&pmap->lock, flags);
	drive = readb_relaxed(pmap->regs + reg_off);
	drive |= BIT(bit_off);
	writeb_relaxed(drive, pmap->regs + reg_off);
	spin_unlock_irqrestore(&pmap->lock, flags);

	return 0;
}

static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
{
	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
	int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 input;

	input = readb_relaxed(pmap->regs + reg_off);

	return !!(input & BIT(bit_off));
}

static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
{
	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
	int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 output;
	unsigned long flags;

	spin_lock_irqsave(&pmap->lock, flags);
	output = readb_relaxed(pmap->regs + reg_off);
	if (value)
		output |= BIT(bit_off);
	else
		output &= ~BIT(bit_off);
	writeb_relaxed(output, pmap->regs + reg_off);
	spin_unlock_irqrestore(&pmap->lock, flags);
}

static int dc_gpiochip_add(struct dc_pinmap *pmap, struct device_node *np)
{
	struct gpio_chip *chip = &pmap->chip;
	int ret;

	chip->label		= DRIVER_NAME;
	chip->dev		= pmap->dev;
	chip->request		= dc_gpio_request;
	chip->free		= dc_gpio_free;
	chip->direction_input	= dc_gpio_direction_input;
	chip->direction_output	= dc_gpio_direction_output;
	chip->get		= dc_gpio_get;
	chip->set		= dc_gpio_set;
	chip->base		= -1;
	chip->ngpio		= PINS_COUNT;
	chip->of_node		= np;
	chip->of_gpio_n_cells	= 2;

	spin_lock_init(&pmap->lock);

	ret = gpiochip_add(chip);
	if (ret < 0)
		return ret;

	ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
				     PINS_COUNT);
	if (ret < 0) {
		gpiochip_remove(chip);
		return ret;
	}

	return 0;
}

static int dc_pinctrl_probe(struct platform_device *pdev)
{
	struct dc_pinmap *pmap;
	struct resource *r;
	struct pinctrl_pin_desc *pins;
	struct pinctrl_desc *pctl_desc;
	char *pin_names;
	int name_len = strlen("GP_xx") + 1;
	int i, j, ret;

	pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
	if (!pmap)
		return -ENOMEM;

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	pmap->regs = devm_ioremap_resource(&pdev->dev, r);
	if (IS_ERR(pmap->regs))
		return PTR_ERR(pmap->regs);

	pins = devm_kzalloc(&pdev->dev, sizeof(*pins)*PINS_COUNT, GFP_KERNEL);
	if (!pins)
		return -ENOMEM;
	pin_names = devm_kzalloc(&pdev->dev, name_len * PINS_COUNT,
				 GFP_KERNEL);
	if (!pin_names)
		return -ENOMEM;

	for (i = 0; i < PIN_COLLECTIONS; i++) {
		for (j = 0; j < PINS_PER_COLLECTION; j++) {
			int pin_id = i*PINS_PER_COLLECTION + j;
			char *name = &pin_names[pin_id * name_len];

			snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);

			pins[pin_id].number = pin_id;
			pins[pin_id].name = name;
			pmap->pin_names[pin_id] = name;
		}
	}

	pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
	if (!pctl_desc)
		return -ENOMEM;

	pctl_desc->name	= DRIVER_NAME,
	pctl_desc->owner = THIS_MODULE,
	pctl_desc->pctlops = &dc_pinctrl_ops,
	pctl_desc->pmxops = &dc_pmxops,
	pctl_desc->npins = PINS_COUNT;
	pctl_desc->pins = pins;
	pmap->desc = pctl_desc;

	pmap->dev = &pdev->dev;

	pmap->pctl = pinctrl_register(pctl_desc, &pdev->dev, pmap);
	if (!pmap->pctl) {
		dev_err(&pdev->dev, "pinctrl driver registration failed\n");
		return -EINVAL;
	}

	ret = dc_gpiochip_add(pmap, pdev->dev.of_node);
	if (ret < 0) {
		pinctrl_unregister(pmap->pctl);
		return ret;
	}

	return 0;
}

static int dc_pinctrl_remove(struct platform_device *pdev)
{
	struct dc_pinmap *pmap = platform_get_drvdata(pdev);

	pinctrl_unregister(pmap->pctl);
	gpiochip_remove(&pmap->chip);

	return 0;
}

static const struct of_device_id dc_pinctrl_ids[] = {
	{ .compatible = "cnxt,cx92755-pinctrl" },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, dc_pinctrl_ids);

static struct platform_driver dc_pinctrl_driver = {
	.driver = {
		.name = DRIVER_NAME,
		.of_match_table = dc_pinctrl_ids,
	},
	.probe = dc_pinctrl_probe,
	.remove = dc_pinctrl_remove,
};
module_platform_driver(dc_pinctrl_driver);
Commit	Line	Data
38b0e507 BS	1	/*
	2	* Driver for Conexant Digicolor General Purpose Pin Mapping
	3	*
	4	* Author: Baruch Siach <baruch@tkos.co.il>
	5	*
	6	* Copyright (C) 2015 Paradox Innovation Ltd.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* TODO:
	14	* - GPIO interrupt support
	15	* - Pin pad configuration (pull up/down, strength)
	16	*/
	17
	18	#include <linux/module.h>
	19	#include <linux/platform_device.h>
	20	#include <linux/of.h>
	21	#include <linux/of_device.h>
	22	#include <linux/io.h>
	23	#include <linux/gpio.h>
	24	#include <linux/gpio/driver.h>
	25	#include <linux/spinlock.h>
	26	#include <linux/pinctrl/machine.h>
	27	#include <linux/pinctrl/pinconf.h>
	28	#include <linux/pinctrl/pinconf-generic.h>
	29	#include <linux/pinctrl/pinctrl.h>
	30	#include <linux/pinctrl/pinmux.h>
	31	#include "pinctrl-utils.h"
	32
	33	#define DRIVER_NAME "pinctrl-digicolor"
	34
	35	#define GP_CLIENTSEL(clct) ((clct)*8 + 0x20)
	36	#define GP_DRIVE0(clct) (GP_CLIENTSEL(clct) + 2)
	37	#define GP_OUTPUT0(clct) (GP_CLIENTSEL(clct) + 3)
	38	#define GP_INPUT(clct) (GP_CLIENTSEL(clct) + 6)
	39
	40	#define PIN_COLLECTIONS ('R' - 'A' + 1)
	41	#define PINS_PER_COLLECTION 8
	42	#define PINS_COUNT (PIN_COLLECTIONS * PINS_PER_COLLECTION)
	43
	44	struct dc_pinmap {
	45	void __iomem *regs;
	46	struct device *dev;
	47	struct pinctrl_dev *pctl;
	48
	49	struct pinctrl_desc *desc;
	50	const char *pin_names[PINS_COUNT];
	51
	52	struct gpio_chip chip;
	53	spinlock_t lock;
	54	};
	55
	56	static int dc_get_groups_count(struct pinctrl_dev *pctldev)
	57	{
	58	return PINS_COUNT;
	59	}
	60
	61	static const char dc_get_group_name(struct pinctrl_dev pctldev,
	62	unsigned selector)
	63	{
	64	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
65
66	/* Exactly one group per pin */
67	return pmap->desc->pins[selector].name;
68	}
69
70	static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
71	const unsigned **pins,
72	unsigned *num_pins)
73	{
74	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
75
76	*pins = &pmap->desc->pins[selector].number;
77	*num_pins = 1;
78
79	return 0;
80	}
81
82	static struct pinctrl_ops dc_pinctrl_ops = {
83	.get_groups_count = dc_get_groups_count,
84	.get_group_name = dc_get_group_name,
85	.get_group_pins = dc_get_group_pins,
86	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
87	.dt_free_map = pinctrl_utils_dt_free_map,
88	};
89
90	static const char *const dc_functions[] = {
91	"gpio",
92	"client_a",
93	"client_b",
94	"client_c",
95	};
96
97	static int dc_get_functions_count(struct pinctrl_dev *pctldev)
98	{
99	return ARRAY_SIZE(dc_functions);
100	}
101
102	static const char dc_get_fname(struct pinctrl_dev pctldev, unsigned selector)
103	{
104	return dc_functions[selector];
105	}
106
107	static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
108	const char * const **groups,
109	unsigned * const num_groups)
110	{
111	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
112
113	*groups = pmap->pin_names;
114	*num_groups = PINS_COUNT;
115
116	return 0;
117	}
118
119	static void dc_client_sel(int pin_num, int reg, int bit)
120	{
121	bit = (pin_num % PINS_PER_COLLECTION) 2;
122	*reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);
123
124	if (*bit >= PINS_PER_COLLECTION) {
125	*bit -= PINS_PER_COLLECTION;
126	*reg += 1;
127	}
128	}
129
130	static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
131	unsigned group)
132	{
133	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
134	int bit_off, reg_off;
135	u8 reg;
136
137	dc_client_sel(group, &reg_off, &bit_off);
138
139	reg = readb_relaxed(pmap->regs + reg_off);
140	reg &= ~(3 << bit_off);
141	reg \|= (selector << bit_off);
142	writeb_relaxed(reg, pmap->regs + reg_off);
143
144	return 0;
145	}
146
147	static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
148	struct pinctrl_gpio_range *range,
149	unsigned offset)
150	{
151	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
152	int bit_off, reg_off;
153	u8 reg;
154
155	dc_client_sel(offset, &reg_off, &bit_off);
156
157	reg = readb_relaxed(pmap->regs + reg_off);
158	if ((reg & (3 << bit_off)) != 0)
159	return -EBUSY;
160
161	return 0;
162	}
163
164	static struct pinmux_ops dc_pmxops = {
165	.get_functions_count = dc_get_functions_count,
166	.get_function_name = dc_get_fname,
167	.get_function_groups = dc_get_groups,
168	.set_mux = dc_set_mux,
169	.gpio_request_enable = dc_pmx_request_gpio,
170	};
171
172	static int dc_gpio_request(struct gpio_chip *chip, unsigned gpio)
173	{
174	return pinctrl_request_gpio(chip->base + gpio);
175	}
176
177	static void dc_gpio_free(struct gpio_chip *chip, unsigned gpio)
178	{
179	pinctrl_free_gpio(chip->base + gpio);
180	}
181
182	static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
183	{
184	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
185	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
186	int bit_off = gpio % PINS_PER_COLLECTION;
187	u8 drive;
188	unsigned long flags;
189
190	spin_lock_irqsave(&pmap->lock, flags);
191	drive = readb_relaxed(pmap->regs + reg_off);
192	drive &= ~BIT(bit_off);
193	writeb_relaxed(drive, pmap->regs + reg_off);
194	spin_unlock_irqrestore(&pmap->lock, flags);
195
196	return 0;
197	}
198
199	static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);
200
201	static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
202	int value)
203	{
204	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
205	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
206	int bit_off = gpio % PINS_PER_COLLECTION;
207	u8 drive;
208	unsigned long flags;
209
210	dc_gpio_set(chip, gpio, value);
211
212	spin_lock_irqsave(&pmap->lock, flags);
213	drive = readb_relaxed(pmap->regs + reg_off);
214	drive \|= BIT(bit_off);
215	writeb_relaxed(drive, pmap->regs + reg_off);
216	spin_unlock_irqrestore(&pmap->lock, flags);
217
218	return 0;
219	}
220
221	static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
222	{
223	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
224	int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
225	int bit_off = gpio % PINS_PER_COLLECTION;
226	u8 input;
227
228	input = readb_relaxed(pmap->regs + reg_off);
229
230	return !!(input & BIT(bit_off));
231	}
232
233	static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
234	{
235	struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip);
236	int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
237	int bit_off = gpio % PINS_PER_COLLECTION;
238	u8 output;
239	unsigned long flags;
240
241	spin_lock_irqsave(&pmap->lock, flags);
242	output = readb_relaxed(pmap->regs + reg_off);
243	if (value)
244	output \|= BIT(bit_off);
245	else
246	output &= ~BIT(bit_off);
247	writeb_relaxed(output, pmap->regs + reg_off);
248	spin_unlock_irqrestore(&pmap->lock, flags);
249	}
250
251	static int dc_gpiochip_add(struct dc_pinmap pmap, struct device_node np)
252	{
253	struct gpio_chip *chip = &pmap->chip;
254	int ret;
255
256	chip->label = DRIVER_NAME;
257	chip->dev = pmap->dev;
258	chip->request = dc_gpio_request;
259	chip->free = dc_gpio_free;
260	chip->direction_input = dc_gpio_direction_input;
261	chip->direction_output = dc_gpio_direction_output;
262	chip->get = dc_gpio_get;
263	chip->set = dc_gpio_set;
264	chip->base = -1;
265	chip->ngpio = PINS_COUNT;
266	chip->of_node = np;
267	chip->of_gpio_n_cells = 2;
268
269	spin_lock_init(&pmap->lock);
270
271	ret = gpiochip_add(chip);
272	if (ret < 0)
273	return ret;
274
275	ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
276	PINS_COUNT);
277	if (ret < 0) {
278	gpiochip_remove(chip);
279	return ret;
280	}
281
282	return 0;
283	}
284
285	static int dc_pinctrl_probe(struct platform_device *pdev)
286	{
287	struct dc_pinmap *pmap;
288	struct resource *r;
289	struct pinctrl_pin_desc *pins;
290	struct pinctrl_desc *pctl_desc;
291	char *pin_names;
292	int name_len = strlen("GP_xx") + 1;
293	int i, j, ret;
294
295	pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
296	if (!pmap)
297	return -ENOMEM;
298
299	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
300	pmap->regs = devm_ioremap_resource(&pdev->dev, r);
301	if (IS_ERR(pmap->regs))
302	return PTR_ERR(pmap->regs);
303
304	pins = devm_kzalloc(&pdev->dev, sizeof(pins)PINS_COUNT, GFP_KERNEL);
305	if (!pins)
306	return -ENOMEM;
307	pin_names = devm_kzalloc(&pdev->dev, name_len * PINS_COUNT,
308	GFP_KERNEL);
309	if (!pin_names)
310	return -ENOMEM;
311
312	for (i = 0; i < PIN_COLLECTIONS; i++) {
313	for (j = 0; j < PINS_PER_COLLECTION; j++) {
314	int pin_id = i*PINS_PER_COLLECTION + j;
315	char name = &pin_names[pin_id name_len];
316
317	snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);
318
319	pins[pin_id].number = pin_id;
320	pins[pin_id].name = name;
321	pmap->pin_names[pin_id] = name;
322	}
323	}
324
325	pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
326	if (!pctl_desc)
327	return -ENOMEM;
328
329	pctl_desc->name = DRIVER_NAME,
330	pctl_desc->owner = THIS_MODULE,
331	pctl_desc->pctlops = &dc_pinctrl_ops,
332	pctl_desc->pmxops = &dc_pmxops,
333	pctl_desc->npins = PINS_COUNT;
334	pctl_desc->pins = pins;
335	pmap->desc = pctl_desc;
336
337	pmap->dev = &pdev->dev;
338
339	pmap->pctl = pinctrl_register(pctl_desc, &pdev->dev, pmap);
340	if (!pmap->pctl) {
341	dev_err(&pdev->dev, "pinctrl driver registration failed\n");
342	return -EINVAL;
343	}
344
345	ret = dc_gpiochip_add(pmap, pdev->dev.of_node);
346	if (ret < 0) {
347	pinctrl_unregister(pmap->pctl);
348	return ret;
349	}
350
351	return 0;
352	}
353
354	static int dc_pinctrl_remove(struct platform_device *pdev)
355	{
356	struct dc_pinmap *pmap = platform_get_drvdata(pdev);
357
358	pinctrl_unregister(pmap->pctl);
359	gpiochip_remove(&pmap->chip);
360
361	return 0;
362	}
363
364	static const struct of_device_id dc_pinctrl_ids[] = {
365	{ .compatible = "cnxt,cx92755-pinctrl" },
366	{ /* sentinel */ }
367	};
368	MODULE_DEVICE_TABLE(of, dc_pinctrl_ids);
369
370	static struct platform_driver dc_pinctrl_driver = {
371	.driver = {
372	.name = DRIVER_NAME,
373	.of_match_table = dc_pinctrl_ids,
374	},
375	.probe = dc_pinctrl_probe,
376	.remove = dc_pinctrl_remove,
377	};
378	module_platform_driver(dc_pinctrl_driver);