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Merge tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
[deliverable/linux.git] / drivers / pinctrl / pinctrl-msm8x74.c
CommitLineData
55aaf834
BA		 1/*
2 * Copyright (c) 2013, Sony Mobile Communications AB.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/platform_device.h>
17#include <linux/pinctrl/pinctrl.h>
55aaf834
BA		 18
19#include "pinctrl-msm.h"
20
21static const struct pinctrl_pin_desc msm8x74_pins[] = {
22 PINCTRL_PIN(0, "GPIO_0"),
23 PINCTRL_PIN(1, "GPIO_1"),
24 PINCTRL_PIN(2, "GPIO_2"),
25 PINCTRL_PIN(3, "GPIO_3"),
26 PINCTRL_PIN(4, "GPIO_4"),
27 PINCTRL_PIN(5, "GPIO_5"),
28 PINCTRL_PIN(6, "GPIO_6"),
29 PINCTRL_PIN(7, "GPIO_7"),
30 PINCTRL_PIN(8, "GPIO_8"),
31 PINCTRL_PIN(9, "GPIO_9"),
32 PINCTRL_PIN(10, "GPIO_10"),
33 PINCTRL_PIN(11, "GPIO_11"),
34 PINCTRL_PIN(12, "GPIO_12"),
35 PINCTRL_PIN(13, "GPIO_13"),
36 PINCTRL_PIN(14, "GPIO_14"),
37 PINCTRL_PIN(15, "GPIO_15"),
38 PINCTRL_PIN(16, "GPIO_16"),
39 PINCTRL_PIN(17, "GPIO_17"),
40 PINCTRL_PIN(18, "GPIO_18"),
41 PINCTRL_PIN(19, "GPIO_19"),
42 PINCTRL_PIN(20, "GPIO_20"),
43 PINCTRL_PIN(21, "GPIO_21"),
44 PINCTRL_PIN(22, "GPIO_22"),
45 PINCTRL_PIN(23, "GPIO_23"),
46 PINCTRL_PIN(24, "GPIO_24"),
47 PINCTRL_PIN(25, "GPIO_25"),
48 PINCTRL_PIN(26, "GPIO_26"),
49 PINCTRL_PIN(27, "GPIO_27"),
50 PINCTRL_PIN(28, "GPIO_28"),
51 PINCTRL_PIN(29, "GPIO_29"),
52 PINCTRL_PIN(30, "GPIO_30"),
53 PINCTRL_PIN(31, "GPIO_31"),
54 PINCTRL_PIN(32, "GPIO_32"),
55 PINCTRL_PIN(33, "GPIO_33"),
56 PINCTRL_PIN(34, "GPIO_34"),
57 PINCTRL_PIN(35, "GPIO_35"),
58 PINCTRL_PIN(36, "GPIO_36"),
59 PINCTRL_PIN(37, "GPIO_37"),
60 PINCTRL_PIN(38, "GPIO_38"),
61 PINCTRL_PIN(39, "GPIO_39"),
62 PINCTRL_PIN(40, "GPIO_40"),
63 PINCTRL_PIN(41, "GPIO_41"),
64 PINCTRL_PIN(42, "GPIO_42"),
65 PINCTRL_PIN(43, "GPIO_43"),
66 PINCTRL_PIN(44, "GPIO_44"),
67 PINCTRL_PIN(45, "GPIO_45"),
68 PINCTRL_PIN(46, "GPIO_46"),
69 PINCTRL_PIN(47, "GPIO_47"),
70 PINCTRL_PIN(48, "GPIO_48"),
71 PINCTRL_PIN(49, "GPIO_49"),
72 PINCTRL_PIN(50, "GPIO_50"),
73 PINCTRL_PIN(51, "GPIO_51"),
74 PINCTRL_PIN(52, "GPIO_52"),
75 PINCTRL_PIN(53, "GPIO_53"),
76 PINCTRL_PIN(54, "GPIO_54"),
77 PINCTRL_PIN(55, "GPIO_55"),
78 PINCTRL_PIN(56, "GPIO_56"),
79 PINCTRL_PIN(57, "GPIO_57"),
80 PINCTRL_PIN(58, "GPIO_58"),
81 PINCTRL_PIN(59, "GPIO_59"),
82 PINCTRL_PIN(60, "GPIO_60"),
83 PINCTRL_PIN(61, "GPIO_61"),
84 PINCTRL_PIN(62, "GPIO_62"),
85 PINCTRL_PIN(63, "GPIO_63"),
86 PINCTRL_PIN(64, "GPIO_64"),
87 PINCTRL_PIN(65, "GPIO_65"),
88 PINCTRL_PIN(66, "GPIO_66"),
89 PINCTRL_PIN(67, "GPIO_67"),
90 PINCTRL_PIN(68, "GPIO_68"),
91 PINCTRL_PIN(69, "GPIO_69"),
92 PINCTRL_PIN(70, "GPIO_70"),
93 PINCTRL_PIN(71, "GPIO_71"),
94 PINCTRL_PIN(72, "GPIO_72"),
95 PINCTRL_PIN(73, "GPIO_73"),
96 PINCTRL_PIN(74, "GPIO_74"),
97 PINCTRL_PIN(75, "GPIO_75"),
98 PINCTRL_PIN(76, "GPIO_76"),
99 PINCTRL_PIN(77, "GPIO_77"),
100 PINCTRL_PIN(78, "GPIO_78"),
101 PINCTRL_PIN(79, "GPIO_79"),
102 PINCTRL_PIN(80, "GPIO_80"),
103 PINCTRL_PIN(81, "GPIO_81"),
104 PINCTRL_PIN(82, "GPIO_82"),
105 PINCTRL_PIN(83, "GPIO_83"),
106 PINCTRL_PIN(84, "GPIO_84"),
107 PINCTRL_PIN(85, "GPIO_85"),
108 PINCTRL_PIN(86, "GPIO_86"),
109 PINCTRL_PIN(87, "GPIO_87"),
110 PINCTRL_PIN(88, "GPIO_88"),
111 PINCTRL_PIN(89, "GPIO_89"),
112 PINCTRL_PIN(90, "GPIO_90"),
113 PINCTRL_PIN(91, "GPIO_91"),
114 PINCTRL_PIN(92, "GPIO_92"),
115 PINCTRL_PIN(93, "GPIO_93"),
116 PINCTRL_PIN(94, "GPIO_94"),
117 PINCTRL_PIN(95, "GPIO_95"),
118 PINCTRL_PIN(96, "GPIO_96"),
119 PINCTRL_PIN(97, "GPIO_97"),
120 PINCTRL_PIN(98, "GPIO_98"),
121 PINCTRL_PIN(99, "GPIO_99"),
122 PINCTRL_PIN(100, "GPIO_100"),
123 PINCTRL_PIN(101, "GPIO_101"),
124 PINCTRL_PIN(102, "GPIO_102"),
125 PINCTRL_PIN(103, "GPIO_103"),
126 PINCTRL_PIN(104, "GPIO_104"),
127 PINCTRL_PIN(105, "GPIO_105"),
128 PINCTRL_PIN(106, "GPIO_106"),
129 PINCTRL_PIN(107, "GPIO_107"),
130 PINCTRL_PIN(108, "GPIO_108"),
131 PINCTRL_PIN(109, "GPIO_109"),
132 PINCTRL_PIN(110, "GPIO_110"),
133 PINCTRL_PIN(111, "GPIO_111"),
134 PINCTRL_PIN(112, "GPIO_112"),
135 PINCTRL_PIN(113, "GPIO_113"),
136 PINCTRL_PIN(114, "GPIO_114"),
137 PINCTRL_PIN(115, "GPIO_115"),
138 PINCTRL_PIN(116, "GPIO_116"),
139 PINCTRL_PIN(117, "GPIO_117"),
140 PINCTRL_PIN(118, "GPIO_118"),
141 PINCTRL_PIN(119, "GPIO_119"),
142 PINCTRL_PIN(120, "GPIO_120"),
143 PINCTRL_PIN(121, "GPIO_121"),
144 PINCTRL_PIN(122, "GPIO_122"),
145 PINCTRL_PIN(123, "GPIO_123"),
146 PINCTRL_PIN(124, "GPIO_124"),
147 PINCTRL_PIN(125, "GPIO_125"),
148 PINCTRL_PIN(126, "GPIO_126"),
149 PINCTRL_PIN(127, "GPIO_127"),
150 PINCTRL_PIN(128, "GPIO_128"),
151 PINCTRL_PIN(129, "GPIO_129"),
152 PINCTRL_PIN(130, "GPIO_130"),
153 PINCTRL_PIN(131, "GPIO_131"),
154 PINCTRL_PIN(132, "GPIO_132"),
155 PINCTRL_PIN(133, "GPIO_133"),
156 PINCTRL_PIN(134, "GPIO_134"),
157 PINCTRL_PIN(135, "GPIO_135"),
158 PINCTRL_PIN(136, "GPIO_136"),
159 PINCTRL_PIN(137, "GPIO_137"),
160 PINCTRL_PIN(138, "GPIO_138"),
161 PINCTRL_PIN(139, "GPIO_139"),
162 PINCTRL_PIN(140, "GPIO_140"),
163 PINCTRL_PIN(141, "GPIO_141"),
164 PINCTRL_PIN(142, "GPIO_142"),
165 PINCTRL_PIN(143, "GPIO_143"),
166 PINCTRL_PIN(144, "GPIO_144"),
167 PINCTRL_PIN(145, "GPIO_145"),
168
169 PINCTRL_PIN(146, "SDC1_CLK"),
170 PINCTRL_PIN(147, "SDC1_CMD"),
171 PINCTRL_PIN(148, "SDC1_DATA"),
172 PINCTRL_PIN(149, "SDC2_CLK"),
173 PINCTRL_PIN(150, "SDC2_CMD"),
174 PINCTRL_PIN(151, "SDC2_DATA"),
175};
176
177#define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
178DECLARE_MSM_GPIO_PINS(0);
179DECLARE_MSM_GPIO_PINS(1);
180DECLARE_MSM_GPIO_PINS(2);
181DECLARE_MSM_GPIO_PINS(3);
182DECLARE_MSM_GPIO_PINS(4);
183DECLARE_MSM_GPIO_PINS(5);
184DECLARE_MSM_GPIO_PINS(6);
185DECLARE_MSM_GPIO_PINS(7);
186DECLARE_MSM_GPIO_PINS(8);
187DECLARE_MSM_GPIO_PINS(9);
188DECLARE_MSM_GPIO_PINS(10);
189DECLARE_MSM_GPIO_PINS(11);
190DECLARE_MSM_GPIO_PINS(12);
191DECLARE_MSM_GPIO_PINS(13);
192DECLARE_MSM_GPIO_PINS(14);
193DECLARE_MSM_GPIO_PINS(15);
194DECLARE_MSM_GPIO_PINS(16);
195DECLARE_MSM_GPIO_PINS(17);
196DECLARE_MSM_GPIO_PINS(18);
197DECLARE_MSM_GPIO_PINS(19);
198DECLARE_MSM_GPIO_PINS(20);
199DECLARE_MSM_GPIO_PINS(21);
200DECLARE_MSM_GPIO_PINS(22);
201DECLARE_MSM_GPIO_PINS(23);
202DECLARE_MSM_GPIO_PINS(24);
203DECLARE_MSM_GPIO_PINS(25);
204DECLARE_MSM_GPIO_PINS(26);
205DECLARE_MSM_GPIO_PINS(27);
206DECLARE_MSM_GPIO_PINS(28);
207DECLARE_MSM_GPIO_PINS(29);
208DECLARE_MSM_GPIO_PINS(30);
209DECLARE_MSM_GPIO_PINS(31);
210DECLARE_MSM_GPIO_PINS(32);
211DECLARE_MSM_GPIO_PINS(33);
212DECLARE_MSM_GPIO_PINS(34);
213DECLARE_MSM_GPIO_PINS(35);
214DECLARE_MSM_GPIO_PINS(36);
215DECLARE_MSM_GPIO_PINS(37);
216DECLARE_MSM_GPIO_PINS(38);
217DECLARE_MSM_GPIO_PINS(39);
218DECLARE_MSM_GPIO_PINS(40);
219DECLARE_MSM_GPIO_PINS(41);
220DECLARE_MSM_GPIO_PINS(42);
221DECLARE_MSM_GPIO_PINS(43);
222DECLARE_MSM_GPIO_PINS(44);
223DECLARE_MSM_GPIO_PINS(45);
224DECLARE_MSM_GPIO_PINS(46);
225DECLARE_MSM_GPIO_PINS(47);
226DECLARE_MSM_GPIO_PINS(48);
227DECLARE_MSM_GPIO_PINS(49);
228DECLARE_MSM_GPIO_PINS(50);
229DECLARE_MSM_GPIO_PINS(51);
230DECLARE_MSM_GPIO_PINS(52);
231DECLARE_MSM_GPIO_PINS(53);
232DECLARE_MSM_GPIO_PINS(54);
233DECLARE_MSM_GPIO_PINS(55);
234DECLARE_MSM_GPIO_PINS(56);
235DECLARE_MSM_GPIO_PINS(57);
236DECLARE_MSM_GPIO_PINS(58);
237DECLARE_MSM_GPIO_PINS(59);
238DECLARE_MSM_GPIO_PINS(60);
239DECLARE_MSM_GPIO_PINS(61);
240DECLARE_MSM_GPIO_PINS(62);
241DECLARE_MSM_GPIO_PINS(63);
242DECLARE_MSM_GPIO_PINS(64);
243DECLARE_MSM_GPIO_PINS(65);
244DECLARE_MSM_GPIO_PINS(66);
245DECLARE_MSM_GPIO_PINS(67);
246DECLARE_MSM_GPIO_PINS(68);
247DECLARE_MSM_GPIO_PINS(69);
248DECLARE_MSM_GPIO_PINS(70);
249DECLARE_MSM_GPIO_PINS(71);
250DECLARE_MSM_GPIO_PINS(72);
251DECLARE_MSM_GPIO_PINS(73);
252DECLARE_MSM_GPIO_PINS(74);
253DECLARE_MSM_GPIO_PINS(75);
254DECLARE_MSM_GPIO_PINS(76);
255DECLARE_MSM_GPIO_PINS(77);
256DECLARE_MSM_GPIO_PINS(78);
257DECLARE_MSM_GPIO_PINS(79);
258DECLARE_MSM_GPIO_PINS(80);
259DECLARE_MSM_GPIO_PINS(81);
260DECLARE_MSM_GPIO_PINS(82);
261DECLARE_MSM_GPIO_PINS(83);
262DECLARE_MSM_GPIO_PINS(84);
263DECLARE_MSM_GPIO_PINS(85);
264DECLARE_MSM_GPIO_PINS(86);
265DECLARE_MSM_GPIO_PINS(87);
266DECLARE_MSM_GPIO_PINS(88);
267DECLARE_MSM_GPIO_PINS(89);
268DECLARE_MSM_GPIO_PINS(90);
269DECLARE_MSM_GPIO_PINS(91);
270DECLARE_MSM_GPIO_PINS(92);
271DECLARE_MSM_GPIO_PINS(93);
272DECLARE_MSM_GPIO_PINS(94);
273DECLARE_MSM_GPIO_PINS(95);
274DECLARE_MSM_GPIO_PINS(96);
275DECLARE_MSM_GPIO_PINS(97);
276DECLARE_MSM_GPIO_PINS(98);
277DECLARE_MSM_GPIO_PINS(99);
278DECLARE_MSM_GPIO_PINS(100);
279DECLARE_MSM_GPIO_PINS(101);
280DECLARE_MSM_GPIO_PINS(102);
281DECLARE_MSM_GPIO_PINS(103);
282DECLARE_MSM_GPIO_PINS(104);
283DECLARE_MSM_GPIO_PINS(105);
284DECLARE_MSM_GPIO_PINS(106);
285DECLARE_MSM_GPIO_PINS(107);
286DECLARE_MSM_GPIO_PINS(108);
287DECLARE_MSM_GPIO_PINS(109);
288DECLARE_MSM_GPIO_PINS(110);
289DECLARE_MSM_GPIO_PINS(111);
290DECLARE_MSM_GPIO_PINS(112);
291DECLARE_MSM_GPIO_PINS(113);
292DECLARE_MSM_GPIO_PINS(114);
293DECLARE_MSM_GPIO_PINS(115);
294DECLARE_MSM_GPIO_PINS(116);
295DECLARE_MSM_GPIO_PINS(117);
296DECLARE_MSM_GPIO_PINS(118);
297DECLARE_MSM_GPIO_PINS(119);
298DECLARE_MSM_GPIO_PINS(120);
299DECLARE_MSM_GPIO_PINS(121);
300DECLARE_MSM_GPIO_PINS(122);
301DECLARE_MSM_GPIO_PINS(123);
302DECLARE_MSM_GPIO_PINS(124);
303DECLARE_MSM_GPIO_PINS(125);
304DECLARE_MSM_GPIO_PINS(126);
305DECLARE_MSM_GPIO_PINS(127);
306DECLARE_MSM_GPIO_PINS(128);
307DECLARE_MSM_GPIO_PINS(129);
308DECLARE_MSM_GPIO_PINS(130);
309DECLARE_MSM_GPIO_PINS(131);
310DECLARE_MSM_GPIO_PINS(132);
311DECLARE_MSM_GPIO_PINS(133);
312DECLARE_MSM_GPIO_PINS(134);
313DECLARE_MSM_GPIO_PINS(135);
314DECLARE_MSM_GPIO_PINS(136);
315DECLARE_MSM_GPIO_PINS(137);
316DECLARE_MSM_GPIO_PINS(138);
317DECLARE_MSM_GPIO_PINS(139);
318DECLARE_MSM_GPIO_PINS(140);
319DECLARE_MSM_GPIO_PINS(141);
320DECLARE_MSM_GPIO_PINS(142);
321DECLARE_MSM_GPIO_PINS(143);
322DECLARE_MSM_GPIO_PINS(144);
323DECLARE_MSM_GPIO_PINS(145);
324
325static const unsigned int sdc1_clk_pins[] = { 146 };
326static const unsigned int sdc1_cmd_pins[] = { 147 };
327static const unsigned int sdc1_data_pins[] = { 148 };
328static const unsigned int sdc2_clk_pins[] = { 149 };
329static const unsigned int sdc2_cmd_pins[] = { 150 };
330static const unsigned int sdc2_data_pins[] = { 151 };
331
332#define FUNCTION(fname) \
333 [MSM_MUX_##fname] = { \
334 .name = #fname, \
335 .groups = fname##_groups, \
336 .ngroups = ARRAY_SIZE(fname##_groups), \
337 }
338
339#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \
340 { \
341 .name = "gpio" #id, \
342 .pins = gpio##id##_pins, \
343 .npins = ARRAY_SIZE(gpio##id##_pins), \
3c25381f 344 .funcs = (int[]){ \
55aaf834
BA		 345 MSM_MUX_NA, /* gpio mode */ \
346 MSM_MUX_##f1, \
347 MSM_MUX_##f2, \
348 MSM_MUX_##f3, \
349 MSM_MUX_##f4, \
350 MSM_MUX_##f5, \
351 MSM_MUX_##f6, \
352 MSM_MUX_##f7 \
353 }, \
3c25381f 354 .nfuncs = 8, \
1f2b2398 355 .ctl_reg = 0x1000 + 0x10 * id, \
55aaf834
BA		 356 .io_reg = 0x1004 + 0x10 * id, \
357 .intr_cfg_reg = 0x1008 + 0x10 * id, \
358 .intr_status_reg = 0x100c + 0x10 * id, \
359 .intr_target_reg = 0x1008 + 0x10 * id, \
360 .mux_bit = 2, \
361 .pull_bit = 0, \
362 .drv_bit = 6, \
363 .oe_bit = 9, \
364 .in_bit = 0, \
365 .out_bit = 1, \
366 .intr_enable_bit = 0, \
367 .intr_status_bit = 0, \
368 .intr_target_bit = 5, \
369 .intr_raw_status_bit = 4, \
370 .intr_polarity_bit = 1, \
371 .intr_detection_bit = 2, \
372 .intr_detection_width = 2, \
373 }
374
375#define SDC_PINGROUP(pg_name, ctl, pull, drv) \
376 { \
377 .name = #pg_name, \
378 .pins = pg_name##_pins, \
379 .npins = ARRAY_SIZE(pg_name##_pins), \
380 .ctl_reg = ctl, \
381 .io_reg = 0, \
382 .intr_cfg_reg = 0, \
383 .intr_status_reg = 0, \
384 .intr_target_reg = 0, \
385 .mux_bit = -1, \
386 .pull_bit = pull, \
387 .drv_bit = drv, \
388 .oe_bit = -1, \
389 .in_bit = -1, \
390 .out_bit = -1, \
391 .intr_enable_bit = -1, \
392 .intr_status_bit = -1, \
393 .intr_target_bit = -1, \
394 .intr_raw_status_bit = -1, \
395 .intr_polarity_bit = -1, \
396 .intr_detection_bit = -1, \
397 .intr_detection_width = -1, \
398 }
399
400/*
401 * TODO: Add the rest of the possible functions and fill out
402 * the pingroup table below.
403 */
404enum msm8x74_functions {
697787a1
AG		 405 MSM_MUX_cci_i2c0,
406 MSM_MUX_cci_i2c1,
407 MSM_MUX_blsp_i2c1,
55aaf834 408 MSM_MUX_blsp_i2c2,
697787a1
AG		 409 MSM_MUX_blsp_i2c3,
410 MSM_MUX_blsp_i2c4,
411 MSM_MUX_blsp_i2c5,
55aaf834 412 MSM_MUX_blsp_i2c6,
697787a1
AG		 413 MSM_MUX_blsp_i2c7,
414 MSM_MUX_blsp_i2c8,
415 MSM_MUX_blsp_i2c9,
416 MSM_MUX_blsp_i2c10,
55aaf834 417 MSM_MUX_blsp_i2c11,
697787a1 418 MSM_MUX_blsp_i2c12,
55aaf834 419 MSM_MUX_blsp_spi1,
697787a1
AG		 420 MSM_MUX_blsp_spi1_cs1,
421 MSM_MUX_blsp_spi1_cs2,
422 MSM_MUX_blsp_spi1_cs3,
423 MSM_MUX_blsp_spi2,
424 MSM_MUX_blsp_spi2_cs1,
425 MSM_MUX_blsp_spi2_cs2,
426 MSM_MUX_blsp_spi2_cs3,
427 MSM_MUX_blsp_spi3,
428 MSM_MUX_blsp_spi4,
429 MSM_MUX_blsp_spi5,
430 MSM_MUX_blsp_spi6,
431 MSM_MUX_blsp_spi7,
dc179118 432 MSM_MUX_blsp_spi8,
697787a1
AG		 433 MSM_MUX_blsp_spi9,
434 MSM_MUX_blsp_spi10,
435 MSM_MUX_blsp_spi10_cs1,
436 MSM_MUX_blsp_spi10_cs2,
437 MSM_MUX_blsp_spi10_cs3,
438 MSM_MUX_blsp_spi11,
439 MSM_MUX_blsp_spi12,
440 MSM_MUX_blsp_uart1,
55aaf834 441 MSM_MUX_blsp_uart2,
697787a1
AG		 442 MSM_MUX_blsp_uart3,
443 MSM_MUX_blsp_uart4,
444 MSM_MUX_blsp_uart5,
445 MSM_MUX_blsp_uart6,
446 MSM_MUX_blsp_uart7,
55aaf834 447 MSM_MUX_blsp_uart8,
697787a1
AG		 448 MSM_MUX_blsp_uart9,
449 MSM_MUX_blsp_uart10,
450 MSM_MUX_blsp_uart11,
451 MSM_MUX_blsp_uart12,
452 MSM_MUX_blsp_uim1,
453 MSM_MUX_blsp_uim2,
454 MSM_MUX_blsp_uim3,
455 MSM_MUX_blsp_uim4,
456 MSM_MUX_blsp_uim5,
457 MSM_MUX_blsp_uim6,
458 MSM_MUX_blsp_uim7,
459 MSM_MUX_blsp_uim8,
460 MSM_MUX_blsp_uim9,
461 MSM_MUX_blsp_uim10,
462 MSM_MUX_blsp_uim11,
463 MSM_MUX_blsp_uim12,
464 MSM_MUX_uim1,
465 MSM_MUX_uim2,
466 MSM_MUX_uim_batt_alarm,
467 MSM_MUX_sdc3,
468 MSM_MUX_sdc4,
469 MSM_MUX_gcc_gp_clk1,
470 MSM_MUX_gcc_gp_clk2,
471 MSM_MUX_gcc_gp_clk3,
472 MSM_MUX_qua_mi2s,
473 MSM_MUX_pri_mi2s,
474 MSM_MUX_spkr_mi2s,
475 MSM_MUX_ter_mi2s,
476 MSM_MUX_sec_mi2s,
477 MSM_MUX_hdmi_cec,
478 MSM_MUX_hdmi_ddc,
479 MSM_MUX_hdmi_hpd,
480 MSM_MUX_edp_hpd,
481 MSM_MUX_mdp_vsync,
482 MSM_MUX_cam_mclk0,
483 MSM_MUX_cam_mclk1,
484 MSM_MUX_cam_mclk2,
485 MSM_MUX_cam_mclk3,
486 MSM_MUX_cci_timer0,
487 MSM_MUX_cci_timer1,
488 MSM_MUX_cci_timer2,
489 MSM_MUX_cci_timer3,
490 MSM_MUX_cci_timer4,
491 MSM_MUX_cci_async_in0,
492 MSM_MUX_cci_async_in1,
493 MSM_MUX_cci_async_in2,
494 MSM_MUX_gp_pdm0,
495 MSM_MUX_gp_pdm1,
496 MSM_MUX_gp_pdm2,
497 MSM_MUX_gp0_clk,
498 MSM_MUX_gp1_clk,
499 MSM_MUX_gp_mn,
500 MSM_MUX_tsif1,
501 MSM_MUX_tsif2,
502 MSM_MUX_hsic,
503 MSM_MUX_grfc,
504 MSM_MUX_audio_ref_clk,
505 MSM_MUX_bt,
506 MSM_MUX_fm,
507 MSM_MUX_wlan,
55aaf834
BA		 508 MSM_MUX_slimbus,
509 MSM_MUX_NA,
510};
511
697787a1
AG		 512static const char * const blsp_uart1_groups[] = {
513 "gpio0", "gpio1", "gpio2", "gpio3"
514};
515static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" };
516static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" };
517static const char * const blsp_spi1_groups[] = {
518 "gpio0", "gpio1", "gpio2", "gpio3"
519};
520static const char * const blsp_spi1_cs1_groups[] = { "gpio8" };
521static const char * const blsp_spi1_cs2_groups[] = { "gpio9", "gpio11" };
522static const char * const blsp_spi1_cs3_groups[] = { "gpio10" };
523
524static const char * const blsp_uart2_groups[] = {
525 "gpio4", "gpio5", "gpio6", "gpio7"
526};
527static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" };
55aaf834 528static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" };
697787a1
AG		 529static const char * const blsp_spi2_groups[] = {
530 "gpio4", "gpio5", "gpio6", "gpio7"
531};
532static const char * const blsp_spi2_cs1_groups[] = { "gpio53", "gpio62" };
533static const char * const blsp_spi2_cs2_groups[] = { "gpio54", "gpio63" };
534static const char * const blsp_spi2_cs3_groups[] = { "gpio66" };
535
536static const char * const blsp_uart3_groups[] = {
537 "gpio8", "gpio9", "gpio10", "gpio11"
538};
539static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" };
540static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" };
541static const char * const blsp_spi3_groups[] = {
542 "gpio8", "gpio9", "gpio10", "gpio11"
543};
544
545static const char * const cci_i2c0_groups[] = { "gpio19", "gpio20" };
546static const char * const cci_i2c1_groups[] = { "gpio21", "gpio22" };
547
548static const char * const blsp_uart4_groups[] = {
549 "gpio19", "gpio20", "gpio21", "gpio22"
550};
551static const char * const blsp_uim4_groups[] = { "gpio19", "gpio20" };
552static const char * const blsp_i2c4_groups[] = { "gpio21", "gpio22" };
553static const char * const blsp_spi4_groups[] = {
554 "gpio19", "gpio20", "gpio21", "gpio22"
555};
556
557static const char * const blsp_uart5_groups[] = {
558 "gpio23", "gpio24", "gpio25", "gpio26"
559};
560static const char * const blsp_uim5_groups[] = { "gpio23", "gpio24" };
561static const char * const blsp_i2c5_groups[] = { "gpio25", "gpio26" };
562static const char * const blsp_spi5_groups[] = {
563 "gpio23", "gpio24", "gpio25", "gpio26"
564};
565
566static const char * const blsp_uart6_groups[] = {
567 "gpio27", "gpio28", "gpio29", "gpio30"
568};
569static const char * const blsp_uim6_groups[] = { "gpio27", "gpio28" };
55aaf834 570static const char * const blsp_i2c6_groups[] = { "gpio29", "gpio30" };
697787a1
AG		 571static const char * const blsp_spi6_groups[] = {
572 "gpio27", "gpio28", "gpio29", "gpio30"
573};
574
575static const char * const blsp_uart7_groups[] = {
576 "gpio41", "gpio42", "gpio43", "gpio44"
577};
578static const char * const blsp_uim7_groups[] = { "gpio41", "gpio42" };
579static const char * const blsp_i2c7_groups[] = { "gpio43", "gpio44" };
580static const char * const blsp_spi7_groups[] = {
581 "gpio41", "gpio42", "gpio43", "gpio44"
582};
583
584static const char * const blsp_uart8_groups[] = {
585 "gpio45", "gpio46", "gpio47", "gpio48"
586};
587static const char * const blsp_uim8_groups[] = { "gpio45", "gpio46" };
588static const char * const blsp_i2c8_groups[] = { "gpio47", "gpio48" };
dc179118
II		 589static const char * const blsp_spi8_groups[] = {
590 "gpio45", "gpio46", "gpio47", "gpio48"
591};
697787a1
AG		 592
593static const char * const blsp_uart9_groups[] = {
594 "gpio49", "gpio50", "gpio51", "gpio52"
595};
596static const char * const blsp_uim9_groups[] = { "gpio49", "gpio50" };
597static const char * const blsp_i2c9_groups[] = { "gpio51", "gpio52" };
598static const char * const blsp_spi9_groups[] = {
599 "gpio49", "gpio50", "gpio51", "gpio52"
600};
601
602static const char * const blsp_uart10_groups[] = {
603 "gpio53", "gpio54", "gpio55", "gpio56"
604};
605static const char * const blsp_uim10_groups[] = { "gpio53", "gpio54" };
606static const char * const blsp_i2c10_groups[] = { "gpio55", "gpio56" };
607static const char * const blsp_spi10_groups[] = {
608 "gpio53", "gpio54", "gpio55", "gpio56"
609};
610static const char * const blsp_spi10_cs1_groups[] = { "gpio47", "gpio67" };
611static const char * const blsp_spi10_cs2_groups[] = { "gpio48", "gpio68" };
612static const char * const blsp_spi10_cs3_groups[] = { "gpio90" };
613
614static const char * const blsp_uart11_groups[] = {
615 "gpio81", "gpio82", "gpio83", "gpio84"
616};
617static const char * const blsp_uim11_groups[] = { "gpio81", "gpio82" };
618static const char * const blsp_i2c11_groups[] = { "gpio83", "gpio84" };
619static const char * const blsp_spi11_groups[] = {
620 "gpio81", "gpio82", "gpio83", "gpio84"
621};
622
623static const char * const blsp_uart12_groups[] = {
624 "gpio85", "gpio86", "gpio87", "gpio88"
625};
626static const char * const blsp_uim12_groups[] = { "gpio85", "gpio86" };
627static const char * const blsp_i2c12_groups[] = { "gpio87", "gpio88" };
628static const char * const blsp_spi12_groups[] = {
629 "gpio85", "gpio86", "gpio87", "gpio88"
630};
631
632static const char * const uim1_groups[] = {
633 "gpio97", "gpio98", "gpio99", "gpio100"
634};
635
636static const char * const uim2_groups[] = {
637 "gpio49", "gpio50", "gpio51", "gpio52"
638};
639
640static const char * const uim_batt_alarm_groups[] = { "gpio101" };
641
642static const char * const sdc3_groups[] = {
643 "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"
644};
645
646static const char * const sdc4_groups[] = {
647 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
648};
649
650static const char * const gp0_clk_groups[] = { "gpio26" };
651static const char * const gp1_clk_groups[] = { "gpio27", "gpio57", "gpio78" };
652static const char * const gp_mn_groups[] = { "gpio29" };
653static const char * const gcc_gp_clk1_groups[] = { "gpio57", "gpio78" };
654static const char * const gcc_gp_clk2_groups[] = { "gpio58", "gpio81" };
655static const char * const gcc_gp_clk3_groups[] = { "gpio59", "gpio82" };
656
657static const char * const qua_mi2s_groups[] = {
658 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
659};
660
661static const char * const pri_mi2s_groups[] = {
662 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
663};
664
665static const char * const spkr_mi2s_groups[] = {
666 "gpio69", "gpio70", "gpio71", "gpio72"
667};
668
669static const char * const ter_mi2s_groups[] = {
670 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
671};
672
673static const char * const sec_mi2s_groups[] = {
674 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
675};
676
677static const char * const hdmi_cec_groups[] = { "gpio31" };
678static const char * const hdmi_ddc_groups[] = { "gpio32", "gpio33" };
679static const char * const hdmi_hpd_groups[] = { "gpio34" };
680static const char * const edp_hpd_groups[] = { "gpio102" };
681
682static const char * const mdp_vsync_groups[] = { "gpio12", "gpio13", "gpio14" };
683static const char * const cam_mclk0_groups[] = { "gpio15" };
684static const char * const cam_mclk1_groups[] = { "gpio16" };
685static const char * const cam_mclk2_groups[] = { "gpio17" };
686static const char * const cam_mclk3_groups[] = { "gpio18" };
687
688static const char * const cci_timer0_groups[] = { "gpio23" };
689static const char * const cci_timer1_groups[] = { "gpio24" };
690static const char * const cci_timer2_groups[] = { "gpio25" };
691static const char * const cci_timer3_groups[] = { "gpio26" };
692static const char * const cci_timer4_groups[] = { "gpio27" };
693static const char * const cci_async_in0_groups[] = { "gpio28" };
694static const char * const cci_async_in1_groups[] = { "gpio26" };
695static const char * const cci_async_in2_groups[] = { "gpio27" };
696
697static const char * const gp_pdm0_groups[] = { "gpio54", "gpio68" };
698static const char * const gp_pdm1_groups[] = { "gpio74", "gpio86" };
699static const char * const gp_pdm2_groups[] = { "gpio63", "gpio79" };
700
701static const char * const tsif1_groups[] = {
702 "gpio89", "gpio90", "gpio91", "gpio92"
703};
704
705static const char * const tsif2_groups[] = {
706 "gpio93", "gpio94", "gpio95", "gpio96"
707};
708
709static const char * const hsic_groups[] = { "gpio144", "gpio145" };
710static const char * const grfc_groups[] = {
711 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109",
712 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115",
713 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
714 "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127",
715 "gpio128", "gpio136", "gpio137", "gpio141", "gpio143"
716};
717
718static const char * const audio_ref_clk_groups[] = { "gpio69" };
719
720static const char * const bt_groups[] = { "gpio35", "gpio43", "gpio44" };
721
722static const char * const fm_groups[] = { "gpio41", "gpio42" };
723
724static const char * const wlan_groups[] = {
725 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"
726};
727
55aaf834
BA		 728static const char * const slimbus_groups[] = { "gpio70", "gpio71" };
729
730static const struct msm_function msm8x74_functions[] = {
697787a1
AG		 731 FUNCTION(cci_i2c0),
732 FUNCTION(cci_i2c1),
733 FUNCTION(uim1),
734 FUNCTION(uim2),
735 FUNCTION(uim_batt_alarm),
736 FUNCTION(blsp_uim1),
737 FUNCTION(blsp_uim2),
738 FUNCTION(blsp_uim3),
739 FUNCTION(blsp_uim4),
740 FUNCTION(blsp_uim5),
741 FUNCTION(blsp_uim6),
742 FUNCTION(blsp_uim7),
743 FUNCTION(blsp_uim8),
744 FUNCTION(blsp_uim9),
745 FUNCTION(blsp_uim10),
746 FUNCTION(blsp_uim11),
747 FUNCTION(blsp_uim12),
748 FUNCTION(blsp_i2c1),
55aaf834 749 FUNCTION(blsp_i2c2),
697787a1
AG		 750 FUNCTION(blsp_i2c3),
751 FUNCTION(blsp_i2c4),
752 FUNCTION(blsp_i2c5),
55aaf834 753 FUNCTION(blsp_i2c6),
697787a1
AG		 754 FUNCTION(blsp_i2c7),
755 FUNCTION(blsp_i2c8),
756 FUNCTION(blsp_i2c9),
757 FUNCTION(blsp_i2c10),
55aaf834 758 FUNCTION(blsp_i2c11),
697787a1 759 FUNCTION(blsp_i2c12),
55aaf834 760 FUNCTION(blsp_spi1),
697787a1
AG		 761 FUNCTION(blsp_spi1_cs1),
762 FUNCTION(blsp_spi1_cs2),
763 FUNCTION(blsp_spi1_cs3),
764 FUNCTION(blsp_spi2),
765 FUNCTION(blsp_spi2_cs1),
766 FUNCTION(blsp_spi2_cs2),
767 FUNCTION(blsp_spi2_cs3),
768 FUNCTION(blsp_spi3),
769 FUNCTION(blsp_spi4),
770 FUNCTION(blsp_spi5),
771 FUNCTION(blsp_spi6),
772 FUNCTION(blsp_spi7),
dc179118 773 FUNCTION(blsp_spi8),
697787a1
AG		 774 FUNCTION(blsp_spi9),
775 FUNCTION(blsp_spi10),
776 FUNCTION(blsp_spi10_cs1),
777 FUNCTION(blsp_spi10_cs2),
778 FUNCTION(blsp_spi10_cs3),
779 FUNCTION(blsp_spi11),
780 FUNCTION(blsp_spi12),
781 FUNCTION(blsp_uart1),
55aaf834 782 FUNCTION(blsp_uart2),
697787a1
AG		 783 FUNCTION(blsp_uart3),
784 FUNCTION(blsp_uart4),
785 FUNCTION(blsp_uart5),
786 FUNCTION(blsp_uart6),
787 FUNCTION(blsp_uart7),
55aaf834 788 FUNCTION(blsp_uart8),
697787a1
AG		 789 FUNCTION(blsp_uart9),
790 FUNCTION(blsp_uart10),
791 FUNCTION(blsp_uart11),
792 FUNCTION(blsp_uart12),
793 FUNCTION(sdc3),
794 FUNCTION(sdc4),
795 FUNCTION(gcc_gp_clk1),
796 FUNCTION(gcc_gp_clk2),
797 FUNCTION(gcc_gp_clk3),
798 FUNCTION(qua_mi2s),
799 FUNCTION(pri_mi2s),
800 FUNCTION(spkr_mi2s),
801 FUNCTION(ter_mi2s),
802 FUNCTION(sec_mi2s),
803 FUNCTION(mdp_vsync),
804 FUNCTION(cam_mclk0),
805 FUNCTION(cam_mclk1),
806 FUNCTION(cam_mclk2),
807 FUNCTION(cam_mclk3),
808 FUNCTION(cci_timer0),
809 FUNCTION(cci_timer1),
810 FUNCTION(cci_timer2),
811 FUNCTION(cci_timer3),
812 FUNCTION(cci_timer4),
813 FUNCTION(cci_async_in0),
814 FUNCTION(cci_async_in1),
815 FUNCTION(cci_async_in2),
816 FUNCTION(hdmi_cec),
817 FUNCTION(hdmi_ddc),
818 FUNCTION(hdmi_hpd),
819 FUNCTION(edp_hpd),
820 FUNCTION(gp_pdm0),
821 FUNCTION(gp_pdm1),
822 FUNCTION(gp_pdm2),
823 FUNCTION(gp0_clk),
824 FUNCTION(gp1_clk),
825 FUNCTION(gp_mn),
826 FUNCTION(tsif1),
827 FUNCTION(tsif2),
828 FUNCTION(hsic),
829 FUNCTION(grfc),
830 FUNCTION(audio_ref_clk),
831 FUNCTION(bt),
832 FUNCTION(fm),
833 FUNCTION(wlan),
55aaf834
BA		 834 FUNCTION(slimbus),
835};
836
837static const struct msm_pingroup msm8x74_groups[] = {
697787a1
AG		 838 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
839 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
840 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
841 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
842 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
843 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
844 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
845 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
846 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA, NA),
847 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA, NA),
848 PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs3, NA, NA, NA),
849 PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs2, NA, NA, NA),
850 PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA),
851 PINGROUP(13, mdp_vsync, NA, NA, NA, NA, NA, NA),
852 PINGROUP(14, mdp_vsync, NA, NA, NA, NA, NA, NA),
853 PINGROUP(15, cam_mclk0, NA, NA, NA, NA, NA, NA),
854 PINGROUP(16, cam_mclk1, NA, NA, NA, NA, NA, NA),
855 PINGROUP(17, cam_mclk2, NA, NA, NA, NA, NA, NA),
856 PINGROUP(18, cam_mclk3, NA, NA, NA, NA, NA, NA),
857 PINGROUP(19, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA),
858 PINGROUP(20, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA),
859 PINGROUP(21, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA),
860 PINGROUP(22, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA),
861 PINGROUP(23, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA),
862 PINGROUP(24, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA),
863 PINGROUP(25, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA),
864 PINGROUP(26, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5, blsp_i2c5, gp0_clk, NA),
865 PINGROUP(27, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk, NA),
866 PINGROUP(28, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA),
867 PINGROUP(29, blsp_spi6, blsp_uart6, blsp_i2c6, gp_mn, NA, NA, NA),
868 PINGROUP(30, blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
869 PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA),
870 PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA),
871 PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA),
872 PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA),
873 PINGROUP(35, bt, sdc3, NA, NA, NA, NA, NA),
874 PINGROUP(36, wlan, sdc3, NA, NA, NA, NA, NA),
875 PINGROUP(37, wlan, sdc3, NA, NA, NA, NA, NA),
876 PINGROUP(38, wlan, sdc3, NA, NA, NA, NA, NA),
877 PINGROUP(39, wlan, sdc3, NA, NA, NA, NA, NA),
878 PINGROUP(40, wlan, sdc3, NA, NA, NA, NA, NA),
879 PINGROUP(41, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
880 PINGROUP(42, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
881 PINGROUP(43, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
882 PINGROUP(44, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
883 PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
884 PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
885 PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA, NA),
886 PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA, NA),
887 PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA),
888 PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA),
889 PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA),
890 PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA),
891 PINGROUP(53, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs1, NA, NA, NA),
892 PINGROUP(54, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs2, gp_pdm0, NA, NA),
893 PINGROUP(55, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
894 PINGROUP(56, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
895 PINGROUP(57, qua_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA),
896 PINGROUP(58, qua_mi2s, gcc_gp_clk2, NA, NA, NA, NA, NA),
897 PINGROUP(59, qua_mi2s, gcc_gp_clk3, NA, NA, NA, NA, NA),
898 PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA),
899 PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA),
900 PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA),
901 PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA),
902 PINGROUP(64, pri_mi2s, NA, NA, NA, NA, NA, NA),
903 PINGROUP(65, pri_mi2s, NA, NA, NA, NA, NA, NA),
904 PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, NA, NA),
905 PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, NA, NA),
906 PINGROUP(68, pri_mi2s, blsp_spi10_cs2, gp_pdm0, NA, NA, NA, NA),
907 PINGROUP(69, spkr_mi2s, audio_ref_clk, NA, NA, NA, NA, NA),
908 PINGROUP(70, slimbus, spkr_mi2s, NA, NA, NA, NA, NA),
909 PINGROUP(71, slimbus, spkr_mi2s, NA, NA, NA, NA, NA),
910 PINGROUP(72, spkr_mi2s, NA, NA, NA, NA, NA, NA),
911 PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA),
912 PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, NA, NA),
913 PINGROUP(75, ter_mi2s, NA, NA, NA, NA, NA, NA),
914 PINGROUP(76, ter_mi2s, NA, NA, NA, NA, NA, NA),
915 PINGROUP(77, ter_mi2s, NA, NA, NA, NA, NA, NA),
916 PINGROUP(78, sec_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA),
917 PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA),
918 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA),
919 PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk2, NA, NA),
920 PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk3, NA, NA),
921 PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
922 PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
923 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA),
924 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA, NA, NA),
925 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
926 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
927 PINGROUP(89, tsif1, NA, NA, NA, NA, NA, NA),
928 PINGROUP(90, tsif1, blsp_spi10_cs3, NA, NA, NA, NA, NA),
929 PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, NA),
930 PINGROUP(92, tsif1, sdc4, NA, NA, NA, NA, NA),
931 PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, NA),
932 PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, NA),
933 PINGROUP(95, tsif2, sdc4, NA, NA, NA, NA, NA),
934 PINGROUP(96, tsif2, sdc4, NA, NA, NA, NA, NA),
935 PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA),
936 PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA),
937 PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA),
938 PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA),
939 PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA),
940 PINGROUP(102, edp_hpd, NA, NA, NA, NA, NA, NA),
55aaf834 941 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA),
697787a1
AG		 942 PINGROUP(104, grfc, NA, NA, NA, NA, NA, NA),
943 PINGROUP(105, grfc, NA, NA, NA, NA, NA, NA),
944 PINGROUP(106, grfc, NA, NA, NA, NA, NA, NA),
945 PINGROUP(107, grfc, NA, NA, NA, NA, NA, NA),
946 PINGROUP(108, grfc, NA, NA, NA, NA, NA, NA),
947 PINGROUP(109, grfc, NA, NA, NA, NA, NA, NA),
948 PINGROUP(110, grfc, NA, NA, NA, NA, NA, NA),
949 PINGROUP(111, grfc, NA, NA, NA, NA, NA, NA),
950 PINGROUP(112, grfc, NA, NA, NA, NA, NA, NA),
951 PINGROUP(113, grfc, NA, NA, NA, NA, NA, NA),
952 PINGROUP(114, grfc, NA, NA, NA, NA, NA, NA),
953 PINGROUP(115, grfc, NA, NA, NA, NA, NA, NA),
954 PINGROUP(116, grfc, NA, NA, NA, NA, NA, NA),
955 PINGROUP(117, grfc, NA, NA, NA, NA, NA, NA),
956 PINGROUP(118, grfc, NA, NA, NA, NA, NA, NA),
957 PINGROUP(119, grfc, NA, NA, NA, NA, NA, NA),
958 PINGROUP(120, grfc, NA, NA, NA, NA, NA, NA),
959 PINGROUP(121, grfc, NA, NA, NA, NA, NA, NA),
960 PINGROUP(122, grfc, NA, NA, NA, NA, NA, NA),
961 PINGROUP(123, grfc, NA, NA, NA, NA, NA, NA),
962 PINGROUP(124, grfc, NA, NA, NA, NA, NA, NA),
963 PINGROUP(125, grfc, NA, NA, NA, NA, NA, NA),
964 PINGROUP(126, grfc, NA, NA, NA, NA, NA, NA),
965 PINGROUP(127, grfc, NA, NA, NA, NA, NA, NA),
966 PINGROUP(128, NA, grfc, NA, NA, NA, NA, NA),
55aaf834
BA		 967 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA),
968 PINGROUP(130, NA, NA, NA, NA, NA, NA, NA),
969 PINGROUP(131, NA, NA, NA, NA, NA, NA, NA),
970 PINGROUP(132, NA, NA, NA, NA, NA, NA, NA),
971 PINGROUP(133, NA, NA, NA, NA, NA, NA, NA),
972 PINGROUP(134, NA, NA, NA, NA, NA, NA, NA),
973 PINGROUP(135, NA, NA, NA, NA, NA, NA, NA),
697787a1
AG		 974 PINGROUP(136, NA, grfc, NA, NA, NA, NA, NA),
975 PINGROUP(137, NA, grfc, NA, NA, NA, NA, NA),
55aaf834
BA		 976 PINGROUP(138, NA, NA, NA, NA, NA, NA, NA),
977 PINGROUP(139, NA, NA, NA, NA, NA, NA, NA),
978 PINGROUP(140, NA, NA, NA, NA, NA, NA, NA),
697787a1
AG		 979 PINGROUP(141, NA, grfc, NA, NA, NA, NA, NA),
980 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA),
981 PINGROUP(143, NA, grfc, NA, NA, NA, NA, NA),
982 PINGROUP(144, hsic, NA, NA, NA, NA, NA, NA),
983 PINGROUP(145, hsic, NA, NA, NA, NA, NA, NA),
55aaf834
BA		 984 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
985 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
986 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
987 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
988 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
989 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
990};
991
992#define NUM_GPIO_PINGROUPS 146
993
994static const struct msm_pinctrl_soc_data msm8x74_pinctrl = {
995 .pins = msm8x74_pins,
996 .npins = ARRAY_SIZE(msm8x74_pins),
997 .functions = msm8x74_functions,
998 .nfunctions = ARRAY_SIZE(msm8x74_functions),
999 .groups = msm8x74_groups,
1000 .ngroups = ARRAY_SIZE(msm8x74_groups),
1001 .ngpios = NUM_GPIO_PINGROUPS,
1002};
1003
1004static int msm8x74_pinctrl_probe(struct platform_device *pdev)
1005{
1006 return msm_pinctrl_probe(pdev, &msm8x74_pinctrl);
1007}
1008
1f2b2398 1009static const struct of_device_id msm8x74_pinctrl_of_match[] = {
b31d100e 1010 { .compatible = "qcom,msm8974-pinctrl", },
55aaf834
BA		 1011 { },
1012};
1013
1014static struct platform_driver msm8x74_pinctrl_driver = {
1015 .driver = {
1016 .name = "msm8x74-pinctrl",
1017 .owner = THIS_MODULE,
1018 .of_match_table = msm8x74_pinctrl_of_match,
1019 },
1020 .probe = msm8x74_pinctrl_probe,
1021 .remove = msm_pinctrl_remove,
1022};
1023
1024static int __init msm8x74_pinctrl_init(void)
1025{
1026 return platform_driver_register(&msm8x74_pinctrl_driver);
1027}
1028arch_initcall(msm8x74_pinctrl_init);
1029
1030static void __exit msm8x74_pinctrl_exit(void)
1031{
1032 platform_driver_unregister(&msm8x74_pinctrl_driver);
1033}
1034module_exit(msm8x74_pinctrl_exit);
1035
1036MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
1037MODULE_DESCRIPTION("Qualcomm MSM8x74 pinctrl driver");
1038MODULE_LICENSE("GPL v2");
1039MODULE_DEVICE_TABLE(of, msm8x74_pinctrl_of_match);
1040
Linux kernel - Deliverables
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