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17723111 SG |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | #include <linux/err.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/of.h> | |
17 | #include <linux/of_address.h> | |
18 | #include <linux/pinctrl/machine.h> | |
19 | #include <linux/pinctrl/pinconf.h> | |
20 | #include <linux/pinctrl/pinctrl.h> | |
21 | #include <linux/pinctrl/pinmux.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/slab.h> | |
24 | #include "core.h" | |
25 | #include "pinctrl-mxs.h" | |
26 | ||
27 | #define SUFFIX_LEN 4 | |
28 | ||
29 | struct mxs_pinctrl_data { | |
30 | struct device *dev; | |
31 | struct pinctrl_dev *pctl; | |
32 | void __iomem *base; | |
33 | struct mxs_pinctrl_soc_data *soc; | |
34 | }; | |
35 | ||
36 | static int mxs_get_groups_count(struct pinctrl_dev *pctldev) | |
37 | { | |
38 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
39 | ||
40 | return d->soc->ngroups; | |
41 | } | |
42 | ||
43 | static const char *mxs_get_group_name(struct pinctrl_dev *pctldev, | |
44 | unsigned group) | |
45 | { | |
46 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
47 | ||
48 | return d->soc->groups[group].name; | |
49 | } | |
50 | ||
51 | static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, | |
52 | const unsigned **pins, unsigned *num_pins) | |
53 | { | |
54 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
55 | ||
56 | *pins = d->soc->groups[group].pins; | |
57 | *num_pins = d->soc->groups[group].npins; | |
58 | ||
59 | return 0; | |
60 | } | |
61 | ||
62 | static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, | |
63 | unsigned offset) | |
64 | { | |
65 | seq_printf(s, " %s", dev_name(pctldev->dev)); | |
66 | } | |
67 | ||
68 | static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev, | |
69 | struct device_node *np, | |
70 | struct pinctrl_map **map, unsigned *num_maps) | |
71 | { | |
72 | struct pinctrl_map *new_map; | |
3b7ac941 SG |
73 | char *group = NULL; |
74 | unsigned new_num = 1; | |
17723111 SG |
75 | unsigned long config = 0; |
76 | unsigned long *pconfig; | |
77 | int length = strlen(np->name) + SUFFIX_LEN; | |
3b7ac941 SG |
78 | bool purecfg = false; |
79 | u32 val, reg; | |
80 | int ret, i = 0; | |
81 | ||
82 | /* Check for pin config node which has no 'reg' property */ | |
83 | if (of_property_read_u32(np, "reg", ®)) | |
84 | purecfg = true; | |
17723111 SG |
85 | |
86 | ret = of_property_read_u32(np, "fsl,drive-strength", &val); | |
87 | if (!ret) | |
88 | config = val | MA_PRESENT; | |
89 | ret = of_property_read_u32(np, "fsl,voltage", &val); | |
90 | if (!ret) | |
91 | config |= val << VOL_SHIFT | VOL_PRESENT; | |
92 | ret = of_property_read_u32(np, "fsl,pull-up", &val); | |
93 | if (!ret) | |
94 | config |= val << PULL_SHIFT | PULL_PRESENT; | |
95 | ||
3b7ac941 SG |
96 | /* Check for group node which has both mux and config settings */ |
97 | if (!purecfg && config) | |
98 | new_num = 2; | |
99 | ||
17723111 SG |
100 | new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL); |
101 | if (!new_map) | |
102 | return -ENOMEM; | |
103 | ||
3b7ac941 SG |
104 | if (!purecfg) { |
105 | new_map[i].type = PIN_MAP_TYPE_MUX_GROUP; | |
106 | new_map[i].data.mux.function = np->name; | |
107 | ||
108 | /* Compose group name */ | |
109 | group = kzalloc(length, GFP_KERNEL); | |
110 | if (!group) | |
111 | return -ENOMEM; | |
112 | snprintf(group, length, "%s.%d", np->name, reg); | |
113 | new_map[i].data.mux.group = group; | |
114 | i++; | |
115 | } | |
17723111 SG |
116 | |
117 | if (config) { | |
118 | pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL); | |
119 | if (!pconfig) { | |
120 | ret = -ENOMEM; | |
121 | goto free; | |
122 | } | |
123 | ||
3b7ac941 SG |
124 | new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP; |
125 | new_map[i].data.configs.group_or_pin = purecfg ? np->name : | |
126 | group; | |
127 | new_map[i].data.configs.configs = pconfig; | |
128 | new_map[i].data.configs.num_configs = 1; | |
17723111 SG |
129 | } |
130 | ||
131 | *map = new_map; | |
132 | *num_maps = new_num; | |
133 | ||
134 | return 0; | |
135 | ||
136 | free: | |
137 | kfree(new_map); | |
138 | return ret; | |
139 | } | |
140 | ||
141 | static void mxs_dt_free_map(struct pinctrl_dev *pctldev, | |
142 | struct pinctrl_map *map, unsigned num_maps) | |
143 | { | |
144 | int i; | |
145 | ||
146 | for (i = 0; i < num_maps; i++) { | |
147 | if (map[i].type == PIN_MAP_TYPE_MUX_GROUP) | |
148 | kfree(map[i].data.mux.group); | |
149 | if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) | |
150 | kfree(map[i].data.configs.configs); | |
151 | } | |
152 | ||
153 | kfree(map); | |
154 | } | |
155 | ||
156 | static struct pinctrl_ops mxs_pinctrl_ops = { | |
157 | .get_groups_count = mxs_get_groups_count, | |
158 | .get_group_name = mxs_get_group_name, | |
159 | .get_group_pins = mxs_get_group_pins, | |
160 | .pin_dbg_show = mxs_pin_dbg_show, | |
161 | .dt_node_to_map = mxs_dt_node_to_map, | |
162 | .dt_free_map = mxs_dt_free_map, | |
163 | }; | |
164 | ||
165 | static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) | |
166 | { | |
167 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
168 | ||
169 | return d->soc->nfunctions; | |
170 | } | |
171 | ||
172 | static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev, | |
173 | unsigned function) | |
174 | { | |
175 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
176 | ||
177 | return d->soc->functions[function].name; | |
178 | } | |
179 | ||
180 | static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, | |
181 | unsigned group, | |
182 | const char * const **groups, | |
183 | unsigned * const num_groups) | |
184 | { | |
185 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
186 | ||
187 | *groups = d->soc->functions[group].groups; | |
188 | *num_groups = d->soc->functions[group].ngroups; | |
189 | ||
190 | return 0; | |
191 | } | |
192 | ||
193 | static int mxs_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned selector, | |
194 | unsigned group) | |
195 | { | |
196 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
197 | struct mxs_group *g = &d->soc->groups[group]; | |
198 | void __iomem *reg; | |
199 | u8 bank, shift; | |
200 | u16 pin; | |
201 | int i; | |
202 | ||
203 | for (i = 0; i < g->npins; i++) { | |
204 | bank = PINID_TO_BANK(g->pins[i]); | |
205 | pin = PINID_TO_PIN(g->pins[i]); | |
206 | reg = d->base + d->soc->regs->muxsel; | |
207 | reg += bank * 0x20 + pin / 16 * 0x10; | |
208 | shift = pin % 16 * 2; | |
209 | ||
210 | writel(0x3 << shift, reg + CLR); | |
211 | writel(g->muxsel[i] << shift, reg + SET); | |
212 | } | |
213 | ||
214 | return 0; | |
215 | } | |
216 | ||
17723111 SG |
217 | static struct pinmux_ops mxs_pinmux_ops = { |
218 | .get_functions_count = mxs_pinctrl_get_funcs_count, | |
219 | .get_function_name = mxs_pinctrl_get_func_name, | |
220 | .get_function_groups = mxs_pinctrl_get_func_groups, | |
221 | .enable = mxs_pinctrl_enable, | |
17723111 SG |
222 | }; |
223 | ||
224 | static int mxs_pinconf_get(struct pinctrl_dev *pctldev, | |
225 | unsigned pin, unsigned long *config) | |
226 | { | |
227 | return -ENOTSUPP; | |
228 | } | |
229 | ||
230 | static int mxs_pinconf_set(struct pinctrl_dev *pctldev, | |
231 | unsigned pin, unsigned long config) | |
232 | { | |
233 | return -ENOTSUPP; | |
234 | } | |
235 | ||
236 | static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev, | |
237 | unsigned group, unsigned long *config) | |
238 | { | |
239 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
240 | ||
241 | *config = d->soc->groups[group].config; | |
242 | ||
243 | return 0; | |
244 | } | |
245 | ||
246 | static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev, | |
247 | unsigned group, unsigned long config) | |
248 | { | |
249 | struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); | |
250 | struct mxs_group *g = &d->soc->groups[group]; | |
251 | void __iomem *reg; | |
252 | u8 ma, vol, pull, bank, shift; | |
253 | u16 pin; | |
254 | int i; | |
255 | ||
256 | ma = CONFIG_TO_MA(config); | |
257 | vol = CONFIG_TO_VOL(config); | |
258 | pull = CONFIG_TO_PULL(config); | |
259 | ||
260 | for (i = 0; i < g->npins; i++) { | |
261 | bank = PINID_TO_BANK(g->pins[i]); | |
262 | pin = PINID_TO_PIN(g->pins[i]); | |
263 | ||
264 | /* drive */ | |
265 | reg = d->base + d->soc->regs->drive; | |
266 | reg += bank * 0x40 + pin / 8 * 0x10; | |
267 | ||
268 | /* mA */ | |
269 | if (config & MA_PRESENT) { | |
270 | shift = pin % 8 * 4; | |
271 | writel(0x3 << shift, reg + CLR); | |
272 | writel(ma << shift, reg + SET); | |
273 | } | |
274 | ||
275 | /* vol */ | |
276 | if (config & VOL_PRESENT) { | |
277 | shift = pin % 8 * 4 + 2; | |
278 | if (vol) | |
279 | writel(1 << shift, reg + SET); | |
280 | else | |
281 | writel(1 << shift, reg + CLR); | |
282 | } | |
283 | ||
284 | /* pull */ | |
285 | if (config & PULL_PRESENT) { | |
286 | reg = d->base + d->soc->regs->pull; | |
287 | reg += bank * 0x10; | |
288 | shift = pin; | |
289 | if (pull) | |
290 | writel(1 << shift, reg + SET); | |
291 | else | |
292 | writel(1 << shift, reg + CLR); | |
293 | } | |
294 | } | |
295 | ||
296 | /* cache the config value for mxs_pinconf_group_get() */ | |
297 | g->config = config; | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
302 | static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev, | |
303 | struct seq_file *s, unsigned pin) | |
304 | { | |
305 | /* Not support */ | |
306 | } | |
307 | ||
308 | static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, | |
309 | struct seq_file *s, unsigned group) | |
310 | { | |
311 | unsigned long config; | |
312 | ||
313 | if (!mxs_pinconf_group_get(pctldev, group, &config)) | |
314 | seq_printf(s, "0x%lx", config); | |
315 | } | |
316 | ||
317 | struct pinconf_ops mxs_pinconf_ops = { | |
318 | .pin_config_get = mxs_pinconf_get, | |
319 | .pin_config_set = mxs_pinconf_set, | |
320 | .pin_config_group_get = mxs_pinconf_group_get, | |
321 | .pin_config_group_set = mxs_pinconf_group_set, | |
322 | .pin_config_dbg_show = mxs_pinconf_dbg_show, | |
323 | .pin_config_group_dbg_show = mxs_pinconf_group_dbg_show, | |
324 | }; | |
325 | ||
326 | static struct pinctrl_desc mxs_pinctrl_desc = { | |
327 | .pctlops = &mxs_pinctrl_ops, | |
328 | .pmxops = &mxs_pinmux_ops, | |
329 | .confops = &mxs_pinconf_ops, | |
330 | .owner = THIS_MODULE, | |
331 | }; | |
332 | ||
333 | static int __devinit mxs_pinctrl_parse_group(struct platform_device *pdev, | |
334 | struct device_node *np, int idx, | |
335 | const char **out_name) | |
336 | { | |
337 | struct mxs_pinctrl_data *d = platform_get_drvdata(pdev); | |
338 | struct mxs_group *g = &d->soc->groups[idx]; | |
339 | struct property *prop; | |
340 | const char *propname = "fsl,pinmux-ids"; | |
341 | char *group; | |
342 | int length = strlen(np->name) + SUFFIX_LEN; | |
343 | int i; | |
344 | u32 val; | |
345 | ||
346 | group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL); | |
347 | if (!group) | |
348 | return -ENOMEM; | |
3b7ac941 SG |
349 | if (of_property_read_u32(np, "reg", &val)) |
350 | snprintf(group, length, "%s", np->name); | |
351 | else | |
352 | snprintf(group, length, "%s.%d", np->name, val); | |
17723111 SG |
353 | g->name = group; |
354 | ||
355 | prop = of_find_property(np, propname, &length); | |
356 | if (!prop) | |
357 | return -EINVAL; | |
358 | g->npins = length / sizeof(u32); | |
359 | ||
360 | g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins), | |
361 | GFP_KERNEL); | |
362 | if (!g->pins) | |
363 | return -ENOMEM; | |
364 | ||
365 | g->muxsel = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->muxsel), | |
366 | GFP_KERNEL); | |
367 | if (!g->muxsel) | |
368 | return -ENOMEM; | |
369 | ||
370 | of_property_read_u32_array(np, propname, g->pins, g->npins); | |
371 | for (i = 0; i < g->npins; i++) { | |
372 | g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]); | |
373 | g->pins[i] = MUXID_TO_PINID(g->pins[i]); | |
374 | } | |
375 | ||
3b7ac941 SG |
376 | if (out_name) |
377 | *out_name = g->name; | |
17723111 SG |
378 | |
379 | return 0; | |
380 | } | |
381 | ||
382 | static int __devinit mxs_pinctrl_probe_dt(struct platform_device *pdev, | |
383 | struct mxs_pinctrl_data *d) | |
384 | { | |
385 | struct mxs_pinctrl_soc_data *soc = d->soc; | |
386 | struct device_node *np = pdev->dev.of_node; | |
387 | struct device_node *child; | |
388 | struct mxs_function *f; | |
48516804 | 389 | const char *gpio_compat = "fsl,mxs-gpio"; |
17723111 SG |
390 | const char *fn, *fnull = ""; |
391 | int i = 0, idxf = 0, idxg = 0; | |
392 | int ret; | |
393 | u32 val; | |
394 | ||
395 | child = of_get_next_child(np, NULL); | |
396 | if (!child) { | |
397 | dev_err(&pdev->dev, "no group is defined\n"); | |
398 | return -ENOENT; | |
399 | } | |
400 | ||
401 | /* Count total functions and groups */ | |
402 | fn = fnull; | |
403 | for_each_child_of_node(np, child) { | |
48516804 SG |
404 | if (of_device_is_compatible(child, gpio_compat)) |
405 | continue; | |
3b7ac941 | 406 | soc->ngroups++; |
17723111 SG |
407 | /* Skip pure pinconf node */ |
408 | if (of_property_read_u32(child, "reg", &val)) | |
409 | continue; | |
410 | if (strcmp(fn, child->name)) { | |
411 | fn = child->name; | |
412 | soc->nfunctions++; | |
413 | } | |
17723111 SG |
414 | } |
415 | ||
416 | soc->functions = devm_kzalloc(&pdev->dev, soc->nfunctions * | |
417 | sizeof(*soc->functions), GFP_KERNEL); | |
418 | if (!soc->functions) | |
419 | return -ENOMEM; | |
420 | ||
421 | soc->groups = devm_kzalloc(&pdev->dev, soc->ngroups * | |
422 | sizeof(*soc->groups), GFP_KERNEL); | |
423 | if (!soc->groups) | |
424 | return -ENOMEM; | |
425 | ||
426 | /* Count groups for each function */ | |
427 | fn = fnull; | |
428 | f = &soc->functions[idxf]; | |
429 | for_each_child_of_node(np, child) { | |
48516804 SG |
430 | if (of_device_is_compatible(child, gpio_compat)) |
431 | continue; | |
17723111 SG |
432 | if (of_property_read_u32(child, "reg", &val)) |
433 | continue; | |
434 | if (strcmp(fn, child->name)) { | |
435 | f = &soc->functions[idxf++]; | |
436 | f->name = fn = child->name; | |
437 | } | |
438 | f->ngroups++; | |
439 | }; | |
440 | ||
441 | /* Get groups for each function */ | |
442 | idxf = 0; | |
443 | fn = fnull; | |
444 | for_each_child_of_node(np, child) { | |
48516804 SG |
445 | if (of_device_is_compatible(child, gpio_compat)) |
446 | continue; | |
3b7ac941 SG |
447 | if (of_property_read_u32(child, "reg", &val)) { |
448 | ret = mxs_pinctrl_parse_group(pdev, child, | |
449 | idxg++, NULL); | |
450 | if (ret) | |
451 | return ret; | |
17723111 | 452 | continue; |
3b7ac941 SG |
453 | } |
454 | ||
17723111 SG |
455 | if (strcmp(fn, child->name)) { |
456 | f = &soc->functions[idxf++]; | |
457 | f->groups = devm_kzalloc(&pdev->dev, f->ngroups * | |
458 | sizeof(*f->groups), | |
459 | GFP_KERNEL); | |
460 | if (!f->groups) | |
461 | return -ENOMEM; | |
462 | fn = child->name; | |
463 | i = 0; | |
464 | } | |
465 | ret = mxs_pinctrl_parse_group(pdev, child, idxg++, | |
466 | &f->groups[i++]); | |
467 | if (ret) | |
468 | return ret; | |
469 | } | |
470 | ||
471 | return 0; | |
472 | } | |
473 | ||
474 | int __devinit mxs_pinctrl_probe(struct platform_device *pdev, | |
475 | struct mxs_pinctrl_soc_data *soc) | |
476 | { | |
477 | struct device_node *np = pdev->dev.of_node; | |
478 | struct mxs_pinctrl_data *d; | |
479 | int ret; | |
480 | ||
481 | d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL); | |
482 | if (!d) | |
483 | return -ENOMEM; | |
484 | ||
485 | d->dev = &pdev->dev; | |
486 | d->soc = soc; | |
487 | ||
488 | d->base = of_iomap(np, 0); | |
489 | if (!d->base) | |
490 | return -EADDRNOTAVAIL; | |
491 | ||
492 | mxs_pinctrl_desc.pins = d->soc->pins; | |
493 | mxs_pinctrl_desc.npins = d->soc->npins; | |
494 | mxs_pinctrl_desc.name = dev_name(&pdev->dev); | |
495 | ||
496 | platform_set_drvdata(pdev, d); | |
497 | ||
498 | ret = mxs_pinctrl_probe_dt(pdev, d); | |
499 | if (ret) { | |
500 | dev_err(&pdev->dev, "dt probe failed: %d\n", ret); | |
501 | goto err; | |
502 | } | |
503 | ||
504 | d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d); | |
505 | if (!d->pctl) { | |
506 | dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n"); | |
507 | ret = -EINVAL; | |
508 | goto err; | |
509 | } | |
510 | ||
511 | return 0; | |
512 | ||
513 | err: | |
514 | iounmap(d->base); | |
515 | return ret; | |
516 | } | |
517 | EXPORT_SYMBOL_GPL(mxs_pinctrl_probe); | |
518 | ||
519 | int __devexit mxs_pinctrl_remove(struct platform_device *pdev) | |
520 | { | |
521 | struct mxs_pinctrl_data *d = platform_get_drvdata(pdev); | |
522 | ||
523 | pinctrl_unregister(d->pctl); | |
524 | iounmap(d->base); | |
525 | ||
526 | return 0; | |
527 | } | |
528 | EXPORT_SYMBOL_GPL(mxs_pinctrl_remove); |