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30574f0d TA |
1 | /* |
2 | * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * Copyright (c) 2012 Linaro Ltd | |
7 | * http://www.linaro.org | |
8 | * | |
9 | * Author: Thomas Abraham <thomas.ab@samsung.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This driver implements the Samsung pinctrl driver. It supports setting up of | |
17 | * pinmux and pinconf configurations. The gpiolib interface is also included. | |
18 | * External interrupt (gpio and wakeup) support are not included in this driver | |
19 | * but provides extensions to which platform specific implementation of the gpio | |
20 | * and wakeup interrupts can be hooked to. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/io.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/err.h> | |
28 | #include <linux/gpio.h> | |
a19fe2d4 | 29 | #include <linux/irqdomain.h> |
19846950 | 30 | #include <linux/spinlock.h> |
d9f99863 | 31 | #include <linux/syscore_ops.h> |
30574f0d TA |
32 | |
33 | #include "core.h" | |
34 | #include "pinctrl-samsung.h" | |
35 | ||
36 | #define GROUP_SUFFIX "-grp" | |
37 | #define GSUFFIX_LEN sizeof(GROUP_SUFFIX) | |
38 | #define FUNCTION_SUFFIX "-mux" | |
39 | #define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX) | |
40 | ||
41 | /* list of all possible config options supported */ | |
d5fd5da2 | 42 | static struct pin_config { |
9a2c1c3b TF |
43 | const char *property; |
44 | enum pincfg_type param; | |
45 | } cfg_params[] = { | |
30574f0d TA |
46 | { "samsung,pin-pud", PINCFG_TYPE_PUD }, |
47 | { "samsung,pin-drv", PINCFG_TYPE_DRV }, | |
48 | { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, | |
49 | { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, | |
2700bc01 | 50 | { "samsung,pin-val", PINCFG_TYPE_DAT }, |
30574f0d TA |
51 | }; |
52 | ||
d9f99863 | 53 | /* Global list of devices (struct samsung_pinctrl_drv_data) */ |
b9408975 | 54 | static LIST_HEAD(drvdata_list); |
d9f99863 | 55 | |
6fb6f1ba | 56 | static unsigned int pin_base; |
40ba6227 | 57 | |
d3a7b9e3 TF |
58 | static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc) |
59 | { | |
60 | return container_of(gc, struct samsung_pin_bank, gpio_chip); | |
61 | } | |
62 | ||
30574f0d TA |
63 | static int samsung_get_group_count(struct pinctrl_dev *pctldev) |
64 | { | |
9a2c1c3b | 65 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); |
30574f0d | 66 | |
9a2c1c3b | 67 | return pmx->nr_groups; |
30574f0d TA |
68 | } |
69 | ||
30574f0d | 70 | static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, |
9a2c1c3b | 71 | unsigned group) |
30574f0d | 72 | { |
9a2c1c3b | 73 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); |
30574f0d | 74 | |
9a2c1c3b | 75 | return pmx->pin_groups[group].name; |
30574f0d TA |
76 | } |
77 | ||
30574f0d | 78 | static int samsung_get_group_pins(struct pinctrl_dev *pctldev, |
9a2c1c3b TF |
79 | unsigned group, |
80 | const unsigned **pins, | |
81 | unsigned *num_pins) | |
30574f0d | 82 | { |
9a2c1c3b TF |
83 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); |
84 | ||
85 | *pins = pmx->pin_groups[group].pins; | |
86 | *num_pins = pmx->pin_groups[group].num_pins; | |
30574f0d | 87 | |
30574f0d TA |
88 | return 0; |
89 | } | |
90 | ||
9a2c1c3b TF |
91 | static int reserve_map(struct device *dev, struct pinctrl_map **map, |
92 | unsigned *reserved_maps, unsigned *num_maps, | |
93 | unsigned reserve) | |
94 | { | |
95 | unsigned old_num = *reserved_maps; | |
96 | unsigned new_num = *num_maps + reserve; | |
97 | struct pinctrl_map *new_map; | |
30574f0d | 98 | |
9a2c1c3b TF |
99 | if (old_num >= new_num) |
100 | return 0; | |
30574f0d | 101 | |
9a2c1c3b TF |
102 | new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL); |
103 | if (!new_map) { | |
104 | dev_err(dev, "krealloc(map) failed\n"); | |
30574f0d TA |
105 | return -ENOMEM; |
106 | } | |
30574f0d | 107 | |
9a2c1c3b TF |
108 | memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); |
109 | ||
110 | *map = new_map; | |
111 | *reserved_maps = new_num; | |
112 | ||
113 | return 0; | |
114 | } | |
115 | ||
116 | static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, | |
117 | unsigned *num_maps, const char *group, | |
118 | const char *function) | |
119 | { | |
120 | if (WARN_ON(*num_maps == *reserved_maps)) | |
121 | return -ENOSPC; | |
122 | ||
123 | (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; | |
124 | (*map)[*num_maps].data.mux.group = group; | |
125 | (*map)[*num_maps].data.mux.function = function; | |
126 | (*num_maps)++; | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
131 | static int add_map_configs(struct device *dev, struct pinctrl_map **map, | |
132 | unsigned *reserved_maps, unsigned *num_maps, | |
133 | const char *group, unsigned long *configs, | |
134 | unsigned num_configs) | |
135 | { | |
136 | unsigned long *dup_configs; | |
137 | ||
138 | if (WARN_ON(*num_maps == *reserved_maps)) | |
139 | return -ENOSPC; | |
140 | ||
141 | dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), | |
142 | GFP_KERNEL); | |
143 | if (!dup_configs) { | |
144 | dev_err(dev, "kmemdup(configs) failed\n"); | |
145 | return -ENOMEM; | |
30574f0d | 146 | } |
30574f0d | 147 | |
9a2c1c3b TF |
148 | (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP; |
149 | (*map)[*num_maps].data.configs.group_or_pin = group; | |
150 | (*map)[*num_maps].data.configs.configs = dup_configs; | |
151 | (*map)[*num_maps].data.configs.num_configs = num_configs; | |
152 | (*num_maps)++; | |
153 | ||
154 | return 0; | |
155 | } | |
156 | ||
157 | static int add_config(struct device *dev, unsigned long **configs, | |
158 | unsigned *num_configs, unsigned long config) | |
159 | { | |
160 | unsigned old_num = *num_configs; | |
161 | unsigned new_num = old_num + 1; | |
162 | unsigned long *new_configs; | |
163 | ||
164 | new_configs = krealloc(*configs, sizeof(*new_configs) * new_num, | |
165 | GFP_KERNEL); | |
166 | if (!new_configs) { | |
167 | dev_err(dev, "krealloc(configs) failed\n"); | |
168 | return -ENOMEM; | |
30574f0d TA |
169 | } |
170 | ||
9a2c1c3b TF |
171 | new_configs[old_num] = config; |
172 | ||
173 | *configs = new_configs; | |
174 | *num_configs = new_num; | |
175 | ||
176 | return 0; | |
177 | } | |
178 | ||
179 | static void samsung_dt_free_map(struct pinctrl_dev *pctldev, | |
180 | struct pinctrl_map *map, | |
181 | unsigned num_maps) | |
182 | { | |
183 | int i; | |
184 | ||
185 | for (i = 0; i < num_maps; i++) | |
186 | if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) | |
187 | kfree(map[i].data.configs.configs); | |
188 | ||
189 | kfree(map); | |
190 | } | |
191 | ||
192 | static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata, | |
193 | struct device *dev, | |
194 | struct device_node *np, | |
195 | struct pinctrl_map **map, | |
196 | unsigned *reserved_maps, | |
197 | unsigned *num_maps) | |
198 | { | |
199 | int ret, i; | |
200 | u32 val; | |
201 | unsigned long config; | |
202 | unsigned long *configs = NULL; | |
203 | unsigned num_configs = 0; | |
204 | unsigned reserve; | |
205 | struct property *prop; | |
206 | const char *group; | |
207 | bool has_func = false; | |
208 | ||
209 | ret = of_property_read_u32(np, "samsung,pin-function", &val); | |
210 | if (!ret) | |
211 | has_func = true; | |
212 | ||
213 | for (i = 0; i < ARRAY_SIZE(cfg_params); i++) { | |
214 | ret = of_property_read_u32(np, cfg_params[i].property, &val); | |
215 | if (!ret) { | |
216 | config = PINCFG_PACK(cfg_params[i].param, val); | |
217 | ret = add_config(dev, &configs, &num_configs, config); | |
218 | if (ret < 0) | |
219 | goto exit; | |
220 | /* EINVAL=missing, which is fine since it's optional */ | |
221 | } else if (ret != -EINVAL) { | |
222 | dev_err(dev, "could not parse property %s\n", | |
223 | cfg_params[i].property); | |
224 | } | |
30574f0d TA |
225 | } |
226 | ||
9a2c1c3b TF |
227 | reserve = 0; |
228 | if (has_func) | |
229 | reserve++; | |
230 | if (num_configs) | |
231 | reserve++; | |
232 | ret = of_property_count_strings(np, "samsung,pins"); | |
233 | if (ret < 0) { | |
234 | dev_err(dev, "could not parse property samsung,pins\n"); | |
235 | goto exit; | |
236 | } | |
237 | reserve *= ret; | |
238 | ||
239 | ret = reserve_map(dev, map, reserved_maps, num_maps, reserve); | |
240 | if (ret < 0) | |
241 | goto exit; | |
242 | ||
243 | of_property_for_each_string(np, "samsung,pins", prop, group) { | |
244 | if (has_func) { | |
245 | ret = add_map_mux(map, reserved_maps, | |
246 | num_maps, group, np->full_name); | |
247 | if (ret < 0) | |
248 | goto exit; | |
30574f0d | 249 | } |
30574f0d | 250 | |
9a2c1c3b TF |
251 | if (num_configs) { |
252 | ret = add_map_configs(dev, map, reserved_maps, | |
253 | num_maps, group, configs, | |
254 | num_configs); | |
255 | if (ret < 0) | |
256 | goto exit; | |
257 | } | |
30574f0d TA |
258 | } |
259 | ||
9a2c1c3b | 260 | ret = 0; |
30574f0d | 261 | |
9a2c1c3b TF |
262 | exit: |
263 | kfree(configs); | |
264 | return ret; | |
30574f0d TA |
265 | } |
266 | ||
9a2c1c3b TF |
267 | static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, |
268 | struct device_node *np_config, | |
269 | struct pinctrl_map **map, | |
270 | unsigned *num_maps) | |
271 | { | |
272 | struct samsung_pinctrl_drv_data *drvdata; | |
273 | unsigned reserved_maps; | |
274 | struct device_node *np; | |
275 | int ret; | |
276 | ||
277 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
278 | ||
279 | reserved_maps = 0; | |
280 | *map = NULL; | |
281 | *num_maps = 0; | |
282 | ||
283 | if (!of_get_child_count(np_config)) | |
284 | return samsung_dt_subnode_to_map(drvdata, pctldev->dev, | |
285 | np_config, map, | |
286 | &reserved_maps, | |
287 | num_maps); | |
288 | ||
289 | for_each_child_of_node(np_config, np) { | |
290 | ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, | |
291 | &reserved_maps, num_maps); | |
292 | if (ret < 0) { | |
293 | samsung_dt_free_map(pctldev, *map, *num_maps); | |
294 | return ret; | |
30574f0d | 295 | } |
9a2c1c3b | 296 | } |
30574f0d | 297 | |
9a2c1c3b | 298 | return 0; |
30574f0d TA |
299 | } |
300 | ||
301 | /* list of pinctrl callbacks for the pinctrl core */ | |
022ab148 | 302 | static const struct pinctrl_ops samsung_pctrl_ops = { |
30574f0d TA |
303 | .get_groups_count = samsung_get_group_count, |
304 | .get_group_name = samsung_get_group_name, | |
305 | .get_group_pins = samsung_get_group_pins, | |
306 | .dt_node_to_map = samsung_dt_node_to_map, | |
307 | .dt_free_map = samsung_dt_free_map, | |
308 | }; | |
309 | ||
310 | /* check if the selector is a valid pin function selector */ | |
311 | static int samsung_get_functions_count(struct pinctrl_dev *pctldev) | |
312 | { | |
313 | struct samsung_pinctrl_drv_data *drvdata; | |
314 | ||
315 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
316 | return drvdata->nr_functions; | |
317 | } | |
318 | ||
319 | /* return the name of the pin function specified */ | |
320 | static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, | |
321 | unsigned selector) | |
322 | { | |
323 | struct samsung_pinctrl_drv_data *drvdata; | |
324 | ||
325 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
326 | return drvdata->pmx_functions[selector].name; | |
327 | } | |
328 | ||
329 | /* return the groups associated for the specified function selector */ | |
330 | static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, | |
331 | unsigned selector, const char * const **groups, | |
332 | unsigned * const num_groups) | |
333 | { | |
334 | struct samsung_pinctrl_drv_data *drvdata; | |
335 | ||
336 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
337 | *groups = drvdata->pmx_functions[selector].groups; | |
338 | *num_groups = drvdata->pmx_functions[selector].num_groups; | |
339 | return 0; | |
340 | } | |
341 | ||
342 | /* | |
343 | * given a pin number that is local to a pin controller, find out the pin bank | |
344 | * and the register base of the pin bank. | |
345 | */ | |
62f14c0e TF |
346 | static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, |
347 | unsigned pin, void __iomem **reg, u32 *offset, | |
30574f0d TA |
348 | struct samsung_pin_bank **bank) |
349 | { | |
30574f0d TA |
350 | struct samsung_pin_bank *b; |
351 | ||
30574f0d TA |
352 | b = drvdata->ctrl->pin_banks; |
353 | ||
354 | while ((pin >= b->pin_base) && | |
355 | ((b->pin_base + b->nr_pins - 1) < pin)) | |
356 | b++; | |
357 | ||
358 | *reg = drvdata->virt_base + b->pctl_offset; | |
359 | *offset = pin - b->pin_base; | |
360 | if (bank) | |
361 | *bank = b; | |
30574f0d TA |
362 | } |
363 | ||
364 | /* enable or disable a pinmux function */ | |
365 | static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, | |
366 | unsigned group, bool enable) | |
367 | { | |
368 | struct samsung_pinctrl_drv_data *drvdata; | |
9a2c1c3b | 369 | struct samsung_pin_bank_type *type; |
30574f0d TA |
370 | struct samsung_pin_bank *bank; |
371 | void __iomem *reg; | |
9a2c1c3b | 372 | u32 mask, shift, data, pin_offset; |
19846950 | 373 | unsigned long flags; |
9a2c1c3b TF |
374 | const struct samsung_pmx_func *func; |
375 | const struct samsung_pin_group *grp; | |
30574f0d TA |
376 | |
377 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
9a2c1c3b TF |
378 | func = &drvdata->pmx_functions[selector]; |
379 | grp = &drvdata->pin_groups[group]; | |
30574f0d | 380 | |
9a2c1c3b TF |
381 | pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->ctrl->base, |
382 | ®, &pin_offset, &bank); | |
383 | type = bank->type; | |
384 | mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; | |
385 | shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; | |
386 | if (shift >= 32) { | |
387 | /* Some banks have two config registers */ | |
388 | shift -= 32; | |
389 | reg += 4; | |
390 | } | |
30574f0d | 391 | |
9a2c1c3b | 392 | spin_lock_irqsave(&bank->slock, flags); |
19846950 | 393 | |
9a2c1c3b TF |
394 | data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); |
395 | data &= ~(mask << shift); | |
396 | if (enable) | |
397 | data |= func->val << shift; | |
398 | writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); | |
19846950 | 399 | |
9a2c1c3b | 400 | spin_unlock_irqrestore(&bank->slock, flags); |
30574f0d TA |
401 | } |
402 | ||
403 | /* enable a specified pinmux by writing to registers */ | |
404 | static int samsung_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector, | |
405 | unsigned group) | |
406 | { | |
407 | samsung_pinmux_setup(pctldev, selector, group, true); | |
408 | return 0; | |
409 | } | |
410 | ||
30574f0d | 411 | /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ |
022ab148 | 412 | static const struct pinmux_ops samsung_pinmux_ops = { |
30574f0d TA |
413 | .get_functions_count = samsung_get_functions_count, |
414 | .get_function_name = samsung_pinmux_get_fname, | |
415 | .get_function_groups = samsung_pinmux_get_groups, | |
416 | .enable = samsung_pinmux_enable, | |
30574f0d TA |
417 | }; |
418 | ||
419 | /* set or get the pin config settings for a specified pin */ | |
420 | static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, | |
421 | unsigned long *config, bool set) | |
422 | { | |
423 | struct samsung_pinctrl_drv_data *drvdata; | |
499147c9 | 424 | struct samsung_pin_bank_type *type; |
30574f0d TA |
425 | struct samsung_pin_bank *bank; |
426 | void __iomem *reg_base; | |
427 | enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); | |
428 | u32 data, width, pin_offset, mask, shift; | |
429 | u32 cfg_value, cfg_reg; | |
19846950 | 430 | unsigned long flags; |
30574f0d TA |
431 | |
432 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
62f14c0e | 433 | pin_to_reg_bank(drvdata, pin - drvdata->ctrl->base, ®_base, |
30574f0d | 434 | &pin_offset, &bank); |
499147c9 | 435 | type = bank->type; |
30574f0d | 436 | |
499147c9 | 437 | if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) |
7c367d3d TF |
438 | return -EINVAL; |
439 | ||
499147c9 | 440 | width = type->fld_width[cfg_type]; |
43fc9e7f | 441 | cfg_reg = type->reg_offset[cfg_type]; |
499147c9 | 442 | |
19846950 TF |
443 | spin_lock_irqsave(&bank->slock, flags); |
444 | ||
30574f0d TA |
445 | mask = (1 << width) - 1; |
446 | shift = pin_offset * width; | |
447 | data = readl(reg_base + cfg_reg); | |
448 | ||
449 | if (set) { | |
450 | cfg_value = PINCFG_UNPACK_VALUE(*config); | |
451 | data &= ~(mask << shift); | |
452 | data |= (cfg_value << shift); | |
453 | writel(data, reg_base + cfg_reg); | |
454 | } else { | |
455 | data >>= shift; | |
456 | data &= mask; | |
457 | *config = PINCFG_PACK(cfg_type, data); | |
458 | } | |
19846950 TF |
459 | |
460 | spin_unlock_irqrestore(&bank->slock, flags); | |
461 | ||
30574f0d TA |
462 | return 0; |
463 | } | |
464 | ||
465 | /* set the pin config settings for a specified pin */ | |
466 | static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, | |
03b054e9 | 467 | unsigned long *configs, unsigned num_configs) |
30574f0d | 468 | { |
03b054e9 SY |
469 | int i, ret; |
470 | ||
471 | for (i = 0; i < num_configs; i++) { | |
472 | ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true); | |
473 | if (ret < 0) | |
474 | return ret; | |
475 | } /* for each config */ | |
476 | ||
477 | return 0; | |
30574f0d TA |
478 | } |
479 | ||
480 | /* get the pin config settings for a specified pin */ | |
481 | static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, | |
482 | unsigned long *config) | |
483 | { | |
484 | return samsung_pinconf_rw(pctldev, pin, config, false); | |
485 | } | |
486 | ||
487 | /* set the pin config settings for a specified pin group */ | |
488 | static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, | |
03b054e9 SY |
489 | unsigned group, unsigned long *configs, |
490 | unsigned num_configs) | |
30574f0d TA |
491 | { |
492 | struct samsung_pinctrl_drv_data *drvdata; | |
493 | const unsigned int *pins; | |
494 | unsigned int cnt; | |
495 | ||
496 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
497 | pins = drvdata->pin_groups[group].pins; | |
498 | ||
499 | for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) | |
03b054e9 | 500 | samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs); |
30574f0d TA |
501 | |
502 | return 0; | |
503 | } | |
504 | ||
505 | /* get the pin config settings for a specified pin group */ | |
506 | static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, | |
507 | unsigned int group, unsigned long *config) | |
508 | { | |
509 | struct samsung_pinctrl_drv_data *drvdata; | |
510 | const unsigned int *pins; | |
511 | ||
512 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
513 | pins = drvdata->pin_groups[group].pins; | |
514 | samsung_pinconf_get(pctldev, pins[0], config); | |
515 | return 0; | |
516 | } | |
517 | ||
518 | /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ | |
022ab148 | 519 | static const struct pinconf_ops samsung_pinconf_ops = { |
30574f0d TA |
520 | .pin_config_get = samsung_pinconf_get, |
521 | .pin_config_set = samsung_pinconf_set, | |
522 | .pin_config_group_get = samsung_pinconf_group_get, | |
523 | .pin_config_group_set = samsung_pinconf_group_set, | |
524 | }; | |
525 | ||
526 | /* gpiolib gpio_set callback function */ | |
527 | static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
528 | { | |
d3a7b9e3 | 529 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); |
499147c9 | 530 | struct samsung_pin_bank_type *type = bank->type; |
19846950 | 531 | unsigned long flags; |
30574f0d | 532 | void __iomem *reg; |
d3a7b9e3 | 533 | u32 data; |
30574f0d | 534 | |
d3a7b9e3 | 535 | reg = bank->drvdata->virt_base + bank->pctl_offset; |
30574f0d | 536 | |
19846950 TF |
537 | spin_lock_irqsave(&bank->slock, flags); |
538 | ||
43fc9e7f | 539 | data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); |
d3a7b9e3 | 540 | data &= ~(1 << offset); |
30574f0d | 541 | if (value) |
d3a7b9e3 | 542 | data |= 1 << offset; |
43fc9e7f | 543 | writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); |
19846950 TF |
544 | |
545 | spin_unlock_irqrestore(&bank->slock, flags); | |
30574f0d TA |
546 | } |
547 | ||
548 | /* gpiolib gpio_get callback function */ | |
549 | static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) | |
550 | { | |
551 | void __iomem *reg; | |
d3a7b9e3 TF |
552 | u32 data; |
553 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | |
43fc9e7f | 554 | struct samsung_pin_bank_type *type = bank->type; |
62f14c0e | 555 | |
d3a7b9e3 | 556 | reg = bank->drvdata->virt_base + bank->pctl_offset; |
30574f0d | 557 | |
43fc9e7f | 558 | data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); |
d3a7b9e3 | 559 | data >>= offset; |
30574f0d TA |
560 | data &= 1; |
561 | return data; | |
562 | } | |
563 | ||
564 | /* | |
18c28caa TF |
565 | * The calls to gpio_direction_output() and gpio_direction_input() |
566 | * leads to this function call. | |
30574f0d | 567 | */ |
18c28caa TF |
568 | static int samsung_gpio_set_direction(struct gpio_chip *gc, |
569 | unsigned offset, bool input) | |
570 | { | |
571 | struct samsung_pin_bank_type *type; | |
572 | struct samsung_pin_bank *bank; | |
573 | struct samsung_pinctrl_drv_data *drvdata; | |
574 | void __iomem *reg; | |
575 | u32 data, mask, shift; | |
576 | unsigned long flags; | |
577 | ||
578 | bank = gc_to_pin_bank(gc); | |
579 | type = bank->type; | |
580 | drvdata = bank->drvdata; | |
581 | ||
582 | reg = drvdata->virt_base + bank->pctl_offset + | |
583 | type->reg_offset[PINCFG_TYPE_FUNC]; | |
584 | ||
585 | mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; | |
586 | shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; | |
587 | if (shift >= 32) { | |
588 | /* Some banks have two config registers */ | |
589 | shift -= 32; | |
590 | reg += 4; | |
591 | } | |
592 | ||
593 | spin_lock_irqsave(&bank->slock, flags); | |
594 | ||
595 | data = readl(reg); | |
596 | data &= ~(mask << shift); | |
597 | if (!input) | |
598 | data |= FUNC_OUTPUT << shift; | |
599 | writel(data, reg); | |
600 | ||
601 | spin_unlock_irqrestore(&bank->slock, flags); | |
602 | ||
603 | return 0; | |
604 | } | |
605 | ||
606 | /* gpiolib gpio_direction_input callback function. */ | |
30574f0d TA |
607 | static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
608 | { | |
18c28caa | 609 | return samsung_gpio_set_direction(gc, offset, true); |
30574f0d TA |
610 | } |
611 | ||
18c28caa | 612 | /* gpiolib gpio_direction_output callback function. */ |
30574f0d TA |
613 | static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, |
614 | int value) | |
615 | { | |
616 | samsung_gpio_set(gc, offset, value); | |
18c28caa | 617 | return samsung_gpio_set_direction(gc, offset, false); |
30574f0d TA |
618 | } |
619 | ||
a19fe2d4 TF |
620 | /* |
621 | * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin | |
622 | * and a virtual IRQ, if not already present. | |
623 | */ | |
624 | static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
625 | { | |
626 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | |
627 | unsigned int virq; | |
628 | ||
629 | if (!bank->irq_domain) | |
630 | return -ENXIO; | |
631 | ||
632 | virq = irq_create_mapping(bank->irq_domain, offset); | |
633 | ||
634 | return (virq) ? : -ENXIO; | |
635 | } | |
636 | ||
9a2c1c3b TF |
637 | static struct samsung_pin_group *samsung_pinctrl_create_groups( |
638 | struct device *dev, | |
639 | struct samsung_pinctrl_drv_data *drvdata, | |
640 | unsigned int *cnt) | |
30574f0d | 641 | { |
9a2c1c3b TF |
642 | struct pinctrl_desc *ctrldesc = &drvdata->pctl; |
643 | struct samsung_pin_group *groups, *grp; | |
644 | const struct pinctrl_pin_desc *pdesc; | |
645 | int i; | |
646 | ||
647 | groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups), | |
648 | GFP_KERNEL); | |
649 | if (!groups) | |
650 | return ERR_PTR(-EINVAL); | |
651 | grp = groups; | |
652 | ||
653 | pdesc = ctrldesc->pins; | |
654 | for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { | |
655 | grp->name = pdesc->name; | |
656 | grp->pins = &pdesc->number; | |
657 | grp->num_pins = 1; | |
658 | } | |
659 | ||
660 | *cnt = ctrldesc->npins; | |
661 | return groups; | |
662 | } | |
30574f0d | 663 | |
9a2c1c3b TF |
664 | static int samsung_pinctrl_create_function(struct device *dev, |
665 | struct samsung_pinctrl_drv_data *drvdata, | |
666 | struct device_node *func_np, | |
667 | struct samsung_pmx_func *func) | |
668 | { | |
669 | int npins; | |
670 | int ret; | |
671 | int i; | |
672 | ||
673 | if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) | |
674 | return 0; | |
675 | ||
676 | npins = of_property_count_strings(func_np, "samsung,pins"); | |
677 | if (npins < 1) { | |
678 | dev_err(dev, "invalid pin list in %s node", func_np->name); | |
30574f0d TA |
679 | return -EINVAL; |
680 | } | |
681 | ||
9a2c1c3b TF |
682 | func->name = func_np->full_name; |
683 | ||
684 | func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL); | |
685 | if (!func->groups) | |
30574f0d | 686 | return -ENOMEM; |
30574f0d | 687 | |
9a2c1c3b TF |
688 | for (i = 0; i < npins; ++i) { |
689 | const char *gname; | |
690 | ||
691 | ret = of_property_read_string_index(func_np, "samsung,pins", | |
692 | i, &gname); | |
693 | if (ret) { | |
694 | dev_err(dev, | |
695 | "failed to read pin name %d from %s node\n", | |
696 | i, func_np->name); | |
697 | return ret; | |
30574f0d | 698 | } |
9a2c1c3b TF |
699 | |
700 | func->groups[i] = gname; | |
30574f0d TA |
701 | } |
702 | ||
9a2c1c3b TF |
703 | func->num_groups = npins; |
704 | return 1; | |
30574f0d TA |
705 | } |
706 | ||
9a2c1c3b TF |
707 | static struct samsung_pmx_func *samsung_pinctrl_create_functions( |
708 | struct device *dev, | |
709 | struct samsung_pinctrl_drv_data *drvdata, | |
710 | unsigned int *cnt) | |
30574f0d | 711 | { |
9a2c1c3b | 712 | struct samsung_pmx_func *functions, *func; |
30574f0d TA |
713 | struct device_node *dev_np = dev->of_node; |
714 | struct device_node *cfg_np; | |
9a2c1c3b | 715 | unsigned int func_cnt = 0; |
30574f0d TA |
716 | int ret; |
717 | ||
9a2c1c3b TF |
718 | /* |
719 | * Iterate over all the child nodes of the pin controller node | |
720 | * and create pin groups and pin function lists. | |
721 | */ | |
722 | for_each_child_of_node(dev_np, cfg_np) { | |
723 | struct device_node *func_np; | |
30574f0d | 724 | |
9a2c1c3b TF |
725 | if (!of_get_child_count(cfg_np)) { |
726 | if (!of_find_property(cfg_np, | |
727 | "samsung,pin-function", NULL)) | |
728 | continue; | |
729 | ++func_cnt; | |
730 | continue; | |
731 | } | |
732 | ||
733 | for_each_child_of_node(cfg_np, func_np) { | |
734 | if (!of_find_property(func_np, | |
735 | "samsung,pin-function", NULL)) | |
736 | continue; | |
737 | ++func_cnt; | |
738 | } | |
30574f0d | 739 | } |
30574f0d | 740 | |
9a2c1c3b TF |
741 | functions = devm_kzalloc(dev, func_cnt * sizeof(*functions), |
742 | GFP_KERNEL); | |
30574f0d TA |
743 | if (!functions) { |
744 | dev_err(dev, "failed to allocate memory for function list\n"); | |
9a2c1c3b | 745 | return ERR_PTR(-EINVAL); |
30574f0d TA |
746 | } |
747 | func = functions; | |
748 | ||
749 | /* | |
750 | * Iterate over all the child nodes of the pin controller node | |
751 | * and create pin groups and pin function lists. | |
752 | */ | |
9a2c1c3b | 753 | func_cnt = 0; |
30574f0d | 754 | for_each_child_of_node(dev_np, cfg_np) { |
9a2c1c3b TF |
755 | struct device_node *func_np; |
756 | ||
757 | if (!of_get_child_count(cfg_np)) { | |
758 | ret = samsung_pinctrl_create_function(dev, drvdata, | |
759 | cfg_np, func); | |
760 | if (ret < 0) | |
761 | return ERR_PTR(ret); | |
762 | if (ret > 0) { | |
763 | ++func; | |
764 | ++func_cnt; | |
765 | } | |
30574f0d | 766 | continue; |
9a2c1c3b | 767 | } |
30574f0d | 768 | |
9a2c1c3b TF |
769 | for_each_child_of_node(cfg_np, func_np) { |
770 | ret = samsung_pinctrl_create_function(dev, drvdata, | |
771 | func_np, func); | |
772 | if (ret < 0) | |
773 | return ERR_PTR(ret); | |
774 | if (ret > 0) { | |
775 | ++func; | |
776 | ++func_cnt; | |
777 | } | |
30574f0d | 778 | } |
9a2c1c3b | 779 | } |
30574f0d | 780 | |
9a2c1c3b TF |
781 | *cnt = func_cnt; |
782 | return functions; | |
783 | } | |
30574f0d | 784 | |
9a2c1c3b TF |
785 | /* |
786 | * Parse the information about all the available pin groups and pin functions | |
787 | * from device node of the pin-controller. A pin group is formed with all | |
788 | * the pins listed in the "samsung,pins" property. | |
789 | */ | |
30574f0d | 790 | |
9a2c1c3b TF |
791 | static int samsung_pinctrl_parse_dt(struct platform_device *pdev, |
792 | struct samsung_pinctrl_drv_data *drvdata) | |
793 | { | |
794 | struct device *dev = &pdev->dev; | |
795 | struct samsung_pin_group *groups; | |
796 | struct samsung_pmx_func *functions; | |
797 | unsigned int grp_cnt = 0, func_cnt = 0; | |
798 | ||
799 | groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt); | |
800 | if (IS_ERR(groups)) { | |
801 | dev_err(dev, "failed to parse pin groups\n"); | |
802 | return PTR_ERR(groups); | |
803 | } | |
804 | ||
805 | functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt); | |
806 | if (IS_ERR(functions)) { | |
807 | dev_err(dev, "failed to parse pin functions\n"); | |
808 | return PTR_ERR(groups); | |
30574f0d TA |
809 | } |
810 | ||
811 | drvdata->pin_groups = groups; | |
812 | drvdata->nr_groups = grp_cnt; | |
813 | drvdata->pmx_functions = functions; | |
9a2c1c3b | 814 | drvdata->nr_functions = func_cnt; |
30574f0d TA |
815 | |
816 | return 0; | |
817 | } | |
818 | ||
819 | /* register the pinctrl interface with the pinctrl subsystem */ | |
150632b0 GKH |
820 | static int samsung_pinctrl_register(struct platform_device *pdev, |
821 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d TA |
822 | { |
823 | struct pinctrl_desc *ctrldesc = &drvdata->pctl; | |
824 | struct pinctrl_pin_desc *pindesc, *pdesc; | |
825 | struct samsung_pin_bank *pin_bank; | |
826 | char *pin_names; | |
827 | int pin, bank, ret; | |
828 | ||
829 | ctrldesc->name = "samsung-pinctrl"; | |
830 | ctrldesc->owner = THIS_MODULE; | |
831 | ctrldesc->pctlops = &samsung_pctrl_ops; | |
832 | ctrldesc->pmxops = &samsung_pinmux_ops; | |
833 | ctrldesc->confops = &samsung_pinconf_ops; | |
834 | ||
835 | pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) * | |
836 | drvdata->ctrl->nr_pins, GFP_KERNEL); | |
837 | if (!pindesc) { | |
838 | dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n"); | |
839 | return -ENOMEM; | |
840 | } | |
841 | ctrldesc->pins = pindesc; | |
842 | ctrldesc->npins = drvdata->ctrl->nr_pins; | |
30574f0d TA |
843 | |
844 | /* dynamically populate the pin number and pin name for pindesc */ | |
845 | for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) | |
846 | pdesc->number = pin + drvdata->ctrl->base; | |
847 | ||
848 | /* | |
849 | * allocate space for storing the dynamically generated names for all | |
850 | * the pins which belong to this pin-controller. | |
851 | */ | |
852 | pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH * | |
853 | drvdata->ctrl->nr_pins, GFP_KERNEL); | |
854 | if (!pin_names) { | |
855 | dev_err(&pdev->dev, "mem alloc for pin names failed\n"); | |
856 | return -ENOMEM; | |
857 | } | |
858 | ||
859 | /* for each pin, the name of the pin is pin-bank name + pin number */ | |
860 | for (bank = 0; bank < drvdata->ctrl->nr_banks; bank++) { | |
861 | pin_bank = &drvdata->ctrl->pin_banks[bank]; | |
862 | for (pin = 0; pin < pin_bank->nr_pins; pin++) { | |
863 | sprintf(pin_names, "%s-%d", pin_bank->name, pin); | |
864 | pdesc = pindesc + pin_bank->pin_base + pin; | |
865 | pdesc->name = pin_names; | |
866 | pin_names += PIN_NAME_LENGTH; | |
867 | } | |
868 | } | |
869 | ||
529301c1 TF |
870 | ret = samsung_pinctrl_parse_dt(pdev, drvdata); |
871 | if (ret) | |
872 | return ret; | |
873 | ||
30574f0d TA |
874 | drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata); |
875 | if (!drvdata->pctl_dev) { | |
876 | dev_err(&pdev->dev, "could not register pinctrl driver\n"); | |
877 | return -EINVAL; | |
878 | } | |
879 | ||
d3a7b9e3 TF |
880 | for (bank = 0; bank < drvdata->ctrl->nr_banks; ++bank) { |
881 | pin_bank = &drvdata->ctrl->pin_banks[bank]; | |
882 | pin_bank->grange.name = pin_bank->name; | |
883 | pin_bank->grange.id = bank; | |
6c6ce620 TF |
884 | pin_bank->grange.pin_base = drvdata->ctrl->base |
885 | + pin_bank->pin_base; | |
d3a7b9e3 TF |
886 | pin_bank->grange.base = pin_bank->gpio_chip.base; |
887 | pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; | |
888 | pin_bank->grange.gc = &pin_bank->gpio_chip; | |
889 | pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); | |
890 | } | |
30574f0d | 891 | |
30574f0d TA |
892 | return 0; |
893 | } | |
894 | ||
6c6ce620 TF |
895 | static int samsung_gpio_request(struct gpio_chip *chip, unsigned offset) |
896 | { | |
897 | return pinctrl_request_gpio(chip->base + offset); | |
898 | } | |
899 | ||
900 | static void samsung_gpio_free(struct gpio_chip *chip, unsigned offset) | |
901 | { | |
902 | pinctrl_free_gpio(chip->base + offset); | |
903 | } | |
904 | ||
d3a7b9e3 | 905 | static const struct gpio_chip samsung_gpiolib_chip = { |
6c6ce620 TF |
906 | .request = samsung_gpio_request, |
907 | .free = samsung_gpio_free, | |
d3a7b9e3 TF |
908 | .set = samsung_gpio_set, |
909 | .get = samsung_gpio_get, | |
910 | .direction_input = samsung_gpio_direction_input, | |
911 | .direction_output = samsung_gpio_direction_output, | |
a19fe2d4 | 912 | .to_irq = samsung_gpio_to_irq, |
d3a7b9e3 TF |
913 | .owner = THIS_MODULE, |
914 | }; | |
915 | ||
30574f0d | 916 | /* register the gpiolib interface with the gpiolib subsystem */ |
150632b0 GKH |
917 | static int samsung_gpiolib_register(struct platform_device *pdev, |
918 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 919 | { |
d3a7b9e3 TF |
920 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
921 | struct samsung_pin_bank *bank = ctrl->pin_banks; | |
30574f0d TA |
922 | struct gpio_chip *gc; |
923 | int ret; | |
d3a7b9e3 TF |
924 | int i; |
925 | ||
926 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
927 | bank->gpio_chip = samsung_gpiolib_chip; | |
928 | ||
929 | gc = &bank->gpio_chip; | |
930 | gc->base = ctrl->base + bank->pin_base; | |
931 | gc->ngpio = bank->nr_pins; | |
932 | gc->dev = &pdev->dev; | |
933 | gc->of_node = bank->of_node; | |
934 | gc->label = bank->name; | |
935 | ||
936 | ret = gpiochip_add(gc); | |
937 | if (ret) { | |
938 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", | |
939 | gc->label, ret); | |
940 | goto fail; | |
941 | } | |
30574f0d TA |
942 | } |
943 | ||
944 | return 0; | |
d3a7b9e3 TF |
945 | |
946 | fail: | |
947 | for (--i, --bank; i >= 0; --i, --bank) | |
948 | if (gpiochip_remove(&bank->gpio_chip)) | |
949 | dev_err(&pdev->dev, "gpio chip %s remove failed\n", | |
950 | bank->gpio_chip.label); | |
951 | return ret; | |
30574f0d TA |
952 | } |
953 | ||
954 | /* unregister the gpiolib interface with the gpiolib subsystem */ | |
150632b0 GKH |
955 | static int samsung_gpiolib_unregister(struct platform_device *pdev, |
956 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 957 | { |
d3a7b9e3 TF |
958 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
959 | struct samsung_pin_bank *bank = ctrl->pin_banks; | |
960 | int ret = 0; | |
961 | int i; | |
962 | ||
963 | for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank) | |
964 | ret = gpiochip_remove(&bank->gpio_chip); | |
965 | ||
966 | if (ret) | |
30574f0d | 967 | dev_err(&pdev->dev, "gpio chip remove failed\n"); |
d3a7b9e3 TF |
968 | |
969 | return ret; | |
30574f0d TA |
970 | } |
971 | ||
972 | static const struct of_device_id samsung_pinctrl_dt_match[]; | |
973 | ||
974 | /* retrieve the soc specific data */ | |
2f0253ff | 975 | static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data( |
6defe9a0 | 976 | struct samsung_pinctrl_drv_data *d, |
30574f0d TA |
977 | struct platform_device *pdev) |
978 | { | |
979 | int id; | |
980 | const struct of_device_id *match; | |
6defe9a0 | 981 | struct device_node *node = pdev->dev.of_node; |
ab663789 | 982 | struct device_node *np; |
40ba6227 TF |
983 | struct samsung_pin_ctrl *ctrl; |
984 | struct samsung_pin_bank *bank; | |
985 | int i; | |
30574f0d | 986 | |
6defe9a0 | 987 | id = of_alias_get_id(node, "pinctrl"); |
30574f0d TA |
988 | if (id < 0) { |
989 | dev_err(&pdev->dev, "failed to get alias id\n"); | |
990 | return NULL; | |
991 | } | |
992 | match = of_match_node(samsung_pinctrl_dt_match, node); | |
40ba6227 TF |
993 | ctrl = (struct samsung_pin_ctrl *)match->data + id; |
994 | ||
995 | bank = ctrl->pin_banks; | |
996 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
19846950 | 997 | spin_lock_init(&bank->slock); |
6defe9a0 | 998 | bank->drvdata = d; |
40ba6227 TF |
999 | bank->pin_base = ctrl->nr_pins; |
1000 | ctrl->nr_pins += bank->nr_pins; | |
40ba6227 TF |
1001 | } |
1002 | ||
ab663789 TF |
1003 | for_each_child_of_node(node, np) { |
1004 | if (!of_find_property(np, "gpio-controller", NULL)) | |
1005 | continue; | |
1006 | bank = ctrl->pin_banks; | |
1007 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
1008 | if (!strcmp(bank->name, np->name)) { | |
1009 | bank->of_node = np; | |
1010 | break; | |
1011 | } | |
1012 | } | |
1013 | } | |
1014 | ||
40ba6227 TF |
1015 | ctrl->base = pin_base; |
1016 | pin_base += ctrl->nr_pins; | |
1017 | ||
1018 | return ctrl; | |
30574f0d TA |
1019 | } |
1020 | ||
150632b0 | 1021 | static int samsung_pinctrl_probe(struct platform_device *pdev) |
30574f0d TA |
1022 | { |
1023 | struct samsung_pinctrl_drv_data *drvdata; | |
1024 | struct device *dev = &pdev->dev; | |
1025 | struct samsung_pin_ctrl *ctrl; | |
1026 | struct resource *res; | |
1027 | int ret; | |
1028 | ||
1029 | if (!dev->of_node) { | |
1030 | dev_err(dev, "device tree node not found\n"); | |
1031 | return -ENODEV; | |
1032 | } | |
1033 | ||
30574f0d TA |
1034 | drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); |
1035 | if (!drvdata) { | |
1036 | dev_err(dev, "failed to allocate memory for driver's " | |
1037 | "private data\n"); | |
1038 | return -ENOMEM; | |
1039 | } | |
6defe9a0 TF |
1040 | |
1041 | ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); | |
1042 | if (!ctrl) { | |
1043 | dev_err(&pdev->dev, "driver data not available\n"); | |
1044 | return -EINVAL; | |
1045 | } | |
30574f0d TA |
1046 | drvdata->ctrl = ctrl; |
1047 | drvdata->dev = dev; | |
1048 | ||
1049 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
9e0c1fb2 TR |
1050 | drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res); |
1051 | if (IS_ERR(drvdata->virt_base)) | |
1052 | return PTR_ERR(drvdata->virt_base); | |
30574f0d TA |
1053 | |
1054 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1055 | if (res) | |
1056 | drvdata->irq = res->start; | |
1057 | ||
1058 | ret = samsung_gpiolib_register(pdev, drvdata); | |
1059 | if (ret) | |
1060 | return ret; | |
1061 | ||
1062 | ret = samsung_pinctrl_register(pdev, drvdata); | |
1063 | if (ret) { | |
1064 | samsung_gpiolib_unregister(pdev, drvdata); | |
1065 | return ret; | |
1066 | } | |
1067 | ||
1068 | if (ctrl->eint_gpio_init) | |
1069 | ctrl->eint_gpio_init(drvdata); | |
1070 | if (ctrl->eint_wkup_init) | |
1071 | ctrl->eint_wkup_init(drvdata); | |
1072 | ||
1073 | platform_set_drvdata(pdev, drvdata); | |
d9f99863 DA |
1074 | |
1075 | /* Add to the global list */ | |
1076 | list_add_tail(&drvdata->node, &drvdata_list); | |
1077 | ||
30574f0d TA |
1078 | return 0; |
1079 | } | |
1080 | ||
d9f99863 DA |
1081 | #ifdef CONFIG_PM |
1082 | ||
1083 | /** | |
1084 | * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device | |
1085 | * | |
1086 | * Save data for all banks handled by this device. | |
1087 | */ | |
1088 | static void samsung_pinctrl_suspend_dev( | |
1089 | struct samsung_pinctrl_drv_data *drvdata) | |
1090 | { | |
1091 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; | |
1092 | void __iomem *virt_base = drvdata->virt_base; | |
1093 | int i; | |
1094 | ||
1095 | for (i = 0; i < ctrl->nr_banks; i++) { | |
1096 | struct samsung_pin_bank *bank = &ctrl->pin_banks[i]; | |
1097 | void __iomem *reg = virt_base + bank->pctl_offset; | |
1098 | ||
1099 | u8 *offs = bank->type->reg_offset; | |
1100 | u8 *widths = bank->type->fld_width; | |
1101 | enum pincfg_type type; | |
1102 | ||
1103 | /* Registers without a powerdown config aren't lost */ | |
1104 | if (!widths[PINCFG_TYPE_CON_PDN]) | |
1105 | continue; | |
1106 | ||
1107 | for (type = 0; type < PINCFG_TYPE_NUM; type++) | |
1108 | if (widths[type]) | |
1109 | bank->pm_save[type] = readl(reg + offs[type]); | |
1110 | ||
1111 | if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { | |
1112 | /* Some banks have two config registers */ | |
1113 | bank->pm_save[PINCFG_TYPE_NUM] = | |
1114 | readl(reg + offs[PINCFG_TYPE_FUNC] + 4); | |
1115 | pr_debug("Save %s @ %p (con %#010x %08x)\n", | |
1116 | bank->name, reg, | |
1117 | bank->pm_save[PINCFG_TYPE_FUNC], | |
1118 | bank->pm_save[PINCFG_TYPE_NUM]); | |
1119 | } else { | |
1120 | pr_debug("Save %s @ %p (con %#010x)\n", bank->name, | |
1121 | reg, bank->pm_save[PINCFG_TYPE_FUNC]); | |
1122 | } | |
1123 | } | |
21c21993 TF |
1124 | |
1125 | if (ctrl->suspend) | |
1126 | ctrl->suspend(drvdata); | |
d9f99863 DA |
1127 | } |
1128 | ||
1129 | /** | |
1130 | * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device | |
1131 | * | |
1132 | * Restore one of the banks that was saved during suspend. | |
1133 | * | |
1134 | * We don't bother doing anything complicated to avoid glitching lines since | |
1135 | * we're called before pad retention is turned off. | |
1136 | */ | |
1137 | static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata) | |
1138 | { | |
1139 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; | |
1140 | void __iomem *virt_base = drvdata->virt_base; | |
1141 | int i; | |
1142 | ||
21c21993 TF |
1143 | if (ctrl->resume) |
1144 | ctrl->resume(drvdata); | |
1145 | ||
d9f99863 DA |
1146 | for (i = 0; i < ctrl->nr_banks; i++) { |
1147 | struct samsung_pin_bank *bank = &ctrl->pin_banks[i]; | |
1148 | void __iomem *reg = virt_base + bank->pctl_offset; | |
1149 | ||
1150 | u8 *offs = bank->type->reg_offset; | |
1151 | u8 *widths = bank->type->fld_width; | |
1152 | enum pincfg_type type; | |
1153 | ||
1154 | /* Registers without a powerdown config aren't lost */ | |
1155 | if (!widths[PINCFG_TYPE_CON_PDN]) | |
1156 | continue; | |
1157 | ||
1158 | if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { | |
1159 | /* Some banks have two config registers */ | |
1160 | pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n", | |
1161 | bank->name, reg, | |
1162 | readl(reg + offs[PINCFG_TYPE_FUNC]), | |
1163 | readl(reg + offs[PINCFG_TYPE_FUNC] + 4), | |
1164 | bank->pm_save[PINCFG_TYPE_FUNC], | |
1165 | bank->pm_save[PINCFG_TYPE_NUM]); | |
1166 | writel(bank->pm_save[PINCFG_TYPE_NUM], | |
1167 | reg + offs[PINCFG_TYPE_FUNC] + 4); | |
1168 | } else { | |
1169 | pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, | |
1170 | reg, readl(reg + offs[PINCFG_TYPE_FUNC]), | |
1171 | bank->pm_save[PINCFG_TYPE_FUNC]); | |
1172 | } | |
1173 | for (type = 0; type < PINCFG_TYPE_NUM; type++) | |
1174 | if (widths[type]) | |
1175 | writel(bank->pm_save[type], reg + offs[type]); | |
1176 | } | |
1177 | } | |
1178 | ||
1179 | /** | |
1180 | * samsung_pinctrl_suspend - save pinctrl state for suspend | |
1181 | * | |
1182 | * Save data for all banks across all devices. | |
1183 | */ | |
1184 | static int samsung_pinctrl_suspend(void) | |
1185 | { | |
1186 | struct samsung_pinctrl_drv_data *drvdata; | |
1187 | ||
1188 | list_for_each_entry(drvdata, &drvdata_list, node) { | |
1189 | samsung_pinctrl_suspend_dev(drvdata); | |
1190 | } | |
1191 | ||
1192 | return 0; | |
1193 | } | |
1194 | ||
1195 | /** | |
1196 | * samsung_pinctrl_resume - restore pinctrl state for suspend | |
1197 | * | |
1198 | * Restore data for all banks across all devices. | |
1199 | */ | |
1200 | static void samsung_pinctrl_resume(void) | |
1201 | { | |
1202 | struct samsung_pinctrl_drv_data *drvdata; | |
1203 | ||
1204 | list_for_each_entry_reverse(drvdata, &drvdata_list, node) { | |
1205 | samsung_pinctrl_resume_dev(drvdata); | |
1206 | } | |
1207 | } | |
1208 | ||
1209 | #else | |
1210 | #define samsung_pinctrl_suspend NULL | |
1211 | #define samsung_pinctrl_resume NULL | |
1212 | #endif | |
1213 | ||
1214 | static struct syscore_ops samsung_pinctrl_syscore_ops = { | |
1215 | .suspend = samsung_pinctrl_suspend, | |
1216 | .resume = samsung_pinctrl_resume, | |
1217 | }; | |
1218 | ||
30574f0d | 1219 | static const struct of_device_id samsung_pinctrl_dt_match[] = { |
d5517bec | 1220 | #ifdef CONFIG_PINCTRL_EXYNOS |
d97f5b98 TF |
1221 | { .compatible = "samsung,exynos3250-pinctrl", |
1222 | .data = (void *)exynos3250_pin_ctrl }, | |
b533c868 | 1223 | { .compatible = "samsung,exynos4210-pinctrl", |
30574f0d | 1224 | .data = (void *)exynos4210_pin_ctrl }, |
b533c868 | 1225 | { .compatible = "samsung,exynos4x12-pinctrl", |
6edc794a | 1226 | .data = (void *)exynos4x12_pin_ctrl }, |
f67faf48 TA |
1227 | { .compatible = "samsung,exynos5250-pinctrl", |
1228 | .data = (void *)exynos5250_pin_ctrl }, | |
9a8b6079 YGJ |
1229 | { .compatible = "samsung,exynos5260-pinctrl", |
1230 | .data = (void *)exynos5260_pin_ctrl }, | |
983dbeb3 LKA |
1231 | { .compatible = "samsung,exynos5420-pinctrl", |
1232 | .data = (void *)exynos5420_pin_ctrl }, | |
608a26a7 MK |
1233 | { .compatible = "samsung,s5pv210-pinctrl", |
1234 | .data = (void *)s5pv210_pin_ctrl }, | |
61dd7261 TF |
1235 | #endif |
1236 | #ifdef CONFIG_PINCTRL_S3C64XX | |
1237 | { .compatible = "samsung,s3c64xx-pinctrl", | |
1238 | .data = s3c64xx_pin_ctrl }, | |
af99a750 HS |
1239 | #endif |
1240 | #ifdef CONFIG_PINCTRL_S3C24XX | |
1241 | { .compatible = "samsung,s3c2412-pinctrl", | |
1242 | .data = s3c2412_pin_ctrl }, | |
1243 | { .compatible = "samsung,s3c2416-pinctrl", | |
1244 | .data = s3c2416_pin_ctrl }, | |
1245 | { .compatible = "samsung,s3c2440-pinctrl", | |
1246 | .data = s3c2440_pin_ctrl }, | |
1247 | { .compatible = "samsung,s3c2450-pinctrl", | |
1248 | .data = s3c2450_pin_ctrl }, | |
d5517bec | 1249 | #endif |
30574f0d TA |
1250 | {}, |
1251 | }; | |
1252 | MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match); | |
1253 | ||
1254 | static struct platform_driver samsung_pinctrl_driver = { | |
1255 | .probe = samsung_pinctrl_probe, | |
1256 | .driver = { | |
1257 | .name = "samsung-pinctrl", | |
1258 | .owner = THIS_MODULE, | |
606fca94 | 1259 | .of_match_table = samsung_pinctrl_dt_match, |
30574f0d TA |
1260 | }, |
1261 | }; | |
1262 | ||
1263 | static int __init samsung_pinctrl_drv_register(void) | |
1264 | { | |
d9f99863 DA |
1265 | /* |
1266 | * Register syscore ops for save/restore of registers across suspend. | |
1267 | * It's important to ensure that this driver is running at an earlier | |
1268 | * initcall level than any arch-specific init calls that install syscore | |
1269 | * ops that turn off pad retention (like exynos_pm_resume). | |
1270 | */ | |
1271 | register_syscore_ops(&samsung_pinctrl_syscore_ops); | |
1272 | ||
30574f0d TA |
1273 | return platform_driver_register(&samsung_pinctrl_driver); |
1274 | } | |
1275 | postcore_initcall(samsung_pinctrl_drv_register); | |
1276 | ||
1277 | static void __exit samsung_pinctrl_drv_unregister(void) | |
1278 | { | |
1279 | platform_driver_unregister(&samsung_pinctrl_driver); | |
1280 | } | |
1281 | module_exit(samsung_pinctrl_drv_unregister); | |
1282 | ||
1283 | MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); | |
1284 | MODULE_DESCRIPTION("Samsung pinctrl driver"); | |
1285 | MODULE_LICENSE("GPL v2"); |