Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
10 | * License terms: GNU General Public License (GPL) version 2 | |
11 | */ | |
12 | #define pr_fmt(fmt) "pinmux core: " fmt | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/radix-tree.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/list.h> | |
22 | #include <linux/mutex.h> | |
23 | #include <linux/spinlock.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af LW |
32 | |
33 | /** | |
34 | * struct pinmux_group - group list item for pinmux groups | |
35 | * @node: pinmux group list node | |
36 | * @group_selector: the group selector for this group | |
37 | */ | |
38 | struct pinmux_group { | |
39 | struct list_head node; | |
40 | unsigned group_selector; | |
41 | }; | |
42 | ||
03665e0f SW |
43 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
44 | { | |
45 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
46 | unsigned selector = 0; | |
47 | ||
48 | /* Check that we implement required operations */ | |
49 | if (!ops->list_functions || | |
50 | !ops->get_function_name || | |
51 | !ops->get_function_groups || | |
52 | !ops->enable || | |
53 | !ops->disable) | |
54 | return -EINVAL; | |
55 | ||
56 | /* Check that all functions registered have names */ | |
57 | while (ops->list_functions(pctldev, selector) >= 0) { | |
58 | const char *fname = ops->get_function_name(pctldev, | |
59 | selector); | |
60 | if (!fname) { | |
61 | pr_err("pinmux ops has no name for function%u\n", | |
62 | selector); | |
63 | return -EINVAL; | |
64 | } | |
65 | selector++; | |
66 | } | |
67 | ||
68 | return 0; | |
69 | } | |
70 | ||
2744e8af LW |
71 | /** |
72 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
73 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
74 | * @owner: a representation of the owner of this pin; typically the device |
75 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
76 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
77 | * single GPIO pin | |
78 | */ | |
79 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 80 | int pin, const char *owner, |
2744e8af LW |
81 | struct pinctrl_gpio_range *gpio_range) |
82 | { | |
83 | struct pin_desc *desc; | |
84 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
85 | int status = -EINVAL; | |
86 | ||
3cc70ed3 | 87 | dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, owner); |
2744e8af | 88 | |
2744e8af LW |
89 | desc = pin_desc_get(pctldev, pin); |
90 | if (desc == NULL) { | |
51cd24ee | 91 | dev_err(pctldev->dev, |
2744e8af LW |
92 | "pin is not registered so it cannot be requested\n"); |
93 | goto out; | |
94 | } | |
95 | ||
96 | spin_lock(&desc->lock); | |
3cc70ed3 | 97 | if (desc->owner && strcmp(desc->owner, owner)) { |
2744e8af | 98 | spin_unlock(&desc->lock); |
51cd24ee | 99 | dev_err(pctldev->dev, |
2744e8af LW |
100 | "pin already requested\n"); |
101 | goto out; | |
102 | } | |
3cc70ed3 | 103 | desc->owner = owner; |
2744e8af LW |
104 | spin_unlock(&desc->lock); |
105 | ||
106 | /* Let each pin increase references to this module */ | |
107 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 108 | dev_err(pctldev->dev, |
2744e8af LW |
109 | "could not increase module refcount for pin %d\n", |
110 | pin); | |
111 | status = -EINVAL; | |
112 | goto out_free_pin; | |
113 | } | |
114 | ||
115 | /* | |
116 | * If there is no kind of request function for the pin we just assume | |
117 | * we got it by default and proceed. | |
118 | */ | |
3712a3c4 | 119 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
120 | /* This requests and enables a single GPIO pin */ |
121 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
122 | else if (ops->request) | |
123 | status = ops->request(pctldev, pin); | |
124 | else | |
125 | status = 0; | |
126 | ||
127 | if (status) | |
f9d41d7c | 128 | dev_err(pctldev->dev, "->request on device %s failed for pin %d\n", |
2744e8af LW |
129 | pctldev->desc->name, pin); |
130 | out_free_pin: | |
131 | if (status) { | |
132 | spin_lock(&desc->lock); | |
3cc70ed3 | 133 | desc->owner = NULL; |
2744e8af LW |
134 | spin_unlock(&desc->lock); |
135 | } | |
136 | out: | |
137 | if (status) | |
51cd24ee | 138 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
3cc70ed3 | 139 | pin, owner, status); |
2744e8af LW |
140 | |
141 | return status; | |
142 | } | |
143 | ||
144 | /** | |
145 | * pin_free() - release a single muxed in pin so something else can be muxed | |
146 | * @pctldev: pin controller device handling this pin | |
147 | * @pin: the pin to free | |
3712a3c4 SW |
148 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
149 | * single GPIO pin | |
336cdba0 | 150 | * |
3cc70ed3 SW |
151 | * This function returns a pointer to the previous owner. This is used |
152 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 153 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 154 | */ |
3712a3c4 SW |
155 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
156 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
157 | { |
158 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
159 | struct pin_desc *desc; | |
3cc70ed3 | 160 | const char *owner; |
2744e8af LW |
161 | |
162 | desc = pin_desc_get(pctldev, pin); | |
163 | if (desc == NULL) { | |
51cd24ee | 164 | dev_err(pctldev->dev, |
2744e8af | 165 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 166 | return NULL; |
2744e8af LW |
167 | } |
168 | ||
3712a3c4 SW |
169 | /* |
170 | * If there is no kind of request function for the pin we just assume | |
171 | * we got it by default and proceed. | |
172 | */ | |
173 | if (gpio_range && ops->gpio_disable_free) | |
174 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
175 | else if (ops->free) | |
2744e8af LW |
176 | ops->free(pctldev, pin); |
177 | ||
178 | spin_lock(&desc->lock); | |
3cc70ed3 SW |
179 | owner = desc->owner; |
180 | desc->owner = NULL; | |
2744e8af LW |
181 | spin_unlock(&desc->lock); |
182 | module_put(pctldev->owner); | |
3712a3c4 | 183 | |
3cc70ed3 | 184 | return owner; |
2744e8af LW |
185 | } |
186 | ||
187 | /** | |
befe5bdf LW |
188 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
189 | * @pctldev: pin controller device affected | |
190 | * @pin: the pin to mux in for GPIO | |
191 | * @range: the applicable GPIO range | |
2744e8af | 192 | */ |
befe5bdf LW |
193 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
194 | struct pinctrl_gpio_range *range, | |
195 | unsigned pin, unsigned gpio) | |
2744e8af LW |
196 | { |
197 | char gpiostr[16]; | |
3cc70ed3 | 198 | const char *owner; |
2744e8af | 199 | int ret; |
2744e8af LW |
200 | |
201 | /* Conjure some name stating what chip and pin this is taken by */ | |
202 | snprintf(gpiostr, 15, "%s:%d", range->name, gpio); | |
203 | ||
3cc70ed3 SW |
204 | owner = kstrdup(gpiostr, GFP_KERNEL); |
205 | if (!owner) | |
5d2eaf80 SW |
206 | return -EINVAL; |
207 | ||
3cc70ed3 | 208 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 209 | if (ret < 0) |
3cc70ed3 | 210 | kfree(owner); |
5d2eaf80 SW |
211 | |
212 | return ret; | |
2744e8af | 213 | } |
2744e8af LW |
214 | |
215 | /** | |
befe5bdf LW |
216 | * pinmux_free_gpio() - release a pin from GPIO muxing |
217 | * @pctldev: the pin controller device for the pin | |
218 | * @pin: the affected currently GPIO-muxed in pin | |
219 | * @range: applicable GPIO range | |
2744e8af | 220 | */ |
befe5bdf LW |
221 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
222 | struct pinctrl_gpio_range *range) | |
2744e8af | 223 | { |
3cc70ed3 | 224 | const char *owner; |
2744e8af | 225 | |
3cc70ed3 SW |
226 | owner = pin_free(pctldev, pin, range); |
227 | kfree(owner); | |
2744e8af | 228 | } |
2744e8af | 229 | |
befe5bdf LW |
230 | /** |
231 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
232 | * @pctldev: the pin controller handling this pin | |
233 | * @range: applicable GPIO range | |
234 | * @pin: the affected GPIO pin in this controller | |
235 | * @input: true if we set the pin as input, false for output | |
236 | */ | |
237 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
238 | struct pinctrl_gpio_range *range, | |
239 | unsigned pin, bool input) | |
542e704f | 240 | { |
542e704f LW |
241 | const struct pinmux_ops *ops; |
242 | int ret; | |
542e704f LW |
243 | |
244 | ops = pctldev->desc->pmxops; | |
245 | ||
542e704f LW |
246 | if (ops->gpio_set_direction) |
247 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
248 | else | |
249 | ret = 0; | |
250 | ||
251 | return ret; | |
252 | } | |
253 | ||
2744e8af | 254 | /** |
de849eec | 255 | * acquire_pins() - acquire all the pins for a certain function on a pinmux |
2744e8af | 256 | * @pctldev: the device to take the pins on |
3cc70ed3 SW |
257 | * @owner: a representation of the owner of this pin; typically the device |
258 | * name that controls its mux function | |
2744e8af LW |
259 | * @group_selector: the group selector containing the pins to acquire |
260 | */ | |
261 | static int acquire_pins(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 262 | const char *owner, |
2744e8af LW |
263 | unsigned group_selector) |
264 | { | |
265 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
a5818a8b | 266 | const unsigned *pins; |
2744e8af LW |
267 | unsigned num_pins; |
268 | int ret; | |
269 | int i; | |
270 | ||
271 | ret = pctlops->get_group_pins(pctldev, group_selector, | |
272 | &pins, &num_pins); | |
273 | if (ret) | |
274 | return ret; | |
275 | ||
51cd24ee | 276 | dev_dbg(pctldev->dev, "requesting the %u pins from group %u\n", |
2744e8af LW |
277 | num_pins, group_selector); |
278 | ||
279 | /* Try to allocate all pins in this group, one by one */ | |
280 | for (i = 0; i < num_pins; i++) { | |
3cc70ed3 | 281 | ret = pin_request(pctldev, pins[i], owner, NULL); |
2744e8af | 282 | if (ret) { |
51cd24ee | 283 | dev_err(pctldev->dev, |
3cc70ed3 SW |
284 | "could not get request pin %d on device %s - conflicting mux mappings?\n", |
285 | pins[i], | |
2744e8af LW |
286 | pinctrl_dev_get_name(pctldev)); |
287 | /* On error release all taken pins */ | |
288 | i--; /* this pin just failed */ | |
289 | for (; i >= 0; i--) | |
3712a3c4 | 290 | pin_free(pctldev, pins[i], NULL); |
2744e8af LW |
291 | return -ENODEV; |
292 | } | |
293 | } | |
294 | return 0; | |
295 | } | |
296 | ||
297 | /** | |
298 | * release_pins() - release pins taken by earlier acquirement | |
de849eec | 299 | * @pctldev: the device to free the pins on |
2744e8af LW |
300 | * @group_selector: the group selector containing the pins to free |
301 | */ | |
302 | static void release_pins(struct pinctrl_dev *pctldev, | |
303 | unsigned group_selector) | |
304 | { | |
305 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
a5818a8b | 306 | const unsigned *pins; |
2744e8af LW |
307 | unsigned num_pins; |
308 | int ret; | |
309 | int i; | |
310 | ||
311 | ret = pctlops->get_group_pins(pctldev, group_selector, | |
312 | &pins, &num_pins); | |
313 | if (ret) { | |
f9d41d7c | 314 | dev_err(pctldev->dev, "could not get pins to release for group selector %d\n", |
2744e8af LW |
315 | group_selector); |
316 | return; | |
317 | } | |
318 | for (i = 0; i < num_pins; i++) | |
3712a3c4 | 319 | pin_free(pctldev, pins[i], NULL); |
2744e8af LW |
320 | } |
321 | ||
2744e8af LW |
322 | /** |
323 | * pinmux_check_pin_group() - check function and pin group combo | |
324 | * @pctldev: device to check the pin group vs function for | |
325 | * @func_selector: the function selector to check the pin group for, we have | |
326 | * already looked this up in the calling function | |
327 | * @pin_group: the pin group to match to the function | |
328 | * | |
329 | * This function will check that the pinmux driver can supply the | |
330 | * selected pin group for a certain function, returns the group selector if | |
331 | * the group and function selector will work fine together, else returns | |
332 | * negative | |
333 | */ | |
334 | static int pinmux_check_pin_group(struct pinctrl_dev *pctldev, | |
335 | unsigned func_selector, | |
336 | const char *pin_group) | |
337 | { | |
338 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
339 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
340 | int ret; | |
341 | ||
342 | /* | |
343 | * If the driver does not support different pin groups for the | |
344 | * functions, we only support group 0, and assume this exists. | |
345 | */ | |
346 | if (!pctlops || !pctlops->list_groups) | |
347 | return 0; | |
348 | ||
349 | /* | |
350 | * Passing NULL (no specific group) will select the first and | |
351 | * hopefully only group of pins available for this function. | |
352 | */ | |
353 | if (!pin_group) { | |
354 | char const * const *groups; | |
355 | unsigned num_groups; | |
356 | ||
357 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
358 | &groups, &num_groups); | |
359 | if (ret) | |
360 | return ret; | |
361 | if (num_groups < 1) | |
362 | return -EINVAL; | |
7afde8ba | 363 | ret = pinctrl_get_group_selector(pctldev, groups[0]); |
2744e8af | 364 | if (ret < 0) { |
51cd24ee | 365 | dev_err(pctldev->dev, |
f9d41d7c | 366 | "function %s wants group %s but the pin controller does not seem to have that group\n", |
2744e8af LW |
367 | pmxops->get_function_name(pctldev, func_selector), |
368 | groups[0]); | |
369 | return ret; | |
370 | } | |
371 | ||
372 | if (num_groups > 1) | |
51cd24ee | 373 | dev_dbg(pctldev->dev, |
f9d41d7c | 374 | "function %s support more than one group, default-selecting first group %s (%d)\n", |
2744e8af LW |
375 | pmxops->get_function_name(pctldev, func_selector), |
376 | groups[0], | |
377 | ret); | |
378 | ||
379 | return ret; | |
380 | } | |
381 | ||
51cd24ee | 382 | dev_dbg(pctldev->dev, |
2744e8af LW |
383 | "check if we have pin group %s on controller %s\n", |
384 | pin_group, pinctrl_dev_get_name(pctldev)); | |
385 | ||
7afde8ba | 386 | ret = pinctrl_get_group_selector(pctldev, pin_group); |
2744e8af | 387 | if (ret < 0) { |
51cd24ee | 388 | dev_dbg(pctldev->dev, |
2744e8af LW |
389 | "%s does not support pin group %s with function %s\n", |
390 | pinctrl_dev_get_name(pctldev), | |
391 | pin_group, | |
392 | pmxops->get_function_name(pctldev, func_selector)); | |
393 | } | |
394 | return ret; | |
395 | } | |
396 | ||
397 | /** | |
398 | * pinmux_search_function() - check pin control driver for a certain function | |
399 | * @pctldev: device to check for function and position | |
400 | * @map: function map containing the function and position to look for | |
401 | * @func_selector: returns the applicable function selector if found | |
402 | * @group_selector: returns the applicable group selector if found | |
403 | * | |
404 | * This will search the pinmux driver for an applicable | |
405 | * function with a specific pin group, returns 0 if these can be mapped | |
406 | * negative otherwise | |
407 | */ | |
408 | static int pinmux_search_function(struct pinctrl_dev *pctldev, | |
e93bcee0 | 409 | struct pinctrl_map const *map, |
2744e8af LW |
410 | unsigned *func_selector, |
411 | unsigned *group_selector) | |
412 | { | |
413 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
414 | unsigned selector = 0; | |
415 | ||
416 | /* See if this pctldev has this function */ | |
417 | while (ops->list_functions(pctldev, selector) >= 0) { | |
418 | const char *fname = ops->get_function_name(pctldev, | |
419 | selector); | |
420 | int ret; | |
421 | ||
422 | if (!strcmp(map->function, fname)) { | |
423 | /* Found the function, check pin group */ | |
424 | ret = pinmux_check_pin_group(pctldev, selector, | |
425 | map->group); | |
426 | if (ret < 0) | |
427 | return ret; | |
428 | ||
429 | /* This function and group selector can be used */ | |
430 | *func_selector = selector; | |
431 | *group_selector = ret; | |
432 | return 0; | |
433 | ||
434 | } | |
435 | selector++; | |
436 | } | |
437 | ||
438 | pr_err("%s does not support function %s\n", | |
439 | pinctrl_dev_get_name(pctldev), map->function); | |
440 | return -EINVAL; | |
441 | } | |
442 | ||
443 | /** | |
444 | * pinmux_enable_muxmap() - enable a map entry for a certain pinmux | |
445 | */ | |
446 | static int pinmux_enable_muxmap(struct pinctrl_dev *pctldev, | |
e93bcee0 | 447 | struct pinctrl *p, |
2744e8af LW |
448 | struct device *dev, |
449 | const char *devname, | |
e93bcee0 | 450 | struct pinctrl_map const *map) |
2744e8af LW |
451 | { |
452 | unsigned func_selector; | |
453 | unsigned group_selector; | |
454 | struct pinmux_group *grp; | |
455 | int ret; | |
456 | ||
457 | /* | |
458 | * Note that we're not locking the pinmux mutex here, because | |
459 | * this is only called at pinmux initialization time when it | |
460 | * has not been added to any list and thus is not reachable | |
461 | * by anyone else. | |
462 | */ | |
463 | ||
e93bcee0 | 464 | if (p->pctldev && p->pctldev != pctldev) { |
51cd24ee | 465 | dev_err(pctldev->dev, |
f9d41d7c UKK |
466 | "different pin control devices given for device %s, function %s\n", |
467 | devname, map->function); | |
2744e8af LW |
468 | return -EINVAL; |
469 | } | |
e93bcee0 LW |
470 | p->dev = dev; |
471 | p->pctldev = pctldev; | |
2744e8af LW |
472 | |
473 | /* Now go into the driver and try to match a function and group */ | |
474 | ret = pinmux_search_function(pctldev, map, &func_selector, | |
475 | &group_selector); | |
476 | if (ret < 0) | |
477 | return ret; | |
478 | ||
479 | /* | |
480 | * If the function selector is already set, it needs to be identical, | |
481 | * we support several groups with one function but not several | |
482 | * functions with one or several groups in the same pinmux. | |
483 | */ | |
e93bcee0 LW |
484 | if (p->func_selector != UINT_MAX && |
485 | p->func_selector != func_selector) { | |
51cd24ee | 486 | dev_err(pctldev->dev, |
2744e8af LW |
487 | "dual function defines in the map for device %s\n", |
488 | devname); | |
489 | return -EINVAL; | |
490 | } | |
e93bcee0 | 491 | p->func_selector = func_selector; |
2744e8af LW |
492 | |
493 | /* Now add this group selector, we may have many of them */ | |
02f5b989 | 494 | grp = kmalloc(sizeof(*grp), GFP_KERNEL); |
2744e8af LW |
495 | if (!grp) |
496 | return -ENOMEM; | |
497 | grp->group_selector = group_selector; | |
3cc70ed3 | 498 | ret = acquire_pins(pctldev, devname, group_selector); |
2744e8af LW |
499 | if (ret) { |
500 | kfree(grp); | |
501 | return ret; | |
502 | } | |
8b9c139f | 503 | list_add_tail(&grp->node, &p->groups); |
2744e8af LW |
504 | |
505 | return 0; | |
506 | } | |
507 | ||
2744e8af | 508 | /** |
befe5bdf | 509 | * pinmux_apply_muxmap() - apply a certain mux mapping entry |
2744e8af | 510 | */ |
befe5bdf LW |
511 | int pinmux_apply_muxmap(struct pinctrl_dev *pctldev, |
512 | struct pinctrl *p, | |
513 | struct device *dev, | |
514 | const char *devname, | |
515 | struct pinctrl_map const *map) | |
2744e8af | 516 | { |
befe5bdf | 517 | int ret; |
2744e8af | 518 | |
befe5bdf LW |
519 | ret = pinmux_enable_muxmap(pctldev, p, dev, |
520 | devname, map); | |
521 | if (ret) { | |
522 | pinmux_put(p); | |
523 | return ret; | |
2744e8af LW |
524 | } |
525 | ||
befe5bdf | 526 | return 0; |
2744e8af | 527 | } |
2744e8af LW |
528 | |
529 | /** | |
befe5bdf | 530 | * pinmux_put() - free up the pinmux portions of a pin controller handle |
2744e8af | 531 | */ |
befe5bdf | 532 | void pinmux_put(struct pinctrl *p) |
2744e8af | 533 | { |
befe5bdf | 534 | struct list_head *node, *tmp; |
2744e8af | 535 | |
befe5bdf LW |
536 | list_for_each_safe(node, tmp, &p->groups) { |
537 | struct pinmux_group *grp = | |
538 | list_entry(node, struct pinmux_group, node); | |
539 | /* Release all pins taken by this group */ | |
540 | release_pins(p->pctldev, grp->group_selector); | |
541 | list_del(node); | |
542 | kfree(grp); | |
543 | } | |
2744e8af | 544 | } |
2744e8af LW |
545 | |
546 | /** | |
befe5bdf | 547 | * pinmux_enable() - enable the pinmux portion of a pin control handle |
2744e8af | 548 | */ |
befe5bdf | 549 | int pinmux_enable(struct pinctrl *p) |
2744e8af | 550 | { |
befe5bdf LW |
551 | struct pinctrl_dev *pctldev = p->pctldev; |
552 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
553 | struct pinmux_group *grp; | |
554 | int ret; | |
2744e8af | 555 | |
befe5bdf LW |
556 | list_for_each_entry(grp, &p->groups, node) { |
557 | ret = ops->enable(pctldev, p->func_selector, | |
558 | grp->group_selector); | |
559 | if (ret) | |
560 | /* | |
561 | * TODO: call disable() on all groups we called | |
562 | * enable() on to this point? | |
563 | */ | |
564 | return ret; | |
2744e8af | 565 | } |
befe5bdf | 566 | return 0; |
2744e8af | 567 | } |
2744e8af LW |
568 | |
569 | /** | |
befe5bdf | 570 | * pinmux_disable() - disable the pinmux portions of a pin control handle |
2744e8af | 571 | */ |
befe5bdf | 572 | void pinmux_disable(struct pinctrl *p) |
2744e8af | 573 | { |
befe5bdf LW |
574 | struct pinctrl_dev *pctldev = p->pctldev; |
575 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
576 | struct pinmux_group *grp; | |
2744e8af | 577 | |
befe5bdf LW |
578 | list_for_each_entry(grp, &p->groups, node) { |
579 | ops->disable(pctldev, p->func_selector, | |
580 | grp->group_selector); | |
2744e8af | 581 | } |
2744e8af | 582 | } |
2744e8af | 583 | |
2744e8af LW |
584 | #ifdef CONFIG_DEBUG_FS |
585 | ||
586 | /* Called from pincontrol core */ | |
587 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
588 | { | |
589 | struct pinctrl_dev *pctldev = s->private; | |
590 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
591 | unsigned func_selector = 0; | |
592 | ||
593 | while (pmxops->list_functions(pctldev, func_selector) >= 0) { | |
594 | const char *func = pmxops->get_function_name(pctldev, | |
595 | func_selector); | |
596 | const char * const *groups; | |
597 | unsigned num_groups; | |
598 | int ret; | |
599 | int i; | |
600 | ||
601 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
602 | &groups, &num_groups); | |
603 | if (ret) | |
604 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
605 | func); | |
606 | ||
607 | seq_printf(s, "function: %s, groups = [ ", func); | |
608 | for (i = 0; i < num_groups; i++) | |
609 | seq_printf(s, "%s ", groups[i]); | |
610 | seq_puts(s, "]\n"); | |
611 | ||
612 | func_selector++; | |
613 | ||
614 | } | |
615 | ||
616 | return 0; | |
617 | } | |
618 | ||
619 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
620 | { | |
621 | struct pinctrl_dev *pctldev = s->private; | |
706e8520 | 622 | unsigned i, pin; |
2744e8af LW |
623 | |
624 | seq_puts(s, "Pinmux settings per pin\n"); | |
3cc70ed3 | 625 | seq_puts(s, "Format: pin (name): owner\n"); |
2744e8af | 626 | |
706e8520 CP |
627 | /* The pin number can be retrived from the pin controller descriptor */ |
628 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
629 | |
630 | struct pin_desc *desc; | |
631 | ||
706e8520 | 632 | pin = pctldev->desc->pins[i].number; |
2744e8af | 633 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 634 | /* Skip if we cannot search the pin */ |
2744e8af LW |
635 | if (desc == NULL) |
636 | continue; | |
637 | ||
638 | seq_printf(s, "pin %d (%s): %s\n", pin, | |
639 | desc->name ? desc->name : "unnamed", | |
3cc70ed3 | 640 | desc->owner ? desc->owner : "UNCLAIMED"); |
2744e8af LW |
641 | } |
642 | ||
643 | return 0; | |
644 | } | |
645 | ||
befe5bdf | 646 | void pinmux_dbg_show(struct seq_file *s, struct pinctrl *p) |
2744e8af | 647 | { |
befe5bdf LW |
648 | struct pinctrl_dev *pctldev = p->pctldev; |
649 | const struct pinmux_ops *pmxops; | |
650 | const struct pinctrl_ops *pctlops; | |
651 | struct pinmux_group *grp; | |
2744e8af | 652 | |
befe5bdf LW |
653 | pmxops = pctldev->desc->pmxops; |
654 | pctlops = pctldev->desc->pctlops; | |
2744e8af | 655 | |
befe5bdf LW |
656 | seq_printf(s, " function: %s (%u),", |
657 | pmxops->get_function_name(pctldev, | |
658 | p->func_selector), | |
659 | p->func_selector); | |
2744e8af | 660 | |
befe5bdf LW |
661 | seq_printf(s, " groups: ["); |
662 | list_for_each_entry(grp, &p->groups, node) { | |
663 | seq_printf(s, " %s (%u)", | |
664 | pctlops->get_group_name(pctldev, | |
665 | grp->group_selector), | |
666 | grp->group_selector); | |
2744e8af | 667 | } |
befe5bdf | 668 | seq_printf(s, " ]"); |
2744e8af LW |
669 | } |
670 | ||
671 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
672 | { | |
673 | return single_open(file, pinmux_functions_show, inode->i_private); | |
674 | } | |
675 | ||
676 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
677 | { | |
678 | return single_open(file, pinmux_pins_show, inode->i_private); | |
679 | } | |
680 | ||
2744e8af LW |
681 | static const struct file_operations pinmux_functions_ops = { |
682 | .open = pinmux_functions_open, | |
683 | .read = seq_read, | |
684 | .llseek = seq_lseek, | |
685 | .release = single_release, | |
686 | }; | |
687 | ||
688 | static const struct file_operations pinmux_pins_ops = { | |
689 | .open = pinmux_pins_open, | |
690 | .read = seq_read, | |
691 | .llseek = seq_lseek, | |
692 | .release = single_release, | |
693 | }; | |
694 | ||
2744e8af LW |
695 | void pinmux_init_device_debugfs(struct dentry *devroot, |
696 | struct pinctrl_dev *pctldev) | |
697 | { | |
698 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
699 | devroot, pctldev, &pinmux_functions_ops); | |
700 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
701 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
702 | } |
703 | ||
704 | #endif /* CONFIG_DEBUG_FS */ |