Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 36 | unsigned nfuncs = ops->get_functions_count(pctldev); |
03665e0f SW |
37 | unsigned selector = 0; |
38 | ||
39 | /* Check that we implement required operations */ | |
d1e90e9e | 40 | if (!ops->get_functions_count || |
03665e0f SW |
41 | !ops->get_function_name || |
42 | !ops->get_function_groups || | |
43 | !ops->enable || | |
44 | !ops->disable) | |
45 | return -EINVAL; | |
46 | ||
47 | /* Check that all functions registered have names */ | |
d1e90e9e | 48 | while (selector < nfuncs) { |
03665e0f SW |
49 | const char *fname = ops->get_function_name(pctldev, |
50 | selector); | |
51 | if (!fname) { | |
52 | pr_err("pinmux ops has no name for function%u\n", | |
53 | selector); | |
54 | return -EINVAL; | |
55 | } | |
56 | selector++; | |
57 | } | |
58 | ||
59 | return 0; | |
60 | } | |
61 | ||
1e2082b5 SW |
62 | int pinmux_validate_map(struct pinctrl_map const *map, int i) |
63 | { | |
64 | if (!map->data.mux.function) { | |
65 | pr_err("failed to register map %s (%d): no function given\n", | |
66 | map->name, i); | |
67 | return -EINVAL; | |
68 | } | |
69 | ||
70 | return 0; | |
71 | } | |
72 | ||
2744e8af LW |
73 | /** |
74 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
75 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
76 | * @owner: a representation of the owner of this pin; typically the device |
77 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
78 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
79 | * single GPIO pin | |
80 | */ | |
81 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 82 | int pin, const char *owner, |
2744e8af LW |
83 | struct pinctrl_gpio_range *gpio_range) |
84 | { | |
85 | struct pin_desc *desc; | |
86 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
87 | int status = -EINVAL; | |
88 | ||
3cc70ed3 | 89 | dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, owner); |
2744e8af | 90 | |
2744e8af LW |
91 | desc = pin_desc_get(pctldev, pin); |
92 | if (desc == NULL) { | |
51cd24ee | 93 | dev_err(pctldev->dev, |
2744e8af LW |
94 | "pin is not registered so it cannot be requested\n"); |
95 | goto out; | |
96 | } | |
97 | ||
652162d4 SW |
98 | if (gpio_range) { |
99 | /* There's no need to support multiple GPIO requests */ | |
100 | if (desc->gpio_owner) { | |
101 | dev_err(pctldev->dev, | |
102 | "pin already requested\n"); | |
103 | goto out; | |
104 | } | |
0e3db173 | 105 | |
652162d4 SW |
106 | desc->gpio_owner = owner; |
107 | } else { | |
108 | if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
109 | dev_err(pctldev->dev, | |
110 | "pin already requested\n"); | |
111 | goto out; | |
112 | } | |
0e3db173 | 113 | |
652162d4 SW |
114 | desc->mux_usecount++; |
115 | if (desc->mux_usecount > 1) | |
116 | return 0; | |
117 | ||
118 | desc->mux_owner = owner; | |
119 | } | |
2744e8af LW |
120 | |
121 | /* Let each pin increase references to this module */ | |
122 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 123 | dev_err(pctldev->dev, |
2744e8af LW |
124 | "could not increase module refcount for pin %d\n", |
125 | pin); | |
126 | status = -EINVAL; | |
127 | goto out_free_pin; | |
128 | } | |
129 | ||
130 | /* | |
131 | * If there is no kind of request function for the pin we just assume | |
132 | * we got it by default and proceed. | |
133 | */ | |
3712a3c4 | 134 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
135 | /* This requests and enables a single GPIO pin */ |
136 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
137 | else if (ops->request) | |
138 | status = ops->request(pctldev, pin); | |
139 | else | |
140 | status = 0; | |
141 | ||
0e3db173 | 142 | if (status) { |
f9d41d7c | 143 | dev_err(pctldev->dev, "->request on device %s failed for pin %d\n", |
2744e8af | 144 | pctldev->desc->name, pin); |
0e3db173 SW |
145 | module_put(pctldev->owner); |
146 | } | |
147 | ||
2744e8af | 148 | out_free_pin: |
0e3db173 | 149 | if (status) { |
652162d4 SW |
150 | if (gpio_range) { |
151 | desc->gpio_owner = NULL; | |
152 | } else { | |
153 | desc->mux_usecount--; | |
154 | if (!desc->mux_usecount) | |
155 | desc->mux_owner = NULL; | |
156 | } | |
0e3db173 | 157 | } |
2744e8af LW |
158 | out: |
159 | if (status) | |
51cd24ee | 160 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
3cc70ed3 | 161 | pin, owner, status); |
2744e8af LW |
162 | |
163 | return status; | |
164 | } | |
165 | ||
166 | /** | |
167 | * pin_free() - release a single muxed in pin so something else can be muxed | |
168 | * @pctldev: pin controller device handling this pin | |
169 | * @pin: the pin to free | |
3712a3c4 SW |
170 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
171 | * single GPIO pin | |
336cdba0 | 172 | * |
3cc70ed3 SW |
173 | * This function returns a pointer to the previous owner. This is used |
174 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 175 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 176 | */ |
3712a3c4 SW |
177 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
178 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
179 | { |
180 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
181 | struct pin_desc *desc; | |
3cc70ed3 | 182 | const char *owner; |
2744e8af LW |
183 | |
184 | desc = pin_desc_get(pctldev, pin); | |
185 | if (desc == NULL) { | |
51cd24ee | 186 | dev_err(pctldev->dev, |
2744e8af | 187 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 188 | return NULL; |
2744e8af LW |
189 | } |
190 | ||
652162d4 SW |
191 | if (!gpio_range) { |
192 | desc->mux_usecount--; | |
193 | if (desc->mux_usecount) | |
194 | return NULL; | |
195 | } | |
0e3db173 | 196 | |
3712a3c4 SW |
197 | /* |
198 | * If there is no kind of request function for the pin we just assume | |
199 | * we got it by default and proceed. | |
200 | */ | |
201 | if (gpio_range && ops->gpio_disable_free) | |
202 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
203 | else if (ops->free) | |
2744e8af LW |
204 | ops->free(pctldev, pin); |
205 | ||
652162d4 SW |
206 | if (gpio_range) { |
207 | owner = desc->gpio_owner; | |
208 | desc->gpio_owner = NULL; | |
209 | } else { | |
210 | owner = desc->mux_owner; | |
211 | desc->mux_owner = NULL; | |
212 | desc->mux_setting = NULL; | |
213 | } | |
214 | ||
2744e8af | 215 | module_put(pctldev->owner); |
3712a3c4 | 216 | |
3cc70ed3 | 217 | return owner; |
2744e8af LW |
218 | } |
219 | ||
220 | /** | |
befe5bdf LW |
221 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
222 | * @pctldev: pin controller device affected | |
223 | * @pin: the pin to mux in for GPIO | |
224 | * @range: the applicable GPIO range | |
2744e8af | 225 | */ |
befe5bdf LW |
226 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
227 | struct pinctrl_gpio_range *range, | |
228 | unsigned pin, unsigned gpio) | |
2744e8af LW |
229 | { |
230 | char gpiostr[16]; | |
3cc70ed3 | 231 | const char *owner; |
2744e8af | 232 | int ret; |
2744e8af LW |
233 | |
234 | /* Conjure some name stating what chip and pin this is taken by */ | |
235 | snprintf(gpiostr, 15, "%s:%d", range->name, gpio); | |
236 | ||
3cc70ed3 SW |
237 | owner = kstrdup(gpiostr, GFP_KERNEL); |
238 | if (!owner) | |
5d2eaf80 SW |
239 | return -EINVAL; |
240 | ||
3cc70ed3 | 241 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 242 | if (ret < 0) |
3cc70ed3 | 243 | kfree(owner); |
5d2eaf80 SW |
244 | |
245 | return ret; | |
2744e8af | 246 | } |
2744e8af LW |
247 | |
248 | /** | |
befe5bdf LW |
249 | * pinmux_free_gpio() - release a pin from GPIO muxing |
250 | * @pctldev: the pin controller device for the pin | |
251 | * @pin: the affected currently GPIO-muxed in pin | |
252 | * @range: applicable GPIO range | |
2744e8af | 253 | */ |
befe5bdf LW |
254 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
255 | struct pinctrl_gpio_range *range) | |
2744e8af | 256 | { |
3cc70ed3 | 257 | const char *owner; |
2744e8af | 258 | |
3cc70ed3 SW |
259 | owner = pin_free(pctldev, pin, range); |
260 | kfree(owner); | |
2744e8af | 261 | } |
2744e8af | 262 | |
befe5bdf LW |
263 | /** |
264 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
265 | * @pctldev: the pin controller handling this pin | |
266 | * @range: applicable GPIO range | |
267 | * @pin: the affected GPIO pin in this controller | |
268 | * @input: true if we set the pin as input, false for output | |
269 | */ | |
270 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
271 | struct pinctrl_gpio_range *range, | |
272 | unsigned pin, bool input) | |
542e704f | 273 | { |
542e704f LW |
274 | const struct pinmux_ops *ops; |
275 | int ret; | |
542e704f LW |
276 | |
277 | ops = pctldev->desc->pmxops; | |
278 | ||
542e704f LW |
279 | if (ops->gpio_set_direction) |
280 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
281 | else | |
282 | ret = 0; | |
283 | ||
284 | return ret; | |
285 | } | |
286 | ||
7ecdb16f SW |
287 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
288 | const char *function) | |
2744e8af LW |
289 | { |
290 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 291 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
292 | unsigned selector = 0; |
293 | ||
294 | /* See if this pctldev has this function */ | |
d1e90e9e | 295 | while (selector < nfuncs) { |
2744e8af LW |
296 | const char *fname = ops->get_function_name(pctldev, |
297 | selector); | |
2744e8af | 298 | |
7ecdb16f SW |
299 | if (!strcmp(function, fname)) |
300 | return selector; | |
2744e8af | 301 | |
2744e8af LW |
302 | selector++; |
303 | } | |
304 | ||
305 | pr_err("%s does not support function %s\n", | |
7ecdb16f | 306 | pinctrl_dev_get_name(pctldev), function); |
2744e8af LW |
307 | return -EINVAL; |
308 | } | |
309 | ||
7ecdb16f SW |
310 | int pinmux_map_to_setting(struct pinctrl_map const *map, |
311 | struct pinctrl_setting *setting) | |
2744e8af | 312 | { |
7ecdb16f SW |
313 | struct pinctrl_dev *pctldev = setting->pctldev; |
314 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
315 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
316 | char const * const *groups; | |
317 | unsigned num_groups; | |
2744e8af | 318 | int ret; |
7ecdb16f SW |
319 | const char *group; |
320 | int i; | |
321 | const unsigned *pins; | |
322 | unsigned num_pins; | |
2744e8af | 323 | |
1e2082b5 SW |
324 | setting->data.mux.func = |
325 | pinmux_func_name_to_selector(pctldev, map->data.mux.function); | |
326 | if (setting->data.mux.func < 0) | |
327 | return setting->data.mux.func; | |
2744e8af | 328 | |
1e2082b5 | 329 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f SW |
330 | &groups, &num_groups); |
331 | if (ret < 0) | |
332 | return ret; | |
333 | if (!num_groups) | |
2744e8af | 334 | return -EINVAL; |
7ecdb16f | 335 | |
1e2082b5 | 336 | if (map->data.mux.group) { |
7ecdb16f | 337 | bool found = false; |
1e2082b5 | 338 | group = map->data.mux.group; |
7ecdb16f SW |
339 | for (i = 0; i < num_groups; i++) { |
340 | if (!strcmp(group, groups[i])) { | |
341 | found = true; | |
342 | break; | |
343 | } | |
344 | } | |
345 | if (!found) | |
346 | return -EINVAL; | |
347 | } else { | |
348 | group = groups[0]; | |
2744e8af | 349 | } |
2744e8af | 350 | |
1e2082b5 SW |
351 | setting->data.mux.group = pinctrl_get_group_selector(pctldev, group); |
352 | if (setting->data.mux.group < 0) | |
353 | return setting->data.mux.group; | |
2744e8af | 354 | |
1e2082b5 SW |
355 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins, |
356 | &num_pins); | |
2744e8af | 357 | if (ret) { |
7ecdb16f SW |
358 | dev_err(pctldev->dev, |
359 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 360 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f SW |
361 | return -ENODEV; |
362 | } | |
363 | ||
364 | /* Try to allocate all pins in this group, one by one */ | |
365 | for (i = 0; i < num_pins; i++) { | |
366 | ret = pin_request(pctldev, pins[i], map->dev_name, NULL); | |
367 | if (ret) { | |
368 | dev_err(pctldev->dev, | |
369 | "could not get request pin %d on device %s\n", | |
370 | pins[i], pinctrl_dev_get_name(pctldev)); | |
371 | /* On error release all taken pins */ | |
372 | i--; /* this pin just failed */ | |
373 | for (; i >= 0; i--) | |
374 | pin_free(pctldev, pins[i], NULL); | |
375 | return -ENODEV; | |
376 | } | |
2744e8af | 377 | } |
2744e8af LW |
378 | |
379 | return 0; | |
380 | } | |
381 | ||
7ecdb16f | 382 | void pinmux_free_setting(struct pinctrl_setting const *setting) |
2744e8af | 383 | { |
7ecdb16f SW |
384 | struct pinctrl_dev *pctldev = setting->pctldev; |
385 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
386 | const unsigned *pins; | |
387 | unsigned num_pins; | |
befe5bdf | 388 | int ret; |
7ecdb16f | 389 | int i; |
2744e8af | 390 | |
1e2082b5 | 391 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, |
7ecdb16f | 392 | &pins, &num_pins); |
befe5bdf | 393 | if (ret) { |
7ecdb16f SW |
394 | dev_err(pctldev->dev, |
395 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 396 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f | 397 | return; |
2744e8af LW |
398 | } |
399 | ||
7ecdb16f SW |
400 | for (i = 0; i < num_pins; i++) |
401 | pin_free(pctldev, pins[i], NULL); | |
2744e8af | 402 | } |
2744e8af | 403 | |
7ecdb16f | 404 | int pinmux_enable_setting(struct pinctrl_setting const *setting) |
2744e8af | 405 | { |
7ecdb16f | 406 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 407 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 408 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
409 | int ret; |
410 | const unsigned *pins; | |
411 | unsigned num_pins; | |
412 | int i; | |
413 | struct pin_desc *desc; | |
414 | ||
415 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
416 | &pins, &num_pins); | |
417 | if (ret) { | |
418 | /* errors only affect debug data, so just warn */ | |
419 | dev_warn(pctldev->dev, | |
420 | "could not get pins for group selector %d\n", | |
421 | setting->data.mux.group); | |
422 | num_pins = 0; | |
423 | } | |
424 | ||
425 | for (i = 0; i < num_pins; i++) { | |
426 | desc = pin_desc_get(pctldev, pins[i]); | |
427 | if (desc == NULL) { | |
428 | dev_warn(pctldev->dev, | |
429 | "could not get pin desc for pin %d\n", | |
430 | pins[i]); | |
431 | continue; | |
432 | } | |
433 | desc->mux_setting = &(setting->data.mux); | |
434 | } | |
2744e8af | 435 | |
1e2082b5 SW |
436 | return ops->enable(pctldev, setting->data.mux.func, |
437 | setting->data.mux.group); | |
2744e8af | 438 | } |
2744e8af | 439 | |
7ecdb16f | 440 | void pinmux_disable_setting(struct pinctrl_setting const *setting) |
2744e8af | 441 | { |
7ecdb16f | 442 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 443 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 444 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
445 | int ret; |
446 | const unsigned *pins; | |
447 | unsigned num_pins; | |
448 | int i; | |
449 | struct pin_desc *desc; | |
450 | ||
451 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
452 | &pins, &num_pins); | |
453 | if (ret) { | |
454 | /* errors only affect debug data, so just warn */ | |
455 | dev_warn(pctldev->dev, | |
456 | "could not get pins for group selector %d\n", | |
457 | setting->data.mux.group); | |
458 | num_pins = 0; | |
459 | } | |
460 | ||
461 | for (i = 0; i < num_pins; i++) { | |
462 | desc = pin_desc_get(pctldev, pins[i]); | |
463 | if (desc == NULL) { | |
464 | dev_warn(pctldev->dev, | |
465 | "could not get pin desc for pin %d\n", | |
466 | pins[i]); | |
467 | continue; | |
468 | } | |
469 | desc->mux_setting = NULL; | |
470 | } | |
2744e8af | 471 | |
1e2082b5 | 472 | ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group); |
2744e8af | 473 | } |
2744e8af | 474 | |
2744e8af LW |
475 | #ifdef CONFIG_DEBUG_FS |
476 | ||
477 | /* Called from pincontrol core */ | |
478 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
479 | { | |
480 | struct pinctrl_dev *pctldev = s->private; | |
481 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
d1e90e9e | 482 | unsigned nfuncs = pmxops->get_functions_count(pctldev); |
2744e8af LW |
483 | unsigned func_selector = 0; |
484 | ||
57b676f9 SW |
485 | mutex_lock(&pinctrl_mutex); |
486 | ||
d1e90e9e | 487 | while (func_selector < nfuncs) { |
2744e8af LW |
488 | const char *func = pmxops->get_function_name(pctldev, |
489 | func_selector); | |
490 | const char * const *groups; | |
491 | unsigned num_groups; | |
492 | int ret; | |
493 | int i; | |
494 | ||
495 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
496 | &groups, &num_groups); | |
497 | if (ret) | |
498 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
499 | func); | |
500 | ||
501 | seq_printf(s, "function: %s, groups = [ ", func); | |
502 | for (i = 0; i < num_groups; i++) | |
503 | seq_printf(s, "%s ", groups[i]); | |
504 | seq_puts(s, "]\n"); | |
505 | ||
506 | func_selector++; | |
2744e8af LW |
507 | } |
508 | ||
57b676f9 SW |
509 | mutex_unlock(&pinctrl_mutex); |
510 | ||
2744e8af LW |
511 | return 0; |
512 | } | |
513 | ||
514 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
515 | { | |
516 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
517 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
518 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 519 | unsigned i, pin; |
2744e8af LW |
520 | |
521 | seq_puts(s, "Pinmux settings per pin\n"); | |
652162d4 | 522 | seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n"); |
2744e8af | 523 | |
57b676f9 SW |
524 | mutex_lock(&pinctrl_mutex); |
525 | ||
706e8520 CP |
526 | /* The pin number can be retrived from the pin controller descriptor */ |
527 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 528 | struct pin_desc *desc; |
1cf94c45 | 529 | bool is_hog = false; |
2744e8af | 530 | |
706e8520 | 531 | pin = pctldev->desc->pins[i].number; |
2744e8af | 532 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 533 | /* Skip if we cannot search the pin */ |
2744e8af LW |
534 | if (desc == NULL) |
535 | continue; | |
536 | ||
652162d4 SW |
537 | if (desc->mux_owner && |
538 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
539 | is_hog = true; |
540 | ||
652162d4 | 541 | seq_printf(s, "pin %d (%s): %s %s%s", pin, |
2744e8af | 542 | desc->name ? desc->name : "unnamed", |
652162d4 SW |
543 | desc->mux_owner ? desc->mux_owner |
544 | : "(MUX UNCLAIMED)", | |
545 | desc->gpio_owner ? desc->gpio_owner | |
546 | : "(GPIO UNCLAIMED)", | |
1cf94c45 | 547 | is_hog ? " (HOG)" : ""); |
ba110d90 SW |
548 | |
549 | if (desc->mux_setting) | |
550 | seq_printf(s, " function %s group %s\n", | |
551 | pmxops->get_function_name(pctldev, | |
552 | desc->mux_setting->func), | |
553 | pctlops->get_group_name(pctldev, | |
554 | desc->mux_setting->group)); | |
555 | else | |
556 | seq_printf(s, "\n"); | |
2744e8af LW |
557 | } |
558 | ||
57b676f9 SW |
559 | mutex_unlock(&pinctrl_mutex); |
560 | ||
2744e8af LW |
561 | return 0; |
562 | } | |
563 | ||
1e2082b5 SW |
564 | void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map) |
565 | { | |
566 | seq_printf(s, "group %s\nfunction %s\n", | |
567 | map->data.mux.group ? map->data.mux.group : "(default)", | |
568 | map->data.mux.function); | |
569 | } | |
570 | ||
571 | void pinmux_show_setting(struct seq_file *s, | |
572 | struct pinctrl_setting const *setting) | |
2744e8af | 573 | { |
7ecdb16f SW |
574 | struct pinctrl_dev *pctldev = setting->pctldev; |
575 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
576 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
577 | ||
1e2082b5 SW |
578 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
579 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
580 | setting->data.mux.group, | |
581 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
582 | setting->data.mux.func); | |
2744e8af LW |
583 | } |
584 | ||
585 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
586 | { | |
587 | return single_open(file, pinmux_functions_show, inode->i_private); | |
588 | } | |
589 | ||
590 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
591 | { | |
592 | return single_open(file, pinmux_pins_show, inode->i_private); | |
593 | } | |
594 | ||
2744e8af LW |
595 | static const struct file_operations pinmux_functions_ops = { |
596 | .open = pinmux_functions_open, | |
597 | .read = seq_read, | |
598 | .llseek = seq_lseek, | |
599 | .release = single_release, | |
600 | }; | |
601 | ||
602 | static const struct file_operations pinmux_pins_ops = { | |
603 | .open = pinmux_pins_open, | |
604 | .read = seq_read, | |
605 | .llseek = seq_lseek, | |
606 | .release = single_release, | |
607 | }; | |
608 | ||
2744e8af LW |
609 | void pinmux_init_device_debugfs(struct dentry *devroot, |
610 | struct pinctrl_dev *pctldev) | |
611 | { | |
612 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
613 | devroot, pctldev, &pinmux_functions_ops); | |
614 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
615 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
616 | } |
617 | ||
618 | #endif /* CONFIG_DEBUG_FS */ |