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43b169db TA |
1 | /* |
2 | * Exynos specific definitions for Samsung pinctrl and gpiolib driver. | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * Copyright (c) 2012 Linaro Ltd | |
7 | * http://www.linaro.org | |
8 | * | |
9 | * This file contains the Exynos specific definitions for the Samsung | |
10 | * pinctrl/gpiolib interface drivers. | |
11 | * | |
12 | * Author: Thomas Abraham <thomas.ab@samsung.com> | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | */ | |
19 | ||
43b169db TA |
20 | /* External GPIO and wakeup interrupt related definitions */ |
21 | #define EXYNOS_GPIO_ECON_OFFSET 0x700 | |
7ccbc60c | 22 | #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800 |
43b169db TA |
23 | #define EXYNOS_GPIO_EMASK_OFFSET 0x900 |
24 | #define EXYNOS_GPIO_EPEND_OFFSET 0xA00 | |
25 | #define EXYNOS_WKUP_ECON_OFFSET 0xE00 | |
26 | #define EXYNOS_WKUP_EMASK_OFFSET 0xF00 | |
27 | #define EXYNOS_WKUP_EPEND_OFFSET 0xF40 | |
14c255d3 AK |
28 | #define EXYNOS7_WKUP_ECON_OFFSET 0x700 |
29 | #define EXYNOS7_WKUP_EMASK_OFFSET 0x900 | |
30 | #define EXYNOS7_WKUP_EPEND_OFFSET 0xA00 | |
43b169db | 31 | #define EXYNOS_SVC_OFFSET 0xB08 |
ee2f573c | 32 | #define EXYNOS_EINT_FUNC 0xF |
43b169db TA |
33 | |
34 | /* helpers to access interrupt service register */ | |
35 | #define EXYNOS_SVC_GROUP_SHIFT 3 | |
36 | #define EXYNOS_SVC_GROUP_MASK 0x1f | |
37 | #define EXYNOS_SVC_NUM_MASK 7 | |
38 | #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \ | |
39 | EXYNOS_SVC_GROUP_MASK) | |
40 | ||
41 | /* Exynos specific external interrupt trigger types */ | |
42 | #define EXYNOS_EINT_LEVEL_LOW 0 | |
43 | #define EXYNOS_EINT_LEVEL_HIGH 1 | |
44 | #define EXYNOS_EINT_EDGE_FALLING 2 | |
45 | #define EXYNOS_EINT_EDGE_RISING 3 | |
46 | #define EXYNOS_EINT_EDGE_BOTH 4 | |
47 | #define EXYNOS_EINT_CON_MASK 0xF | |
48 | #define EXYNOS_EINT_CON_LEN 4 | |
49 | ||
50 | #define EXYNOS_EINT_MAX_PER_BANK 8 | |
51 | #define EXYNOS_EINT_NR_WKUP_EINT | |
52 | ||
40ba6227 | 53 | #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ |
43b169db | 54 | { \ |
499147c9 | 55 | .type = &bank_type_off, \ |
43b169db | 56 | .pctl_offset = reg, \ |
40ba6227 | 57 | .nr_pins = pins, \ |
43b169db TA |
58 | .eint_type = EINT_TYPE_NONE, \ |
59 | .name = id \ | |
60 | } | |
61 | ||
1b6056d6 | 62 | #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ |
43b169db | 63 | { \ |
499147c9 | 64 | .type = &bank_type_off, \ |
43b169db | 65 | .pctl_offset = reg, \ |
40ba6227 | 66 | .nr_pins = pins, \ |
43b169db | 67 | .eint_type = EINT_TYPE_GPIO, \ |
1b6056d6 | 68 | .eint_offset = offs, \ |
43b169db TA |
69 | .name = id \ |
70 | } | |
71 | ||
a04b07c0 TF |
72 | #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ |
73 | { \ | |
499147c9 | 74 | .type = &bank_type_alive, \ |
a04b07c0 TF |
75 | .pctl_offset = reg, \ |
76 | .nr_pins = pins, \ | |
a04b07c0 TF |
77 | .eint_type = EINT_TYPE_WKUP, \ |
78 | .eint_offset = offs, \ | |
79 | .name = id \ | |
80 | } | |
81 | ||
43b169db TA |
82 | /** |
83 | * struct exynos_weint_data: irq specific data for all the wakeup interrupts | |
84 | * generated by the external wakeup interrupt controller. | |
43b169db | 85 | * @irq: interrupt number within the domain. |
a04b07c0 | 86 | * @bank: bank responsible for this interrupt |
43b169db TA |
87 | */ |
88 | struct exynos_weint_data { | |
a04b07c0 TF |
89 | unsigned int irq; |
90 | struct samsung_pin_bank *bank; | |
91 | }; | |
92 | ||
93 | /** | |
94 | * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts | |
95 | * generated by the external wakeup interrupt controller. | |
96 | * @nr_banks: count of banks being part of the mux | |
97 | * @banks: array of banks being part of the mux | |
98 | */ | |
99 | struct exynos_muxed_weint_data { | |
100 | unsigned int nr_banks; | |
101 | struct samsung_pin_bank *banks[]; | |
43b169db | 102 | }; |