Merge remote-tracking branches 'spi/fix/lock', 'spi/fix/maintainers', 'spi/fix/put...
[deliverable/linux.git] / drivers / pinctrl / samsung / pinctrl-samsung.c
CommitLineData
30574f0d
TA
1/*
2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This driver implements the Samsung pinctrl driver. It supports setting up of
17 * pinmux and pinconf configurations. The gpiolib interface is also included.
18 * External interrupt (gpio and wakeup) support are not included in this driver
19 * but provides extensions to which platform specific implementation of the gpio
20 * and wakeup interrupts can be hooked to.
21 */
22
23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/err.h>
28#include <linux/gpio.h>
a19fe2d4 29#include <linux/irqdomain.h>
19846950 30#include <linux/spinlock.h>
d9f99863 31#include <linux/syscore_ops.h>
30574f0d 32
ebe629a3 33#include "../core.h"
30574f0d
TA
34#include "pinctrl-samsung.h"
35
30574f0d 36/* list of all possible config options supported */
d5fd5da2 37static struct pin_config {
9a2c1c3b
TF
38 const char *property;
39 enum pincfg_type param;
40} cfg_params[] = {
30574f0d
TA
41 { "samsung,pin-pud", PINCFG_TYPE_PUD },
42 { "samsung,pin-drv", PINCFG_TYPE_DRV },
43 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
44 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
2700bc01 45 { "samsung,pin-val", PINCFG_TYPE_DAT },
30574f0d
TA
46};
47
d9f99863 48/* Global list of devices (struct samsung_pinctrl_drv_data) */
b9408975 49static LIST_HEAD(drvdata_list);
d9f99863 50
6fb6f1ba 51static unsigned int pin_base;
40ba6227 52
30574f0d
TA
53static int samsung_get_group_count(struct pinctrl_dev *pctldev)
54{
9a2c1c3b 55 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 56
9a2c1c3b 57 return pmx->nr_groups;
30574f0d
TA
58}
59
30574f0d 60static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
9a2c1c3b 61 unsigned group)
30574f0d 62{
9a2c1c3b 63 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 64
9a2c1c3b 65 return pmx->pin_groups[group].name;
30574f0d
TA
66}
67
30574f0d 68static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
9a2c1c3b
TF
69 unsigned group,
70 const unsigned **pins,
71 unsigned *num_pins)
30574f0d 72{
9a2c1c3b
TF
73 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
74
75 *pins = pmx->pin_groups[group].pins;
76 *num_pins = pmx->pin_groups[group].num_pins;
30574f0d 77
30574f0d
TA
78 return 0;
79}
80
9a2c1c3b
TF
81static int reserve_map(struct device *dev, struct pinctrl_map **map,
82 unsigned *reserved_maps, unsigned *num_maps,
83 unsigned reserve)
84{
85 unsigned old_num = *reserved_maps;
86 unsigned new_num = *num_maps + reserve;
87 struct pinctrl_map *new_map;
30574f0d 88
9a2c1c3b
TF
89 if (old_num >= new_num)
90 return 0;
30574f0d 91
9a2c1c3b
TF
92 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
93 if (!new_map) {
94 dev_err(dev, "krealloc(map) failed\n");
30574f0d
TA
95 return -ENOMEM;
96 }
30574f0d 97
9a2c1c3b
TF
98 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
99
100 *map = new_map;
101 *reserved_maps = new_num;
102
103 return 0;
104}
105
106static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
107 unsigned *num_maps, const char *group,
108 const char *function)
109{
110 if (WARN_ON(*num_maps == *reserved_maps))
111 return -ENOSPC;
112
113 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
114 (*map)[*num_maps].data.mux.group = group;
115 (*map)[*num_maps].data.mux.function = function;
116 (*num_maps)++;
117
118 return 0;
119}
120
121static int add_map_configs(struct device *dev, struct pinctrl_map **map,
122 unsigned *reserved_maps, unsigned *num_maps,
123 const char *group, unsigned long *configs,
124 unsigned num_configs)
125{
126 unsigned long *dup_configs;
127
128 if (WARN_ON(*num_maps == *reserved_maps))
129 return -ENOSPC;
130
131 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
132 GFP_KERNEL);
133 if (!dup_configs) {
134 dev_err(dev, "kmemdup(configs) failed\n");
135 return -ENOMEM;
30574f0d 136 }
30574f0d 137
9a2c1c3b
TF
138 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
139 (*map)[*num_maps].data.configs.group_or_pin = group;
140 (*map)[*num_maps].data.configs.configs = dup_configs;
141 (*map)[*num_maps].data.configs.num_configs = num_configs;
142 (*num_maps)++;
143
144 return 0;
145}
146
147static int add_config(struct device *dev, unsigned long **configs,
148 unsigned *num_configs, unsigned long config)
149{
150 unsigned old_num = *num_configs;
151 unsigned new_num = old_num + 1;
152 unsigned long *new_configs;
153
154 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
155 GFP_KERNEL);
156 if (!new_configs) {
157 dev_err(dev, "krealloc(configs) failed\n");
158 return -ENOMEM;
30574f0d
TA
159 }
160
9a2c1c3b
TF
161 new_configs[old_num] = config;
162
163 *configs = new_configs;
164 *num_configs = new_num;
165
166 return 0;
167}
168
169static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
170 struct pinctrl_map *map,
171 unsigned num_maps)
172{
173 int i;
174
175 for (i = 0; i < num_maps; i++)
176 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
177 kfree(map[i].data.configs.configs);
178
179 kfree(map);
180}
181
182static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
183 struct device *dev,
184 struct device_node *np,
185 struct pinctrl_map **map,
186 unsigned *reserved_maps,
187 unsigned *num_maps)
188{
189 int ret, i;
190 u32 val;
191 unsigned long config;
192 unsigned long *configs = NULL;
193 unsigned num_configs = 0;
194 unsigned reserve;
195 struct property *prop;
196 const char *group;
197 bool has_func = false;
198
199 ret = of_property_read_u32(np, "samsung,pin-function", &val);
200 if (!ret)
201 has_func = true;
202
203 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
204 ret = of_property_read_u32(np, cfg_params[i].property, &val);
205 if (!ret) {
206 config = PINCFG_PACK(cfg_params[i].param, val);
207 ret = add_config(dev, &configs, &num_configs, config);
208 if (ret < 0)
209 goto exit;
210 /* EINVAL=missing, which is fine since it's optional */
211 } else if (ret != -EINVAL) {
212 dev_err(dev, "could not parse property %s\n",
213 cfg_params[i].property);
214 }
30574f0d
TA
215 }
216
9a2c1c3b
TF
217 reserve = 0;
218 if (has_func)
219 reserve++;
220 if (num_configs)
221 reserve++;
222 ret = of_property_count_strings(np, "samsung,pins");
223 if (ret < 0) {
224 dev_err(dev, "could not parse property samsung,pins\n");
225 goto exit;
226 }
227 reserve *= ret;
228
229 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
230 if (ret < 0)
231 goto exit;
232
233 of_property_for_each_string(np, "samsung,pins", prop, group) {
234 if (has_func) {
235 ret = add_map_mux(map, reserved_maps,
236 num_maps, group, np->full_name);
237 if (ret < 0)
238 goto exit;
30574f0d 239 }
30574f0d 240
9a2c1c3b
TF
241 if (num_configs) {
242 ret = add_map_configs(dev, map, reserved_maps,
243 num_maps, group, configs,
244 num_configs);
245 if (ret < 0)
246 goto exit;
247 }
30574f0d
TA
248 }
249
9a2c1c3b 250 ret = 0;
30574f0d 251
9a2c1c3b
TF
252exit:
253 kfree(configs);
254 return ret;
30574f0d
TA
255}
256
9a2c1c3b
TF
257static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
258 struct device_node *np_config,
259 struct pinctrl_map **map,
260 unsigned *num_maps)
261{
262 struct samsung_pinctrl_drv_data *drvdata;
263 unsigned reserved_maps;
264 struct device_node *np;
265 int ret;
266
267 drvdata = pinctrl_dev_get_drvdata(pctldev);
268
269 reserved_maps = 0;
270 *map = NULL;
271 *num_maps = 0;
272
273 if (!of_get_child_count(np_config))
274 return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
275 np_config, map,
276 &reserved_maps,
277 num_maps);
278
279 for_each_child_of_node(np_config, np) {
280 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
281 &reserved_maps, num_maps);
282 if (ret < 0) {
283 samsung_dt_free_map(pctldev, *map, *num_maps);
284 return ret;
30574f0d 285 }
9a2c1c3b 286 }
30574f0d 287
9a2c1c3b 288 return 0;
30574f0d
TA
289}
290
291/* list of pinctrl callbacks for the pinctrl core */
022ab148 292static const struct pinctrl_ops samsung_pctrl_ops = {
30574f0d
TA
293 .get_groups_count = samsung_get_group_count,
294 .get_group_name = samsung_get_group_name,
295 .get_group_pins = samsung_get_group_pins,
296 .dt_node_to_map = samsung_dt_node_to_map,
297 .dt_free_map = samsung_dt_free_map,
298};
299
300/* check if the selector is a valid pin function selector */
301static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
302{
303 struct samsung_pinctrl_drv_data *drvdata;
304
305 drvdata = pinctrl_dev_get_drvdata(pctldev);
306 return drvdata->nr_functions;
307}
308
309/* return the name of the pin function specified */
310static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
311 unsigned selector)
312{
313 struct samsung_pinctrl_drv_data *drvdata;
314
315 drvdata = pinctrl_dev_get_drvdata(pctldev);
316 return drvdata->pmx_functions[selector].name;
317}
318
319/* return the groups associated for the specified function selector */
320static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
321 unsigned selector, const char * const **groups,
322 unsigned * const num_groups)
323{
324 struct samsung_pinctrl_drv_data *drvdata;
325
326 drvdata = pinctrl_dev_get_drvdata(pctldev);
327 *groups = drvdata->pmx_functions[selector].groups;
328 *num_groups = drvdata->pmx_functions[selector].num_groups;
329 return 0;
330}
331
332/*
333 * given a pin number that is local to a pin controller, find out the pin bank
334 * and the register base of the pin bank.
335 */
62f14c0e
TF
336static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
337 unsigned pin, void __iomem **reg, u32 *offset,
30574f0d
TA
338 struct samsung_pin_bank **bank)
339{
30574f0d
TA
340 struct samsung_pin_bank *b;
341
1bf00d7a 342 b = drvdata->pin_banks;
30574f0d
TA
343
344 while ((pin >= b->pin_base) &&
345 ((b->pin_base + b->nr_pins - 1) < pin))
346 b++;
347
348 *reg = drvdata->virt_base + b->pctl_offset;
349 *offset = pin - b->pin_base;
350 if (bank)
351 *bank = b;
30574f0d
TA
352}
353
354/* enable or disable a pinmux function */
355static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
356 unsigned group, bool enable)
357{
358 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 359 const struct samsung_pin_bank_type *type;
30574f0d
TA
360 struct samsung_pin_bank *bank;
361 void __iomem *reg;
9a2c1c3b 362 u32 mask, shift, data, pin_offset;
19846950 363 unsigned long flags;
9a2c1c3b
TF
364 const struct samsung_pmx_func *func;
365 const struct samsung_pin_group *grp;
30574f0d
TA
366
367 drvdata = pinctrl_dev_get_drvdata(pctldev);
9a2c1c3b
TF
368 func = &drvdata->pmx_functions[selector];
369 grp = &drvdata->pin_groups[group];
30574f0d 370
1bf00d7a 371 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
9a2c1c3b
TF
372 &reg, &pin_offset, &bank);
373 type = bank->type;
374 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
375 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
376 if (shift >= 32) {
377 /* Some banks have two config registers */
378 shift -= 32;
379 reg += 4;
380 }
30574f0d 381
9a2c1c3b 382 spin_lock_irqsave(&bank->slock, flags);
19846950 383
9a2c1c3b
TF
384 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
385 data &= ~(mask << shift);
386 if (enable)
387 data |= func->val << shift;
388 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
19846950 389
9a2c1c3b 390 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA
391}
392
393/* enable a specified pinmux by writing to registers */
03e9f0ca
LW
394static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
395 unsigned selector,
396 unsigned group)
30574f0d
TA
397{
398 samsung_pinmux_setup(pctldev, selector, group, true);
399 return 0;
400}
401
30574f0d 402/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
022ab148 403static const struct pinmux_ops samsung_pinmux_ops = {
30574f0d
TA
404 .get_functions_count = samsung_get_functions_count,
405 .get_function_name = samsung_pinmux_get_fname,
406 .get_function_groups = samsung_pinmux_get_groups,
03e9f0ca 407 .set_mux = samsung_pinmux_set_mux,
30574f0d
TA
408};
409
410/* set or get the pin config settings for a specified pin */
411static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
412 unsigned long *config, bool set)
413{
414 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 415 const struct samsung_pin_bank_type *type;
30574f0d
TA
416 struct samsung_pin_bank *bank;
417 void __iomem *reg_base;
418 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
419 u32 data, width, pin_offset, mask, shift;
420 u32 cfg_value, cfg_reg;
19846950 421 unsigned long flags;
30574f0d
TA
422
423 drvdata = pinctrl_dev_get_drvdata(pctldev);
1bf00d7a 424 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
30574f0d 425 &pin_offset, &bank);
499147c9 426 type = bank->type;
30574f0d 427
499147c9 428 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
7c367d3d
TF
429 return -EINVAL;
430
499147c9 431 width = type->fld_width[cfg_type];
43fc9e7f 432 cfg_reg = type->reg_offset[cfg_type];
499147c9 433
19846950
TF
434 spin_lock_irqsave(&bank->slock, flags);
435
30574f0d
TA
436 mask = (1 << width) - 1;
437 shift = pin_offset * width;
438 data = readl(reg_base + cfg_reg);
439
440 if (set) {
441 cfg_value = PINCFG_UNPACK_VALUE(*config);
442 data &= ~(mask << shift);
443 data |= (cfg_value << shift);
444 writel(data, reg_base + cfg_reg);
445 } else {
446 data >>= shift;
447 data &= mask;
448 *config = PINCFG_PACK(cfg_type, data);
449 }
19846950
TF
450
451 spin_unlock_irqrestore(&bank->slock, flags);
452
30574f0d
TA
453 return 0;
454}
455
456/* set the pin config settings for a specified pin */
457static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
03b054e9 458 unsigned long *configs, unsigned num_configs)
30574f0d 459{
03b054e9
SY
460 int i, ret;
461
462 for (i = 0; i < num_configs; i++) {
463 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
464 if (ret < 0)
465 return ret;
466 } /* for each config */
467
468 return 0;
30574f0d
TA
469}
470
471/* get the pin config settings for a specified pin */
472static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
473 unsigned long *config)
474{
475 return samsung_pinconf_rw(pctldev, pin, config, false);
476}
477
478/* set the pin config settings for a specified pin group */
479static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
03b054e9
SY
480 unsigned group, unsigned long *configs,
481 unsigned num_configs)
30574f0d
TA
482{
483 struct samsung_pinctrl_drv_data *drvdata;
484 const unsigned int *pins;
485 unsigned int cnt;
486
487 drvdata = pinctrl_dev_get_drvdata(pctldev);
488 pins = drvdata->pin_groups[group].pins;
489
490 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
03b054e9 491 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
30574f0d
TA
492
493 return 0;
494}
495
496/* get the pin config settings for a specified pin group */
497static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
498 unsigned int group, unsigned long *config)
499{
500 struct samsung_pinctrl_drv_data *drvdata;
501 const unsigned int *pins;
502
503 drvdata = pinctrl_dev_get_drvdata(pctldev);
504 pins = drvdata->pin_groups[group].pins;
505 samsung_pinconf_get(pctldev, pins[0], config);
506 return 0;
507}
508
509/* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
022ab148 510static const struct pinconf_ops samsung_pinconf_ops = {
30574f0d
TA
511 .pin_config_get = samsung_pinconf_get,
512 .pin_config_set = samsung_pinconf_set,
513 .pin_config_group_get = samsung_pinconf_group_get,
514 .pin_config_group_set = samsung_pinconf_group_set,
515};
516
d9ff0eb9
YN
517/*
518 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held
519 * to avoid race condition.
520 */
521static void samsung_gpio_set_value(struct gpio_chip *gc,
522 unsigned offset, int value)
30574f0d 523{
9f57f81c 524 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
94ce944b 525 const struct samsung_pin_bank_type *type = bank->type;
30574f0d 526 void __iomem *reg;
d3a7b9e3 527 u32 data;
30574f0d 528
d3a7b9e3 529 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 530
43fc9e7f 531 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 532 data &= ~(1 << offset);
30574f0d 533 if (value)
d3a7b9e3 534 data |= 1 << offset;
43fc9e7f 535 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
d9ff0eb9
YN
536}
537
538/* gpiolib gpio_set callback function */
539static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
540{
541 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
542 unsigned long flags;
19846950 543
d9ff0eb9
YN
544 spin_lock_irqsave(&bank->slock, flags);
545 samsung_gpio_set_value(gc, offset, value);
19846950 546 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA
547}
548
549/* gpiolib gpio_get callback function */
550static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
551{
552 void __iomem *reg;
d3a7b9e3 553 u32 data;
9f57f81c 554 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
94ce944b 555 const struct samsung_pin_bank_type *type = bank->type;
62f14c0e 556
d3a7b9e3 557 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 558
43fc9e7f 559 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 560 data >>= offset;
30574f0d
TA
561 data &= 1;
562 return data;
563}
564
565/*
d9ff0eb9
YN
566 * The samsung_gpio_set_direction() should be called with "bank->slock" held
567 * to avoid race condition.
18c28caa
TF
568 * The calls to gpio_direction_output() and gpio_direction_input()
569 * leads to this function call.
30574f0d 570 */
18c28caa
TF
571static int samsung_gpio_set_direction(struct gpio_chip *gc,
572 unsigned offset, bool input)
573{
94ce944b 574 const struct samsung_pin_bank_type *type;
18c28caa
TF
575 struct samsung_pin_bank *bank;
576 struct samsung_pinctrl_drv_data *drvdata;
577 void __iomem *reg;
578 u32 data, mask, shift;
18c28caa 579
9f57f81c 580 bank = gpiochip_get_data(gc);
18c28caa
TF
581 type = bank->type;
582 drvdata = bank->drvdata;
583
584 reg = drvdata->virt_base + bank->pctl_offset +
585 type->reg_offset[PINCFG_TYPE_FUNC];
586
587 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
588 shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
589 if (shift >= 32) {
590 /* Some banks have two config registers */
591 shift -= 32;
592 reg += 4;
593 }
594
18c28caa
TF
595 data = readl(reg);
596 data &= ~(mask << shift);
597 if (!input)
598 data |= FUNC_OUTPUT << shift;
599 writel(data, reg);
600
18c28caa
TF
601 return 0;
602}
603
604/* gpiolib gpio_direction_input callback function. */
30574f0d
TA
605static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
606{
d9ff0eb9
YN
607 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
608 unsigned long flags;
609 int ret;
610
611 spin_lock_irqsave(&bank->slock, flags);
612 ret = samsung_gpio_set_direction(gc, offset, true);
613 spin_unlock_irqrestore(&bank->slock, flags);
614 return ret;
30574f0d
TA
615}
616
18c28caa 617/* gpiolib gpio_direction_output callback function. */
30574f0d
TA
618static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
619 int value)
620{
d9ff0eb9
YN
621 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
622 unsigned long flags;
623 int ret;
624
625 spin_lock_irqsave(&bank->slock, flags);
626 samsung_gpio_set_value(gc, offset, value);
627 ret = samsung_gpio_set_direction(gc, offset, false);
628 spin_unlock_irqrestore(&bank->slock, flags);
629
630 return ret;
30574f0d
TA
631}
632
a19fe2d4
TF
633/*
634 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
635 * and a virtual IRQ, if not already present.
636 */
637static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
638{
9f57f81c 639 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
a19fe2d4
TF
640 unsigned int virq;
641
642 if (!bank->irq_domain)
643 return -ENXIO;
644
645 virq = irq_create_mapping(bank->irq_domain, offset);
646
647 return (virq) ? : -ENXIO;
648}
649
9a2c1c3b
TF
650static struct samsung_pin_group *samsung_pinctrl_create_groups(
651 struct device *dev,
652 struct samsung_pinctrl_drv_data *drvdata,
653 unsigned int *cnt)
30574f0d 654{
9a2c1c3b
TF
655 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
656 struct samsung_pin_group *groups, *grp;
657 const struct pinctrl_pin_desc *pdesc;
658 int i;
659
660 groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups),
661 GFP_KERNEL);
662 if (!groups)
663 return ERR_PTR(-EINVAL);
664 grp = groups;
665
666 pdesc = ctrldesc->pins;
667 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
668 grp->name = pdesc->name;
669 grp->pins = &pdesc->number;
670 grp->num_pins = 1;
671 }
672
673 *cnt = ctrldesc->npins;
674 return groups;
675}
30574f0d 676
9a2c1c3b
TF
677static int samsung_pinctrl_create_function(struct device *dev,
678 struct samsung_pinctrl_drv_data *drvdata,
679 struct device_node *func_np,
680 struct samsung_pmx_func *func)
681{
682 int npins;
683 int ret;
684 int i;
685
686 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
687 return 0;
688
689 npins = of_property_count_strings(func_np, "samsung,pins");
690 if (npins < 1) {
691 dev_err(dev, "invalid pin list in %s node", func_np->name);
30574f0d
TA
692 return -EINVAL;
693 }
694
9a2c1c3b
TF
695 func->name = func_np->full_name;
696
697 func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL);
698 if (!func->groups)
30574f0d 699 return -ENOMEM;
30574f0d 700
9a2c1c3b
TF
701 for (i = 0; i < npins; ++i) {
702 const char *gname;
703
704 ret = of_property_read_string_index(func_np, "samsung,pins",
705 i, &gname);
706 if (ret) {
707 dev_err(dev,
708 "failed to read pin name %d from %s node\n",
709 i, func_np->name);
710 return ret;
30574f0d 711 }
9a2c1c3b
TF
712
713 func->groups[i] = gname;
30574f0d
TA
714 }
715
9a2c1c3b
TF
716 func->num_groups = npins;
717 return 1;
30574f0d
TA
718}
719
9a2c1c3b
TF
720static struct samsung_pmx_func *samsung_pinctrl_create_functions(
721 struct device *dev,
722 struct samsung_pinctrl_drv_data *drvdata,
723 unsigned int *cnt)
30574f0d 724{
9a2c1c3b 725 struct samsung_pmx_func *functions, *func;
30574f0d
TA
726 struct device_node *dev_np = dev->of_node;
727 struct device_node *cfg_np;
9a2c1c3b 728 unsigned int func_cnt = 0;
30574f0d
TA
729 int ret;
730
9a2c1c3b
TF
731 /*
732 * Iterate over all the child nodes of the pin controller node
733 * and create pin groups and pin function lists.
734 */
735 for_each_child_of_node(dev_np, cfg_np) {
736 struct device_node *func_np;
30574f0d 737
9a2c1c3b
TF
738 if (!of_get_child_count(cfg_np)) {
739 if (!of_find_property(cfg_np,
740 "samsung,pin-function", NULL))
741 continue;
742 ++func_cnt;
743 continue;
744 }
745
746 for_each_child_of_node(cfg_np, func_np) {
747 if (!of_find_property(func_np,
748 "samsung,pin-function", NULL))
749 continue;
750 ++func_cnt;
751 }
30574f0d 752 }
30574f0d 753
9a2c1c3b
TF
754 functions = devm_kzalloc(dev, func_cnt * sizeof(*functions),
755 GFP_KERNEL);
30574f0d
TA
756 if (!functions) {
757 dev_err(dev, "failed to allocate memory for function list\n");
9a2c1c3b 758 return ERR_PTR(-EINVAL);
30574f0d
TA
759 }
760 func = functions;
761
762 /*
763 * Iterate over all the child nodes of the pin controller node
764 * and create pin groups and pin function lists.
765 */
9a2c1c3b 766 func_cnt = 0;
30574f0d 767 for_each_child_of_node(dev_np, cfg_np) {
9a2c1c3b
TF
768 struct device_node *func_np;
769
770 if (!of_get_child_count(cfg_np)) {
771 ret = samsung_pinctrl_create_function(dev, drvdata,
772 cfg_np, func);
773 if (ret < 0)
774 return ERR_PTR(ret);
775 if (ret > 0) {
776 ++func;
777 ++func_cnt;
778 }
30574f0d 779 continue;
9a2c1c3b 780 }
30574f0d 781
9a2c1c3b
TF
782 for_each_child_of_node(cfg_np, func_np) {
783 ret = samsung_pinctrl_create_function(dev, drvdata,
784 func_np, func);
785 if (ret < 0)
786 return ERR_PTR(ret);
787 if (ret > 0) {
788 ++func;
789 ++func_cnt;
790 }
30574f0d 791 }
9a2c1c3b 792 }
30574f0d 793
9a2c1c3b
TF
794 *cnt = func_cnt;
795 return functions;
796}
30574f0d 797
9a2c1c3b
TF
798/*
799 * Parse the information about all the available pin groups and pin functions
800 * from device node of the pin-controller. A pin group is formed with all
801 * the pins listed in the "samsung,pins" property.
802 */
30574f0d 803
9a2c1c3b
TF
804static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
805 struct samsung_pinctrl_drv_data *drvdata)
806{
807 struct device *dev = &pdev->dev;
808 struct samsung_pin_group *groups;
809 struct samsung_pmx_func *functions;
810 unsigned int grp_cnt = 0, func_cnt = 0;
811
812 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
813 if (IS_ERR(groups)) {
814 dev_err(dev, "failed to parse pin groups\n");
815 return PTR_ERR(groups);
816 }
817
818 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
819 if (IS_ERR(functions)) {
820 dev_err(dev, "failed to parse pin functions\n");
44a074ff 821 return PTR_ERR(functions);
30574f0d
TA
822 }
823
824 drvdata->pin_groups = groups;
825 drvdata->nr_groups = grp_cnt;
826 drvdata->pmx_functions = functions;
9a2c1c3b 827 drvdata->nr_functions = func_cnt;
30574f0d
TA
828
829 return 0;
830}
831
832/* register the pinctrl interface with the pinctrl subsystem */
150632b0
GKH
833static int samsung_pinctrl_register(struct platform_device *pdev,
834 struct samsung_pinctrl_drv_data *drvdata)
30574f0d
TA
835{
836 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
837 struct pinctrl_pin_desc *pindesc, *pdesc;
838 struct samsung_pin_bank *pin_bank;
839 char *pin_names;
840 int pin, bank, ret;
841
842 ctrldesc->name = "samsung-pinctrl";
843 ctrldesc->owner = THIS_MODULE;
844 ctrldesc->pctlops = &samsung_pctrl_ops;
845 ctrldesc->pmxops = &samsung_pinmux_ops;
846 ctrldesc->confops = &samsung_pinconf_ops;
847
848 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
1bf00d7a 849 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA
850 if (!pindesc) {
851 dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
852 return -ENOMEM;
853 }
854 ctrldesc->pins = pindesc;
1bf00d7a 855 ctrldesc->npins = drvdata->nr_pins;
30574f0d
TA
856
857 /* dynamically populate the pin number and pin name for pindesc */
858 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
1bf00d7a 859 pdesc->number = pin + drvdata->pin_base;
30574f0d
TA
860
861 /*
862 * allocate space for storing the dynamically generated names for all
863 * the pins which belong to this pin-controller.
864 */
865 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
1bf00d7a 866 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA
867 if (!pin_names) {
868 dev_err(&pdev->dev, "mem alloc for pin names failed\n");
869 return -ENOMEM;
870 }
871
872 /* for each pin, the name of the pin is pin-bank name + pin number */
1bf00d7a
TF
873 for (bank = 0; bank < drvdata->nr_banks; bank++) {
874 pin_bank = &drvdata->pin_banks[bank];
30574f0d
TA
875 for (pin = 0; pin < pin_bank->nr_pins; pin++) {
876 sprintf(pin_names, "%s-%d", pin_bank->name, pin);
877 pdesc = pindesc + pin_bank->pin_base + pin;
878 pdesc->name = pin_names;
879 pin_names += PIN_NAME_LENGTH;
880 }
881 }
882
529301c1
TF
883 ret = samsung_pinctrl_parse_dt(pdev, drvdata);
884 if (ret)
885 return ret;
886
9ed19e06
LD
887 drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc,
888 drvdata);
323de9ef 889 if (IS_ERR(drvdata->pctl_dev)) {
30574f0d 890 dev_err(&pdev->dev, "could not register pinctrl driver\n");
323de9ef 891 return PTR_ERR(drvdata->pctl_dev);
30574f0d
TA
892 }
893
1bf00d7a
TF
894 for (bank = 0; bank < drvdata->nr_banks; ++bank) {
895 pin_bank = &drvdata->pin_banks[bank];
d3a7b9e3
TF
896 pin_bank->grange.name = pin_bank->name;
897 pin_bank->grange.id = bank;
1bf00d7a 898 pin_bank->grange.pin_base = drvdata->pin_base
6c6ce620 899 + pin_bank->pin_base;
d3a7b9e3
TF
900 pin_bank->grange.base = pin_bank->gpio_chip.base;
901 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
902 pin_bank->grange.gc = &pin_bank->gpio_chip;
903 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
904 }
30574f0d 905
30574f0d
TA
906 return 0;
907}
908
d3a7b9e3 909static const struct gpio_chip samsung_gpiolib_chip = {
98c85d58
JG
910 .request = gpiochip_generic_request,
911 .free = gpiochip_generic_free,
d3a7b9e3
TF
912 .set = samsung_gpio_set,
913 .get = samsung_gpio_get,
914 .direction_input = samsung_gpio_direction_input,
915 .direction_output = samsung_gpio_direction_output,
a19fe2d4 916 .to_irq = samsung_gpio_to_irq,
d3a7b9e3
TF
917 .owner = THIS_MODULE,
918};
919
30574f0d 920/* register the gpiolib interface with the gpiolib subsystem */
150632b0
GKH
921static int samsung_gpiolib_register(struct platform_device *pdev,
922 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 923{
1bf00d7a 924 struct samsung_pin_bank *bank = drvdata->pin_banks;
30574f0d
TA
925 struct gpio_chip *gc;
926 int ret;
d3a7b9e3
TF
927 int i;
928
1bf00d7a 929 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
d3a7b9e3
TF
930 bank->gpio_chip = samsung_gpiolib_chip;
931
932 gc = &bank->gpio_chip;
1bf00d7a 933 gc->base = drvdata->pin_base + bank->pin_base;
d3a7b9e3 934 gc->ngpio = bank->nr_pins;
58383c78 935 gc->parent = &pdev->dev;
d3a7b9e3
TF
936 gc->of_node = bank->of_node;
937 gc->label = bank->name;
938
9f57f81c 939 ret = gpiochip_add_data(gc, bank);
d3a7b9e3
TF
940 if (ret) {
941 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
942 gc->label, ret);
943 goto fail;
944 }
30574f0d
TA
945 }
946
947 return 0;
d3a7b9e3
TF
948
949fail:
950 for (--i, --bank; i >= 0; --i, --bank)
2fcea6ce 951 gpiochip_remove(&bank->gpio_chip);
d3a7b9e3 952 return ret;
30574f0d
TA
953}
954
955/* unregister the gpiolib interface with the gpiolib subsystem */
150632b0
GKH
956static int samsung_gpiolib_unregister(struct platform_device *pdev,
957 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 958{
1bf00d7a 959 struct samsung_pin_bank *bank = drvdata->pin_banks;
d3a7b9e3
TF
960 int i;
961
1bf00d7a 962 for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
2fcea6ce 963 gpiochip_remove(&bank->gpio_chip);
1bf00d7a 964
2fcea6ce 965 return 0;
30574f0d
TA
966}
967
968static const struct of_device_id samsung_pinctrl_dt_match[];
969
970/* retrieve the soc specific data */
1bf00d7a
TF
971static const struct samsung_pin_ctrl *
972samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
973 struct platform_device *pdev)
30574f0d
TA
974{
975 int id;
976 const struct of_device_id *match;
6defe9a0 977 struct device_node *node = pdev->dev.of_node;
ab663789 978 struct device_node *np;
8100cf47 979 const struct samsung_pin_bank_data *bdata;
1bf00d7a 980 const struct samsung_pin_ctrl *ctrl;
40ba6227
TF
981 struct samsung_pin_bank *bank;
982 int i;
30574f0d 983
6defe9a0 984 id = of_alias_get_id(node, "pinctrl");
30574f0d
TA
985 if (id < 0) {
986 dev_err(&pdev->dev, "failed to get alias id\n");
87993273 987 return ERR_PTR(-ENOENT);
30574f0d
TA
988 }
989 match = of_match_node(samsung_pinctrl_dt_match, node);
40ba6227
TF
990 ctrl = (struct samsung_pin_ctrl *)match->data + id;
991
1bf00d7a
TF
992 d->suspend = ctrl->suspend;
993 d->resume = ctrl->resume;
1bf00d7a 994 d->nr_banks = ctrl->nr_banks;
8100cf47
TF
995 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
996 sizeof(*d->pin_banks), GFP_KERNEL);
997 if (!d->pin_banks)
998 return ERR_PTR(-ENOMEM);
1bf00d7a
TF
999
1000 bank = d->pin_banks;
8100cf47
TF
1001 bdata = ctrl->pin_banks;
1002 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
1003 bank->type = bdata->type;
1004 bank->pctl_offset = bdata->pctl_offset;
1005 bank->nr_pins = bdata->nr_pins;
1006 bank->eint_func = bdata->eint_func;
1007 bank->eint_type = bdata->eint_type;
1008 bank->eint_mask = bdata->eint_mask;
1009 bank->eint_offset = bdata->eint_offset;
1010 bank->name = bdata->name;
1011
19846950 1012 spin_lock_init(&bank->slock);
6defe9a0 1013 bank->drvdata = d;
1bf00d7a
TF
1014 bank->pin_base = d->nr_pins;
1015 d->nr_pins += bank->nr_pins;
40ba6227
TF
1016 }
1017
ab663789
TF
1018 for_each_child_of_node(node, np) {
1019 if (!of_find_property(np, "gpio-controller", NULL))
1020 continue;
1bf00d7a
TF
1021 bank = d->pin_banks;
1022 for (i = 0; i < d->nr_banks; ++i, ++bank) {
ab663789
TF
1023 if (!strcmp(bank->name, np->name)) {
1024 bank->of_node = np;
1025 break;
1026 }
1027 }
1028 }
1029
1bf00d7a
TF
1030 d->pin_base = pin_base;
1031 pin_base += d->nr_pins;
40ba6227
TF
1032
1033 return ctrl;
30574f0d
TA
1034}
1035
150632b0 1036static int samsung_pinctrl_probe(struct platform_device *pdev)
30574f0d
TA
1037{
1038 struct samsung_pinctrl_drv_data *drvdata;
1bf00d7a 1039 const struct samsung_pin_ctrl *ctrl;
30574f0d 1040 struct device *dev = &pdev->dev;
30574f0d
TA
1041 struct resource *res;
1042 int ret;
1043
1044 if (!dev->of_node) {
1045 dev_err(dev, "device tree node not found\n");
1046 return -ENODEV;
1047 }
1048
30574f0d
TA
1049 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
1050 if (!drvdata) {
1051 dev_err(dev, "failed to allocate memory for driver's "
1052 "private data\n");
1053 return -ENOMEM;
1054 }
6defe9a0
TF
1055
1056 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
87993273 1057 if (IS_ERR(ctrl)) {
6defe9a0 1058 dev_err(&pdev->dev, "driver data not available\n");
87993273 1059 return PTR_ERR(ctrl);
6defe9a0 1060 }
30574f0d
TA
1061 drvdata->dev = dev;
1062
1063 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
9e0c1fb2
TR
1064 drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
1065 if (IS_ERR(drvdata->virt_base))
1066 return PTR_ERR(drvdata->virt_base);
30574f0d
TA
1067
1068 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1069 if (res)
1070 drvdata->irq = res->start;
1071
1072 ret = samsung_gpiolib_register(pdev, drvdata);
1073 if (ret)
1074 return ret;
1075
1076 ret = samsung_pinctrl_register(pdev, drvdata);
1077 if (ret) {
1078 samsung_gpiolib_unregister(pdev, drvdata);
1079 return ret;
1080 }
1081
1082 if (ctrl->eint_gpio_init)
1083 ctrl->eint_gpio_init(drvdata);
1084 if (ctrl->eint_wkup_init)
1085 ctrl->eint_wkup_init(drvdata);
1086
1087 platform_set_drvdata(pdev, drvdata);
d9f99863
DA
1088
1089 /* Add to the global list */
1090 list_add_tail(&drvdata->node, &drvdata_list);
1091
30574f0d
TA
1092 return 0;
1093}
1094
d9f99863
DA
1095#ifdef CONFIG_PM
1096
1097/**
1098 * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
1099 *
1100 * Save data for all banks handled by this device.
1101 */
1102static void samsung_pinctrl_suspend_dev(
1103 struct samsung_pinctrl_drv_data *drvdata)
1104{
d9f99863
DA
1105 void __iomem *virt_base = drvdata->virt_base;
1106 int i;
1107
1bf00d7a
TF
1108 for (i = 0; i < drvdata->nr_banks; i++) {
1109 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1110 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF
1111 const u8 *offs = bank->type->reg_offset;
1112 const u8 *widths = bank->type->fld_width;
d9f99863
DA
1113 enum pincfg_type type;
1114
1115 /* Registers without a powerdown config aren't lost */
1116 if (!widths[PINCFG_TYPE_CON_PDN])
1117 continue;
1118
1119 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1120 if (widths[type])
1121 bank->pm_save[type] = readl(reg + offs[type]);
1122
1123 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1124 /* Some banks have two config registers */
1125 bank->pm_save[PINCFG_TYPE_NUM] =
1126 readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
1127 pr_debug("Save %s @ %p (con %#010x %08x)\n",
1128 bank->name, reg,
1129 bank->pm_save[PINCFG_TYPE_FUNC],
1130 bank->pm_save[PINCFG_TYPE_NUM]);
1131 } else {
1132 pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
1133 reg, bank->pm_save[PINCFG_TYPE_FUNC]);
1134 }
1135 }
21c21993 1136
1bf00d7a
TF
1137 if (drvdata->suspend)
1138 drvdata->suspend(drvdata);
d9f99863
DA
1139}
1140
1141/**
1142 * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
1143 *
1144 * Restore one of the banks that was saved during suspend.
1145 *
1146 * We don't bother doing anything complicated to avoid glitching lines since
1147 * we're called before pad retention is turned off.
1148 */
1149static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
1150{
d9f99863
DA
1151 void __iomem *virt_base = drvdata->virt_base;
1152 int i;
1153
1bf00d7a
TF
1154 if (drvdata->resume)
1155 drvdata->resume(drvdata);
21c21993 1156
1bf00d7a
TF
1157 for (i = 0; i < drvdata->nr_banks; i++) {
1158 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1159 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF
1160 const u8 *offs = bank->type->reg_offset;
1161 const u8 *widths = bank->type->fld_width;
d9f99863
DA
1162 enum pincfg_type type;
1163
1164 /* Registers without a powerdown config aren't lost */
1165 if (!widths[PINCFG_TYPE_CON_PDN])
1166 continue;
1167
1168 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1169 /* Some banks have two config registers */
1170 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
1171 bank->name, reg,
1172 readl(reg + offs[PINCFG_TYPE_FUNC]),
1173 readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
1174 bank->pm_save[PINCFG_TYPE_FUNC],
1175 bank->pm_save[PINCFG_TYPE_NUM]);
1176 writel(bank->pm_save[PINCFG_TYPE_NUM],
1177 reg + offs[PINCFG_TYPE_FUNC] + 4);
1178 } else {
1179 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
1180 reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
1181 bank->pm_save[PINCFG_TYPE_FUNC]);
1182 }
1183 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1184 if (widths[type])
1185 writel(bank->pm_save[type], reg + offs[type]);
1186 }
1187}
1188
1189/**
1190 * samsung_pinctrl_suspend - save pinctrl state for suspend
1191 *
1192 * Save data for all banks across all devices.
1193 */
1194static int samsung_pinctrl_suspend(void)
1195{
1196 struct samsung_pinctrl_drv_data *drvdata;
1197
1198 list_for_each_entry(drvdata, &drvdata_list, node) {
1199 samsung_pinctrl_suspend_dev(drvdata);
1200 }
1201
1202 return 0;
1203}
1204
1205/**
1206 * samsung_pinctrl_resume - restore pinctrl state for suspend
1207 *
1208 * Restore data for all banks across all devices.
1209 */
1210static void samsung_pinctrl_resume(void)
1211{
1212 struct samsung_pinctrl_drv_data *drvdata;
1213
1214 list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
1215 samsung_pinctrl_resume_dev(drvdata);
1216 }
1217}
1218
1219#else
1220#define samsung_pinctrl_suspend NULL
1221#define samsung_pinctrl_resume NULL
1222#endif
1223
1224static struct syscore_ops samsung_pinctrl_syscore_ops = {
1225 .suspend = samsung_pinctrl_suspend,
1226 .resume = samsung_pinctrl_resume,
1227};
1228
30574f0d 1229static const struct of_device_id samsung_pinctrl_dt_match[] = {
d5517bec 1230#ifdef CONFIG_PINCTRL_EXYNOS
d97f5b98
TF
1231 { .compatible = "samsung,exynos3250-pinctrl",
1232 .data = (void *)exynos3250_pin_ctrl },
b533c868 1233 { .compatible = "samsung,exynos4210-pinctrl",
30574f0d 1234 .data = (void *)exynos4210_pin_ctrl },
b533c868 1235 { .compatible = "samsung,exynos4x12-pinctrl",
6edc794a 1236 .data = (void *)exynos4x12_pin_ctrl },
2891ba29
TF
1237 { .compatible = "samsung,exynos4415-pinctrl",
1238 .data = (void *)exynos4415_pin_ctrl },
f67faf48
TA
1239 { .compatible = "samsung,exynos5250-pinctrl",
1240 .data = (void *)exynos5250_pin_ctrl },
9a8b6079
YGJ
1241 { .compatible = "samsung,exynos5260-pinctrl",
1242 .data = (void *)exynos5260_pin_ctrl },
023e06df
HK
1243 { .compatible = "samsung,exynos5410-pinctrl",
1244 .data = (void *)exynos5410_pin_ctrl },
983dbeb3
LKA
1245 { .compatible = "samsung,exynos5420-pinctrl",
1246 .data = (void *)exynos5420_pin_ctrl },
3c5ecc9e
CC
1247 { .compatible = "samsung,exynos5433-pinctrl",
1248 .data = (void *)exynos5433_pin_ctrl },
608a26a7
MK
1249 { .compatible = "samsung,s5pv210-pinctrl",
1250 .data = (void *)s5pv210_pin_ctrl },
50cea0cf
NKC
1251 { .compatible = "samsung,exynos7-pinctrl",
1252 .data = (void *)exynos7_pin_ctrl },
61dd7261
TF
1253#endif
1254#ifdef CONFIG_PINCTRL_S3C64XX
1255 { .compatible = "samsung,s3c64xx-pinctrl",
1256 .data = s3c64xx_pin_ctrl },
af99a750
HS
1257#endif
1258#ifdef CONFIG_PINCTRL_S3C24XX
1259 { .compatible = "samsung,s3c2412-pinctrl",
1260 .data = s3c2412_pin_ctrl },
1261 { .compatible = "samsung,s3c2416-pinctrl",
1262 .data = s3c2416_pin_ctrl },
1263 { .compatible = "samsung,s3c2440-pinctrl",
1264 .data = s3c2440_pin_ctrl },
1265 { .compatible = "samsung,s3c2450-pinctrl",
1266 .data = s3c2450_pin_ctrl },
d5517bec 1267#endif
30574f0d
TA
1268 {},
1269};
1270MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
1271
1272static struct platform_driver samsung_pinctrl_driver = {
1273 .probe = samsung_pinctrl_probe,
1274 .driver = {
1275 .name = "samsung-pinctrl",
606fca94 1276 .of_match_table = samsung_pinctrl_dt_match,
a0ee2ac0 1277 .suppress_bind_attrs = true,
30574f0d
TA
1278 },
1279};
1280
1281static int __init samsung_pinctrl_drv_register(void)
1282{
d9f99863
DA
1283 /*
1284 * Register syscore ops for save/restore of registers across suspend.
1285 * It's important to ensure that this driver is running at an earlier
1286 * initcall level than any arch-specific init calls that install syscore
1287 * ops that turn off pad retention (like exynos_pm_resume).
1288 */
1289 register_syscore_ops(&samsung_pinctrl_syscore_ops);
1290
30574f0d
TA
1291 return platform_driver_register(&samsung_pinctrl_driver);
1292}
1293postcore_initcall(samsung_pinctrl_drv_register);
1294
1295static void __exit samsung_pinctrl_drv_unregister(void)
1296{
1297 platform_driver_unregister(&samsung_pinctrl_driver);
1298}
1299module_exit(samsung_pinctrl_drv_unregister);
1300
1301MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
1302MODULE_DESCRIPTION("Samsung pinctrl driver");
1303MODULE_LICENSE("GPL v2");
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