cpufreq: governor: Always schedule work on the CPU running update
[deliverable/linux.git] / drivers / pinctrl / samsung / pinctrl-samsung.c
CommitLineData
30574f0d
TA
1/*
2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This driver implements the Samsung pinctrl driver. It supports setting up of
17 * pinmux and pinconf configurations. The gpiolib interface is also included.
18 * External interrupt (gpio and wakeup) support are not included in this driver
19 * but provides extensions to which platform specific implementation of the gpio
20 * and wakeup interrupts can be hooked to.
21 */
22
23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/err.h>
28#include <linux/gpio.h>
a19fe2d4 29#include <linux/irqdomain.h>
19846950 30#include <linux/spinlock.h>
d9f99863 31#include <linux/syscore_ops.h>
30574f0d 32
ebe629a3 33#include "../core.h"
30574f0d
TA
34#include "pinctrl-samsung.h"
35
30574f0d 36/* list of all possible config options supported */
d5fd5da2 37static struct pin_config {
9a2c1c3b
TF
38 const char *property;
39 enum pincfg_type param;
40} cfg_params[] = {
30574f0d
TA
41 { "samsung,pin-pud", PINCFG_TYPE_PUD },
42 { "samsung,pin-drv", PINCFG_TYPE_DRV },
43 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
44 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
2700bc01 45 { "samsung,pin-val", PINCFG_TYPE_DAT },
30574f0d
TA
46};
47
d9f99863 48/* Global list of devices (struct samsung_pinctrl_drv_data) */
b9408975 49static LIST_HEAD(drvdata_list);
d9f99863 50
6fb6f1ba 51static unsigned int pin_base;
40ba6227 52
30574f0d
TA
53static int samsung_get_group_count(struct pinctrl_dev *pctldev)
54{
9a2c1c3b 55 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 56
9a2c1c3b 57 return pmx->nr_groups;
30574f0d
TA
58}
59
30574f0d 60static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
9a2c1c3b 61 unsigned group)
30574f0d 62{
9a2c1c3b 63 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 64
9a2c1c3b 65 return pmx->pin_groups[group].name;
30574f0d
TA
66}
67
30574f0d 68static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
9a2c1c3b
TF
69 unsigned group,
70 const unsigned **pins,
71 unsigned *num_pins)
30574f0d 72{
9a2c1c3b
TF
73 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
74
75 *pins = pmx->pin_groups[group].pins;
76 *num_pins = pmx->pin_groups[group].num_pins;
30574f0d 77
30574f0d
TA
78 return 0;
79}
80
9a2c1c3b
TF
81static int reserve_map(struct device *dev, struct pinctrl_map **map,
82 unsigned *reserved_maps, unsigned *num_maps,
83 unsigned reserve)
84{
85 unsigned old_num = *reserved_maps;
86 unsigned new_num = *num_maps + reserve;
87 struct pinctrl_map *new_map;
30574f0d 88
9a2c1c3b
TF
89 if (old_num >= new_num)
90 return 0;
30574f0d 91
9a2c1c3b
TF
92 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
93 if (!new_map) {
94 dev_err(dev, "krealloc(map) failed\n");
30574f0d
TA
95 return -ENOMEM;
96 }
30574f0d 97
9a2c1c3b
TF
98 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
99
100 *map = new_map;
101 *reserved_maps = new_num;
102
103 return 0;
104}
105
106static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
107 unsigned *num_maps, const char *group,
108 const char *function)
109{
110 if (WARN_ON(*num_maps == *reserved_maps))
111 return -ENOSPC;
112
113 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
114 (*map)[*num_maps].data.mux.group = group;
115 (*map)[*num_maps].data.mux.function = function;
116 (*num_maps)++;
117
118 return 0;
119}
120
121static int add_map_configs(struct device *dev, struct pinctrl_map **map,
122 unsigned *reserved_maps, unsigned *num_maps,
123 const char *group, unsigned long *configs,
124 unsigned num_configs)
125{
126 unsigned long *dup_configs;
127
128 if (WARN_ON(*num_maps == *reserved_maps))
129 return -ENOSPC;
130
131 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
132 GFP_KERNEL);
133 if (!dup_configs) {
134 dev_err(dev, "kmemdup(configs) failed\n");
135 return -ENOMEM;
30574f0d 136 }
30574f0d 137
9a2c1c3b
TF
138 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
139 (*map)[*num_maps].data.configs.group_or_pin = group;
140 (*map)[*num_maps].data.configs.configs = dup_configs;
141 (*map)[*num_maps].data.configs.num_configs = num_configs;
142 (*num_maps)++;
143
144 return 0;
145}
146
147static int add_config(struct device *dev, unsigned long **configs,
148 unsigned *num_configs, unsigned long config)
149{
150 unsigned old_num = *num_configs;
151 unsigned new_num = old_num + 1;
152 unsigned long *new_configs;
153
154 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
155 GFP_KERNEL);
156 if (!new_configs) {
157 dev_err(dev, "krealloc(configs) failed\n");
158 return -ENOMEM;
30574f0d
TA
159 }
160
9a2c1c3b
TF
161 new_configs[old_num] = config;
162
163 *configs = new_configs;
164 *num_configs = new_num;
165
166 return 0;
167}
168
169static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
170 struct pinctrl_map *map,
171 unsigned num_maps)
172{
173 int i;
174
175 for (i = 0; i < num_maps; i++)
176 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
177 kfree(map[i].data.configs.configs);
178
179 kfree(map);
180}
181
182static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
183 struct device *dev,
184 struct device_node *np,
185 struct pinctrl_map **map,
186 unsigned *reserved_maps,
187 unsigned *num_maps)
188{
189 int ret, i;
190 u32 val;
191 unsigned long config;
192 unsigned long *configs = NULL;
193 unsigned num_configs = 0;
194 unsigned reserve;
195 struct property *prop;
196 const char *group;
197 bool has_func = false;
198
199 ret = of_property_read_u32(np, "samsung,pin-function", &val);
200 if (!ret)
201 has_func = true;
202
203 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
204 ret = of_property_read_u32(np, cfg_params[i].property, &val);
205 if (!ret) {
206 config = PINCFG_PACK(cfg_params[i].param, val);
207 ret = add_config(dev, &configs, &num_configs, config);
208 if (ret < 0)
209 goto exit;
210 /* EINVAL=missing, which is fine since it's optional */
211 } else if (ret != -EINVAL) {
212 dev_err(dev, "could not parse property %s\n",
213 cfg_params[i].property);
214 }
30574f0d
TA
215 }
216
9a2c1c3b
TF
217 reserve = 0;
218 if (has_func)
219 reserve++;
220 if (num_configs)
221 reserve++;
222 ret = of_property_count_strings(np, "samsung,pins");
223 if (ret < 0) {
224 dev_err(dev, "could not parse property samsung,pins\n");
225 goto exit;
226 }
227 reserve *= ret;
228
229 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
230 if (ret < 0)
231 goto exit;
232
233 of_property_for_each_string(np, "samsung,pins", prop, group) {
234 if (has_func) {
235 ret = add_map_mux(map, reserved_maps,
236 num_maps, group, np->full_name);
237 if (ret < 0)
238 goto exit;
30574f0d 239 }
30574f0d 240
9a2c1c3b
TF
241 if (num_configs) {
242 ret = add_map_configs(dev, map, reserved_maps,
243 num_maps, group, configs,
244 num_configs);
245 if (ret < 0)
246 goto exit;
247 }
30574f0d
TA
248 }
249
9a2c1c3b 250 ret = 0;
30574f0d 251
9a2c1c3b
TF
252exit:
253 kfree(configs);
254 return ret;
30574f0d
TA
255}
256
9a2c1c3b
TF
257static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
258 struct device_node *np_config,
259 struct pinctrl_map **map,
260 unsigned *num_maps)
261{
262 struct samsung_pinctrl_drv_data *drvdata;
263 unsigned reserved_maps;
264 struct device_node *np;
265 int ret;
266
267 drvdata = pinctrl_dev_get_drvdata(pctldev);
268
269 reserved_maps = 0;
270 *map = NULL;
271 *num_maps = 0;
272
273 if (!of_get_child_count(np_config))
274 return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
275 np_config, map,
276 &reserved_maps,
277 num_maps);
278
279 for_each_child_of_node(np_config, np) {
280 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
281 &reserved_maps, num_maps);
282 if (ret < 0) {
283 samsung_dt_free_map(pctldev, *map, *num_maps);
284 return ret;
30574f0d 285 }
9a2c1c3b 286 }
30574f0d 287
9a2c1c3b 288 return 0;
30574f0d
TA
289}
290
291/* list of pinctrl callbacks for the pinctrl core */
022ab148 292static const struct pinctrl_ops samsung_pctrl_ops = {
30574f0d
TA
293 .get_groups_count = samsung_get_group_count,
294 .get_group_name = samsung_get_group_name,
295 .get_group_pins = samsung_get_group_pins,
296 .dt_node_to_map = samsung_dt_node_to_map,
297 .dt_free_map = samsung_dt_free_map,
298};
299
300/* check if the selector is a valid pin function selector */
301static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
302{
303 struct samsung_pinctrl_drv_data *drvdata;
304
305 drvdata = pinctrl_dev_get_drvdata(pctldev);
306 return drvdata->nr_functions;
307}
308
309/* return the name of the pin function specified */
310static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
311 unsigned selector)
312{
313 struct samsung_pinctrl_drv_data *drvdata;
314
315 drvdata = pinctrl_dev_get_drvdata(pctldev);
316 return drvdata->pmx_functions[selector].name;
317}
318
319/* return the groups associated for the specified function selector */
320static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
321 unsigned selector, const char * const **groups,
322 unsigned * const num_groups)
323{
324 struct samsung_pinctrl_drv_data *drvdata;
325
326 drvdata = pinctrl_dev_get_drvdata(pctldev);
327 *groups = drvdata->pmx_functions[selector].groups;
328 *num_groups = drvdata->pmx_functions[selector].num_groups;
329 return 0;
330}
331
332/*
333 * given a pin number that is local to a pin controller, find out the pin bank
334 * and the register base of the pin bank.
335 */
62f14c0e
TF
336static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
337 unsigned pin, void __iomem **reg, u32 *offset,
30574f0d
TA
338 struct samsung_pin_bank **bank)
339{
30574f0d
TA
340 struct samsung_pin_bank *b;
341
1bf00d7a 342 b = drvdata->pin_banks;
30574f0d
TA
343
344 while ((pin >= b->pin_base) &&
345 ((b->pin_base + b->nr_pins - 1) < pin))
346 b++;
347
348 *reg = drvdata->virt_base + b->pctl_offset;
349 *offset = pin - b->pin_base;
350 if (bank)
351 *bank = b;
30574f0d
TA
352}
353
354/* enable or disable a pinmux function */
355static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
356 unsigned group, bool enable)
357{
358 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 359 const struct samsung_pin_bank_type *type;
30574f0d
TA
360 struct samsung_pin_bank *bank;
361 void __iomem *reg;
9a2c1c3b 362 u32 mask, shift, data, pin_offset;
19846950 363 unsigned long flags;
9a2c1c3b
TF
364 const struct samsung_pmx_func *func;
365 const struct samsung_pin_group *grp;
30574f0d
TA
366
367 drvdata = pinctrl_dev_get_drvdata(pctldev);
9a2c1c3b
TF
368 func = &drvdata->pmx_functions[selector];
369 grp = &drvdata->pin_groups[group];
30574f0d 370
1bf00d7a 371 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
9a2c1c3b
TF
372 &reg, &pin_offset, &bank);
373 type = bank->type;
374 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
375 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
376 if (shift >= 32) {
377 /* Some banks have two config registers */
378 shift -= 32;
379 reg += 4;
380 }
30574f0d 381
9a2c1c3b 382 spin_lock_irqsave(&bank->slock, flags);
19846950 383
9a2c1c3b
TF
384 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
385 data &= ~(mask << shift);
386 if (enable)
387 data |= func->val << shift;
388 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
19846950 389
9a2c1c3b 390 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA
391}
392
393/* enable a specified pinmux by writing to registers */
03e9f0ca
LW
394static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
395 unsigned selector,
396 unsigned group)
30574f0d
TA
397{
398 samsung_pinmux_setup(pctldev, selector, group, true);
399 return 0;
400}
401
30574f0d 402/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
022ab148 403static const struct pinmux_ops samsung_pinmux_ops = {
30574f0d
TA
404 .get_functions_count = samsung_get_functions_count,
405 .get_function_name = samsung_pinmux_get_fname,
406 .get_function_groups = samsung_pinmux_get_groups,
03e9f0ca 407 .set_mux = samsung_pinmux_set_mux,
30574f0d
TA
408};
409
410/* set or get the pin config settings for a specified pin */
411static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
412 unsigned long *config, bool set)
413{
414 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 415 const struct samsung_pin_bank_type *type;
30574f0d
TA
416 struct samsung_pin_bank *bank;
417 void __iomem *reg_base;
418 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
419 u32 data, width, pin_offset, mask, shift;
420 u32 cfg_value, cfg_reg;
19846950 421 unsigned long flags;
30574f0d
TA
422
423 drvdata = pinctrl_dev_get_drvdata(pctldev);
1bf00d7a 424 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
30574f0d 425 &pin_offset, &bank);
499147c9 426 type = bank->type;
30574f0d 427
499147c9 428 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
7c367d3d
TF
429 return -EINVAL;
430
499147c9 431 width = type->fld_width[cfg_type];
43fc9e7f 432 cfg_reg = type->reg_offset[cfg_type];
499147c9 433
19846950
TF
434 spin_lock_irqsave(&bank->slock, flags);
435
30574f0d
TA
436 mask = (1 << width) - 1;
437 shift = pin_offset * width;
438 data = readl(reg_base + cfg_reg);
439
440 if (set) {
441 cfg_value = PINCFG_UNPACK_VALUE(*config);
442 data &= ~(mask << shift);
443 data |= (cfg_value << shift);
444 writel(data, reg_base + cfg_reg);
445 } else {
446 data >>= shift;
447 data &= mask;
448 *config = PINCFG_PACK(cfg_type, data);
449 }
19846950
TF
450
451 spin_unlock_irqrestore(&bank->slock, flags);
452
30574f0d
TA
453 return 0;
454}
455
456/* set the pin config settings for a specified pin */
457static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
03b054e9 458 unsigned long *configs, unsigned num_configs)
30574f0d 459{
03b054e9
SY
460 int i, ret;
461
462 for (i = 0; i < num_configs; i++) {
463 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
464 if (ret < 0)
465 return ret;
466 } /* for each config */
467
468 return 0;
30574f0d
TA
469}
470
471/* get the pin config settings for a specified pin */
472static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
473 unsigned long *config)
474{
475 return samsung_pinconf_rw(pctldev, pin, config, false);
476}
477
478/* set the pin config settings for a specified pin group */
479static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
03b054e9
SY
480 unsigned group, unsigned long *configs,
481 unsigned num_configs)
30574f0d
TA
482{
483 struct samsung_pinctrl_drv_data *drvdata;
484 const unsigned int *pins;
485 unsigned int cnt;
486
487 drvdata = pinctrl_dev_get_drvdata(pctldev);
488 pins = drvdata->pin_groups[group].pins;
489
490 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
03b054e9 491 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
30574f0d
TA
492
493 return 0;
494}
495
496/* get the pin config settings for a specified pin group */
497static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
498 unsigned int group, unsigned long *config)
499{
500 struct samsung_pinctrl_drv_data *drvdata;
501 const unsigned int *pins;
502
503 drvdata = pinctrl_dev_get_drvdata(pctldev);
504 pins = drvdata->pin_groups[group].pins;
505 samsung_pinconf_get(pctldev, pins[0], config);
506 return 0;
507}
508
509/* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
022ab148 510static const struct pinconf_ops samsung_pinconf_ops = {
30574f0d
TA
511 .pin_config_get = samsung_pinconf_get,
512 .pin_config_set = samsung_pinconf_set,
513 .pin_config_group_get = samsung_pinconf_group_get,
514 .pin_config_group_set = samsung_pinconf_group_set,
515};
516
517/* gpiolib gpio_set callback function */
518static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
519{
9f57f81c 520 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
94ce944b 521 const struct samsung_pin_bank_type *type = bank->type;
19846950 522 unsigned long flags;
30574f0d 523 void __iomem *reg;
d3a7b9e3 524 u32 data;
30574f0d 525
d3a7b9e3 526 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 527
19846950
TF
528 spin_lock_irqsave(&bank->slock, flags);
529
43fc9e7f 530 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 531 data &= ~(1 << offset);
30574f0d 532 if (value)
d3a7b9e3 533 data |= 1 << offset;
43fc9e7f 534 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
19846950
TF
535
536 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA
537}
538
539/* gpiolib gpio_get callback function */
540static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
541{
542 void __iomem *reg;
d3a7b9e3 543 u32 data;
9f57f81c 544 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
94ce944b 545 const struct samsung_pin_bank_type *type = bank->type;
62f14c0e 546
d3a7b9e3 547 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 548
43fc9e7f 549 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 550 data >>= offset;
30574f0d
TA
551 data &= 1;
552 return data;
553}
554
555/*
18c28caa
TF
556 * The calls to gpio_direction_output() and gpio_direction_input()
557 * leads to this function call.
30574f0d 558 */
18c28caa
TF
559static int samsung_gpio_set_direction(struct gpio_chip *gc,
560 unsigned offset, bool input)
561{
94ce944b 562 const struct samsung_pin_bank_type *type;
18c28caa
TF
563 struct samsung_pin_bank *bank;
564 struct samsung_pinctrl_drv_data *drvdata;
565 void __iomem *reg;
566 u32 data, mask, shift;
567 unsigned long flags;
568
9f57f81c 569 bank = gpiochip_get_data(gc);
18c28caa
TF
570 type = bank->type;
571 drvdata = bank->drvdata;
572
573 reg = drvdata->virt_base + bank->pctl_offset +
574 type->reg_offset[PINCFG_TYPE_FUNC];
575
576 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
577 shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
578 if (shift >= 32) {
579 /* Some banks have two config registers */
580 shift -= 32;
581 reg += 4;
582 }
583
584 spin_lock_irqsave(&bank->slock, flags);
585
586 data = readl(reg);
587 data &= ~(mask << shift);
588 if (!input)
589 data |= FUNC_OUTPUT << shift;
590 writel(data, reg);
591
592 spin_unlock_irqrestore(&bank->slock, flags);
593
594 return 0;
595}
596
597/* gpiolib gpio_direction_input callback function. */
30574f0d
TA
598static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
599{
18c28caa 600 return samsung_gpio_set_direction(gc, offset, true);
30574f0d
TA
601}
602
18c28caa 603/* gpiolib gpio_direction_output callback function. */
30574f0d
TA
604static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
605 int value)
606{
607 samsung_gpio_set(gc, offset, value);
18c28caa 608 return samsung_gpio_set_direction(gc, offset, false);
30574f0d
TA
609}
610
a19fe2d4
TF
611/*
612 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
613 * and a virtual IRQ, if not already present.
614 */
615static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
616{
9f57f81c 617 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
a19fe2d4
TF
618 unsigned int virq;
619
620 if (!bank->irq_domain)
621 return -ENXIO;
622
623 virq = irq_create_mapping(bank->irq_domain, offset);
624
625 return (virq) ? : -ENXIO;
626}
627
9a2c1c3b
TF
628static struct samsung_pin_group *samsung_pinctrl_create_groups(
629 struct device *dev,
630 struct samsung_pinctrl_drv_data *drvdata,
631 unsigned int *cnt)
30574f0d 632{
9a2c1c3b
TF
633 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
634 struct samsung_pin_group *groups, *grp;
635 const struct pinctrl_pin_desc *pdesc;
636 int i;
637
638 groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups),
639 GFP_KERNEL);
640 if (!groups)
641 return ERR_PTR(-EINVAL);
642 grp = groups;
643
644 pdesc = ctrldesc->pins;
645 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
646 grp->name = pdesc->name;
647 grp->pins = &pdesc->number;
648 grp->num_pins = 1;
649 }
650
651 *cnt = ctrldesc->npins;
652 return groups;
653}
30574f0d 654
9a2c1c3b
TF
655static int samsung_pinctrl_create_function(struct device *dev,
656 struct samsung_pinctrl_drv_data *drvdata,
657 struct device_node *func_np,
658 struct samsung_pmx_func *func)
659{
660 int npins;
661 int ret;
662 int i;
663
664 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
665 return 0;
666
667 npins = of_property_count_strings(func_np, "samsung,pins");
668 if (npins < 1) {
669 dev_err(dev, "invalid pin list in %s node", func_np->name);
30574f0d
TA
670 return -EINVAL;
671 }
672
9a2c1c3b
TF
673 func->name = func_np->full_name;
674
675 func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL);
676 if (!func->groups)
30574f0d 677 return -ENOMEM;
30574f0d 678
9a2c1c3b
TF
679 for (i = 0; i < npins; ++i) {
680 const char *gname;
681
682 ret = of_property_read_string_index(func_np, "samsung,pins",
683 i, &gname);
684 if (ret) {
685 dev_err(dev,
686 "failed to read pin name %d from %s node\n",
687 i, func_np->name);
688 return ret;
30574f0d 689 }
9a2c1c3b
TF
690
691 func->groups[i] = gname;
30574f0d
TA
692 }
693
9a2c1c3b
TF
694 func->num_groups = npins;
695 return 1;
30574f0d
TA
696}
697
9a2c1c3b
TF
698static struct samsung_pmx_func *samsung_pinctrl_create_functions(
699 struct device *dev,
700 struct samsung_pinctrl_drv_data *drvdata,
701 unsigned int *cnt)
30574f0d 702{
9a2c1c3b 703 struct samsung_pmx_func *functions, *func;
30574f0d
TA
704 struct device_node *dev_np = dev->of_node;
705 struct device_node *cfg_np;
9a2c1c3b 706 unsigned int func_cnt = 0;
30574f0d
TA
707 int ret;
708
9a2c1c3b
TF
709 /*
710 * Iterate over all the child nodes of the pin controller node
711 * and create pin groups and pin function lists.
712 */
713 for_each_child_of_node(dev_np, cfg_np) {
714 struct device_node *func_np;
30574f0d 715
9a2c1c3b
TF
716 if (!of_get_child_count(cfg_np)) {
717 if (!of_find_property(cfg_np,
718 "samsung,pin-function", NULL))
719 continue;
720 ++func_cnt;
721 continue;
722 }
723
724 for_each_child_of_node(cfg_np, func_np) {
725 if (!of_find_property(func_np,
726 "samsung,pin-function", NULL))
727 continue;
728 ++func_cnt;
729 }
30574f0d 730 }
30574f0d 731
9a2c1c3b
TF
732 functions = devm_kzalloc(dev, func_cnt * sizeof(*functions),
733 GFP_KERNEL);
30574f0d
TA
734 if (!functions) {
735 dev_err(dev, "failed to allocate memory for function list\n");
9a2c1c3b 736 return ERR_PTR(-EINVAL);
30574f0d
TA
737 }
738 func = functions;
739
740 /*
741 * Iterate over all the child nodes of the pin controller node
742 * and create pin groups and pin function lists.
743 */
9a2c1c3b 744 func_cnt = 0;
30574f0d 745 for_each_child_of_node(dev_np, cfg_np) {
9a2c1c3b
TF
746 struct device_node *func_np;
747
748 if (!of_get_child_count(cfg_np)) {
749 ret = samsung_pinctrl_create_function(dev, drvdata,
750 cfg_np, func);
751 if (ret < 0)
752 return ERR_PTR(ret);
753 if (ret > 0) {
754 ++func;
755 ++func_cnt;
756 }
30574f0d 757 continue;
9a2c1c3b 758 }
30574f0d 759
9a2c1c3b
TF
760 for_each_child_of_node(cfg_np, func_np) {
761 ret = samsung_pinctrl_create_function(dev, drvdata,
762 func_np, func);
763 if (ret < 0)
764 return ERR_PTR(ret);
765 if (ret > 0) {
766 ++func;
767 ++func_cnt;
768 }
30574f0d 769 }
9a2c1c3b 770 }
30574f0d 771
9a2c1c3b
TF
772 *cnt = func_cnt;
773 return functions;
774}
30574f0d 775
9a2c1c3b
TF
776/*
777 * Parse the information about all the available pin groups and pin functions
778 * from device node of the pin-controller. A pin group is formed with all
779 * the pins listed in the "samsung,pins" property.
780 */
30574f0d 781
9a2c1c3b
TF
782static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
783 struct samsung_pinctrl_drv_data *drvdata)
784{
785 struct device *dev = &pdev->dev;
786 struct samsung_pin_group *groups;
787 struct samsung_pmx_func *functions;
788 unsigned int grp_cnt = 0, func_cnt = 0;
789
790 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
791 if (IS_ERR(groups)) {
792 dev_err(dev, "failed to parse pin groups\n");
793 return PTR_ERR(groups);
794 }
795
796 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
797 if (IS_ERR(functions)) {
798 dev_err(dev, "failed to parse pin functions\n");
44a074ff 799 return PTR_ERR(functions);
30574f0d
TA
800 }
801
802 drvdata->pin_groups = groups;
803 drvdata->nr_groups = grp_cnt;
804 drvdata->pmx_functions = functions;
9a2c1c3b 805 drvdata->nr_functions = func_cnt;
30574f0d
TA
806
807 return 0;
808}
809
810/* register the pinctrl interface with the pinctrl subsystem */
150632b0
GKH
811static int samsung_pinctrl_register(struct platform_device *pdev,
812 struct samsung_pinctrl_drv_data *drvdata)
30574f0d
TA
813{
814 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
815 struct pinctrl_pin_desc *pindesc, *pdesc;
816 struct samsung_pin_bank *pin_bank;
817 char *pin_names;
818 int pin, bank, ret;
819
820 ctrldesc->name = "samsung-pinctrl";
821 ctrldesc->owner = THIS_MODULE;
822 ctrldesc->pctlops = &samsung_pctrl_ops;
823 ctrldesc->pmxops = &samsung_pinmux_ops;
824 ctrldesc->confops = &samsung_pinconf_ops;
825
826 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
1bf00d7a 827 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA
828 if (!pindesc) {
829 dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
830 return -ENOMEM;
831 }
832 ctrldesc->pins = pindesc;
1bf00d7a 833 ctrldesc->npins = drvdata->nr_pins;
30574f0d
TA
834
835 /* dynamically populate the pin number and pin name for pindesc */
836 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
1bf00d7a 837 pdesc->number = pin + drvdata->pin_base;
30574f0d
TA
838
839 /*
840 * allocate space for storing the dynamically generated names for all
841 * the pins which belong to this pin-controller.
842 */
843 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
1bf00d7a 844 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA
845 if (!pin_names) {
846 dev_err(&pdev->dev, "mem alloc for pin names failed\n");
847 return -ENOMEM;
848 }
849
850 /* for each pin, the name of the pin is pin-bank name + pin number */
1bf00d7a
TF
851 for (bank = 0; bank < drvdata->nr_banks; bank++) {
852 pin_bank = &drvdata->pin_banks[bank];
30574f0d
TA
853 for (pin = 0; pin < pin_bank->nr_pins; pin++) {
854 sprintf(pin_names, "%s-%d", pin_bank->name, pin);
855 pdesc = pindesc + pin_bank->pin_base + pin;
856 pdesc->name = pin_names;
857 pin_names += PIN_NAME_LENGTH;
858 }
859 }
860
529301c1
TF
861 ret = samsung_pinctrl_parse_dt(pdev, drvdata);
862 if (ret)
863 return ret;
864
30574f0d 865 drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata);
323de9ef 866 if (IS_ERR(drvdata->pctl_dev)) {
30574f0d 867 dev_err(&pdev->dev, "could not register pinctrl driver\n");
323de9ef 868 return PTR_ERR(drvdata->pctl_dev);
30574f0d
TA
869 }
870
1bf00d7a
TF
871 for (bank = 0; bank < drvdata->nr_banks; ++bank) {
872 pin_bank = &drvdata->pin_banks[bank];
d3a7b9e3
TF
873 pin_bank->grange.name = pin_bank->name;
874 pin_bank->grange.id = bank;
1bf00d7a 875 pin_bank->grange.pin_base = drvdata->pin_base
6c6ce620 876 + pin_bank->pin_base;
d3a7b9e3
TF
877 pin_bank->grange.base = pin_bank->gpio_chip.base;
878 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
879 pin_bank->grange.gc = &pin_bank->gpio_chip;
880 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
881 }
30574f0d 882
30574f0d
TA
883 return 0;
884}
885
d3a7b9e3 886static const struct gpio_chip samsung_gpiolib_chip = {
98c85d58
JG
887 .request = gpiochip_generic_request,
888 .free = gpiochip_generic_free,
d3a7b9e3
TF
889 .set = samsung_gpio_set,
890 .get = samsung_gpio_get,
891 .direction_input = samsung_gpio_direction_input,
892 .direction_output = samsung_gpio_direction_output,
a19fe2d4 893 .to_irq = samsung_gpio_to_irq,
d3a7b9e3
TF
894 .owner = THIS_MODULE,
895};
896
30574f0d 897/* register the gpiolib interface with the gpiolib subsystem */
150632b0
GKH
898static int samsung_gpiolib_register(struct platform_device *pdev,
899 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 900{
1bf00d7a 901 struct samsung_pin_bank *bank = drvdata->pin_banks;
30574f0d
TA
902 struct gpio_chip *gc;
903 int ret;
d3a7b9e3
TF
904 int i;
905
1bf00d7a 906 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
d3a7b9e3
TF
907 bank->gpio_chip = samsung_gpiolib_chip;
908
909 gc = &bank->gpio_chip;
1bf00d7a 910 gc->base = drvdata->pin_base + bank->pin_base;
d3a7b9e3 911 gc->ngpio = bank->nr_pins;
58383c78 912 gc->parent = &pdev->dev;
d3a7b9e3
TF
913 gc->of_node = bank->of_node;
914 gc->label = bank->name;
915
9f57f81c 916 ret = gpiochip_add_data(gc, bank);
d3a7b9e3
TF
917 if (ret) {
918 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
919 gc->label, ret);
920 goto fail;
921 }
30574f0d
TA
922 }
923
924 return 0;
d3a7b9e3
TF
925
926fail:
927 for (--i, --bank; i >= 0; --i, --bank)
2fcea6ce 928 gpiochip_remove(&bank->gpio_chip);
d3a7b9e3 929 return ret;
30574f0d
TA
930}
931
932/* unregister the gpiolib interface with the gpiolib subsystem */
150632b0
GKH
933static int samsung_gpiolib_unregister(struct platform_device *pdev,
934 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 935{
1bf00d7a 936 struct samsung_pin_bank *bank = drvdata->pin_banks;
d3a7b9e3
TF
937 int i;
938
1bf00d7a 939 for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
2fcea6ce 940 gpiochip_remove(&bank->gpio_chip);
1bf00d7a 941
2fcea6ce 942 return 0;
30574f0d
TA
943}
944
945static const struct of_device_id samsung_pinctrl_dt_match[];
946
947/* retrieve the soc specific data */
1bf00d7a
TF
948static const struct samsung_pin_ctrl *
949samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
950 struct platform_device *pdev)
30574f0d
TA
951{
952 int id;
953 const struct of_device_id *match;
6defe9a0 954 struct device_node *node = pdev->dev.of_node;
ab663789 955 struct device_node *np;
8100cf47 956 const struct samsung_pin_bank_data *bdata;
1bf00d7a 957 const struct samsung_pin_ctrl *ctrl;
40ba6227
TF
958 struct samsung_pin_bank *bank;
959 int i;
30574f0d 960
6defe9a0 961 id = of_alias_get_id(node, "pinctrl");
30574f0d
TA
962 if (id < 0) {
963 dev_err(&pdev->dev, "failed to get alias id\n");
87993273 964 return ERR_PTR(-ENOENT);
30574f0d
TA
965 }
966 match = of_match_node(samsung_pinctrl_dt_match, node);
40ba6227
TF
967 ctrl = (struct samsung_pin_ctrl *)match->data + id;
968
1bf00d7a
TF
969 d->suspend = ctrl->suspend;
970 d->resume = ctrl->resume;
1bf00d7a 971 d->nr_banks = ctrl->nr_banks;
8100cf47
TF
972 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
973 sizeof(*d->pin_banks), GFP_KERNEL);
974 if (!d->pin_banks)
975 return ERR_PTR(-ENOMEM);
1bf00d7a
TF
976
977 bank = d->pin_banks;
8100cf47
TF
978 bdata = ctrl->pin_banks;
979 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
980 bank->type = bdata->type;
981 bank->pctl_offset = bdata->pctl_offset;
982 bank->nr_pins = bdata->nr_pins;
983 bank->eint_func = bdata->eint_func;
984 bank->eint_type = bdata->eint_type;
985 bank->eint_mask = bdata->eint_mask;
986 bank->eint_offset = bdata->eint_offset;
987 bank->name = bdata->name;
988
19846950 989 spin_lock_init(&bank->slock);
6defe9a0 990 bank->drvdata = d;
1bf00d7a
TF
991 bank->pin_base = d->nr_pins;
992 d->nr_pins += bank->nr_pins;
40ba6227
TF
993 }
994
ab663789
TF
995 for_each_child_of_node(node, np) {
996 if (!of_find_property(np, "gpio-controller", NULL))
997 continue;
1bf00d7a
TF
998 bank = d->pin_banks;
999 for (i = 0; i < d->nr_banks; ++i, ++bank) {
ab663789
TF
1000 if (!strcmp(bank->name, np->name)) {
1001 bank->of_node = np;
1002 break;
1003 }
1004 }
1005 }
1006
1bf00d7a
TF
1007 d->pin_base = pin_base;
1008 pin_base += d->nr_pins;
40ba6227
TF
1009
1010 return ctrl;
30574f0d
TA
1011}
1012
150632b0 1013static int samsung_pinctrl_probe(struct platform_device *pdev)
30574f0d
TA
1014{
1015 struct samsung_pinctrl_drv_data *drvdata;
1bf00d7a 1016 const struct samsung_pin_ctrl *ctrl;
30574f0d 1017 struct device *dev = &pdev->dev;
30574f0d
TA
1018 struct resource *res;
1019 int ret;
1020
1021 if (!dev->of_node) {
1022 dev_err(dev, "device tree node not found\n");
1023 return -ENODEV;
1024 }
1025
30574f0d
TA
1026 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
1027 if (!drvdata) {
1028 dev_err(dev, "failed to allocate memory for driver's "
1029 "private data\n");
1030 return -ENOMEM;
1031 }
6defe9a0
TF
1032
1033 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
87993273 1034 if (IS_ERR(ctrl)) {
6defe9a0 1035 dev_err(&pdev->dev, "driver data not available\n");
87993273 1036 return PTR_ERR(ctrl);
6defe9a0 1037 }
30574f0d
TA
1038 drvdata->dev = dev;
1039
1040 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
9e0c1fb2
TR
1041 drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
1042 if (IS_ERR(drvdata->virt_base))
1043 return PTR_ERR(drvdata->virt_base);
30574f0d
TA
1044
1045 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1046 if (res)
1047 drvdata->irq = res->start;
1048
1049 ret = samsung_gpiolib_register(pdev, drvdata);
1050 if (ret)
1051 return ret;
1052
1053 ret = samsung_pinctrl_register(pdev, drvdata);
1054 if (ret) {
1055 samsung_gpiolib_unregister(pdev, drvdata);
1056 return ret;
1057 }
1058
1059 if (ctrl->eint_gpio_init)
1060 ctrl->eint_gpio_init(drvdata);
1061 if (ctrl->eint_wkup_init)
1062 ctrl->eint_wkup_init(drvdata);
1063
1064 platform_set_drvdata(pdev, drvdata);
d9f99863
DA
1065
1066 /* Add to the global list */
1067 list_add_tail(&drvdata->node, &drvdata_list);
1068
30574f0d
TA
1069 return 0;
1070}
1071
d9f99863
DA
1072#ifdef CONFIG_PM
1073
1074/**
1075 * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
1076 *
1077 * Save data for all banks handled by this device.
1078 */
1079static void samsung_pinctrl_suspend_dev(
1080 struct samsung_pinctrl_drv_data *drvdata)
1081{
d9f99863
DA
1082 void __iomem *virt_base = drvdata->virt_base;
1083 int i;
1084
1bf00d7a
TF
1085 for (i = 0; i < drvdata->nr_banks; i++) {
1086 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1087 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF
1088 const u8 *offs = bank->type->reg_offset;
1089 const u8 *widths = bank->type->fld_width;
d9f99863
DA
1090 enum pincfg_type type;
1091
1092 /* Registers without a powerdown config aren't lost */
1093 if (!widths[PINCFG_TYPE_CON_PDN])
1094 continue;
1095
1096 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1097 if (widths[type])
1098 bank->pm_save[type] = readl(reg + offs[type]);
1099
1100 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1101 /* Some banks have two config registers */
1102 bank->pm_save[PINCFG_TYPE_NUM] =
1103 readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
1104 pr_debug("Save %s @ %p (con %#010x %08x)\n",
1105 bank->name, reg,
1106 bank->pm_save[PINCFG_TYPE_FUNC],
1107 bank->pm_save[PINCFG_TYPE_NUM]);
1108 } else {
1109 pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
1110 reg, bank->pm_save[PINCFG_TYPE_FUNC]);
1111 }
1112 }
21c21993 1113
1bf00d7a
TF
1114 if (drvdata->suspend)
1115 drvdata->suspend(drvdata);
d9f99863
DA
1116}
1117
1118/**
1119 * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
1120 *
1121 * Restore one of the banks that was saved during suspend.
1122 *
1123 * We don't bother doing anything complicated to avoid glitching lines since
1124 * we're called before pad retention is turned off.
1125 */
1126static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
1127{
d9f99863
DA
1128 void __iomem *virt_base = drvdata->virt_base;
1129 int i;
1130
1bf00d7a
TF
1131 if (drvdata->resume)
1132 drvdata->resume(drvdata);
21c21993 1133
1bf00d7a
TF
1134 for (i = 0; i < drvdata->nr_banks; i++) {
1135 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1136 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF
1137 const u8 *offs = bank->type->reg_offset;
1138 const u8 *widths = bank->type->fld_width;
d9f99863
DA
1139 enum pincfg_type type;
1140
1141 /* Registers without a powerdown config aren't lost */
1142 if (!widths[PINCFG_TYPE_CON_PDN])
1143 continue;
1144
1145 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1146 /* Some banks have two config registers */
1147 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
1148 bank->name, reg,
1149 readl(reg + offs[PINCFG_TYPE_FUNC]),
1150 readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
1151 bank->pm_save[PINCFG_TYPE_FUNC],
1152 bank->pm_save[PINCFG_TYPE_NUM]);
1153 writel(bank->pm_save[PINCFG_TYPE_NUM],
1154 reg + offs[PINCFG_TYPE_FUNC] + 4);
1155 } else {
1156 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
1157 reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
1158 bank->pm_save[PINCFG_TYPE_FUNC]);
1159 }
1160 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1161 if (widths[type])
1162 writel(bank->pm_save[type], reg + offs[type]);
1163 }
1164}
1165
1166/**
1167 * samsung_pinctrl_suspend - save pinctrl state for suspend
1168 *
1169 * Save data for all banks across all devices.
1170 */
1171static int samsung_pinctrl_suspend(void)
1172{
1173 struct samsung_pinctrl_drv_data *drvdata;
1174
1175 list_for_each_entry(drvdata, &drvdata_list, node) {
1176 samsung_pinctrl_suspend_dev(drvdata);
1177 }
1178
1179 return 0;
1180}
1181
1182/**
1183 * samsung_pinctrl_resume - restore pinctrl state for suspend
1184 *
1185 * Restore data for all banks across all devices.
1186 */
1187static void samsung_pinctrl_resume(void)
1188{
1189 struct samsung_pinctrl_drv_data *drvdata;
1190
1191 list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
1192 samsung_pinctrl_resume_dev(drvdata);
1193 }
1194}
1195
1196#else
1197#define samsung_pinctrl_suspend NULL
1198#define samsung_pinctrl_resume NULL
1199#endif
1200
1201static struct syscore_ops samsung_pinctrl_syscore_ops = {
1202 .suspend = samsung_pinctrl_suspend,
1203 .resume = samsung_pinctrl_resume,
1204};
1205
30574f0d 1206static const struct of_device_id samsung_pinctrl_dt_match[] = {
d5517bec 1207#ifdef CONFIG_PINCTRL_EXYNOS
d97f5b98
TF
1208 { .compatible = "samsung,exynos3250-pinctrl",
1209 .data = (void *)exynos3250_pin_ctrl },
b533c868 1210 { .compatible = "samsung,exynos4210-pinctrl",
30574f0d 1211 .data = (void *)exynos4210_pin_ctrl },
b533c868 1212 { .compatible = "samsung,exynos4x12-pinctrl",
6edc794a 1213 .data = (void *)exynos4x12_pin_ctrl },
2891ba29
TF
1214 { .compatible = "samsung,exynos4415-pinctrl",
1215 .data = (void *)exynos4415_pin_ctrl },
f67faf48
TA
1216 { .compatible = "samsung,exynos5250-pinctrl",
1217 .data = (void *)exynos5250_pin_ctrl },
9a8b6079
YGJ
1218 { .compatible = "samsung,exynos5260-pinctrl",
1219 .data = (void *)exynos5260_pin_ctrl },
023e06df
HK
1220 { .compatible = "samsung,exynos5410-pinctrl",
1221 .data = (void *)exynos5410_pin_ctrl },
983dbeb3
LKA
1222 { .compatible = "samsung,exynos5420-pinctrl",
1223 .data = (void *)exynos5420_pin_ctrl },
3c5ecc9e
CC
1224 { .compatible = "samsung,exynos5433-pinctrl",
1225 .data = (void *)exynos5433_pin_ctrl },
608a26a7
MK
1226 { .compatible = "samsung,s5pv210-pinctrl",
1227 .data = (void *)s5pv210_pin_ctrl },
50cea0cf
NKC
1228 { .compatible = "samsung,exynos7-pinctrl",
1229 .data = (void *)exynos7_pin_ctrl },
61dd7261
TF
1230#endif
1231#ifdef CONFIG_PINCTRL_S3C64XX
1232 { .compatible = "samsung,s3c64xx-pinctrl",
1233 .data = s3c64xx_pin_ctrl },
af99a750
HS
1234#endif
1235#ifdef CONFIG_PINCTRL_S3C24XX
1236 { .compatible = "samsung,s3c2412-pinctrl",
1237 .data = s3c2412_pin_ctrl },
1238 { .compatible = "samsung,s3c2416-pinctrl",
1239 .data = s3c2416_pin_ctrl },
1240 { .compatible = "samsung,s3c2440-pinctrl",
1241 .data = s3c2440_pin_ctrl },
1242 { .compatible = "samsung,s3c2450-pinctrl",
1243 .data = s3c2450_pin_ctrl },
d5517bec 1244#endif
30574f0d
TA
1245 {},
1246};
1247MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
1248
1249static struct platform_driver samsung_pinctrl_driver = {
1250 .probe = samsung_pinctrl_probe,
1251 .driver = {
1252 .name = "samsung-pinctrl",
606fca94 1253 .of_match_table = samsung_pinctrl_dt_match,
30574f0d
TA
1254 },
1255};
1256
1257static int __init samsung_pinctrl_drv_register(void)
1258{
d9f99863
DA
1259 /*
1260 * Register syscore ops for save/restore of registers across suspend.
1261 * It's important to ensure that this driver is running at an earlier
1262 * initcall level than any arch-specific init calls that install syscore
1263 * ops that turn off pad retention (like exynos_pm_resume).
1264 */
1265 register_syscore_ops(&samsung_pinctrl_syscore_ops);
1266
30574f0d
TA
1267 return platform_driver_register(&samsung_pinctrl_driver);
1268}
1269postcore_initcall(samsung_pinctrl_drv_register);
1270
1271static void __exit samsung_pinctrl_drv_unregister(void)
1272{
1273 platform_driver_unregister(&samsung_pinctrl_driver);
1274}
1275module_exit(samsung_pinctrl_drv_unregister);
1276
1277MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
1278MODULE_DESCRIPTION("Samsung pinctrl driver");
1279MODULE_LICENSE("GPL v2");
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