Commit | Line | Data |
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f2821b1c MR |
1 | /* |
2 | * Allwinner A10 SoCs pinctrl driver. | |
3 | * | |
4 | * Copyright (C) 2014 Maxime Ripard | |
5 | * | |
6 | * Maxime Ripard <maxime.ripard@free-electrons.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/of.h> | |
16 | #include <linux/of_device.h> | |
17 | #include <linux/pinctrl/pinctrl.h> | |
18 | ||
19 | #include "pinctrl-sunxi.h" | |
20 | ||
21 | static const struct sunxi_desc_pin sun4i_a10_pins[] = { | |
22 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), | |
23 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
24 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
25 | SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */ | |
26 | SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */ | |
27 | SUNXI_FUNCTION(0x4, "uart2")), /* RTS */ | |
28 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1), | |
29 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
30 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
31 | SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */ | |
32 | SUNXI_FUNCTION(0x3, "spi1"), /* CLK */ | |
33 | SUNXI_FUNCTION(0x4, "uart2")), /* CTS */ | |
34 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2), | |
35 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
36 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
37 | SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */ | |
38 | SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */ | |
39 | SUNXI_FUNCTION(0x4, "uart2")), /* TX */ | |
40 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3), | |
41 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
42 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
43 | SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */ | |
44 | SUNXI_FUNCTION(0x3, "spi1"), /* MISO */ | |
45 | SUNXI_FUNCTION(0x4, "uart2")), /* RX */ | |
46 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4), | |
47 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
48 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
49 | SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */ | |
50 | SUNXI_FUNCTION(0x3, "spi1")), /* CS1 */ | |
51 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5), | |
52 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
53 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
54 | SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */ | |
55 | SUNXI_FUNCTION(0x3, "spi3")), /* CS0 */ | |
56 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6), | |
57 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
58 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
59 | SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */ | |
60 | SUNXI_FUNCTION(0x3, "spi3")), /* CLK */ | |
61 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7), | |
62 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
63 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
64 | SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */ | |
65 | SUNXI_FUNCTION(0x3, "spi3")), /* MOSI */ | |
66 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8), | |
67 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
68 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
69 | SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */ | |
70 | SUNXI_FUNCTION(0x3, "spi3")), /* MISO */ | |
71 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9), | |
72 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
73 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
74 | SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */ | |
75 | SUNXI_FUNCTION(0x3, "spi3")), /* CS1 */ | |
76 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10), | |
77 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
78 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
79 | SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */ | |
80 | SUNXI_FUNCTION(0x4, "uart1")), /* TX */ | |
81 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11), | |
82 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
83 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
84 | SUNXI_FUNCTION(0x2, "emac"), /* EMDC */ | |
85 | SUNXI_FUNCTION(0x4, "uart1")), /* RX */ | |
86 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12), | |
87 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
88 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
89 | SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */ | |
90 | SUNXI_FUNCTION(0x3, "uart6"), /* TX */ | |
91 | SUNXI_FUNCTION(0x4, "uart1")), /* RTS */ | |
92 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13), | |
93 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
94 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
95 | SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */ | |
96 | SUNXI_FUNCTION(0x3, "uart6"), /* RX */ | |
97 | SUNXI_FUNCTION(0x4, "uart1")), /* CTS */ | |
98 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14), | |
99 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
100 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
101 | SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */ | |
102 | SUNXI_FUNCTION(0x3, "uart7"), /* TX */ | |
103 | SUNXI_FUNCTION(0x4, "uart1")), /* DTR */ | |
104 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15), | |
105 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
106 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
107 | SUNXI_FUNCTION(0x2, "emac"), /* ECRS */ | |
108 | SUNXI_FUNCTION(0x3, "uart7"), /* RX */ | |
109 | SUNXI_FUNCTION(0x4, "uart1")), /* DSR */ | |
110 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16), | |
111 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
112 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
113 | SUNXI_FUNCTION(0x2, "emac"), /* ECOL */ | |
114 | SUNXI_FUNCTION(0x3, "can"), /* TX */ | |
115 | SUNXI_FUNCTION(0x4, "uart1")), /* DCD */ | |
116 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17), | |
117 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
118 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
119 | SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */ | |
120 | SUNXI_FUNCTION(0x3, "can"), /* RX */ | |
121 | SUNXI_FUNCTION(0x4, "uart1")), /* RING */ | |
122 | /* Hole */ | |
123 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), | |
124 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
125 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
126 | SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */ | |
127 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), | |
128 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
129 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
130 | SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ | |
131 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), | |
132 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
133 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
134 | SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */ | |
135 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), | |
136 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
137 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
8152d8cc MC |
138 | SUNXI_FUNCTION(0x2, "ir0"), /* TX */ |
139 | /* | |
140 | * The SPDIF block is not referenced at all in the A10 user | |
141 | * manual. However it is described in the code leaked and the | |
142 | * pin descriptions are declared in the A20 user manual which | |
143 | * is pin compatible with this device. | |
144 | */ | |
145 | SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF MCLK */ | |
f2821b1c MR |
146 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), |
147 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
148 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
149 | SUNXI_FUNCTION(0x2, "ir0")), /* RX */ | |
150 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), | |
151 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
152 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
153 | SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */ | |
154 | SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */ | |
155 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), | |
156 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
157 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
158 | SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */ | |
159 | SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */ | |
160 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), | |
161 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
162 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
163 | SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */ | |
164 | SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */ | |
165 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), | |
166 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
167 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
168 | SUNXI_FUNCTION(0x2, "i2s"), /* DO0 */ | |
169 | SUNXI_FUNCTION(0x3, "ac97")), /* DO */ | |
170 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), | |
171 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
172 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
173 | SUNXI_FUNCTION(0x2, "i2s")), /* DO1 */ | |
174 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10), | |
175 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
176 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
177 | SUNXI_FUNCTION(0x2, "i2s")), /* DO2 */ | |
178 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11), | |
179 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
180 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
181 | SUNXI_FUNCTION(0x2, "i2s")), /* DO3 */ | |
182 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12), | |
183 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
184 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
185 | SUNXI_FUNCTION(0x2, "i2s"), /* DI */ | |
8152d8cc MC |
186 | SUNXI_FUNCTION(0x3, "ac97"), /* DI */ |
187 | /* Undocumented mux function - See SPDIF MCLK above */ | |
188 | SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF IN */ | |
f2821b1c MR |
189 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13), |
190 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
191 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
8152d8cc MC |
192 | SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */ |
193 | /* Undocumented mux function - See SPDIF MCLK above */ | |
194 | SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF OUT */ | |
f2821b1c MR |
195 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14), |
196 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
197 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
198 | SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */ | |
199 | SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */ | |
200 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15), | |
201 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
202 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
203 | SUNXI_FUNCTION(0x2, "spi2"), /* CLK */ | |
204 | SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */ | |
205 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16), | |
206 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
207 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
208 | SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */ | |
209 | SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */ | |
210 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17), | |
211 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
212 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
213 | SUNXI_FUNCTION(0x2, "spi2"), /* MISO */ | |
214 | SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */ | |
215 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18), | |
216 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
217 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
218 | SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ | |
219 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19), | |
220 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
221 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
222 | SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ | |
223 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20), | |
224 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
225 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
226 | SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */ | |
227 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21), | |
228 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
229 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
230 | SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */ | |
231 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22), | |
232 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
233 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
234 | SUNXI_FUNCTION(0x2, "uart0"), /* TX */ | |
235 | SUNXI_FUNCTION(0x3, "ir1")), /* TX */ | |
236 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23), | |
237 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
238 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
239 | SUNXI_FUNCTION(0x2, "uart0"), /* RX */ | |
240 | SUNXI_FUNCTION(0x3, "ir1")), /* RX */ | |
241 | /* Hole */ | |
242 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), | |
243 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
244 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
245 | SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ | |
246 | SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ | |
247 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), | |
248 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
249 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
250 | SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ | |
251 | SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ | |
252 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), | |
253 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
254 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
255 | SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ | |
256 | SUNXI_FUNCTION(0x3, "spi0")), /* SCK */ | |
257 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), | |
258 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
259 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
260 | SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */ | |
261 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), | |
262 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
263 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
264 | SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ | |
265 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), | |
266 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
267 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
268 | SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */ | |
269 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), | |
270 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
271 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
272 | SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ | |
273 | SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ | |
274 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), | |
275 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
276 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
277 | SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */ | |
278 | SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ | |
279 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), | |
280 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
281 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
282 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ | |
283 | SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ | |
284 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), | |
285 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
286 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
287 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ | |
288 | SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ | |
289 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), | |
290 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
291 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
292 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ | |
293 | SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ | |
294 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), | |
295 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
296 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
297 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ | |
298 | SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ | |
299 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), | |
300 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
301 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
302 | SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */ | |
303 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), | |
304 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
305 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
306 | SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */ | |
307 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), | |
308 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
309 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
310 | SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */ | |
311 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), | |
312 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
313 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
314 | SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */ | |
315 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), | |
316 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
317 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
318 | SUNXI_FUNCTION(0x2, "nand0")), /* NWP */ | |
319 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17), | |
320 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
321 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
322 | SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */ | |
323 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18), | |
324 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
325 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
326 | SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */ | |
327 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19), | |
328 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
329 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
330 | SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */ | |
331 | SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */ | |
332 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20), | |
333 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
334 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
335 | SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */ | |
336 | SUNXI_FUNCTION(0x3, "spi2")), /* CLK */ | |
337 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21), | |
338 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
339 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
340 | SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */ | |
341 | SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */ | |
342 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22), | |
343 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
344 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
345 | SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */ | |
346 | SUNXI_FUNCTION(0x3, "spi2")), /* MISO */ | |
347 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23), | |
348 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
349 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
350 | SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */ | |
351 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24), | |
352 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
353 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
354 | SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */ | |
355 | /* Hole */ | |
356 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), | |
357 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
358 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
359 | SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */ | |
360 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */ | |
361 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), | |
362 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
363 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
364 | SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */ | |
365 | SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */ | |
366 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), | |
367 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
368 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
369 | SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ | |
370 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */ | |
371 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), | |
372 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
373 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
374 | SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ | |
375 | SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */ | |
376 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), | |
377 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
378 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
379 | SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ | |
380 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */ | |
381 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), | |
382 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
383 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
384 | SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ | |
385 | SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */ | |
386 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), | |
387 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
388 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
389 | SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ | |
390 | SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */ | |
391 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), | |
392 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
393 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
394 | SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ | |
395 | SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */ | |
396 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), | |
397 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
398 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
399 | SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */ | |
400 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */ | |
401 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), | |
402 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
403 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
404 | SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */ | |
405 | SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */ | |
406 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), | |
407 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
408 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
409 | SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ | |
410 | SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */ | |
411 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), | |
412 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
413 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
414 | SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ | |
415 | SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */ | |
416 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), | |
417 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
418 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
419 | SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ | |
420 | SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */ | |
421 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), | |
422 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
423 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
424 | SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ | |
425 | SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */ | |
426 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), | |
427 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
428 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
429 | SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ | |
430 | SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */ | |
431 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), | |
432 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
433 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
434 | SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ | |
435 | SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */ | |
436 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), | |
437 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
438 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
439 | SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */ | |
440 | SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */ | |
441 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), | |
442 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
443 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
444 | SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */ | |
445 | SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */ | |
446 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), | |
447 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
448 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
449 | SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ | |
450 | SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */ | |
451 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), | |
452 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
453 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
454 | SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ | |
455 | SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */ | |
456 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), | |
457 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
458 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
459 | SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ | |
460 | SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */ | |
461 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), | |
462 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
463 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
464 | SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ | |
465 | SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */ | |
466 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), | |
467 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
468 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
469 | SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ | |
470 | SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */ | |
471 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), | |
472 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
473 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
474 | SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ | |
475 | SUNXI_FUNCTION(0x3, "sim")), /* DET */ | |
476 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), | |
477 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
478 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
479 | SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ | |
480 | SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */ | |
481 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), | |
482 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
483 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
484 | SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ | |
485 | SUNXI_FUNCTION(0x3, "sim")), /* RST */ | |
486 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), | |
487 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
488 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
489 | SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ | |
490 | SUNXI_FUNCTION(0x3, "sim")), /* SCK */ | |
491 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27), | |
492 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
493 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
494 | SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ | |
495 | SUNXI_FUNCTION(0x3, "sim")), /* SDA */ | |
496 | /* Hole */ | |
497 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), | |
498 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
499 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
500 | SUNXI_FUNCTION(0x2, "ts0"), /* CLK */ | |
501 | SUNXI_FUNCTION(0x3, "csi0")), /* PCK */ | |
502 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), | |
503 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
504 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
505 | SUNXI_FUNCTION(0x2, "ts0"), /* ERR */ | |
506 | SUNXI_FUNCTION(0x3, "csi0")), /* CK */ | |
507 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), | |
508 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
509 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
510 | SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */ | |
511 | SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */ | |
512 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), | |
513 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
514 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
515 | SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */ | |
516 | SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */ | |
517 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), | |
518 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
519 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
520 | SUNXI_FUNCTION(0x2, "ts0"), /* D0 */ | |
521 | SUNXI_FUNCTION(0x3, "csi0")), /* D0 */ | |
522 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), | |
523 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
524 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
525 | SUNXI_FUNCTION(0x2, "ts0"), /* D1 */ | |
526 | SUNXI_FUNCTION(0x3, "csi0"), /* D1 */ | |
527 | SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */ | |
528 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), | |
529 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
530 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
531 | SUNXI_FUNCTION(0x2, "ts0"), /* D2 */ | |
532 | SUNXI_FUNCTION(0x3, "csi0")), /* D2 */ | |
533 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), | |
534 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
535 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
536 | SUNXI_FUNCTION(0x2, "ts0"), /* D3 */ | |
537 | SUNXI_FUNCTION(0x3, "csi0")), /* D3 */ | |
538 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), | |
539 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
540 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
541 | SUNXI_FUNCTION(0x2, "ts0"), /* D4 */ | |
542 | SUNXI_FUNCTION(0x3, "csi0")), /* D4 */ | |
543 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), | |
544 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
545 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
546 | SUNXI_FUNCTION(0x2, "ts0"), /* D5 */ | |
547 | SUNXI_FUNCTION(0x3, "csi0")), /* D5 */ | |
548 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), | |
549 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
550 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
551 | SUNXI_FUNCTION(0x2, "ts0"), /* D6 */ | |
552 | SUNXI_FUNCTION(0x3, "csi0")), /* D6 */ | |
553 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), | |
554 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
555 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
556 | SUNXI_FUNCTION(0x2, "ts0"), /* D7 */ | |
557 | SUNXI_FUNCTION(0x3, "csi0")), /* D7 */ | |
558 | /* Hole */ | |
559 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), | |
560 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
561 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
562 | SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ | |
563 | SUNXI_FUNCTION(0x4, "jtag")), /* MSI */ | |
564 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), | |
565 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
566 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
567 | SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ | |
568 | SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */ | |
569 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), | |
570 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
571 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
572 | SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ | |
573 | SUNXI_FUNCTION(0x4, "uart0")), /* TX */ | |
574 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), | |
575 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
576 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
577 | SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ | |
578 | SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */ | |
579 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), | |
580 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
581 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
582 | SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ | |
583 | SUNXI_FUNCTION(0x4, "uart0")), /* RX */ | |
584 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), | |
585 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
586 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
587 | SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ | |
588 | SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */ | |
589 | /* Hole */ | |
590 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), | |
591 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
592 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
593 | SUNXI_FUNCTION(0x2, "ts1"), /* CLK */ | |
594 | SUNXI_FUNCTION(0x3, "csi1"), /* PCK */ | |
595 | SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */ | |
596 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), | |
597 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
598 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
599 | SUNXI_FUNCTION(0x2, "ts1"), /* ERR */ | |
600 | SUNXI_FUNCTION(0x3, "csi1"), /* CK */ | |
601 | SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */ | |
602 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), | |
603 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
604 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
605 | SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */ | |
606 | SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */ | |
607 | SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */ | |
608 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), | |
609 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
610 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
611 | SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */ | |
612 | SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */ | |
613 | SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */ | |
614 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), | |
615 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
616 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
617 | SUNXI_FUNCTION(0x2, "ts1"), /* D0 */ | |
618 | SUNXI_FUNCTION(0x3, "csi1"), /* D0 */ | |
619 | SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */ | |
620 | SUNXI_FUNCTION(0x5, "csi0")), /* D8 */ | |
621 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), | |
622 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
623 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
624 | SUNXI_FUNCTION(0x2, "ts1"), /* D1 */ | |
625 | SUNXI_FUNCTION(0x3, "csi1"), /* D1 */ | |
626 | SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */ | |
627 | SUNXI_FUNCTION(0x5, "csi0")), /* D9 */ | |
628 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), | |
629 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
630 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
631 | SUNXI_FUNCTION(0x2, "ts1"), /* D2 */ | |
632 | SUNXI_FUNCTION(0x3, "csi1"), /* D2 */ | |
633 | SUNXI_FUNCTION(0x4, "uart3"), /* TX */ | |
634 | SUNXI_FUNCTION(0x5, "csi0")), /* D10 */ | |
635 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), | |
636 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
637 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
638 | SUNXI_FUNCTION(0x2, "ts1"), /* D3 */ | |
639 | SUNXI_FUNCTION(0x3, "csi1"), /* D3 */ | |
640 | SUNXI_FUNCTION(0x4, "uart3"), /* RX */ | |
641 | SUNXI_FUNCTION(0x5, "csi0")), /* D11 */ | |
642 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), | |
643 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
644 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
645 | SUNXI_FUNCTION(0x2, "ts1"), /* D4 */ | |
646 | SUNXI_FUNCTION(0x3, "csi1"), /* D4 */ | |
647 | SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ | |
648 | SUNXI_FUNCTION(0x5, "csi0")), /* D12 */ | |
649 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), | |
650 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
651 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
652 | SUNXI_FUNCTION(0x2, "ts1"), /* D5 */ | |
653 | SUNXI_FUNCTION(0x3, "csi1"), /* D5 */ | |
654 | SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ | |
655 | SUNXI_FUNCTION(0x5, "csi0")), /* D13 */ | |
656 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), | |
657 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
658 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
659 | SUNXI_FUNCTION(0x2, "ts1"), /* D6 */ | |
660 | SUNXI_FUNCTION(0x3, "csi1"), /* D6 */ | |
661 | SUNXI_FUNCTION(0x4, "uart4"), /* TX */ | |
662 | SUNXI_FUNCTION(0x5, "csi0")), /* D14 */ | |
663 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), | |
664 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
665 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
666 | SUNXI_FUNCTION(0x2, "ts1"), /* D7 */ | |
667 | SUNXI_FUNCTION(0x3, "csi1"), /* D7 */ | |
668 | SUNXI_FUNCTION(0x4, "uart4"), /* RX */ | |
669 | SUNXI_FUNCTION(0x5, "csi0")), /* D15 */ | |
670 | /* Hole */ | |
671 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), | |
672 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
673 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
674 | SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */ | |
675 | SUNXI_FUNCTION(0x3, "pata"), /* ATAA0 */ | |
676 | SUNXI_FUNCTION(0x4, "uart3"), /* TX */ | |
677 | SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */ | |
678 | SUNXI_FUNCTION(0x7, "csi1")), /* D0 */ | |
679 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), | |
680 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
681 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
682 | SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */ | |
683 | SUNXI_FUNCTION(0x3, "pata"), /* ATAA1 */ | |
684 | SUNXI_FUNCTION(0x4, "uart3"), /* RX */ | |
685 | SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */ | |
686 | SUNXI_FUNCTION(0x7, "csi1")), /* D1 */ | |
687 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), | |
688 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
689 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
690 | SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */ | |
691 | SUNXI_FUNCTION(0x3, "pata"), /* ATAA2 */ | |
692 | SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ | |
693 | SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */ | |
694 | SUNXI_FUNCTION(0x7, "csi1")), /* D2 */ | |
695 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), | |
696 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
697 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
698 | SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */ | |
699 | SUNXI_FUNCTION(0x3, "pata"), /* ATAIRQ */ | |
700 | SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ | |
701 | SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */ | |
702 | SUNXI_FUNCTION(0x7, "csi1")), /* D3 */ | |
703 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), | |
704 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
705 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
706 | SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */ | |
707 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD0 */ | |
708 | SUNXI_FUNCTION(0x4, "uart4"), /* TX */ | |
709 | SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */ | |
710 | SUNXI_FUNCTION(0x7, "csi1")), /* D4 */ | |
711 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), | |
712 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
713 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
714 | SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */ | |
715 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD1 */ | |
716 | SUNXI_FUNCTION(0x4, "uart4"), /* RX */ | |
717 | SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */ | |
718 | SUNXI_FUNCTION(0x7, "csi1")), /* D5 */ | |
719 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), | |
720 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
721 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
722 | SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */ | |
723 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD2 */ | |
724 | SUNXI_FUNCTION(0x4, "uart5"), /* TX */ | |
725 | SUNXI_FUNCTION(0x5, "ms"), /* BS */ | |
726 | SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */ | |
727 | SUNXI_FUNCTION(0x7, "csi1")), /* D6 */ | |
728 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), | |
729 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
730 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
731 | SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */ | |
732 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD3 */ | |
733 | SUNXI_FUNCTION(0x4, "uart5"), /* RX */ | |
734 | SUNXI_FUNCTION(0x5, "ms"), /* CLK */ | |
735 | SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */ | |
736 | SUNXI_FUNCTION(0x7, "csi1")), /* D7 */ | |
737 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), | |
738 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
739 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
740 | SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */ | |
741 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD4 */ | |
742 | SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */ | |
743 | SUNXI_FUNCTION(0x5, "ms"), /* D0 */ | |
744 | SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */ | |
745 | SUNXI_FUNCTION(0x7, "csi1")), /* D8 */ | |
746 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), | |
747 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
748 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
749 | SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */ | |
750 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD5 */ | |
751 | SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */ | |
752 | SUNXI_FUNCTION(0x5, "ms"), /* D1 */ | |
753 | SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */ | |
754 | SUNXI_FUNCTION(0x7, "csi1")), /* D9 */ | |
755 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), | |
756 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
757 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
758 | SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */ | |
759 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD6 */ | |
760 | SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */ | |
761 | SUNXI_FUNCTION(0x5, "ms"), /* D2 */ | |
762 | SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */ | |
763 | SUNXI_FUNCTION(0x7, "csi1")), /* D10 */ | |
764 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11), | |
765 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
766 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
767 | SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */ | |
768 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD7 */ | |
769 | SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */ | |
770 | SUNXI_FUNCTION(0x5, "ms"), /* D3 */ | |
771 | SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */ | |
772 | SUNXI_FUNCTION(0x7, "csi1")), /* D11 */ | |
773 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12), | |
774 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
775 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
776 | SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */ | |
777 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD8 */ | |
778 | SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */ | |
779 | SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */ | |
780 | SUNXI_FUNCTION(0x7, "csi1")), /* D12 */ | |
781 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13), | |
782 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
783 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
784 | SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */ | |
785 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD9 */ | |
786 | SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */ | |
787 | SUNXI_FUNCTION(0x5, "sim"), /* RST */ | |
788 | SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */ | |
789 | SUNXI_FUNCTION(0x7, "csi1")), /* D13 */ | |
790 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14), | |
791 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
792 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
793 | SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */ | |
794 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD10 */ | |
795 | SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */ | |
796 | SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */ | |
797 | SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */ | |
798 | SUNXI_FUNCTION(0x7, "csi1")), /* D14 */ | |
799 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15), | |
800 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
801 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
802 | SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */ | |
803 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD11 */ | |
804 | SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */ | |
805 | SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */ | |
806 | SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */ | |
807 | SUNXI_FUNCTION(0x7, "csi1")), /* D15 */ | |
808 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16), | |
809 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
810 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
811 | SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */ | |
812 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD12 */ | |
813 | SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */ | |
814 | SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */ | |
815 | SUNXI_FUNCTION(0x7, "csi1")), /* D16 */ | |
816 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), | |
817 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
818 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
819 | SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */ | |
820 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD13 */ | |
821 | SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */ | |
822 | SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */ | |
823 | SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */ | |
824 | SUNXI_FUNCTION(0x7, "csi1")), /* D17 */ | |
825 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18), | |
826 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
827 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
828 | SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */ | |
829 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD14 */ | |
830 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */ | |
831 | SUNXI_FUNCTION(0x5, "sim"), /* SCK */ | |
832 | SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */ | |
833 | SUNXI_FUNCTION(0x7, "csi1")), /* D18 */ | |
834 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19), | |
835 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
836 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
837 | SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */ | |
838 | SUNXI_FUNCTION(0x3, "pata"), /* ATAD15 */ | |
839 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */ | |
840 | SUNXI_FUNCTION(0x5, "sim"), /* SDA */ | |
841 | SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */ | |
842 | SUNXI_FUNCTION(0x7, "csi1")), /* D19 */ | |
843 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20), | |
844 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
845 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
846 | SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */ | |
847 | SUNXI_FUNCTION(0x3, "pata"), /* ATAOE */ | |
848 | SUNXI_FUNCTION(0x4, "can"), /* TX */ | |
849 | SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */ | |
850 | SUNXI_FUNCTION(0x7, "csi1")), /* D20 */ | |
851 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21), | |
852 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
853 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
854 | SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */ | |
855 | SUNXI_FUNCTION(0x3, "pata"), /* ATADREQ */ | |
856 | SUNXI_FUNCTION(0x4, "can"), /* RX */ | |
857 | SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */ | |
858 | SUNXI_FUNCTION(0x7, "csi1")), /* D21 */ | |
859 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22), | |
860 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
861 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
862 | SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */ | |
863 | SUNXI_FUNCTION(0x3, "pata"), /* ATADACK */ | |
864 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */ | |
865 | SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */ | |
866 | SUNXI_FUNCTION(0x7, "csi1")), /* D22 */ | |
867 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23), | |
868 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
869 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
870 | SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */ | |
871 | SUNXI_FUNCTION(0x3, "pata"), /* ATACS0 */ | |
872 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */ | |
873 | SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */ | |
874 | SUNXI_FUNCTION(0x7, "csi1")), /* D23 */ | |
875 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24), | |
876 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
877 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
878 | SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */ | |
879 | SUNXI_FUNCTION(0x3, "pata"), /* ATACS1 */ | |
880 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */ | |
881 | SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */ | |
882 | SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */ | |
883 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25), | |
884 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
885 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
886 | SUNXI_FUNCTION(0x2, "lcd1"), /* DE */ | |
887 | SUNXI_FUNCTION(0x3, "pata"), /* ATAIORDY */ | |
888 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */ | |
889 | SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */ | |
890 | SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */ | |
891 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26), | |
892 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
893 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
894 | SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */ | |
895 | SUNXI_FUNCTION(0x3, "pata"), /* ATAIOR */ | |
896 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */ | |
897 | SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */ | |
898 | SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */ | |
899 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27), | |
900 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
901 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
902 | SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */ | |
903 | SUNXI_FUNCTION(0x3, "pata"), /* ATAIOW */ | |
904 | SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */ | |
905 | SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */ | |
906 | SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */ | |
907 | /* Hole */ | |
908 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0), | |
909 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
910 | SUNXI_FUNCTION(0x1, "gpio_out")), | |
911 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1), | |
912 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
913 | SUNXI_FUNCTION(0x1, "gpio_out")), | |
914 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2), | |
915 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
916 | SUNXI_FUNCTION(0x1, "gpio_out")), | |
917 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3), | |
918 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
919 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
920 | SUNXI_FUNCTION(0x2, "pwm")), /* PWM1 */ | |
921 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4), | |
922 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
923 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
924 | SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */ | |
925 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5), | |
926 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
927 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
928 | SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */ | |
929 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6), | |
930 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
931 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
932 | SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */ | |
933 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7), | |
934 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
935 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
936 | SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */ | |
937 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8), | |
938 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
939 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
940 | SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */ | |
941 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9), | |
942 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
943 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
944 | SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */ | |
945 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10), | |
946 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
947 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
948 | SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */ | |
949 | SUNXI_FUNCTION(0x3, "uart5"), /* TX */ | |
950 | SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */ | |
951 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11), | |
952 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
953 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
954 | SUNXI_FUNCTION(0x2, "spi0"), /* CLK */ | |
955 | SUNXI_FUNCTION(0x3, "uart5"), /* RX */ | |
956 | SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */ | |
957 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12), | |
958 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
959 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
960 | SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */ | |
961 | SUNXI_FUNCTION(0x3, "uart6"), /* TX */ | |
962 | SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */ | |
963 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13), | |
964 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
965 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
966 | SUNXI_FUNCTION(0x2, "spi0"), /* MISO */ | |
967 | SUNXI_FUNCTION(0x3, "uart6"), /* RX */ | |
968 | SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */ | |
969 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14), | |
970 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
971 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
972 | SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */ | |
973 | SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */ | |
974 | SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */ | |
975 | SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */ | |
976 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15), | |
977 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
978 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
979 | SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */ | |
980 | SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */ | |
981 | SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */ | |
982 | SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */ | |
983 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16), | |
984 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
985 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
986 | SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */ | |
987 | SUNXI_FUNCTION(0x3, "uart2"), /* RTS */ | |
988 | SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */ | |
989 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17), | |
990 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
991 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
992 | SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ | |
993 | SUNXI_FUNCTION(0x3, "uart2"), /* CTS */ | |
994 | SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */ | |
995 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18), | |
996 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
997 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
998 | SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ | |
999 | SUNXI_FUNCTION(0x3, "uart2"), /* TX */ | |
1000 | SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */ | |
1001 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19), | |
1002 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
1003 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
1004 | SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ | |
1005 | SUNXI_FUNCTION(0x3, "uart2"), /* RX */ | |
1006 | SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */ | |
1007 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20), | |
1008 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
1009 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
1010 | SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */ | |
1011 | SUNXI_FUNCTION(0x3, "uart7"), /* TX */ | |
1012 | SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */ | |
1013 | SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21), | |
1014 | SUNXI_FUNCTION(0x0, "gpio_in"), | |
1015 | SUNXI_FUNCTION(0x1, "gpio_out"), | |
1016 | SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */ | |
1017 | SUNXI_FUNCTION(0x3, "uart7"), /* RX */ | |
1018 | SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */ | |
1019 | }; | |
1020 | ||
1021 | static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = { | |
1022 | .pins = sun4i_a10_pins, | |
1023 | .npins = ARRAY_SIZE(sun4i_a10_pins), | |
8966ada2 | 1024 | .irq_banks = 1, |
ef6d24cc | 1025 | .irq_read_needs_mux = true, |
f2821b1c MR |
1026 | }; |
1027 | ||
1028 | static int sun4i_a10_pinctrl_probe(struct platform_device *pdev) | |
1029 | { | |
1030 | return sunxi_pinctrl_init(pdev, | |
1031 | &sun4i_a10_pinctrl_data); | |
1032 | } | |
1033 | ||
baa9946e | 1034 | static const struct of_device_id sun4i_a10_pinctrl_match[] = { |
f2821b1c MR |
1035 | { .compatible = "allwinner,sun4i-a10-pinctrl", }, |
1036 | {} | |
1037 | }; | |
1038 | MODULE_DEVICE_TABLE(of, sun4i_a10_pinctrl_match); | |
1039 | ||
1040 | static struct platform_driver sun4i_a10_pinctrl_driver = { | |
1041 | .probe = sun4i_a10_pinctrl_probe, | |
1042 | .driver = { | |
1043 | .name = "sun4i-pinctrl", | |
f2821b1c MR |
1044 | .of_match_table = sun4i_a10_pinctrl_match, |
1045 | }, | |
1046 | }; | |
1047 | module_platform_driver(sun4i_a10_pinctrl_driver); | |
1048 | ||
1049 | MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com"); | |
1050 | MODULE_DESCRIPTION("Allwinner A10 pinctrl driver"); | |
1051 | MODULE_LICENSE("GPL"); |