Commit | Line | Data |
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166091b1 SH |
1 | /* |
2 | * simple driver for PWM (Pulse Width Modulator) controller | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com> | |
9 | */ | |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/platform_device.h> | |
5a0e3ad6 | 14 | #include <linux/slab.h> |
166091b1 SH |
15 | #include <linux/err.h> |
16 | #include <linux/clk.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/pwm.h> | |
c010dba8 HS |
19 | #include <mach/hardware.h> |
20 | ||
21 | ||
22 | /* i.MX1 and i.MX21 share the same PWM function block: */ | |
23 | ||
24 | #define MX1_PWMC 0x00 /* PWM Control Register */ | |
25 | #define MX1_PWMS 0x04 /* PWM Sample Register */ | |
26 | #define MX1_PWMP 0x08 /* PWM Period Register */ | |
27 | ||
28 | ||
29 | /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ | |
30 | ||
31 | #define MX3_PWMCR 0x00 /* PWM Control Register */ | |
32 | #define MX3_PWMSAR 0x0C /* PWM Sample Register */ | |
33 | #define MX3_PWMPR 0x10 /* PWM Period Register */ | |
34 | #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) | |
c0d96aed JC |
35 | #define MX3_PWMCR_DOZEEN (1 << 24) |
36 | #define MX3_PWMCR_WAITEN (1 << 23) | |
37 | #define MX3_PWMCR_DBGEN (1 << 22) | |
c010dba8 | 38 | #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) |
a058cbc1 | 39 | #define MX3_PWMCR_CLKSRC_IPG (1 << 16) |
c010dba8 HS |
40 | #define MX3_PWMCR_EN (1 << 0) |
41 | ||
29693248 | 42 | struct imx_chip { |
166091b1 SH |
43 | struct clk *clk; |
44 | ||
45 | int clk_enabled; | |
46 | void __iomem *mmio_base; | |
47 | ||
29693248 | 48 | struct pwm_chip chip; |
166091b1 SH |
49 | }; |
50 | ||
29693248 SH |
51 | #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip) |
52 | ||
53 | static int imx_pwm_config(struct pwm_chip *chip, | |
54 | struct pwm_device *pwm, int duty_ns, int period_ns) | |
166091b1 | 55 | { |
29693248 | 56 | struct imx_chip *imx = to_imx_chip(chip); |
166091b1 | 57 | |
97f45313 | 58 | if (!(cpu_is_mx1() || cpu_is_mx21())) { |
c010dba8 HS |
59 | unsigned long long c; |
60 | unsigned long period_cycles, duty_cycles, prescale; | |
a058cbc1 SH |
61 | u32 cr; |
62 | ||
29693248 | 63 | c = clk_get_rate(imx->clk); |
c010dba8 HS |
64 | c = c * period_ns; |
65 | do_div(c, 1000000000); | |
66 | period_cycles = c; | |
67 | ||
68 | prescale = period_cycles / 0x10000 + 1; | |
69 | ||
70 | period_cycles /= prescale; | |
71 | c = (unsigned long long)period_cycles * duty_ns; | |
72 | do_div(c, period_ns); | |
73 | duty_cycles = c; | |
74 | ||
5776ac2e JC |
75 | /* |
76 | * according to imx pwm RM, the real period value should be | |
77 | * PERIOD value in PWMPR plus 2. | |
78 | */ | |
79 | if (period_cycles > 2) | |
80 | period_cycles -= 2; | |
81 | else | |
82 | period_cycles = 0; | |
83 | ||
29693248 SH |
84 | writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); |
85 | writel(period_cycles, imx->mmio_base + MX3_PWMPR); | |
a058cbc1 | 86 | |
c0d96aed JC |
87 | cr = MX3_PWMCR_PRESCALER(prescale) | |
88 | MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | | |
89 | MX3_PWMCR_DBGEN | MX3_PWMCR_EN; | |
a058cbc1 SH |
90 | |
91 | if (cpu_is_mx25()) | |
92 | cr |= MX3_PWMCR_CLKSRC_IPG; | |
93 | else | |
94 | cr |= MX3_PWMCR_CLKSRC_IPG_HIGH; | |
95 | ||
29693248 | 96 | writel(cr, imx->mmio_base + MX3_PWMCR); |
c010dba8 HS |
97 | } else if (cpu_is_mx1() || cpu_is_mx21()) { |
98 | /* The PWM subsystem allows for exact frequencies. However, | |
99 | * I cannot connect a scope on my device to the PWM line and | |
100 | * thus cannot provide the program the PWM controller | |
101 | * exactly. Instead, I'm relying on the fact that the | |
102 | * Bootloader (u-boot or WinCE+haret) has programmed the PWM | |
103 | * function group already. So I'll just modify the PWM sample | |
104 | * register to follow the ratio of duty_ns vs. period_ns | |
105 | * accordingly. | |
106 | * | |
af901ca1 | 107 | * This is good enough for programming the brightness of |
c010dba8 HS |
108 | * the LCD backlight. |
109 | * | |
110 | * The real implementation would divide PERCLK[0] first by | |
111 | * both the prescaler (/1 .. /128) and then by CLKSEL | |
112 | * (/2 .. /16). | |
113 | */ | |
29693248 | 114 | u32 max = readl(imx->mmio_base + MX1_PWMP); |
c010dba8 | 115 | u32 p = max * duty_ns / period_ns; |
29693248 | 116 | writel(max - p, imx->mmio_base + MX1_PWMS); |
c010dba8 HS |
117 | } else { |
118 | BUG(); | |
119 | } | |
166091b1 SH |
120 | |
121 | return 0; | |
122 | } | |
166091b1 | 123 | |
29693248 | 124 | static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
166091b1 | 125 | { |
29693248 | 126 | struct imx_chip *imx = to_imx_chip(chip); |
166091b1 SH |
127 | int rc = 0; |
128 | ||
29693248 SH |
129 | if (!imx->clk_enabled) { |
130 | rc = clk_prepare_enable(imx->clk); | |
166091b1 | 131 | if (!rc) |
29693248 | 132 | imx->clk_enabled = 1; |
166091b1 SH |
133 | } |
134 | return rc; | |
135 | } | |
166091b1 | 136 | |
29693248 | 137 | static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) |
166091b1 | 138 | { |
29693248 | 139 | struct imx_chip *imx = to_imx_chip(chip); |
166091b1 | 140 | |
29693248 | 141 | writel(0, imx->mmio_base + MX3_PWMCR); |
166091b1 | 142 | |
29693248 SH |
143 | if (imx->clk_enabled) { |
144 | clk_disable_unprepare(imx->clk); | |
145 | imx->clk_enabled = 0; | |
166091b1 | 146 | } |
166091b1 | 147 | } |
166091b1 | 148 | |
29693248 SH |
149 | static struct pwm_ops imx_pwm_ops = { |
150 | .enable = imx_pwm_enable, | |
151 | .disable = imx_pwm_disable, | |
152 | .config = imx_pwm_config, | |
153 | .owner = THIS_MODULE, | |
154 | }; | |
166091b1 | 155 | |
29693248 | 156 | static int __devinit imx_pwm_probe(struct platform_device *pdev) |
166091b1 | 157 | { |
29693248 | 158 | struct imx_chip *imx; |
166091b1 SH |
159 | struct resource *r; |
160 | int ret = 0; | |
161 | ||
a9970e3b | 162 | imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL); |
29693248 | 163 | if (imx == NULL) { |
166091b1 SH |
164 | dev_err(&pdev->dev, "failed to allocate memory\n"); |
165 | return -ENOMEM; | |
166 | } | |
167 | ||
a9970e3b | 168 | imx->clk = devm_clk_get(&pdev->dev, "pwm"); |
166091b1 | 169 | |
a9970e3b AL |
170 | if (IS_ERR(imx->clk)) |
171 | return PTR_ERR(imx->clk); | |
166091b1 | 172 | |
29693248 SH |
173 | imx->chip.ops = &imx_pwm_ops; |
174 | imx->chip.dev = &pdev->dev; | |
175 | imx->chip.base = -1; | |
176 | imx->chip.npwm = 1; | |
166091b1 | 177 | |
29693248 | 178 | imx->clk_enabled = 0; |
166091b1 SH |
179 | |
180 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
181 | if (r == NULL) { | |
182 | dev_err(&pdev->dev, "no memory resource defined\n"); | |
a9970e3b | 183 | return -ENODEV; |
166091b1 SH |
184 | } |
185 | ||
a9970e3b AL |
186 | imx->mmio_base = devm_request_and_ioremap(&pdev->dev, r); |
187 | if (imx->mmio_base == NULL) | |
188 | return -EADDRNOTAVAIL; | |
166091b1 | 189 | |
29693248 SH |
190 | ret = pwmchip_add(&imx->chip); |
191 | if (ret < 0) | |
a9970e3b | 192 | return ret; |
166091b1 | 193 | |
29693248 | 194 | platform_set_drvdata(pdev, imx); |
166091b1 | 195 | return 0; |
166091b1 SH |
196 | } |
197 | ||
29693248 | 198 | static int __devexit imx_pwm_remove(struct platform_device *pdev) |
166091b1 | 199 | { |
29693248 | 200 | struct imx_chip *imx; |
166091b1 | 201 | |
29693248 SH |
202 | imx = platform_get_drvdata(pdev); |
203 | if (imx == NULL) | |
166091b1 SH |
204 | return -ENODEV; |
205 | ||
a9970e3b | 206 | return pwmchip_remove(&imx->chip); |
166091b1 SH |
207 | } |
208 | ||
29693248 | 209 | static struct platform_driver imx_pwm_driver = { |
166091b1 SH |
210 | .driver = { |
211 | .name = "mxc_pwm", | |
212 | }, | |
29693248 SH |
213 | .probe = imx_pwm_probe, |
214 | .remove = __devexit_p(imx_pwm_remove), | |
166091b1 SH |
215 | }; |
216 | ||
29693248 | 217 | static int __init imx_pwm_init(void) |
166091b1 | 218 | { |
29693248 | 219 | return platform_driver_register(&imx_pwm_driver); |
166091b1 | 220 | } |
29693248 | 221 | arch_initcall(imx_pwm_init); |
166091b1 | 222 | |
29693248 | 223 | static void __exit imx_pwm_exit(void) |
166091b1 | 224 | { |
29693248 | 225 | platform_driver_unregister(&imx_pwm_driver); |
166091b1 | 226 | } |
29693248 | 227 | module_exit(imx_pwm_exit); |
166091b1 SH |
228 | |
229 | MODULE_LICENSE("GPL v2"); | |
230 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); |