[deliverable/linux.git] / drivers / pwm / pwm-imx.c

/*
 * simple driver for PWM (Pulse Width Modulator) controller
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/pwm.h>
#include <linux/of.h>
#include <linux/of_device.h>

/* i.MX1 and i.MX21 share the same PWM function block: */

#define MX1_PWMC    0x00   /* PWM Control Register */
#define MX1_PWMS    0x04   /* PWM Sample Register */
#define MX1_PWMP    0x08   /* PWM Period Register */

#define MX1_PWMC_EN		(1 << 4)

/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */

#define MX3_PWMCR                 0x00    /* PWM Control Register */
#define MX3_PWMSAR                0x0C    /* PWM Sample Register */
#define MX3_PWMPR                 0x10    /* PWM Period Register */
#define MX3_PWMCR_PRESCALER(x)    (((x - 1) & 0xFFF) << 4)
#define MX3_PWMCR_DOZEEN                (1 << 24)
#define MX3_PWMCR_WAITEN                (1 << 23)
#define MX3_PWMCR_DBGEN			(1 << 22)
#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
#define MX3_PWMCR_CLKSRC_IPG      (1 << 16)
#define MX3_PWMCR_EN              (1 << 0)

struct imx_chip {
	struct clk	*clk_per;
	struct clk	*clk_ipg;

	void __iomem	*mmio_base;

	struct pwm_chip	chip;

	int (*config)(struct pwm_chip *chip,
		struct pwm_device *pwm, int duty_ns, int period_ns);
	void (*set_enable)(struct pwm_chip *chip, bool enable);
};

#define to_imx_chip(chip)	container_of(chip, struct imx_chip, chip)

static int imx_pwm_config_v1(struct pwm_chip *chip,
		struct pwm_device *pwm, int duty_ns, int period_ns)
{
	struct imx_chip *imx = to_imx_chip(chip);

	/*
	 * The PWM subsystem allows for exact frequencies. However,
	 * I cannot connect a scope on my device to the PWM line and
	 * thus cannot provide the program the PWM controller
	 * exactly. Instead, I'm relying on the fact that the
	 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
	 * function group already. So I'll just modify the PWM sample
	 * register to follow the ratio of duty_ns vs. period_ns
	 * accordingly.
	 *
	 * This is good enough for programming the brightness of
	 * the LCD backlight.
	 *
	 * The real implementation would divide PERCLK[0] first by
	 * both the prescaler (/1 .. /128) and then by CLKSEL
	 * (/2 .. /16).
	 */
	u32 max = readl(imx->mmio_base + MX1_PWMP);
	u32 p = max * duty_ns / period_ns;
	writel(max - p, imx->mmio_base + MX1_PWMS);

	return 0;
}

static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
{
	struct imx_chip *imx = to_imx_chip(chip);
	u32 val;

	val = readl(imx->mmio_base + MX1_PWMC);

	if (enable)
		val |= MX1_PWMC_EN;
	else
		val &= ~MX1_PWMC_EN;

	writel(val, imx->mmio_base + MX1_PWMC);
}

static int imx_pwm_config_v2(struct pwm_chip *chip,
		struct pwm_device *pwm, int duty_ns, int period_ns)
{
	struct imx_chip *imx = to_imx_chip(chip);
	unsigned long long c;
	unsigned long period_cycles, duty_cycles, prescale;
	u32 cr;

	c = clk_get_rate(imx->clk_per);
	c = c * period_ns;
	do_div(c, 1000000000);
	period_cycles = c;

	prescale = period_cycles / 0x10000 + 1;

	period_cycles /= prescale;
	c = (unsigned long long)period_cycles * duty_ns;
	do_div(c, period_ns);
	duty_cycles = c;

	/*
	 * according to imx pwm RM, the real period value should be
	 * PERIOD value in PWMPR plus 2.
	 */
	if (period_cycles > 2)
		period_cycles -= 2;
	else
		period_cycles = 0;

	writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
	writel(period_cycles, imx->mmio_base + MX3_PWMPR);

	cr = MX3_PWMCR_PRESCALER(prescale) |
		MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
		MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH;

	if (test_bit(PWMF_ENABLED, &pwm->flags))
		cr |= MX3_PWMCR_EN;

	writel(cr, imx->mmio_base + MX3_PWMCR);

	return 0;
}

static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
{
	struct imx_chip *imx = to_imx_chip(chip);
	u32 val;

	val = readl(imx->mmio_base + MX3_PWMCR);

	if (enable)
		val |= MX3_PWMCR_EN;
	else
		val &= ~MX3_PWMCR_EN;

	writel(val, imx->mmio_base + MX3_PWMCR);
}

static int imx_pwm_config(struct pwm_chip *chip,
		struct pwm_device *pwm, int duty_ns, int period_ns)
{
	struct imx_chip *imx = to_imx_chip(chip);
	int ret;

	ret = clk_prepare_enable(imx->clk_ipg);
	if (ret)
		return ret;

	ret = imx->config(chip, pwm, duty_ns, period_ns);

	clk_disable_unprepare(imx->clk_ipg);

	return ret;
}

static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct imx_chip *imx = to_imx_chip(chip);
	int ret;

	ret = clk_prepare_enable(imx->clk_per);
	if (ret)
		return ret;

	imx->set_enable(chip, true);

	return 0;
}

static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct imx_chip *imx = to_imx_chip(chip);

	imx->set_enable(chip, false);

	clk_disable_unprepare(imx->clk_per);
}

static struct pwm_ops imx_pwm_ops = {
	.enable = imx_pwm_enable,
	.disable = imx_pwm_disable,
	.config = imx_pwm_config,
	.owner = THIS_MODULE,
};

struct imx_pwm_data {
	int (*config)(struct pwm_chip *chip,
		struct pwm_device *pwm, int duty_ns, int period_ns);
	void (*set_enable)(struct pwm_chip *chip, bool enable);
};

static struct imx_pwm_data imx_pwm_data_v1 = {
	.config = imx_pwm_config_v1,
	.set_enable = imx_pwm_set_enable_v1,
};

static struct imx_pwm_data imx_pwm_data_v2 = {
	.config = imx_pwm_config_v2,
	.set_enable = imx_pwm_set_enable_v2,
};

static const struct of_device_id imx_pwm_dt_ids[] = {
	{ .compatible = "fsl,imx1-pwm", .data = &imx_pwm_data_v1, },
	{ .compatible = "fsl,imx27-pwm", .data = &imx_pwm_data_v2, },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, imx_pwm_dt_ids);

static int imx_pwm_probe(struct platform_device *pdev)
{
	const struct of_device_id *of_id =
			of_match_device(imx_pwm_dt_ids, &pdev->dev);
	const struct imx_pwm_data *data;
	struct imx_chip *imx;
	struct resource *r;
	int ret = 0;

	if (!of_id)
		return -ENODEV;

	imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
	if (imx == NULL)
		return -ENOMEM;

	imx->clk_per = devm_clk_get(&pdev->dev, "per");
	if (IS_ERR(imx->clk_per)) {
		dev_err(&pdev->dev, "getting per clock failed with %ld\n",
				PTR_ERR(imx->clk_per));
		return PTR_ERR(imx->clk_per);
	}

	imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
	if (IS_ERR(imx->clk_ipg)) {
		dev_err(&pdev->dev, "getting ipg clock failed with %ld\n",
				PTR_ERR(imx->clk_ipg));
		return PTR_ERR(imx->clk_ipg);
	}

	imx->chip.ops = &imx_pwm_ops;
	imx->chip.dev = &pdev->dev;
	imx->chip.base = -1;
	imx->chip.npwm = 1;
	imx->chip.can_sleep = true;

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
	if (IS_ERR(imx->mmio_base))
		return PTR_ERR(imx->mmio_base);

	data = of_id->data;
	imx->config = data->config;
	imx->set_enable = data->set_enable;

	ret = pwmchip_add(&imx->chip);
	if (ret < 0)
		return ret;

	platform_set_drvdata(pdev, imx);
	return 0;
}

static int imx_pwm_remove(struct platform_device *pdev)
{
	struct imx_chip *imx;

	imx = platform_get_drvdata(pdev);
	if (imx == NULL)
		return -ENODEV;

	return pwmchip_remove(&imx->chip);
}

static struct platform_driver imx_pwm_driver = {
	.driver		= {
		.name	= "imx-pwm",
		.owner = THIS_MODULE,
		.of_match_table = imx_pwm_dt_ids,
	},
	.probe		= imx_pwm_probe,
	.remove		= imx_pwm_remove,
};

module_platform_driver(imx_pwm_driver);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
Commit	Line	Data
166091b1 SH	1	/*
	2	* simple driver for PWM (Pulse Width Modulator) controller
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
	9	*/
	10
	11	#include <linux/module.h>
	12	#include <linux/kernel.h>
	13	#include <linux/platform_device.h>
5a0e3ad6	14	#include <linux/slab.h>
166091b1 SH	15	#include <linux/err.h>
	16	#include <linux/clk.h>
	17	#include <linux/io.h>
	18	#include <linux/pwm.h>
2a8876cf	19	#include <linux/of.h>
479e2e30	20	#include <linux/of_device.h>
c010dba8	21
c010dba8 HS	22	/* i.MX1 and i.MX21 share the same PWM function block: */
	23
	24	#define MX1_PWMC 0x00 /* PWM Control Register */
	25	#define MX1_PWMS 0x04 /* PWM Sample Register */
	26	#define MX1_PWMP 0x08 /* PWM Period Register */
	27
66ad6a61	28	#define MX1_PWMC_EN (1 << 4)
c010dba8 HS	29
	30	/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
	31
	32	#define MX3_PWMCR 0x00 /* PWM Control Register */
	33	#define MX3_PWMSAR 0x0C /* PWM Sample Register */
	34	#define MX3_PWMPR 0x10 /* PWM Period Register */
	35	#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
c0d96aed JC	36	#define MX3_PWMCR_DOZEEN (1 << 24)
	37	#define MX3_PWMCR_WAITEN (1 << 23)
	38	#define MX3_PWMCR_DBGEN (1 << 22)
c010dba8	39	#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
a058cbc1	40	#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
c010dba8 HS	41	#define MX3_PWMCR_EN (1 << 0)
c010dba8 HS	42
29693248	43	struct imx_chip {
7b27c160 PZ	44	struct clk *clk_per;
7b27c160 PZ	45	struct clk *clk_ipg;
166091b1	46
166091b1 SH	47	void __iomem *mmio_base;
166091b1 SH	48
29693248	49	struct pwm_chip chip;
19e73333 SH	50
	51	int (config)(struct pwm_chip chip,
	52	struct pwm_device *pwm, int duty_ns, int period_ns);
66ad6a61	53	void (set_enable)(struct pwm_chip chip, bool enable);
166091b1 SH	54	};
166091b1 SH	55
29693248 SH	56	#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
29693248 SH	57
19e73333	58	static int imx_pwm_config_v1(struct pwm_chip *chip,
29693248	59	struct pwm_device *pwm, int duty_ns, int period_ns)
166091b1	60	{
29693248	61	struct imx_chip *imx = to_imx_chip(chip);
166091b1	62
19e73333 SH	63	/*
	64	* The PWM subsystem allows for exact frequencies. However,
	65	* I cannot connect a scope on my device to the PWM line and
	66	* thus cannot provide the program the PWM controller
	67	* exactly. Instead, I'm relying on the fact that the
	68	* Bootloader (u-boot or WinCE+haret) has programmed the PWM
	69	* function group already. So I'll just modify the PWM sample
	70	* register to follow the ratio of duty_ns vs. period_ns
	71	* accordingly.
	72	*
	73	* This is good enough for programming the brightness of
	74	* the LCD backlight.
	75	*
	76	* The real implementation would divide PERCLK[0] first by
	77	* both the prescaler (/1 .. /128) and then by CLKSEL
	78	* (/2 .. /16).
	79	*/
	80	u32 max = readl(imx->mmio_base + MX1_PWMP);
	81	u32 p = max * duty_ns / period_ns;
	82	writel(max - p, imx->mmio_base + MX1_PWMS);
	83
	84	return 0;
	85	}
	86
66ad6a61 SH	87	static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
	88	{
	89	struct imx_chip *imx = to_imx_chip(chip);
	90	u32 val;
	91
	92	val = readl(imx->mmio_base + MX1_PWMC);
	93
	94	if (enable)
	95	val \|= MX1_PWMC_EN;
	96	else
	97	val &= ~MX1_PWMC_EN;
	98
	99	writel(val, imx->mmio_base + MX1_PWMC);
	100	}
	101
19e73333 SH	102	static int imx_pwm_config_v2(struct pwm_chip *chip,
	103	struct pwm_device *pwm, int duty_ns, int period_ns)
	104	{
	105	struct imx_chip *imx = to_imx_chip(chip);
	106	unsigned long long c;
	107	unsigned long period_cycles, duty_cycles, prescale;
	108	u32 cr;
	109
7b27c160	110	c = clk_get_rate(imx->clk_per);
19e73333 SH	111	c = c * period_ns;
	112	do_div(c, 1000000000);
	113	period_cycles = c;
	114
	115	prescale = period_cycles / 0x10000 + 1;
	116
	117	period_cycles /= prescale;
	118	c = (unsigned long long)period_cycles * duty_ns;
	119	do_div(c, period_ns);
	120	duty_cycles = c;
	121
	122	/*
	123	* according to imx pwm RM, the real period value should be
	124	* PERIOD value in PWMPR plus 2.
	125	*/
	126	if (period_cycles > 2)
	127	period_cycles -= 2;
	128	else
	129	period_cycles = 0;
	130
	131	writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
	132	writel(period_cycles, imx->mmio_base + MX3_PWMPR);
	133
	134	cr = MX3_PWMCR_PRESCALER(prescale) \|
	135	MX3_PWMCR_DOZEEN \| MX3_PWMCR_WAITEN \|
8d1c24bf	136	MX3_PWMCR_DBGEN \| MX3_PWMCR_CLKSRC_IPG_HIGH;
66ad6a61	137
72da70e7	138	if (test_bit(PWMF_ENABLED, &pwm->flags))
66ad6a61	139	cr \|= MX3_PWMCR_EN;
19e73333	140
19e73333	141	writel(cr, imx->mmio_base + MX3_PWMCR);
166091b1 SH	142
	143	return 0;
	144	}
166091b1	145
66ad6a61 SH	146	static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
	147	{
	148	struct imx_chip *imx = to_imx_chip(chip);
	149	u32 val;
	150
	151	val = readl(imx->mmio_base + MX3_PWMCR);
	152
	153	if (enable)
	154	val \|= MX3_PWMCR_EN;
	155	else
	156	val &= ~MX3_PWMCR_EN;
	157
	158	writel(val, imx->mmio_base + MX3_PWMCR);
	159	}
	160
19e73333 SH	161	static int imx_pwm_config(struct pwm_chip *chip,
	162	struct pwm_device *pwm, int duty_ns, int period_ns)
	163	{
	164	struct imx_chip *imx = to_imx_chip(chip);
7b27c160 PZ	165	int ret;
	166
	167	ret = clk_prepare_enable(imx->clk_ipg);
	168	if (ret)
	169	return ret;
19e73333	170
7b27c160 PZ	171	ret = imx->config(chip, pwm, duty_ns, period_ns);
	172
	173	clk_disable_unprepare(imx->clk_ipg);
	174
	175	return ret;
19e73333 SH	176	}
19e73333 SH	177
29693248	178	static int imx_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
166091b1	179	{
29693248	180	struct imx_chip *imx = to_imx_chip(chip);
140827c1	181	int ret;
166091b1	182
7b27c160	183	ret = clk_prepare_enable(imx->clk_per);
140827c1 SH	184	if (ret)
	185	return ret;
	186
66ad6a61 SH	187	imx->set_enable(chip, true);
66ad6a61 SH	188
140827c1	189	return 0;
166091b1	190	}
166091b1	191
29693248	192	static void imx_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
166091b1	193	{
29693248	194	struct imx_chip *imx = to_imx_chip(chip);
166091b1	195
66ad6a61	196	imx->set_enable(chip, false);
166091b1	197
7b27c160	198	clk_disable_unprepare(imx->clk_per);
166091b1	199	}
166091b1	200
29693248 SH	201	static struct pwm_ops imx_pwm_ops = {
	202	.enable = imx_pwm_enable,
	203	.disable = imx_pwm_disable,
	204	.config = imx_pwm_config,
	205	.owner = THIS_MODULE,
	206	};
166091b1	207
479e2e30 PZ	208	struct imx_pwm_data {
	209	int (config)(struct pwm_chip chip,
	210	struct pwm_device *pwm, int duty_ns, int period_ns);
	211	void (set_enable)(struct pwm_chip chip, bool enable);
	212	};
	213
	214	static struct imx_pwm_data imx_pwm_data_v1 = {
	215	.config = imx_pwm_config_v1,
	216	.set_enable = imx_pwm_set_enable_v1,
	217	};
	218
	219	static struct imx_pwm_data imx_pwm_data_v2 = {
	220	.config = imx_pwm_config_v2,
	221	.set_enable = imx_pwm_set_enable_v2,
	222	};
	223
	224	static const struct of_device_id imx_pwm_dt_ids[] = {
	225	{ .compatible = "fsl,imx1-pwm", .data = &imx_pwm_data_v1, },
	226	{ .compatible = "fsl,imx27-pwm", .data = &imx_pwm_data_v2, },
	227	{ /* sentinel */ }
	228	};
	229	MODULE_DEVICE_TABLE(of, imx_pwm_dt_ids);
	230
3e9fe83d	231	static int imx_pwm_probe(struct platform_device *pdev)
166091b1	232	{
479e2e30 PZ	233	const struct of_device_id *of_id =
479e2e30 PZ	234	of_match_device(imx_pwm_dt_ids, &pdev->dev);
983290b0	235	const struct imx_pwm_data *data;
29693248	236	struct imx_chip *imx;
166091b1 SH	237	struct resource *r;
	238	int ret = 0;
	239
479e2e30 PZ	240	if (!of_id)
	241	return -ENODEV;
	242
a9970e3b	243	imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
1cbec749	244	if (imx == NULL)
166091b1	245	return -ENOMEM;
166091b1	246
7b27c160 PZ	247	imx->clk_per = devm_clk_get(&pdev->dev, "per");
	248	if (IS_ERR(imx->clk_per)) {
	249	dev_err(&pdev->dev, "getting per clock failed with %ld\n",
	250	PTR_ERR(imx->clk_per));
	251	return PTR_ERR(imx->clk_per);
	252	}
166091b1	253
7b27c160 PZ	254	imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
	255	if (IS_ERR(imx->clk_ipg)) {
	256	dev_err(&pdev->dev, "getting ipg clock failed with %ld\n",
	257	PTR_ERR(imx->clk_ipg));
	258	return PTR_ERR(imx->clk_ipg);
	259	}
166091b1	260
29693248 SH	261	imx->chip.ops = &imx_pwm_ops;
	262	imx->chip.dev = &pdev->dev;
	263	imx->chip.base = -1;
	264	imx->chip.npwm = 1;
31c4fa34	265	imx->chip.can_sleep = true;
166091b1	266
166091b1	267	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6d4294d1 TR	268	imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
	269	if (IS_ERR(imx->mmio_base))
	270	return PTR_ERR(imx->mmio_base);
166091b1	271
479e2e30 PZ	272	data = of_id->data;
	273	imx->config = data->config;
	274	imx->set_enable = data->set_enable;
19e73333	275
29693248 SH	276	ret = pwmchip_add(&imx->chip);
29693248 SH	277	if (ret < 0)
a9970e3b	278	return ret;
166091b1	279
29693248	280	platform_set_drvdata(pdev, imx);
166091b1	281	return 0;
166091b1 SH	282	}
166091b1 SH	283
77f37917	284	static int imx_pwm_remove(struct platform_device *pdev)
166091b1	285	{
29693248	286	struct imx_chip *imx;
166091b1	287
29693248 SH	288	imx = platform_get_drvdata(pdev);
29693248 SH	289	if (imx == NULL)
166091b1 SH	290	return -ENODEV;
166091b1 SH	291
a9970e3b	292	return pwmchip_remove(&imx->chip);
166091b1 SH	293	}
166091b1 SH	294
29693248	295	static struct platform_driver imx_pwm_driver = {
166091b1	296	.driver = {
479e2e30	297	.name = "imx-pwm",
3dd0a909	298	.owner = THIS_MODULE,
becbca13	299	.of_match_table = imx_pwm_dt_ids,
166091b1	300	},
29693248	301	.probe = imx_pwm_probe,
fd109112	302	.remove = imx_pwm_remove,
166091b1 SH	303	};
166091b1 SH	304
208d038f	305	module_platform_driver(imx_pwm_driver);
166091b1 SH	306
	307	MODULE_LICENSE("GPL v2");
	308	MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");