Commit | Line | Data |
---|---|---|
d16a5aa9 MW |
1 | /* |
2 | * Intel Low Power Subsystem PWM controller driver | |
3 | * | |
4 | * Copyright (C) 2014, Intel Corporation | |
5 | * Author: Mika Westerberg <mika.westerberg@linux.intel.com> | |
6 | * Author: Chew Kean Ho <kean.ho.chew@intel.com> | |
7 | * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> | |
8 | * Author: Chew Chiau Ee <chiau.ee.chew@intel.com> | |
093e00bb | 9 | * Author: Alan Cox <alan@linux.intel.com> |
d16a5aa9 MW |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/acpi.h> | |
17 | #include <linux/clk.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/pwm.h> | |
22 | #include <linux/platform_device.h> | |
093e00bb AC |
23 | #include <linux/pci.h> |
24 | ||
25 | static int pci_drv, plat_drv; /* So we know which drivers registered */ | |
d16a5aa9 MW |
26 | |
27 | #define PWM 0x00000000 | |
28 | #define PWM_ENABLE BIT(31) | |
29 | #define PWM_SW_UPDATE BIT(30) | |
30 | #define PWM_BASE_UNIT_SHIFT 8 | |
31 | #define PWM_BASE_UNIT_MASK 0x00ffff00 | |
32 | #define PWM_ON_TIME_DIV_MASK 0x000000ff | |
33 | #define PWM_DIVISION_CORRECTION 0x2 | |
34 | #define PWM_LIMIT (0x8000 + PWM_DIVISION_CORRECTION) | |
35 | #define NSECS_PER_SEC 1000000000UL | |
36 | ||
37 | struct pwm_lpss_chip { | |
38 | struct pwm_chip chip; | |
39 | void __iomem *regs; | |
40 | struct clk *clk; | |
093e00bb AC |
41 | unsigned long clk_rate; |
42 | }; | |
43 | ||
44 | struct pwm_lpss_boardinfo { | |
45 | unsigned long clk_rate; | |
46 | }; | |
47 | ||
48 | /* BayTrail */ | |
49 | static const struct pwm_lpss_boardinfo byt_info = { | |
50 | 25000000 | |
d16a5aa9 MW |
51 | }; |
52 | ||
53 | static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip) | |
54 | { | |
55 | return container_of(chip, struct pwm_lpss_chip, chip); | |
56 | } | |
57 | ||
58 | static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm, | |
59 | int duty_ns, int period_ns) | |
60 | { | |
61 | struct pwm_lpss_chip *lpwm = to_lpwm(chip); | |
62 | u8 on_time_div; | |
63 | unsigned long c; | |
64 | unsigned long long base_unit, freq = NSECS_PER_SEC; | |
65 | u32 ctrl; | |
66 | ||
67 | do_div(freq, period_ns); | |
68 | ||
69 | /* The equation is: base_unit = ((freq / c) * 65536) + correction */ | |
70 | base_unit = freq * 65536; | |
71 | ||
093e00bb | 72 | c = lpwm->clk_rate; |
d16a5aa9 MW |
73 | if (!c) |
74 | return -EINVAL; | |
75 | ||
76 | do_div(base_unit, c); | |
77 | base_unit += PWM_DIVISION_CORRECTION; | |
78 | if (base_unit > PWM_LIMIT) | |
79 | return -EINVAL; | |
80 | ||
81 | if (duty_ns <= 0) | |
82 | duty_ns = 1; | |
83 | on_time_div = 255 - (255 * duty_ns / period_ns); | |
84 | ||
85 | ctrl = readl(lpwm->regs + PWM); | |
86 | ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK); | |
87 | ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT; | |
88 | ctrl |= on_time_div; | |
89 | /* request PWM to update on next cycle */ | |
90 | ctrl |= PWM_SW_UPDATE; | |
91 | writel(ctrl, lpwm->regs + PWM); | |
92 | ||
93 | return 0; | |
94 | } | |
95 | ||
96 | static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm) | |
97 | { | |
98 | struct pwm_lpss_chip *lpwm = to_lpwm(chip); | |
99 | u32 ctrl; | |
100 | int ret; | |
101 | ||
102 | ret = clk_prepare_enable(lpwm->clk); | |
103 | if (ret) | |
104 | return ret; | |
105 | ||
106 | ctrl = readl(lpwm->regs + PWM); | |
107 | writel(ctrl | PWM_ENABLE, lpwm->regs + PWM); | |
108 | ||
109 | return 0; | |
110 | } | |
111 | ||
112 | static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm) | |
113 | { | |
114 | struct pwm_lpss_chip *lpwm = to_lpwm(chip); | |
115 | u32 ctrl; | |
116 | ||
117 | ctrl = readl(lpwm->regs + PWM); | |
118 | writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM); | |
119 | ||
120 | clk_disable_unprepare(lpwm->clk); | |
121 | } | |
122 | ||
123 | static const struct pwm_ops pwm_lpss_ops = { | |
124 | .config = pwm_lpss_config, | |
125 | .enable = pwm_lpss_enable, | |
126 | .disable = pwm_lpss_disable, | |
127 | .owner = THIS_MODULE, | |
128 | }; | |
129 | ||
093e00bb AC |
130 | static struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, |
131 | struct resource *r, | |
89c0339e | 132 | const struct pwm_lpss_boardinfo *info) |
d16a5aa9 MW |
133 | { |
134 | struct pwm_lpss_chip *lpwm; | |
d16a5aa9 MW |
135 | int ret; |
136 | ||
093e00bb | 137 | lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL); |
d16a5aa9 | 138 | if (!lpwm) |
093e00bb | 139 | return ERR_PTR(-ENOMEM); |
d16a5aa9 | 140 | |
093e00bb | 141 | lpwm->regs = devm_ioremap_resource(dev, r); |
d16a5aa9 | 142 | if (IS_ERR(lpwm->regs)) |
89c0339e | 143 | return ERR_CAST(lpwm->regs); |
093e00bb AC |
144 | |
145 | if (info) { | |
146 | lpwm->clk_rate = info->clk_rate; | |
147 | } else { | |
148 | lpwm->clk = devm_clk_get(dev, NULL); | |
149 | if (IS_ERR(lpwm->clk)) { | |
150 | dev_err(dev, "failed to get PWM clock\n"); | |
151 | return ERR_CAST(lpwm->clk); | |
152 | } | |
153 | lpwm->clk_rate = clk_get_rate(lpwm->clk); | |
d16a5aa9 MW |
154 | } |
155 | ||
093e00bb | 156 | lpwm->chip.dev = dev; |
d16a5aa9 MW |
157 | lpwm->chip.ops = &pwm_lpss_ops; |
158 | lpwm->chip.base = -1; | |
159 | lpwm->chip.npwm = 1; | |
160 | ||
161 | ret = pwmchip_add(&lpwm->chip); | |
162 | if (ret) { | |
093e00bb AC |
163 | dev_err(dev, "failed to add PWM chip: %d\n", ret); |
164 | return ERR_PTR(ret); | |
d16a5aa9 MW |
165 | } |
166 | ||
093e00bb | 167 | return lpwm; |
d16a5aa9 MW |
168 | } |
169 | ||
093e00bb | 170 | static int pwm_lpss_remove(struct pwm_lpss_chip *lpwm) |
d16a5aa9 | 171 | { |
d16a5aa9 MW |
172 | u32 ctrl; |
173 | ||
174 | ctrl = readl(lpwm->regs + PWM); | |
175 | writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM); | |
176 | ||
177 | return pwmchip_remove(&lpwm->chip); | |
178 | } | |
179 | ||
093e00bb AC |
180 | static int pwm_lpss_probe_pci(struct pci_dev *pdev, |
181 | const struct pci_device_id *id) | |
182 | { | |
183 | const struct pwm_lpss_boardinfo *info; | |
184 | struct pwm_lpss_chip *lpwm; | |
185 | int err; | |
186 | ||
187 | err = pci_enable_device(pdev); | |
188 | if (err < 0) | |
189 | return err; | |
190 | ||
191 | info = (struct pwm_lpss_boardinfo *)id->driver_data; | |
192 | lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info); | |
193 | if (IS_ERR(lpwm)) | |
194 | return PTR_ERR(lpwm); | |
195 | ||
196 | pci_set_drvdata(pdev, lpwm); | |
197 | return 0; | |
198 | } | |
199 | ||
200 | static void pwm_lpss_remove_pci(struct pci_dev *pdev) | |
201 | { | |
202 | struct pwm_lpss_chip *lpwm = pci_get_drvdata(pdev); | |
203 | ||
204 | pwm_lpss_remove(lpwm); | |
205 | pci_disable_device(pdev); | |
206 | } | |
207 | ||
208 | static struct pci_device_id pwm_lpss_pci_ids[] = { | |
209 | { PCI_VDEVICE(INTEL, 0x0f08), (unsigned long)&byt_info}, | |
210 | { PCI_VDEVICE(INTEL, 0x0f09), (unsigned long)&byt_info}, | |
211 | { }, | |
212 | }; | |
213 | MODULE_DEVICE_TABLE(pci, pwm_lpss_pci_ids); | |
214 | ||
215 | static struct pci_driver pwm_lpss_driver_pci = { | |
216 | .name = "pwm-lpss", | |
217 | .id_table = pwm_lpss_pci_ids, | |
218 | .probe = pwm_lpss_probe_pci, | |
219 | .remove = pwm_lpss_remove_pci, | |
220 | }; | |
221 | ||
222 | static int pwm_lpss_probe_platform(struct platform_device *pdev) | |
223 | { | |
224 | struct pwm_lpss_chip *lpwm; | |
225 | struct resource *r; | |
226 | ||
227 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
228 | ||
229 | lpwm = pwm_lpss_probe(&pdev->dev, r, NULL); | |
230 | if (IS_ERR(lpwm)) | |
231 | return PTR_ERR(lpwm); | |
232 | ||
233 | platform_set_drvdata(pdev, lpwm); | |
234 | return 0; | |
235 | } | |
236 | ||
237 | static int pwm_lpss_remove_platform(struct platform_device *pdev) | |
238 | { | |
239 | struct pwm_lpss_chip *lpwm = platform_get_drvdata(pdev); | |
240 | ||
241 | return pwm_lpss_remove(lpwm); | |
242 | } | |
243 | ||
244 | static const struct acpi_device_id pwm_lpss_acpi_match[] = { | |
245 | { "80860F09", 0 }, | |
246 | { }, | |
247 | }; | |
248 | MODULE_DEVICE_TABLE(acpi, pwm_lpss_acpi_match); | |
249 | ||
250 | static struct platform_driver pwm_lpss_driver_platform = { | |
d16a5aa9 MW |
251 | .driver = { |
252 | .name = "pwm-lpss", | |
253 | .acpi_match_table = pwm_lpss_acpi_match, | |
254 | }, | |
093e00bb AC |
255 | .probe = pwm_lpss_probe_platform, |
256 | .remove = pwm_lpss_remove_platform, | |
d16a5aa9 | 257 | }; |
093e00bb AC |
258 | |
259 | static int __init pwm_init(void) | |
260 | { | |
261 | pci_drv = pci_register_driver(&pwm_lpss_driver_pci); | |
262 | plat_drv = platform_driver_register(&pwm_lpss_driver_platform); | |
263 | if (pci_drv && plat_drv) | |
264 | return pci_drv; | |
265 | ||
266 | return 0; | |
267 | } | |
268 | module_init(pwm_init); | |
269 | ||
270 | static void __exit pwm_exit(void) | |
271 | { | |
272 | if (!pci_drv) | |
273 | pci_unregister_driver(&pwm_lpss_driver_pci); | |
274 | if (!plat_drv) | |
275 | platform_driver_unregister(&pwm_lpss_driver_platform); | |
276 | } | |
277 | module_exit(pwm_exit); | |
d16a5aa9 MW |
278 | |
279 | MODULE_DESCRIPTION("PWM driver for Intel LPSS"); | |
280 | MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); | |
281 | MODULE_LICENSE("GPL v2"); | |
282 | MODULE_ALIAS("platform:pwm-lpss"); |