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d16a5aa9 MW |
1 | /* |
2 | * Intel Low Power Subsystem PWM controller driver | |
3 | * | |
4 | * Copyright (C) 2014, Intel Corporation | |
5 | * Author: Mika Westerberg <mika.westerberg@linux.intel.com> | |
6 | * Author: Chew Kean Ho <kean.ho.chew@intel.com> | |
7 | * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> | |
8 | * Author: Chew Chiau Ee <chiau.ee.chew@intel.com> | |
093e00bb | 9 | * Author: Alan Cox <alan@linux.intel.com> |
d16a5aa9 MW |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/acpi.h> | |
d16a5aa9 MW |
17 | #include <linux/device.h> |
18 | #include <linux/kernel.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/pwm.h> | |
21 | #include <linux/platform_device.h> | |
093e00bb AC |
22 | #include <linux/pci.h> |
23 | ||
24 | static int pci_drv, plat_drv; /* So we know which drivers registered */ | |
d16a5aa9 MW |
25 | |
26 | #define PWM 0x00000000 | |
27 | #define PWM_ENABLE BIT(31) | |
28 | #define PWM_SW_UPDATE BIT(30) | |
29 | #define PWM_BASE_UNIT_SHIFT 8 | |
30 | #define PWM_BASE_UNIT_MASK 0x00ffff00 | |
31 | #define PWM_ON_TIME_DIV_MASK 0x000000ff | |
32 | #define PWM_DIVISION_CORRECTION 0x2 | |
33 | #define PWM_LIMIT (0x8000 + PWM_DIVISION_CORRECTION) | |
34 | #define NSECS_PER_SEC 1000000000UL | |
35 | ||
36 | struct pwm_lpss_chip { | |
37 | struct pwm_chip chip; | |
38 | void __iomem *regs; | |
093e00bb AC |
39 | unsigned long clk_rate; |
40 | }; | |
41 | ||
42 | struct pwm_lpss_boardinfo { | |
43 | unsigned long clk_rate; | |
44 | }; | |
45 | ||
46 | /* BayTrail */ | |
47 | static const struct pwm_lpss_boardinfo byt_info = { | |
48 | 25000000 | |
d16a5aa9 MW |
49 | }; |
50 | ||
373c5782 AC |
51 | /* Braswell */ |
52 | static const struct pwm_lpss_boardinfo bsw_info = { | |
53 | 19200000 | |
54 | }; | |
55 | ||
d16a5aa9 MW |
56 | static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip) |
57 | { | |
58 | return container_of(chip, struct pwm_lpss_chip, chip); | |
59 | } | |
60 | ||
61 | static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm, | |
62 | int duty_ns, int period_ns) | |
63 | { | |
64 | struct pwm_lpss_chip *lpwm = to_lpwm(chip); | |
65 | u8 on_time_div; | |
66 | unsigned long c; | |
67 | unsigned long long base_unit, freq = NSECS_PER_SEC; | |
68 | u32 ctrl; | |
69 | ||
70 | do_div(freq, period_ns); | |
71 | ||
72 | /* The equation is: base_unit = ((freq / c) * 65536) + correction */ | |
73 | base_unit = freq * 65536; | |
74 | ||
093e00bb | 75 | c = lpwm->clk_rate; |
d16a5aa9 MW |
76 | if (!c) |
77 | return -EINVAL; | |
78 | ||
79 | do_div(base_unit, c); | |
80 | base_unit += PWM_DIVISION_CORRECTION; | |
81 | if (base_unit > PWM_LIMIT) | |
82 | return -EINVAL; | |
83 | ||
84 | if (duty_ns <= 0) | |
85 | duty_ns = 1; | |
86 | on_time_div = 255 - (255 * duty_ns / period_ns); | |
87 | ||
88 | ctrl = readl(lpwm->regs + PWM); | |
89 | ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK); | |
90 | ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT; | |
91 | ctrl |= on_time_div; | |
92 | /* request PWM to update on next cycle */ | |
93 | ctrl |= PWM_SW_UPDATE; | |
94 | writel(ctrl, lpwm->regs + PWM); | |
95 | ||
96 | return 0; | |
97 | } | |
98 | ||
99 | static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm) | |
100 | { | |
101 | struct pwm_lpss_chip *lpwm = to_lpwm(chip); | |
102 | u32 ctrl; | |
d16a5aa9 MW |
103 | |
104 | ctrl = readl(lpwm->regs + PWM); | |
105 | writel(ctrl | PWM_ENABLE, lpwm->regs + PWM); | |
106 | ||
107 | return 0; | |
108 | } | |
109 | ||
110 | static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm) | |
111 | { | |
112 | struct pwm_lpss_chip *lpwm = to_lpwm(chip); | |
113 | u32 ctrl; | |
114 | ||
115 | ctrl = readl(lpwm->regs + PWM); | |
116 | writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM); | |
d16a5aa9 MW |
117 | } |
118 | ||
119 | static const struct pwm_ops pwm_lpss_ops = { | |
120 | .config = pwm_lpss_config, | |
121 | .enable = pwm_lpss_enable, | |
122 | .disable = pwm_lpss_disable, | |
123 | .owner = THIS_MODULE, | |
124 | }; | |
125 | ||
093e00bb AC |
126 | static struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, |
127 | struct resource *r, | |
89c0339e | 128 | const struct pwm_lpss_boardinfo *info) |
d16a5aa9 MW |
129 | { |
130 | struct pwm_lpss_chip *lpwm; | |
d16a5aa9 MW |
131 | int ret; |
132 | ||
093e00bb | 133 | lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL); |
d16a5aa9 | 134 | if (!lpwm) |
093e00bb | 135 | return ERR_PTR(-ENOMEM); |
d16a5aa9 | 136 | |
093e00bb | 137 | lpwm->regs = devm_ioremap_resource(dev, r); |
d16a5aa9 | 138 | if (IS_ERR(lpwm->regs)) |
89c0339e | 139 | return ERR_CAST(lpwm->regs); |
093e00bb | 140 | |
65accd87 | 141 | lpwm->clk_rate = info->clk_rate; |
093e00bb | 142 | lpwm->chip.dev = dev; |
d16a5aa9 MW |
143 | lpwm->chip.ops = &pwm_lpss_ops; |
144 | lpwm->chip.base = -1; | |
145 | lpwm->chip.npwm = 1; | |
146 | ||
147 | ret = pwmchip_add(&lpwm->chip); | |
148 | if (ret) { | |
093e00bb AC |
149 | dev_err(dev, "failed to add PWM chip: %d\n", ret); |
150 | return ERR_PTR(ret); | |
d16a5aa9 MW |
151 | } |
152 | ||
093e00bb | 153 | return lpwm; |
d16a5aa9 MW |
154 | } |
155 | ||
093e00bb | 156 | static int pwm_lpss_remove(struct pwm_lpss_chip *lpwm) |
d16a5aa9 | 157 | { |
d16a5aa9 MW |
158 | u32 ctrl; |
159 | ||
160 | ctrl = readl(lpwm->regs + PWM); | |
161 | writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM); | |
162 | ||
163 | return pwmchip_remove(&lpwm->chip); | |
164 | } | |
165 | ||
093e00bb AC |
166 | static int pwm_lpss_probe_pci(struct pci_dev *pdev, |
167 | const struct pci_device_id *id) | |
168 | { | |
169 | const struct pwm_lpss_boardinfo *info; | |
170 | struct pwm_lpss_chip *lpwm; | |
171 | int err; | |
172 | ||
173 | err = pci_enable_device(pdev); | |
174 | if (err < 0) | |
175 | return err; | |
176 | ||
177 | info = (struct pwm_lpss_boardinfo *)id->driver_data; | |
178 | lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info); | |
179 | if (IS_ERR(lpwm)) | |
180 | return PTR_ERR(lpwm); | |
181 | ||
182 | pci_set_drvdata(pdev, lpwm); | |
183 | return 0; | |
184 | } | |
185 | ||
186 | static void pwm_lpss_remove_pci(struct pci_dev *pdev) | |
187 | { | |
188 | struct pwm_lpss_chip *lpwm = pci_get_drvdata(pdev); | |
189 | ||
190 | pwm_lpss_remove(lpwm); | |
191 | pci_disable_device(pdev); | |
192 | } | |
193 | ||
194 | static struct pci_device_id pwm_lpss_pci_ids[] = { | |
195 | { PCI_VDEVICE(INTEL, 0x0f08), (unsigned long)&byt_info}, | |
196 | { PCI_VDEVICE(INTEL, 0x0f09), (unsigned long)&byt_info}, | |
373c5782 AC |
197 | { PCI_VDEVICE(INTEL, 0x2288), (unsigned long)&bsw_info}, |
198 | { PCI_VDEVICE(INTEL, 0x2289), (unsigned long)&bsw_info}, | |
093e00bb AC |
199 | { }, |
200 | }; | |
201 | MODULE_DEVICE_TABLE(pci, pwm_lpss_pci_ids); | |
202 | ||
203 | static struct pci_driver pwm_lpss_driver_pci = { | |
204 | .name = "pwm-lpss", | |
205 | .id_table = pwm_lpss_pci_ids, | |
206 | .probe = pwm_lpss_probe_pci, | |
207 | .remove = pwm_lpss_remove_pci, | |
208 | }; | |
209 | ||
210 | static int pwm_lpss_probe_platform(struct platform_device *pdev) | |
211 | { | |
65accd87 HK |
212 | const struct pwm_lpss_boardinfo *info; |
213 | const struct acpi_device_id *id; | |
093e00bb AC |
214 | struct pwm_lpss_chip *lpwm; |
215 | struct resource *r; | |
216 | ||
65accd87 HK |
217 | id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); |
218 | if (!id) | |
219 | return -ENODEV; | |
220 | ||
093e00bb AC |
221 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
222 | ||
65accd87 HK |
223 | info = (struct pwm_lpss_boardinfo *)id->driver_data; |
224 | lpwm = pwm_lpss_probe(&pdev->dev, r, info); | |
093e00bb AC |
225 | if (IS_ERR(lpwm)) |
226 | return PTR_ERR(lpwm); | |
227 | ||
228 | platform_set_drvdata(pdev, lpwm); | |
229 | return 0; | |
230 | } | |
231 | ||
232 | static int pwm_lpss_remove_platform(struct platform_device *pdev) | |
233 | { | |
234 | struct pwm_lpss_chip *lpwm = platform_get_drvdata(pdev); | |
235 | ||
236 | return pwm_lpss_remove(lpwm); | |
237 | } | |
238 | ||
239 | static const struct acpi_device_id pwm_lpss_acpi_match[] = { | |
65accd87 | 240 | { "80860F09", (unsigned long)&byt_info }, |
373c5782 | 241 | { "80862288", (unsigned long)&bsw_info }, |
093e00bb AC |
242 | { }, |
243 | }; | |
244 | MODULE_DEVICE_TABLE(acpi, pwm_lpss_acpi_match); | |
245 | ||
246 | static struct platform_driver pwm_lpss_driver_platform = { | |
d16a5aa9 MW |
247 | .driver = { |
248 | .name = "pwm-lpss", | |
249 | .acpi_match_table = pwm_lpss_acpi_match, | |
250 | }, | |
093e00bb AC |
251 | .probe = pwm_lpss_probe_platform, |
252 | .remove = pwm_lpss_remove_platform, | |
d16a5aa9 | 253 | }; |
093e00bb AC |
254 | |
255 | static int __init pwm_init(void) | |
256 | { | |
257 | pci_drv = pci_register_driver(&pwm_lpss_driver_pci); | |
258 | plat_drv = platform_driver_register(&pwm_lpss_driver_platform); | |
259 | if (pci_drv && plat_drv) | |
260 | return pci_drv; | |
261 | ||
262 | return 0; | |
263 | } | |
264 | module_init(pwm_init); | |
265 | ||
266 | static void __exit pwm_exit(void) | |
267 | { | |
268 | if (!pci_drv) | |
269 | pci_unregister_driver(&pwm_lpss_driver_pci); | |
270 | if (!plat_drv) | |
271 | platform_driver_unregister(&pwm_lpss_driver_platform); | |
272 | } | |
273 | module_exit(pwm_exit); | |
d16a5aa9 MW |
274 | |
275 | MODULE_DESCRIPTION("PWM driver for Intel LPSS"); | |
276 | MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); | |
277 | MODULE_LICENSE("GPL v2"); | |
278 | MODULE_ALIAS("platform:pwm-lpss"); |