pwm: spear: Remove unused *dev from struct spear_pwm_chip
[deliverable/linux.git] / drivers / pwm / pwm-pxa.c
CommitLineData
75540c1a 1/*
45b301d2 2 * drivers/pwm/pwm-pxa.c
75540c1a 3 *
4 * simple driver for PWM (Pulse Width Modulator) controller
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * 2008-02-13 initial version
11 * eric miao <eric.miao@marvell.com>
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
5a0e3ad6 17#include <linux/slab.h>
75540c1a 18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/io.h>
21#include <linux/pwm.h>
22
23#include <asm/div64.h>
75540c1a 24
3d2a98cd 25#define HAS_SECONDARY_PWM 0x10
a757ad8b 26#define PWM_ID_BASE(d) ((d) & 0xf)
3d2a98cd
EM
27
28static const struct platform_device_id pwm_id_table[] = {
29 /* PWM has_secondary_pwm? */
30 { "pxa25x-pwm", 0 },
a757ad8b 31 { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM },
a27ba768
EM
32 { "pxa168-pwm", 1 },
33 { "pxa910-pwm", 1 },
3d2a98cd
EM
34 { },
35};
36MODULE_DEVICE_TABLE(platform, pwm_id_table);
37
75540c1a 38/* PWM registers and bits definitions */
39#define PWMCR (0x00)
40#define PWMDCR (0x04)
41#define PWMPCR (0x08)
42
43#define PWMCR_SD (1 << 6)
44#define PWMDCR_FD (1 << 10)
45
17b2b478
TR
46struct pxa_pwm_chip {
47 struct pwm_chip chip;
48 struct device *dev;
75540c1a 49
75540c1a 50 struct clk *clk;
51 void __iomem *mmio_base;
75540c1a 52};
53
17b2b478
TR
54static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
55{
56 return container_of(chip, struct pxa_pwm_chip, chip);
57}
58
75540c1a 59/*
60 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
61 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
62 */
17b2b478
TR
63static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
64 int duty_ns, int period_ns)
75540c1a 65{
17b2b478 66 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
75540c1a 67 unsigned long long c;
68 unsigned long period_cycles, prescale, pv, dc;
17b2b478
TR
69 unsigned long offset;
70 int rc;
75540c1a 71
17b2b478
TR
72 offset = pwm->hwpwm ? 0x10 : 0;
73
74 c = clk_get_rate(pc->clk);
75540c1a 75 c = c * period_ns;
76 do_div(c, 1000000000);
77 period_cycles = c;
78
71a35d75 79 if (period_cycles < 1)
75540c1a 80 period_cycles = 1;
81 prescale = (period_cycles - 1) / 1024;
82 pv = period_cycles / (prescale + 1) - 1;
83
84 if (prescale > 63)
85 return -EINVAL;
86
87 if (duty_ns == period_ns)
88 dc = PWMDCR_FD;
89 else
90 dc = (pv + 1) * duty_ns / period_ns;
91
92 /* NOTE: the clock to PWM has to be enabled first
93 * before writing to the registers
94 */
17b2b478
TR
95 rc = clk_prepare_enable(pc->clk);
96 if (rc < 0)
97 return rc;
98
99 writel(prescale, pc->mmio_base + offset + PWMCR);
100 writel(dc, pc->mmio_base + offset + PWMDCR);
101 writel(pv, pc->mmio_base + offset + PWMPCR);
75540c1a 102
17b2b478 103 clk_disable_unprepare(pc->clk);
75540c1a 104 return 0;
105}
75540c1a 106
17b2b478 107static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
75540c1a 108{
17b2b478 109 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
c860d701 110
b014a30c 111 return clk_prepare_enable(pc->clk);
75540c1a 112}
75540c1a 113
17b2b478 114static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
75540c1a 115{
17b2b478 116 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
75540c1a 117
b014a30c 118 clk_disable_unprepare(pc->clk);
75540c1a 119}
75540c1a 120
17b2b478
TR
121static struct pwm_ops pxa_pwm_ops = {
122 .config = pxa_pwm_config,
123 .enable = pxa_pwm_enable,
124 .disable = pxa_pwm_disable,
125 .owner = THIS_MODULE,
126};
75540c1a 127
3e9fe83d 128static int pwm_probe(struct platform_device *pdev)
75540c1a 129{
b3282ab1 130 const struct platform_device_id *id = platform_get_device_id(pdev);
17b2b478 131 struct pxa_pwm_chip *pwm;
75540c1a 132 struct resource *r;
133 int ret = 0;
134
45b301d2 135 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
75540c1a 136 if (pwm == NULL) {
137 dev_err(&pdev->dev, "failed to allocate memory\n");
3d2a98cd 138 return -ENOMEM;
75540c1a 139 }
140
45b301d2
AL
141 pwm->clk = devm_clk_get(&pdev->dev, NULL);
142 if (IS_ERR(pwm->clk))
143 return PTR_ERR(pwm->clk);
144
17b2b478
TR
145 pwm->chip.dev = &pdev->dev;
146 pwm->chip.ops = &pxa_pwm_ops;
147 pwm->chip.base = -1;
148 pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
75540c1a 149
75540c1a 150 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
151 if (r == NULL) {
152 dev_err(&pdev->dev, "no memory resource defined\n");
45b301d2 153 return -ENODEV;
75540c1a 154 }
155
6d4294d1
TR
156 pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
157 if (IS_ERR(pwm->mmio_base))
158 return PTR_ERR(pwm->mmio_base);
75540c1a 159
17b2b478
TR
160 ret = pwmchip_add(&pwm->chip);
161 if (ret < 0) {
162 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
163 return ret;
3d2a98cd
EM
164 }
165
75540c1a 166 platform_set_drvdata(pdev, pwm);
3d2a98cd 167 return 0;
75540c1a 168}
169
77f37917 170static int pwm_remove(struct platform_device *pdev)
75540c1a 171{
17b2b478 172 struct pxa_pwm_chip *chip;
75540c1a 173
17b2b478
TR
174 chip = platform_get_drvdata(pdev);
175 if (chip == NULL)
75540c1a 176 return -ENODEV;
177
abeaf755 178 return pwmchip_remove(&chip->chip);
75540c1a 179}
180
3d2a98cd 181static struct platform_driver pwm_driver = {
75540c1a 182 .driver = {
183 .name = "pxa25x-pwm",
3d2a98cd 184 .owner = THIS_MODULE,
75540c1a 185 },
3d2a98cd 186 .probe = pwm_probe,
fd109112 187 .remove = pwm_remove,
3d2a98cd 188 .id_table = pwm_id_table,
75540c1a 189};
190
191static int __init pwm_init(void)
192{
3d2a98cd 193 return platform_driver_register(&pwm_driver);
75540c1a 194}
195arch_initcall(pwm_init);
196
197static void __exit pwm_exit(void)
198{
3d2a98cd 199 platform_driver_unregister(&pwm_driver);
75540c1a 200}
201module_exit(pwm_exit);
b5f0228a
GL
202
203MODULE_LICENSE("GPL v2");
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