[deliverable/linux.git] / drivers / pwm / pwm-samsung.c

/* arch/arm/plat-s3c/pwm.c
 *
 * Copyright (c) 2007 Ben Dooks
 * Copyright (c) 2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
 *
 * S3C series PWM device core
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
*/

#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/pwm.h>

#include <mach/map.h>

#include <plat/regs-timer.h>

struct s3c_chip {
	struct platform_device	*pdev;

	struct clk		*clk_div;
	struct clk		*clk;
	const char		*label;

	unsigned int		 period_ns;
	unsigned int		 duty_ns;

	unsigned char		 tcon_base;
	unsigned char		 pwm_id;
	struct pwm_chip		 chip;
};

#define to_s3c_chip(chip)	container_of(chip, struct s3c_chip, chip)

#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)

static struct clk *clk_scaler[2];

static inline int pwm_is_tdiv(struct s3c_chip *chip)
{
	return clk_get_parent(chip->clk) == chip->clk_div;
}

#define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
#define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
#define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
#define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))

static int s3c_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct s3c_chip *s3c = to_s3c_chip(chip);
	unsigned long flags;
	unsigned long tcon;

	local_irq_save(flags);

	tcon = __raw_readl(S3C2410_TCON);
	tcon |= pwm_tcon_start(s3c);
	__raw_writel(tcon, S3C2410_TCON);

	local_irq_restore(flags);

	return 0;
}

static void s3c_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct s3c_chip *s3c = to_s3c_chip(chip);
	unsigned long flags;
	unsigned long tcon;

	local_irq_save(flags);

	tcon = __raw_readl(S3C2410_TCON);
	tcon &= ~pwm_tcon_start(s3c);
	__raw_writel(tcon, S3C2410_TCON);

	local_irq_restore(flags);
}

static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
{
	unsigned long tin_parent_rate;
	unsigned int div;

	tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
	pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);

	for (div = 2; div <= 16; div *= 2) {
		if ((tin_parent_rate / (div << 16)) < freq)
			return tin_parent_rate / div;
	}

	return tin_parent_rate / 16;
}

#define NS_IN_HZ (1000000000UL)

static int s3c_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
		int duty_ns, int period_ns)
{
	struct s3c_chip *s3c = to_s3c_chip(chip);
	unsigned long tin_rate;
	unsigned long tin_ns;
	unsigned long period;
	unsigned long flags;
	unsigned long tcon;
	unsigned long tcnt;
	long tcmp;

	/* We currently avoid using 64bit arithmetic by using the
	 * fact that anything faster than 1Hz is easily representable
	 * by 32bits. */

	if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
		return -ERANGE;

	if (duty_ns > period_ns)
		return -EINVAL;

	if (period_ns == s3c->period_ns &&
	    duty_ns == s3c->duty_ns)
		return 0;

	/* The TCMP and TCNT can be read without a lock, they're not
	 * shared between the timers. */

	tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
	tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));

	period = NS_IN_HZ / period_ns;

	pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
		duty_ns, period_ns, period);

	/* Check to see if we are changing the clock rate of the PWM */

	if (s3c->period_ns != period_ns) {
		if (pwm_is_tdiv(s3c)) {
			tin_rate = pwm_calc_tin(s3c, period);
			clk_set_rate(s3c->clk_div, tin_rate);
		} else
			tin_rate = clk_get_rate(s3c->clk);

		s3c->period_ns = period_ns;

		pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);

		tin_ns = NS_IN_HZ / tin_rate;
		tcnt = period_ns / tin_ns;
	} else
		tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);

	/* Note, counters count down */

	tcmp = duty_ns / tin_ns;
	tcmp = tcnt - tcmp;
	/* the pwm hw only checks the compare register after a decrement,
	   so the pin never toggles if tcmp = tcnt */
	if (tcmp == tcnt)
		tcmp--;

	pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);

	if (tcmp < 0)
		tcmp = 0;

	/* Update the PWM register block. */

	local_irq_save(flags);

	__raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
	__raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));

	tcon = __raw_readl(S3C2410_TCON);
	tcon |= pwm_tcon_manulupdate(s3c);
	tcon |= pwm_tcon_autoreload(s3c);
	__raw_writel(tcon, S3C2410_TCON);

	tcon &= ~pwm_tcon_manulupdate(s3c);
	__raw_writel(tcon, S3C2410_TCON);

	local_irq_restore(flags);

	return 0;
}

static struct pwm_ops s3c_pwm_ops = {
	.enable = s3c_pwm_enable,
	.disable = s3c_pwm_disable,
	.config = s3c_pwm_config,
	.owner = THIS_MODULE,
};

static int s3c_pwm_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct s3c_chip *s3c;
	unsigned long flags;
	unsigned long tcon;
	unsigned int id = pdev->id;
	int ret;

	if (id == 4) {
		dev_err(dev, "TIMER4 is currently not supported\n");
		return -ENXIO;
	}

	s3c = kzalloc(sizeof(*s3c), GFP_KERNEL);
	if (s3c == NULL) {
		dev_err(dev, "failed to allocate pwm_device\n");
		return -ENOMEM;
	}

	/* calculate base of control bits in TCON */
	s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
	s3c->chip.ops = &s3c_pwm_ops;
	s3c->chip.base = -1;
	s3c->chip.npwm = 1;

	s3c->clk = clk_get(dev, "pwm-tin");
	if (IS_ERR(s3c->clk)) {
		dev_err(dev, "failed to get pwm tin clk\n");
		ret = PTR_ERR(s3c->clk);
		goto err_alloc;
	}

	s3c->clk_div = clk_get(dev, "pwm-tdiv");
	if (IS_ERR(s3c->clk_div)) {
		dev_err(dev, "failed to get pwm tdiv clk\n");
		ret = PTR_ERR(s3c->clk_div);
		goto err_clk_tin;
	}

	clk_enable(s3c->clk);
	clk_enable(s3c->clk_div);

	local_irq_save(flags);

	tcon = __raw_readl(S3C2410_TCON);
	tcon |= pwm_tcon_invert(s3c);
	__raw_writel(tcon, S3C2410_TCON);

	local_irq_restore(flags);

	ret = pwmchip_add(&s3c->chip);
	if (ret < 0) {
		dev_err(dev, "failed to register pwm\n");
		goto err_clk_tdiv;
	}

	pwm_dbg(s3c, "config bits %02x\n",
		(__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);

	dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
		 clk_get_rate(s3c->clk),
		 clk_get_rate(s3c->clk_div),
		 pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);

	platform_set_drvdata(pdev, s3c);
	return 0;

 err_clk_tdiv:
	clk_disable(s3c->clk_div);
	clk_disable(s3c->clk);
	clk_put(s3c->clk_div);

 err_clk_tin:
	clk_put(s3c->clk);

 err_alloc:
	kfree(s3c);
	return ret;
}

static int __devexit s3c_pwm_remove(struct platform_device *pdev)
{
	struct s3c_chip *s3c = platform_get_drvdata(pdev);
	int err;

	err = pwmchip_remove(&s3c->chip);
	if (err < 0)
		return err;

	clk_disable(s3c->clk_div);
	clk_disable(s3c->clk);
	clk_put(s3c->clk_div);
	clk_put(s3c->clk);
	kfree(s3c);

	return 0;
}

#ifdef CONFIG_PM
static int s3c_pwm_suspend(struct platform_device *pdev, pm_message_t state)
{
	struct s3c_chip *s3c = platform_get_drvdata(pdev);

	/* No one preserve these values during suspend so reset them
	 * Otherwise driver leaves PWM unconfigured if same values
	 * passed to pwm_config
	 */
	s3c->period_ns = 0;
	s3c->duty_ns = 0;

	return 0;
}

static int s3c_pwm_resume(struct platform_device *pdev)
{
	struct s3c_chip *s3c = platform_get_drvdata(pdev);
	unsigned long tcon;

	/* Restore invertion */
	tcon = __raw_readl(S3C2410_TCON);
	tcon |= pwm_tcon_invert(s3c);
	__raw_writel(tcon, S3C2410_TCON);

	return 0;
}

#else
#define s3c_pwm_suspend NULL
#define s3c_pwm_resume NULL
#endif

static struct platform_driver s3c_pwm_driver = {
	.driver		= {
		.name	= "s3c24xx-pwm",
		.owner	= THIS_MODULE,
	},
	.probe		= s3c_pwm_probe,
	.remove		= __devexit_p(s3c_pwm_remove),
	.suspend	= s3c_pwm_suspend,
	.resume		= s3c_pwm_resume,
};

static int __init pwm_init(void)
{
	int ret;

	clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
	clk_scaler[1] = clk_get(NULL, "pwm-scaler1");

	if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
		printk(KERN_ERR "%s: failed to get scaler clocks\n", __func__);
		return -EINVAL;
	}

	ret = platform_driver_register(&s3c_pwm_driver);
	if (ret)
		printk(KERN_ERR "%s: failed to add pwm driver\n", __func__);

	return ret;
}

arch_initcall(pwm_init);
Commit	Line	Data
b5ead1cd	1	/* arch/arm/plat-s3c/pwm.c
6fc601e3 BD	2	*
	3	* Copyright (c) 2007 Ben Dooks
	4	* Copyright (c) 2008 Simtec Electronics
	5	* Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
	6	*
b5ead1cd	7	* S3C series PWM device core
6fc601e3 BD	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License.
	12	*/
	13
a69e4c28	14	#include <linux/export.h>
6fc601e3 BD	15	#include <linux/kernel.h>
6fc601e3 BD	16	#include <linux/platform_device.h>
5a0e3ad6	17	#include <linux/slab.h>
6fc601e3 BD	18	#include <linux/err.h>
	19	#include <linux/clk.h>
	20	#include <linux/io.h>
	21	#include <linux/pwm.h>
	22
b5ead1cd	23	#include <mach/map.h>
80b02c17	24
a2b7ba9c	25	#include <plat/regs-timer.h>
6fc601e3	26
215c29d3	27	struct s3c_chip {
6fc601e3 BD	28	struct platform_device *pdev;
	29
	30	struct clk *clk_div;
	31	struct clk *clk;
	32	const char *label;
	33
	34	unsigned int period_ns;
	35	unsigned int duty_ns;
	36
	37	unsigned char tcon_base;
6fc601e3	38	unsigned char pwm_id;
215c29d3	39	struct pwm_chip chip;
6fc601e3 BD	40	};
6fc601e3 BD	41
215c29d3 SH	42	#define to_s3c_chip(chip) container_of(chip, struct s3c_chip, chip)
215c29d3 SH	43
66592eee	44	#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
6fc601e3 BD	45
	46	static struct clk *clk_scaler[2];
	47
215c29d3	48	static inline int pwm_is_tdiv(struct s3c_chip *chip)
6fc601e3	49	{
215c29d3	50	return clk_get_parent(chip->clk) == chip->clk_div;
6fc601e3 BD	51	}
6fc601e3 BD	52
6fc601e3 BD	53	#define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
	54	#define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
	55	#define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
	56	#define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
	57
215c29d3	58	static int s3c_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
6fc601e3	59	{
215c29d3	60	struct s3c_chip *s3c = to_s3c_chip(chip);
6fc601e3 BD	61	unsigned long flags;
	62	unsigned long tcon;
	63
	64	local_irq_save(flags);
	65
	66	tcon = __raw_readl(S3C2410_TCON);
215c29d3	67	tcon \|= pwm_tcon_start(s3c);
6fc601e3 BD	68	__raw_writel(tcon, S3C2410_TCON);
	69
	70	local_irq_restore(flags);
	71
6fc601e3 BD	72	return 0;
	73	}
	74
215c29d3	75	static void s3c_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
6fc601e3	76	{
215c29d3	77	struct s3c_chip *s3c = to_s3c_chip(chip);
6fc601e3 BD	78	unsigned long flags;
	79	unsigned long tcon;
	80
	81	local_irq_save(flags);
	82
	83	tcon = __raw_readl(S3C2410_TCON);
215c29d3	84	tcon &= ~pwm_tcon_start(s3c);
6fc601e3 BD	85	__raw_writel(tcon, S3C2410_TCON);
	86
	87	local_irq_restore(flags);
6fc601e3 BD	88	}
6fc601e3 BD	89
215c29d3	90	static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
6fc601e3 BD	91	{
	92	unsigned long tin_parent_rate;
	93	unsigned int div;
	94
215c29d3 SH	95	tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
215c29d3 SH	96	pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);
6fc601e3 BD	97
	98	for (div = 2; div <= 16; div *= 2) {
	99	if ((tin_parent_rate / (div << 16)) < freq)
	100	return tin_parent_rate / div;
	101	}
	102
	103	return tin_parent_rate / 16;
	104	}
	105
	106	#define NS_IN_HZ (1000000000UL)
	107
215c29d3 SH	108	static int s3c_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
215c29d3 SH	109	int duty_ns, int period_ns)
6fc601e3	110	{
215c29d3	111	struct s3c_chip *s3c = to_s3c_chip(chip);
6fc601e3 BD	112	unsigned long tin_rate;
	113	unsigned long tin_ns;
	114	unsigned long period;
	115	unsigned long flags;
	116	unsigned long tcon;
	117	unsigned long tcnt;
	118	long tcmp;
	119
	120	/* We currently avoid using 64bit arithmetic by using the
	121	* fact that anything faster than 1Hz is easily representable
	122	* by 32bits. */
	123
	124	if (period_ns > NS_IN_HZ \|\| duty_ns > NS_IN_HZ)
	125	return -ERANGE;
	126
	127	if (duty_ns > period_ns)
	128	return -EINVAL;
	129
215c29d3 SH	130	if (period_ns == s3c->period_ns &&
215c29d3 SH	131	duty_ns == s3c->duty_ns)
6fc601e3 BD	132	return 0;
	133
	134	/* The TCMP and TCNT can be read without a lock, they're not
	135	* shared between the timers. */
	136
215c29d3 SH	137	tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
215c29d3 SH	138	tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));
6fc601e3 BD	139
	140	period = NS_IN_HZ / period_ns;
	141
215c29d3	142	pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
6fc601e3 BD	143	duty_ns, period_ns, period);
	144
	145	/* Check to see if we are changing the clock rate of the PWM */
	146
215c29d3 SH	147	if (s3c->period_ns != period_ns) {
	148	if (pwm_is_tdiv(s3c)) {
	149	tin_rate = pwm_calc_tin(s3c, period);
	150	clk_set_rate(s3c->clk_div, tin_rate);
6fc601e3	151	} else
215c29d3	152	tin_rate = clk_get_rate(s3c->clk);
6fc601e3	153
215c29d3	154	s3c->period_ns = period_ns;
6fc601e3	155
215c29d3	156	pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);
6fc601e3 BD	157
	158	tin_ns = NS_IN_HZ / tin_rate;
	159	tcnt = period_ns / tin_ns;
	160	} else
215c29d3	161	tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);
6fc601e3 BD	162
	163	/* Note, counters count down */
	164
	165	tcmp = duty_ns / tin_ns;
	166	tcmp = tcnt - tcmp;
165f5f64 PK	167	/* the pwm hw only checks the compare register after a decrement,
	168	so the pin never toggles if tcmp = tcnt */
	169	if (tcmp == tcnt)
	170	tcmp--;
6fc601e3	171
215c29d3	172	pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
6fc601e3 BD	173
	174	if (tcmp < 0)
	175	tcmp = 0;
	176
	177	/* Update the PWM register block. */
	178
	179	local_irq_save(flags);
	180
215c29d3 SH	181	__raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
215c29d3 SH	182	__raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));
6fc601e3 BD	183
6fc601e3 BD	184	tcon = __raw_readl(S3C2410_TCON);
215c29d3 SH	185	tcon \|= pwm_tcon_manulupdate(s3c);
215c29d3 SH	186	tcon \|= pwm_tcon_autoreload(s3c);
6fc601e3 BD	187	__raw_writel(tcon, S3C2410_TCON);
6fc601e3 BD	188
215c29d3	189	tcon &= ~pwm_tcon_manulupdate(s3c);
6fc601e3 BD	190	__raw_writel(tcon, S3C2410_TCON);
	191
	192	local_irq_restore(flags);
	193
	194	return 0;
	195	}
	196
215c29d3 SH	197	static struct pwm_ops s3c_pwm_ops = {
	198	.enable = s3c_pwm_enable,
	199	.disable = s3c_pwm_disable,
	200	.config = s3c_pwm_config,
	201	.owner = THIS_MODULE,
	202	};
6fc601e3 BD	203
	204	static int s3c_pwm_probe(struct platform_device *pdev)
	205	{
	206	struct device *dev = &pdev->dev;
215c29d3	207	struct s3c_chip *s3c;
6fc601e3 BD	208	unsigned long flags;
	209	unsigned long tcon;
	210	unsigned int id = pdev->id;
	211	int ret;
	212
	213	if (id == 4) {
	214	dev_err(dev, "TIMER4 is currently not supported\n");
	215	return -ENXIO;
	216	}
	217
215c29d3 SH	218	s3c = kzalloc(sizeof(*s3c), GFP_KERNEL);
215c29d3 SH	219	if (s3c == NULL) {
6fc601e3 BD	220	dev_err(dev, "failed to allocate pwm_device\n");
	221	return -ENOMEM;
	222	}
	223
6fc601e3	224	/* calculate base of control bits in TCON */
215c29d3 SH	225	s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
	226	s3c->chip.ops = &s3c_pwm_ops;
	227	s3c->chip.base = -1;
	228	s3c->chip.npwm = 1;
6fc601e3	229
215c29d3 SH	230	s3c->clk = clk_get(dev, "pwm-tin");
215c29d3 SH	231	if (IS_ERR(s3c->clk)) {
6fc601e3	232	dev_err(dev, "failed to get pwm tin clk\n");
215c29d3	233	ret = PTR_ERR(s3c->clk);
6fc601e3 BD	234	goto err_alloc;
	235	}
	236
215c29d3 SH	237	s3c->clk_div = clk_get(dev, "pwm-tdiv");
215c29d3 SH	238	if (IS_ERR(s3c->clk_div)) {
6fc601e3	239	dev_err(dev, "failed to get pwm tdiv clk\n");
215c29d3	240	ret = PTR_ERR(s3c->clk_div);
6fc601e3 BD	241	goto err_clk_tin;
	242	}
	243
215c29d3 SH	244	clk_enable(s3c->clk);
215c29d3 SH	245	clk_enable(s3c->clk_div);
d8633c1d	246
6fc601e3 BD	247	local_irq_save(flags);
	248
	249	tcon = __raw_readl(S3C2410_TCON);
215c29d3	250	tcon \|= pwm_tcon_invert(s3c);
6fc601e3 BD	251	__raw_writel(tcon, S3C2410_TCON);
	252
	253	local_irq_restore(flags);
	254
215c29d3 SH	255	ret = pwmchip_add(&s3c->chip);
215c29d3 SH	256	if (ret < 0) {
6fc601e3 BD	257	dev_err(dev, "failed to register pwm\n");
	258	goto err_clk_tdiv;
	259	}
	260
215c29d3 SH	261	pwm_dbg(s3c, "config bits %02x\n",
215c29d3 SH	262	(__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
6fc601e3 BD	263
6fc601e3 BD	264	dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
215c29d3 SH	265	clk_get_rate(s3c->clk),
	266	clk_get_rate(s3c->clk_div),
	267	pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
6fc601e3	268
215c29d3	269	platform_set_drvdata(pdev, s3c);
6fc601e3 BD	270	return 0;
	271
	272	err_clk_tdiv:
215c29d3 SH	273	clk_disable(s3c->clk_div);
	274	clk_disable(s3c->clk);
	275	clk_put(s3c->clk_div);
6fc601e3 BD	276
6fc601e3 BD	277	err_clk_tin:
215c29d3	278	clk_put(s3c->clk);
6fc601e3 BD	279
6fc601e3 BD	280	err_alloc:
215c29d3	281	kfree(s3c);
6fc601e3 BD	282	return ret;
	283	}
	284
93b0d8c6	285	static int __devexit s3c_pwm_remove(struct platform_device *pdev)
6fc601e3	286	{
215c29d3 SH	287	struct s3c_chip *s3c = platform_get_drvdata(pdev);
	288	int err;
	289
	290	err = pwmchip_remove(&s3c->chip);
	291	if (err < 0)
	292	return err;
6fc601e3	293
215c29d3 SH	294	clk_disable(s3c->clk_div);
	295	clk_disable(s3c->clk);
	296	clk_put(s3c->clk_div);
	297	clk_put(s3c->clk);
	298	kfree(s3c);
6fc601e3 BD	299
	300	return 0;
	301	}
	302
e79032aa VK	303	#ifdef CONFIG_PM
	304	static int s3c_pwm_suspend(struct platform_device *pdev, pm_message_t state)
	305	{
215c29d3	306	struct s3c_chip *s3c = platform_get_drvdata(pdev);
e79032aa VK	307
	308	/* No one preserve these values during suspend so reset them
	309	* Otherwise driver leaves PWM unconfigured if same values
	310	* passed to pwm_config
	311	*/
215c29d3 SH	312	s3c->period_ns = 0;
215c29d3 SH	313	s3c->duty_ns = 0;
e79032aa VK	314
	315	return 0;
	316	}
	317
	318	static int s3c_pwm_resume(struct platform_device *pdev)
	319	{
215c29d3	320	struct s3c_chip *s3c = platform_get_drvdata(pdev);
e79032aa VK	321	unsigned long tcon;
	322
	323	/* Restore invertion */
	324	tcon = __raw_readl(S3C2410_TCON);
215c29d3	325	tcon \|= pwm_tcon_invert(s3c);
e79032aa VK	326	__raw_writel(tcon, S3C2410_TCON);
	327
	328	return 0;
	329	}
	330
	331	#else
	332	#define s3c_pwm_suspend NULL
	333	#define s3c_pwm_resume NULL
	334	#endif
	335
6fc601e3 BD	336	static struct platform_driver s3c_pwm_driver = {
	337	.driver = {
	338	.name = "s3c24xx-pwm",
	339	.owner = THIS_MODULE,
	340	},
	341	.probe = s3c_pwm_probe,
	342	.remove = __devexit_p(s3c_pwm_remove),
e79032aa VK	343	.suspend = s3c_pwm_suspend,
e79032aa VK	344	.resume = s3c_pwm_resume,
6fc601e3 BD	345	};
	346
	347	static int __init pwm_init(void)
	348	{
	349	int ret;
	350
	351	clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
	352	clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
	353
	354	if (IS_ERR(clk_scaler[0]) \|\| IS_ERR(clk_scaler[1])) {
	355	printk(KERN_ERR "%s: failed to get scaler clocks\n", __func__);
	356	return -EINVAL;
	357	}
	358
	359	ret = platform_driver_register(&s3c_pwm_driver);
	360	if (ret)
	361	printk(KERN_ERR "%s: failed to add pwm driver\n", __func__);
	362
	363	return ret;
	364	}
	365
	366	arch_initcall(pwm_init);