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[media] Correct and add some parameter descriptions
[deliverable/linux.git] / drivers / regulator / ab8500.c
CommitLineData
c789ca20
SI		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
e1159e6d
BJ		 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
c789ca20
SI		 8 *
9 * AB8500 peripheral regulators
10 *
e1159e6d 11 * AB8500 supports the following regulators:
ea05ef31 12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
c789ca20
SI		 13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
18#include <linux/mfd/ab8500.h>
47c16975 19#include <linux/mfd/abx500.h>
c789ca20
SI		 20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
22#include <linux/regulator/ab8500.h>
23
24/**
25 * struct ab8500_regulator_info - ab8500 regulator information
e1159e6d 26 * @dev: device pointer
c789ca20 27 * @desc: regulator description
c789ca20
SI		 28 * @regulator_dev: regulator device
29 * @max_uV: maximum voltage (for variable voltage supplies)
30 * @min_uV: minimum voltage (for variable voltage supplies)
31 * @fixed_uV: typical voltage (for fixed voltage supplies)
47c16975 32 * @update_bank: bank to control on/off
c789ca20 33 * @update_reg: register to control on/off
e1159e6d
BJ		 34 * @update_mask: mask to enable/disable regulator
35 * @update_val_enable: bits to enable the regulator in normal (high power) mode
47c16975 36 * @voltage_bank: bank to control regulator voltage
c789ca20
SI		 37 * @voltage_reg: register to control regulator voltage
38 * @voltage_mask: mask to control regulator voltage
e1159e6d 39 * @voltages: supported voltage table
c789ca20 40 * @voltages_len: number of supported voltages for the regulator
42ab616a 41 * @delay: startup/set voltage delay in us
c789ca20
SI		 42 */
43struct ab8500_regulator_info {
44 struct device *dev;
45 struct regulator_desc desc;
c789ca20
SI		 46 struct regulator_dev *regulator;
47 int max_uV;
48 int min_uV;
49 int fixed_uV;
47c16975
MW		 50 u8 update_bank;
51 u8 update_reg;
e1159e6d
BJ		 52 u8 update_mask;
53 u8 update_val_enable;
47c16975
MW		 54 u8 voltage_bank;
55 u8 voltage_reg;
56 u8 voltage_mask;
e1159e6d 57 int const *voltages;
c789ca20 58 int voltages_len;
42ab616a 59 unsigned int delay;
c789ca20
SI		 60};
61
62/* voltage tables for the vauxn/vintcore supplies */
63static const int ldo_vauxn_voltages[] = {
64 1100000,
65 1200000,
66 1300000,
67 1400000,
68 1500000,
69 1800000,
70 1850000,
71 1900000,
72 2500000,
73 2650000,
74 2700000,
75 2750000,
76 2800000,
77 2900000,
78 3000000,
79 3300000,
80};
81
2b75151a
BJ		 82static const int ldo_vaux3_voltages[] = {
83 1200000,
84 1500000,
85 1800000,
86 2100000,
87 2500000,
88 2750000,
89 2790000,
90 2910000,
91};
92
c789ca20
SI		 93static const int ldo_vintcore_voltages[] = {
94 1200000,
95 1225000,
96 1250000,
97 1275000,
98 1300000,
99 1325000,
100 1350000,
101};
102
103static int ab8500_regulator_enable(struct regulator_dev *rdev)
104{
fc24b426 105 int ret;
c789ca20
SI		 106 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
107
fc24b426
BJ		 108 if (info == NULL) {
109 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 110 return -EINVAL;
fc24b426 111 }
c789ca20 112
47c16975 113 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 114 info->update_bank, info->update_reg,
115 info->update_mask, info->update_val_enable);
c789ca20
SI		 116 if (ret < 0)
117 dev_err(rdev_get_dev(rdev),
118 "couldn't set enable bits for regulator\n");
09aefa12
BJ		 119
120 dev_vdbg(rdev_get_dev(rdev),
121 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
122 info->desc.name, info->update_bank, info->update_reg,
123 info->update_mask, info->update_val_enable);
124
c789ca20
SI		 125 return ret;
126}
127
128static int ab8500_regulator_disable(struct regulator_dev *rdev)
129{
fc24b426 130 int ret;
c789ca20
SI		 131 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
132
fc24b426
BJ		 133 if (info == NULL) {
134 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 135 return -EINVAL;
fc24b426 136 }
c789ca20 137
47c16975 138 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 139 info->update_bank, info->update_reg,
140 info->update_mask, 0x0);
c789ca20
SI		 141 if (ret < 0)
142 dev_err(rdev_get_dev(rdev),
143 "couldn't set disable bits for regulator\n");
09aefa12
BJ		 144
145 dev_vdbg(rdev_get_dev(rdev),
146 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
147 info->desc.name, info->update_bank, info->update_reg,
148 info->update_mask, 0x0);
149
c789ca20
SI		 150 return ret;
151}
152
153static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
154{
fc24b426 155 int ret;
c789ca20 156 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 157 u8 regval;
c789ca20 158
fc24b426
BJ		 159 if (info == NULL) {
160 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 161 return -EINVAL;
fc24b426 162 }
c789ca20 163
47c16975 164 ret = abx500_get_register_interruptible(info->dev,
09aefa12 165 info->update_bank, info->update_reg, &regval);
c789ca20
SI		 166 if (ret < 0) {
167 dev_err(rdev_get_dev(rdev),
168 "couldn't read 0x%x register\n", info->update_reg);
169 return ret;
170 }
171
09aefa12
BJ		 172 dev_vdbg(rdev_get_dev(rdev),
173 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
174 " 0x%x\n",
175 info->desc.name, info->update_bank, info->update_reg,
176 info->update_mask, regval);
177
178 if (regval & info->update_mask)
c789ca20
SI		 179 return true;
180 else
181 return false;
182}
183
184static int ab8500_list_voltage(struct regulator_dev *rdev, unsigned selector)
185{
c789ca20
SI		 186 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
187
fc24b426
BJ		 188 if (info == NULL) {
189 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 190 return -EINVAL;
fc24b426 191 }
c789ca20
SI		 192
193 /* return the uV for the fixed regulators */
194 if (info->fixed_uV)
195 return info->fixed_uV;
196
49990e6e 197 if (selector >= info->voltages_len)
c789ca20
SI		 198 return -EINVAL;
199
e1159e6d 200 return info->voltages[selector];
c789ca20
SI		 201}
202
203static int ab8500_regulator_get_voltage(struct regulator_dev *rdev)
204{
09aefa12 205 int ret, val;
c789ca20 206 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 207 u8 regval;
c789ca20 208
fc24b426
BJ		 209 if (info == NULL) {
210 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 211 return -EINVAL;
fc24b426 212 }
c789ca20 213
09aefa12
BJ		 214 ret = abx500_get_register_interruptible(info->dev,
215 info->voltage_bank, info->voltage_reg, &regval);
c789ca20
SI		 216 if (ret < 0) {
217 dev_err(rdev_get_dev(rdev),
218 "couldn't read voltage reg for regulator\n");
219 return ret;
220 }
221
09aefa12
BJ		 222 dev_vdbg(rdev_get_dev(rdev),
223 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
224 " 0x%x\n",
225 info->desc.name, info->voltage_bank, info->voltage_reg,
226 info->voltage_mask, regval);
227
c789ca20 228 /* vintcore has a different layout */
09aefa12 229 val = regval & info->voltage_mask;
fc24b426 230 if (info->desc.id == AB8500_LDO_INTCORE)
09aefa12 231 ret = info->voltages[val >> 0x3];
c789ca20 232 else
09aefa12 233 ret = info->voltages[val];
c789ca20
SI		 234
235 return ret;
236}
237
238static int ab8500_get_best_voltage_index(struct regulator_dev *rdev,
239 int min_uV, int max_uV)
240{
241 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
242 int i;
243
244 /* check the supported voltage */
245 for (i = 0; i < info->voltages_len; i++) {
e1159e6d
BJ		 246 if ((info->voltages[i] >= min_uV) &&
247 (info->voltages[i] <= max_uV))
c789ca20
SI		 248 return i;
249 }
250
251 return -EINVAL;
252}
253
254static int ab8500_regulator_set_voltage(struct regulator_dev *rdev,
3a93f2a9
MB		 255 int min_uV, int max_uV,
256 unsigned *selector)
c789ca20 257{
fc24b426 258 int ret;
c789ca20 259 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 260 u8 regval;
c789ca20 261
fc24b426
BJ		 262 if (info == NULL) {
263 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 264 return -EINVAL;
fc24b426 265 }
c789ca20
SI		 266
267 /* get the appropriate voltages within the range */
268 ret = ab8500_get_best_voltage_index(rdev, min_uV, max_uV);
269 if (ret < 0) {
270 dev_err(rdev_get_dev(rdev),
271 "couldn't get best voltage for regulator\n");
272 return ret;
273 }
274
3a93f2a9
MB		 275 *selector = ret;
276
c789ca20 277 /* set the registers for the request */
09aefa12 278 regval = (u8)ret;
47c16975 279 ret = abx500_mask_and_set_register_interruptible(info->dev,
09aefa12
BJ		 280 info->voltage_bank, info->voltage_reg,
281 info->voltage_mask, regval);
c789ca20
SI		 282 if (ret < 0)
283 dev_err(rdev_get_dev(rdev),
284 "couldn't set voltage reg for regulator\n");
285
09aefa12
BJ		 286 dev_vdbg(rdev_get_dev(rdev),
287 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
288 " 0x%x\n",
289 info->desc.name, info->voltage_bank, info->voltage_reg,
290 info->voltage_mask, regval);
291
c789ca20
SI		 292 return ret;
293}
294
42ab616a
LW		 295static int ab8500_regulator_enable_time(struct regulator_dev *rdev)
296{
297 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
298
299 return info->delay;
300}
301
302static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
303 unsigned int old_sel,
304 unsigned int new_sel)
305{
306 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
307 int ret;
308
309 /* If the regulator isn't on, it won't take time here */
310 ret = ab8500_regulator_is_enabled(rdev);
311 if (ret < 0)
312 return ret;
313 if (!ret)
314 return 0;
315 return info->delay;
316}
317
c789ca20
SI		 318static struct regulator_ops ab8500_regulator_ops = {
319 .enable = ab8500_regulator_enable,
320 .disable = ab8500_regulator_disable,
321 .is_enabled = ab8500_regulator_is_enabled,
322 .get_voltage = ab8500_regulator_get_voltage,
323 .set_voltage = ab8500_regulator_set_voltage,
324 .list_voltage = ab8500_list_voltage,
42ab616a
LW		 325 .enable_time = ab8500_regulator_enable_time,
326 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 327};
328
329static int ab8500_fixed_get_voltage(struct regulator_dev *rdev)
330{
c789ca20
SI		 331 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
332
fc24b426
BJ		 333 if (info == NULL) {
334 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 335 return -EINVAL;
fc24b426 336 }
c789ca20
SI		 337
338 return info->fixed_uV;
339}
340
6909b452 341static struct regulator_ops ab8500_regulator_fixed_ops = {
c789ca20
SI		 342 .enable = ab8500_regulator_enable,
343 .disable = ab8500_regulator_disable,
344 .is_enabled = ab8500_regulator_is_enabled,
345 .get_voltage = ab8500_fixed_get_voltage,
346 .list_voltage = ab8500_list_voltage,
42ab616a
LW		 347 .enable_time = ab8500_regulator_enable_time,
348 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 349};
350
6909b452
BJ		 351static struct ab8500_regulator_info
352 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
c789ca20 353 /*
e1159e6d
BJ		 354 * Variable Voltage Regulators
355 * name, min mV, max mV,
356 * update bank, reg, mask, enable val
357 * volt bank, reg, mask, table, table length
c789ca20 358 */
6909b452
BJ		 359 [AB8500_LDO_AUX1] = {
360 .desc = {
361 .name = "LDO-AUX1",
362 .ops = &ab8500_regulator_ops,
363 .type = REGULATOR_VOLTAGE,
364 .id = AB8500_LDO_AUX1,
365 .owner = THIS_MODULE,
366 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
367 },
368 .min_uV = 1100000,
369 .max_uV = 3300000,
370 .update_bank = 0x04,
371 .update_reg = 0x09,
372 .update_mask = 0x03,
373 .update_val_enable = 0x01,
374 .voltage_bank = 0x04,
375 .voltage_reg = 0x1f,
376 .voltage_mask = 0x0f,
377 .voltages = ldo_vauxn_voltages,
378 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
379 },
380 [AB8500_LDO_AUX2] = {
381 .desc = {
382 .name = "LDO-AUX2",
383 .ops = &ab8500_regulator_ops,
384 .type = REGULATOR_VOLTAGE,
385 .id = AB8500_LDO_AUX2,
386 .owner = THIS_MODULE,
387 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
388 },
389 .min_uV = 1100000,
390 .max_uV = 3300000,
391 .update_bank = 0x04,
392 .update_reg = 0x09,
393 .update_mask = 0x0c,
394 .update_val_enable = 0x04,
395 .voltage_bank = 0x04,
396 .voltage_reg = 0x20,
397 .voltage_mask = 0x0f,
398 .voltages = ldo_vauxn_voltages,
399 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
400 },
401 [AB8500_LDO_AUX3] = {
402 .desc = {
403 .name = "LDO-AUX3",
404 .ops = &ab8500_regulator_ops,
405 .type = REGULATOR_VOLTAGE,
406 .id = AB8500_LDO_AUX3,
407 .owner = THIS_MODULE,
408 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
409 },
410 .min_uV = 1100000,
411 .max_uV = 3300000,
412 .update_bank = 0x04,
413 .update_reg = 0x0a,
414 .update_mask = 0x03,
415 .update_val_enable = 0x01,
416 .voltage_bank = 0x04,
417 .voltage_reg = 0x21,
418 .voltage_mask = 0x07,
419 .voltages = ldo_vaux3_voltages,
420 .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
421 },
422 [AB8500_LDO_INTCORE] = {
423 .desc = {
424 .name = "LDO-INTCORE",
425 .ops = &ab8500_regulator_ops,
426 .type = REGULATOR_VOLTAGE,
427 .id = AB8500_LDO_INTCORE,
428 .owner = THIS_MODULE,
429 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
430 },
431 .min_uV = 1100000,
432 .max_uV = 3300000,
433 .update_bank = 0x03,
434 .update_reg = 0x80,
435 .update_mask = 0x44,
436 .update_val_enable = 0x04,
437 .voltage_bank = 0x03,
438 .voltage_reg = 0x80,
439 .voltage_mask = 0x38,
440 .voltages = ldo_vintcore_voltages,
441 .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
442 },
c789ca20
SI		 443
444 /*
e1159e6d
BJ		 445 * Fixed Voltage Regulators
446 * name, fixed mV,
447 * update bank, reg, mask, enable val
c789ca20 448 */
6909b452
BJ		 449 [AB8500_LDO_TVOUT] = {
450 .desc = {
451 .name = "LDO-TVOUT",
452 .ops = &ab8500_regulator_fixed_ops,
453 .type = REGULATOR_VOLTAGE,
454 .id = AB8500_LDO_TVOUT,
455 .owner = THIS_MODULE,
456 .n_voltages = 1,
457 },
42ab616a 458 .delay = 10000,
6909b452
BJ		 459 .fixed_uV = 2000000,
460 .update_bank = 0x03,
461 .update_reg = 0x80,
462 .update_mask = 0x82,
463 .update_val_enable = 0x02,
464 },
ea05ef31
BJ		 465 [AB8500_LDO_USB] = {
466 .desc = {
467 .name = "LDO-USB",
468 .ops = &ab8500_regulator_fixed_ops,
469 .type = REGULATOR_VOLTAGE,
470 .id = AB8500_LDO_USB,
471 .owner = THIS_MODULE,
472 .n_voltages = 1,
473 },
474 .fixed_uV = 3300000,
475 .update_bank = 0x03,
476 .update_reg = 0x82,
477 .update_mask = 0x03,
478 .update_val_enable = 0x01,
479 },
6909b452
BJ		 480 [AB8500_LDO_AUDIO] = {
481 .desc = {
482 .name = "LDO-AUDIO",
483 .ops = &ab8500_regulator_fixed_ops,
484 .type = REGULATOR_VOLTAGE,
485 .id = AB8500_LDO_AUDIO,
486 .owner = THIS_MODULE,
487 .n_voltages = 1,
488 },
489 .fixed_uV = 2000000,
490 .update_bank = 0x03,
491 .update_reg = 0x83,
492 .update_mask = 0x02,
493 .update_val_enable = 0x02,
494 },
495 [AB8500_LDO_ANAMIC1] = {
496 .desc = {
497 .name = "LDO-ANAMIC1",
498 .ops = &ab8500_regulator_fixed_ops,
499 .type = REGULATOR_VOLTAGE,
500 .id = AB8500_LDO_ANAMIC1,
501 .owner = THIS_MODULE,
502 .n_voltages = 1,
503 },
504 .fixed_uV = 2050000,
505 .update_bank = 0x03,
506 .update_reg = 0x83,
507 .update_mask = 0x08,
508 .update_val_enable = 0x08,
509 },
510 [AB8500_LDO_ANAMIC2] = {
511 .desc = {
512 .name = "LDO-ANAMIC2",
513 .ops = &ab8500_regulator_fixed_ops,
514 .type = REGULATOR_VOLTAGE,
515 .id = AB8500_LDO_ANAMIC2,
516 .owner = THIS_MODULE,
517 .n_voltages = 1,
518 },
519 .fixed_uV = 2050000,
520 .update_bank = 0x03,
521 .update_reg = 0x83,
522 .update_mask = 0x10,
523 .update_val_enable = 0x10,
524 },
525 [AB8500_LDO_DMIC] = {
526 .desc = {
527 .name = "LDO-DMIC",
528 .ops = &ab8500_regulator_fixed_ops,
529 .type = REGULATOR_VOLTAGE,
530 .id = AB8500_LDO_DMIC,
531 .owner = THIS_MODULE,
532 .n_voltages = 1,
533 },
534 .fixed_uV = 1800000,
535 .update_bank = 0x03,
536 .update_reg = 0x83,
537 .update_mask = 0x04,
538 .update_val_enable = 0x04,
539 },
540 [AB8500_LDO_ANA] = {
541 .desc = {
542 .name = "LDO-ANA",
543 .ops = &ab8500_regulator_fixed_ops,
544 .type = REGULATOR_VOLTAGE,
545 .id = AB8500_LDO_ANA,
546 .owner = THIS_MODULE,
547 .n_voltages = 1,
548 },
549 .fixed_uV = 1200000,
550 .update_bank = 0x04,
551 .update_reg = 0x06,
552 .update_mask = 0x0c,
553 .update_val_enable = 0x04,
554 },
555
556
c789ca20
SI		 557};
558
79568b94
BJ		 559struct ab8500_reg_init {
560 u8 bank;
561 u8 addr;
562 u8 mask;
563};
564
565#define REG_INIT(_id, _bank, _addr, _mask) \
566 [_id] = { \
567 .bank = _bank, \
568 .addr = _addr, \
569 .mask = _mask, \
570 }
571
572static struct ab8500_reg_init ab8500_reg_init[] = {
573 /*
574 * 0x30, VanaRequestCtrl
575 * 0x0C, VpllRequestCtrl
576 * 0xc0, VextSupply1RequestCtrl
577 */
578 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xfc),
579 /*
580 * 0x03, VextSupply2RequestCtrl
581 * 0x0c, VextSupply3RequestCtrl
582 * 0x30, Vaux1RequestCtrl
583 * 0xc0, Vaux2RequestCtrl
584 */
585 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
586 /*
587 * 0x03, Vaux3RequestCtrl
588 * 0x04, SwHPReq
589 */
590 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
591 /*
592 * 0x08, VanaSysClkReq1HPValid
593 * 0x20, Vaux1SysClkReq1HPValid
594 * 0x40, Vaux2SysClkReq1HPValid
595 * 0x80, Vaux3SysClkReq1HPValid
596 */
597 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
598 /*
599 * 0x10, VextSupply1SysClkReq1HPValid
600 * 0x20, VextSupply2SysClkReq1HPValid
601 * 0x40, VextSupply3SysClkReq1HPValid
602 */
603 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
604 /*
605 * 0x08, VanaHwHPReq1Valid
606 * 0x20, Vaux1HwHPReq1Valid
607 * 0x40, Vaux2HwHPReq1Valid
608 * 0x80, Vaux3HwHPReq1Valid
609 */
610 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
611 /*
612 * 0x01, VextSupply1HwHPReq1Valid
613 * 0x02, VextSupply2HwHPReq1Valid
614 * 0x04, VextSupply3HwHPReq1Valid
615 */
616 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
617 /*
618 * 0x08, VanaHwHPReq2Valid
619 * 0x20, Vaux1HwHPReq2Valid
620 * 0x40, Vaux2HwHPReq2Valid
621 * 0x80, Vaux3HwHPReq2Valid
622 */
623 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
624 /*
625 * 0x01, VextSupply1HwHPReq2Valid
626 * 0x02, VextSupply2HwHPReq2Valid
627 * 0x04, VextSupply3HwHPReq2Valid
628 */
629 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
630 /*
631 * 0x20, VanaSwHPReqValid
632 * 0x80, Vaux1SwHPReqValid
633 */
634 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
635 /*
636 * 0x01, Vaux2SwHPReqValid
637 * 0x02, Vaux3SwHPReqValid
638 * 0x04, VextSupply1SwHPReqValid
639 * 0x08, VextSupply2SwHPReqValid
640 * 0x10, VextSupply3SwHPReqValid
641 */
642 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
643 /*
644 * 0x02, SysClkReq2Valid1
645 * ...
646 * 0x80, SysClkReq8Valid1
647 */
648 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
649 /*
650 * 0x02, SysClkReq2Valid2
651 * ...
652 * 0x80, SysClkReq8Valid2
653 */
654 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
655 /*
656 * 0x02, VTVoutEna
657 * 0x04, Vintcore12Ena
658 * 0x38, Vintcore12Sel
659 * 0x40, Vintcore12LP
660 * 0x80, VTVoutLP
661 */
662 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
663 /*
664 * 0x02, VaudioEna
665 * 0x04, VdmicEna
666 * 0x08, Vamic1Ena
667 * 0x10, Vamic2Ena
668 */
669 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
670 /*
671 * 0x01, Vamic1_dzout
672 * 0x02, Vamic2_dzout
673 */
674 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
675 /*
676 * 0x0c, VanaRegu
677 * 0x03, VpllRegu
678 */
679 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
680 /*
681 * 0x01, VrefDDREna
682 * 0x02, VrefDDRSleepMode
683 */
684 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
685 /*
686 * 0x03, VextSupply1Regu
687 * 0x0c, VextSupply2Regu
688 * 0x30, VextSupply3Regu
689 * 0x40, ExtSupply2Bypass
690 * 0x80, ExtSupply3Bypass
691 */
692 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
693 /*
694 * 0x03, Vaux1Regu
695 * 0x0c, Vaux2Regu
696 */
697 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
698 /*
699 * 0x03, Vaux3Regu
700 */
701 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
702 /*
703 * 0x3f, Vsmps1Sel1
704 */
705 REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
706 /*
707 * 0x0f, Vaux1Sel
708 */
709 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
710 /*
711 * 0x0f, Vaux2Sel
712 */
713 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
714 /*
715 * 0x07, Vaux3Sel
716 */
717 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
718 /*
719 * 0x01, VextSupply12LP
720 */
721 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
722 /*
723 * 0x04, Vaux1Disch
724 * 0x08, Vaux2Disch
725 * 0x10, Vaux3Disch
726 * 0x20, Vintcore12Disch
727 * 0x40, VTVoutDisch
728 * 0x80, VaudioDisch
729 */
730 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
731 /*
732 * 0x02, VanaDisch
733 * 0x04, VdmicPullDownEna
734 * 0x10, VdmicDisch
735 */
736 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
737};
738
c789ca20
SI		 739static __devinit int ab8500_regulator_probe(struct platform_device *pdev)
740{
741 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
af54decd 742 struct ab8500_platform_data *pdata;
c789ca20
SI		 743 int i, err;
744
745 if (!ab8500) {
746 dev_err(&pdev->dev, "null mfd parent\n");
747 return -EINVAL;
748 }
af54decd 749 pdata = dev_get_platdata(ab8500->dev);
fc24b426
BJ		 750 if (!pdata) {
751 dev_err(&pdev->dev, "null pdata\n");
752 return -EINVAL;
753 }
c789ca20 754
cb189b07
BJ		 755 /* make sure the platform data has the correct size */
756 if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
79568b94 757 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
cb189b07
BJ		 758 return -EINVAL;
759 }
760
79568b94
BJ		 761 /* initialize registers */
762 for (i = 0; i < pdata->num_regulator_reg_init; i++) {
763 int id;
764 u8 value;
765
766 id = pdata->regulator_reg_init[i].id;
767 value = pdata->regulator_reg_init[i].value;
768
769 /* check for configuration errors */
770 if (id >= AB8500_NUM_REGULATOR_REGISTERS) {
771 dev_err(&pdev->dev,
772 "Configuration error: id outside range.\n");
773 return -EINVAL;
774 }
775 if (value & ~ab8500_reg_init[id].mask) {
776 dev_err(&pdev->dev,
777 "Configuration error: value outside mask.\n");
778 return -EINVAL;
779 }
780
781 /* initialize register */
782 err = abx500_mask_and_set_register_interruptible(&pdev->dev,
783 ab8500_reg_init[id].bank,
784 ab8500_reg_init[id].addr,
785 ab8500_reg_init[id].mask,
786 value);
787 if (err < 0) {
788 dev_err(&pdev->dev,
789 "Failed to initialize 0x%02x, 0x%02x.\n",
790 ab8500_reg_init[id].bank,
791 ab8500_reg_init[id].addr);
792 return err;
793 }
794 dev_vdbg(&pdev->dev,
795 " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
796 ab8500_reg_init[id].bank,
797 ab8500_reg_init[id].addr,
798 ab8500_reg_init[id].mask,
799 value);
800 }
801
c789ca20
SI		 802 /* register all regulators */
803 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
804 struct ab8500_regulator_info *info = NULL;
805
806 /* assign per-regulator data */
807 info = &ab8500_regulator_info[i];
808 info->dev = &pdev->dev;
c789ca20 809
2b75151a
BJ		 810 /* fix for hardware before ab8500v2.0 */
811 if (abx500_get_chip_id(info->dev) < 0x20) {
812 if (info->desc.id == AB8500_LDO_AUX3) {
813 info->desc.n_voltages =
814 ARRAY_SIZE(ldo_vauxn_voltages);
e1159e6d 815 info->voltages = ldo_vauxn_voltages;
2b75151a
BJ		 816 info->voltages_len =
817 ARRAY_SIZE(ldo_vauxn_voltages);
818 info->voltage_mask = 0xf;
819 }
820 }
821
822 /* register regulator with framework */
c789ca20 823 info->regulator = regulator_register(&info->desc, &pdev->dev,
cb189b07 824 &pdata->regulator[i], info);
c789ca20
SI		 825 if (IS_ERR(info->regulator)) {
826 err = PTR_ERR(info->regulator);
827 dev_err(&pdev->dev, "failed to register regulator %s\n",
828 info->desc.name);
829 /* when we fail, un-register all earlier regulators */
d4876a3b 830 while (--i >= 0) {
c789ca20
SI		 831 info = &ab8500_regulator_info[i];
832 regulator_unregister(info->regulator);
c789ca20
SI		 833 }
834 return err;
835 }
09aefa12
BJ		 836
837 dev_vdbg(rdev_get_dev(info->regulator),
838 "%s-probed\n", info->desc.name);
c789ca20
SI		 839 }
840
841 return 0;
842}
843
844static __devexit int ab8500_regulator_remove(struct platform_device *pdev)
845{
846 int i;
847
848 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
849 struct ab8500_regulator_info *info = NULL;
850 info = &ab8500_regulator_info[i];
09aefa12
BJ		 851
852 dev_vdbg(rdev_get_dev(info->regulator),
853 "%s-remove\n", info->desc.name);
854
c789ca20
SI		 855 regulator_unregister(info->regulator);
856 }
857
858 return 0;
859}
860
861static struct platform_driver ab8500_regulator_driver = {
862 .probe = ab8500_regulator_probe,
863 .remove = __devexit_p(ab8500_regulator_remove),
864 .driver = {
865 .name = "ab8500-regulator",
866 .owner = THIS_MODULE,
867 },
868};
869
870static int __init ab8500_regulator_init(void)
871{
872 int ret;
873
874 ret = platform_driver_register(&ab8500_regulator_driver);
875 if (ret != 0)
876 pr_err("Failed to register ab8500 regulator: %d\n", ret);
877
878 return ret;
879}
880subsys_initcall(ab8500_regulator_init);
881
882static void __exit ab8500_regulator_exit(void)
883{
884 platform_driver_unregister(&ab8500_regulator_driver);
885}
886module_exit(ab8500_regulator_exit);
887
888MODULE_LICENSE("GPL v2");
889MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
890MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
891MODULE_ALIAS("platform:ab8500-regulator");
Linux kernel - Deliverables
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