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dfe7a1b0 CC |
1 | /* |
2 | * AXP20x regulators driver. | |
3 | * | |
4 | * Copyright (C) 2013 Carlo Caione <carlo@caione.org> | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General | |
7 | * Public License. See the file "COPYING" in the main directory of this | |
8 | * archive for more details. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #include <linux/err.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/of.h> | |
20 | #include <linux/of_device.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/regmap.h> | |
23 | #include <linux/mfd/axp20x.h> | |
24 | #include <linux/regulator/driver.h> | |
25 | #include <linux/regulator/of_regulator.h> | |
26 | ||
27 | #define AXP20X_IO_ENABLED 0x03 | |
28 | #define AXP20X_IO_DISABLED 0x07 | |
29 | ||
1b82b4e4 BB |
30 | #define AXP22X_IO_ENABLED 0x04 |
31 | #define AXP22X_IO_DISABLED 0x03 | |
32 | ||
dfe7a1b0 CC |
33 | #define AXP20X_WORKMODE_DCDC2_MASK BIT(2) |
34 | #define AXP20X_WORKMODE_DCDC3_MASK BIT(1) | |
1b82b4e4 | 35 | #define AXP22X_WORKMODE_DCDCX_MASK(x) BIT(x) |
dfe7a1b0 CC |
36 | |
37 | #define AXP20X_FREQ_DCDC_MASK 0x0f | |
38 | ||
866bd951 BB |
39 | #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ |
40 | _vmask, _ereg, _emask, _enable_val, _disable_val) \ | |
41 | [_family##_##_id] = { \ | |
dfe7a1b0 CC |
42 | .name = #_id, \ |
43 | .supply_name = (_supply), \ | |
880fe82d CYT |
44 | .of_match = of_match_ptr(_match), \ |
45 | .regulators_node = of_match_ptr("regulators"), \ | |
dfe7a1b0 | 46 | .type = REGULATOR_VOLTAGE, \ |
866bd951 | 47 | .id = _family##_##_id, \ |
dfe7a1b0 CC |
48 | .n_voltages = (((_max) - (_min)) / (_step) + 1), \ |
49 | .owner = THIS_MODULE, \ | |
50 | .min_uV = (_min) * 1000, \ | |
51 | .uV_step = (_step) * 1000, \ | |
52 | .vsel_reg = (_vreg), \ | |
53 | .vsel_mask = (_vmask), \ | |
54 | .enable_reg = (_ereg), \ | |
55 | .enable_mask = (_emask), \ | |
56 | .enable_val = (_enable_val), \ | |
57 | .disable_val = (_disable_val), \ | |
58 | .ops = &axp20x_ops, \ | |
59 | } | |
60 | ||
866bd951 BB |
61 | #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ |
62 | _vmask, _ereg, _emask) \ | |
63 | [_family##_##_id] = { \ | |
dfe7a1b0 CC |
64 | .name = #_id, \ |
65 | .supply_name = (_supply), \ | |
880fe82d CYT |
66 | .of_match = of_match_ptr(_match), \ |
67 | .regulators_node = of_match_ptr("regulators"), \ | |
dfe7a1b0 | 68 | .type = REGULATOR_VOLTAGE, \ |
866bd951 | 69 | .id = _family##_##_id, \ |
dfe7a1b0 CC |
70 | .n_voltages = (((_max) - (_min)) / (_step) + 1), \ |
71 | .owner = THIS_MODULE, \ | |
72 | .min_uV = (_min) * 1000, \ | |
73 | .uV_step = (_step) * 1000, \ | |
74 | .vsel_reg = (_vreg), \ | |
75 | .vsel_mask = (_vmask), \ | |
76 | .enable_reg = (_ereg), \ | |
77 | .enable_mask = (_emask), \ | |
78 | .ops = &axp20x_ops, \ | |
79 | } | |
80 | ||
1b82b4e4 BB |
81 | #define AXP_DESC_SW(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ |
82 | _vmask, _ereg, _emask) \ | |
83 | [_family##_##_id] = { \ | |
84 | .name = #_id, \ | |
85 | .supply_name = (_supply), \ | |
86 | .of_match = of_match_ptr(_match), \ | |
87 | .regulators_node = of_match_ptr("regulators"), \ | |
88 | .type = REGULATOR_VOLTAGE, \ | |
89 | .id = _family##_##_id, \ | |
90 | .n_voltages = (((_max) - (_min)) / (_step) + 1), \ | |
91 | .owner = THIS_MODULE, \ | |
92 | .min_uV = (_min) * 1000, \ | |
93 | .uV_step = (_step) * 1000, \ | |
94 | .vsel_reg = (_vreg), \ | |
95 | .vsel_mask = (_vmask), \ | |
96 | .enable_reg = (_ereg), \ | |
97 | .enable_mask = (_emask), \ | |
98 | .ops = &axp20x_ops_sw, \ | |
99 | } | |
100 | ||
866bd951 BB |
101 | #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) \ |
102 | [_family##_##_id] = { \ | |
dfe7a1b0 CC |
103 | .name = #_id, \ |
104 | .supply_name = (_supply), \ | |
880fe82d CYT |
105 | .of_match = of_match_ptr(_match), \ |
106 | .regulators_node = of_match_ptr("regulators"), \ | |
dfe7a1b0 | 107 | .type = REGULATOR_VOLTAGE, \ |
866bd951 | 108 | .id = _family##_##_id, \ |
dfe7a1b0 CC |
109 | .n_voltages = 1, \ |
110 | .owner = THIS_MODULE, \ | |
111 | .min_uV = (_volt) * 1000, \ | |
112 | .ops = &axp20x_ops_fixed \ | |
113 | } | |
114 | ||
866bd951 BB |
115 | #define AXP_DESC_TABLE(_family, _id, _match, _supply, _table, _vreg, _vmask, \ |
116 | _ereg, _emask) \ | |
117 | [_family##_##_id] = { \ | |
dfe7a1b0 CC |
118 | .name = #_id, \ |
119 | .supply_name = (_supply), \ | |
880fe82d CYT |
120 | .of_match = of_match_ptr(_match), \ |
121 | .regulators_node = of_match_ptr("regulators"), \ | |
dfe7a1b0 | 122 | .type = REGULATOR_VOLTAGE, \ |
866bd951 | 123 | .id = _family##_##_id, \ |
dfe7a1b0 CC |
124 | .n_voltages = ARRAY_SIZE(_table), \ |
125 | .owner = THIS_MODULE, \ | |
126 | .vsel_reg = (_vreg), \ | |
127 | .vsel_mask = (_vmask), \ | |
128 | .enable_reg = (_ereg), \ | |
129 | .enable_mask = (_emask), \ | |
130 | .volt_table = (_table), \ | |
131 | .ops = &axp20x_ops_table, \ | |
132 | } | |
133 | ||
134 | static const int axp20x_ldo4_data[] = { 1250000, 1300000, 1400000, 1500000, 1600000, | |
135 | 1700000, 1800000, 1900000, 2000000, 2500000, | |
136 | 2700000, 2800000, 3000000, 3100000, 3200000, | |
137 | 3300000 }; | |
138 | ||
139 | static struct regulator_ops axp20x_ops_fixed = { | |
140 | .list_voltage = regulator_list_voltage_linear, | |
141 | }; | |
142 | ||
143 | static struct regulator_ops axp20x_ops_table = { | |
144 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
145 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
146 | .list_voltage = regulator_list_voltage_table, | |
b8870356 | 147 | .map_voltage = regulator_map_voltage_ascend, |
dfe7a1b0 CC |
148 | .enable = regulator_enable_regmap, |
149 | .disable = regulator_disable_regmap, | |
150 | .is_enabled = regulator_is_enabled_regmap, | |
151 | }; | |
152 | ||
153 | static struct regulator_ops axp20x_ops = { | |
154 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
155 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
156 | .list_voltage = regulator_list_voltage_linear, | |
157 | .enable = regulator_enable_regmap, | |
158 | .disable = regulator_disable_regmap, | |
159 | .is_enabled = regulator_is_enabled_regmap, | |
160 | }; | |
161 | ||
1b82b4e4 BB |
162 | static struct regulator_ops axp20x_ops_sw = { |
163 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
164 | .list_voltage = regulator_list_voltage_linear, | |
165 | .enable = regulator_enable_regmap, | |
166 | .disable = regulator_disable_regmap, | |
167 | .is_enabled = regulator_is_enabled_regmap, | |
168 | }; | |
169 | ||
dfe7a1b0 | 170 | static const struct regulator_desc axp20x_regulators[] = { |
866bd951 BB |
171 | AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25, |
172 | AXP20X_DCDC2_V_OUT, 0x3f, AXP20X_PWR_OUT_CTRL, 0x10), | |
173 | AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25, | |
174 | AXP20X_DCDC3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x02), | |
175 | AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300), | |
176 | AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100, | |
177 | AXP20X_LDO24_V_OUT, 0xf0, AXP20X_PWR_OUT_CTRL, 0x04), | |
178 | AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25, | |
179 | AXP20X_LDO3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x40), | |
180 | AXP_DESC_TABLE(AXP20X, LDO4, "ldo4", "ldo24in", axp20x_ldo4_data, | |
181 | AXP20X_LDO24_V_OUT, 0x0f, AXP20X_PWR_OUT_CTRL, 0x08), | |
182 | AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100, | |
183 | AXP20X_LDO5_V_OUT, 0xf0, AXP20X_GPIO0_CTRL, 0x07, | |
184 | AXP20X_IO_ENABLED, AXP20X_IO_DISABLED), | |
dfe7a1b0 CC |
185 | }; |
186 | ||
1b82b4e4 BB |
187 | static const struct regulator_desc axp22x_regulators[] = { |
188 | AXP_DESC(AXP22X, DCDC1, "dcdc1", "vin1", 1600, 3400, 100, | |
189 | AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(1)), | |
190 | AXP_DESC(AXP22X, DCDC2, "dcdc2", "vin2", 600, 1540, 20, | |
191 | AXP22X_DCDC2_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(2)), | |
192 | AXP_DESC(AXP22X, DCDC3, "dcdc3", "vin3", 600, 1860, 20, | |
193 | AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)), | |
194 | AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20, | |
6b3600b4 | 195 | AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(4)), |
1b82b4e4 | 196 | AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50, |
6b3600b4 | 197 | AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)), |
1b82b4e4 | 198 | /* secondary switchable output of DCDC1 */ |
7118f19c | 199 | AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", NULL, 1600, 3400, 100, |
1b82b4e4 BB |
200 | AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(7)), |
201 | /* LDO regulator internally chained to DCDC5 */ | |
7118f19c | 202 | AXP_DESC(AXP22X, DC5LDO, "dc5ldo", NULL, 700, 1400, 100, |
1b82b4e4 BB |
203 | AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)), |
204 | AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100, | |
205 | AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)), | |
206 | AXP_DESC(AXP22X, ALDO2, "aldo2", "aldoin", 700, 3300, 100, | |
207 | AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(7)), | |
208 | AXP_DESC(AXP22X, ALDO3, "aldo3", "aldoin", 700, 3300, 100, | |
209 | AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)), | |
210 | AXP_DESC(AXP22X, DLDO1, "dldo1", "dldoin", 700, 3300, 100, | |
211 | AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)), | |
212 | AXP_DESC(AXP22X, DLDO2, "dldo2", "dldoin", 700, 3300, 100, | |
213 | AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(4)), | |
214 | AXP_DESC(AXP22X, DLDO3, "dldo3", "dldoin", 700, 3300, 100, | |
215 | AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)), | |
216 | AXP_DESC(AXP22X, DLDO4, "dldo4", "dldoin", 700, 3300, 100, | |
217 | AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)), | |
218 | AXP_DESC(AXP22X, ELDO1, "eldo1", "eldoin", 700, 3300, 100, | |
219 | AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)), | |
220 | AXP_DESC(AXP22X, ELDO2, "eldo2", "eldoin", 700, 3300, 100, | |
221 | AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)), | |
222 | AXP_DESC(AXP22X, ELDO3, "eldo3", "eldoin", 700, 3300, 100, | |
223 | AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)), | |
224 | AXP_DESC_IO(AXP22X, LDO_IO0, "ldo_io0", "ips", 1800, 3300, 100, | |
225 | AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07, | |
226 | AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), | |
227 | AXP_DESC_IO(AXP22X, LDO_IO1, "ldo_io1", "ips", 1800, 3300, 100, | |
228 | AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07, | |
229 | AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), | |
230 | AXP_DESC_FIXED(AXP22X, RTC_LDO, "rtc_ldo", "ips", 3000), | |
231 | }; | |
232 | ||
dfe7a1b0 CC |
233 | static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq) |
234 | { | |
235 | struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); | |
866bd951 BB |
236 | u32 min, max, def, step; |
237 | ||
238 | switch (axp20x->variant) { | |
239 | case AXP202_ID: | |
240 | case AXP209_ID: | |
241 | min = 750; | |
242 | max = 1875; | |
243 | def = 1500; | |
244 | step = 75; | |
245 | break; | |
1b82b4e4 BB |
246 | case AXP221_ID: |
247 | min = 1800; | |
248 | max = 4050; | |
249 | def = 3000; | |
250 | step = 150; | |
251 | break; | |
866bd951 BB |
252 | default: |
253 | dev_err(&pdev->dev, | |
254 | "Setting DCDC frequency for unsupported AXP variant\n"); | |
255 | return -EINVAL; | |
256 | } | |
257 | ||
258 | if (dcdcfreq == 0) | |
259 | dcdcfreq = def; | |
dfe7a1b0 | 260 | |
866bd951 BB |
261 | if (dcdcfreq < min) { |
262 | dcdcfreq = min; | |
263 | dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n", | |
264 | min); | |
dfe7a1b0 CC |
265 | } |
266 | ||
866bd951 BB |
267 | if (dcdcfreq > max) { |
268 | dcdcfreq = max; | |
269 | dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n", | |
270 | max); | |
dfe7a1b0 CC |
271 | } |
272 | ||
866bd951 | 273 | dcdcfreq = (dcdcfreq - min) / step; |
dfe7a1b0 CC |
274 | |
275 | return regmap_update_bits(axp20x->regmap, AXP20X_DCDC_FREQ, | |
276 | AXP20X_FREQ_DCDC_MASK, dcdcfreq); | |
277 | } | |
278 | ||
279 | static int axp20x_regulator_parse_dt(struct platform_device *pdev) | |
280 | { | |
281 | struct device_node *np, *regulators; | |
282 | int ret; | |
866bd951 | 283 | u32 dcdcfreq = 0; |
dfe7a1b0 CC |
284 | |
285 | np = of_node_get(pdev->dev.parent->of_node); | |
286 | if (!np) | |
287 | return 0; | |
288 | ||
a6016c52 | 289 | regulators = of_get_child_by_name(np, "regulators"); |
dfe7a1b0 CC |
290 | if (!regulators) { |
291 | dev_warn(&pdev->dev, "regulators node not found\n"); | |
292 | } else { | |
dfe7a1b0 CC |
293 | of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq); |
294 | ret = axp20x_set_dcdc_freq(pdev, dcdcfreq); | |
295 | if (ret < 0) { | |
296 | dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret); | |
297 | return ret; | |
298 | } | |
299 | ||
300 | of_node_put(regulators); | |
301 | } | |
302 | ||
303 | return 0; | |
304 | } | |
305 | ||
306 | static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode) | |
307 | { | |
866bd951 BB |
308 | struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); |
309 | unsigned int mask; | |
dfe7a1b0 | 310 | |
866bd951 BB |
311 | switch (axp20x->variant) { |
312 | case AXP202_ID: | |
313 | case AXP209_ID: | |
314 | if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3)) | |
315 | return -EINVAL; | |
316 | ||
317 | mask = AXP20X_WORKMODE_DCDC2_MASK; | |
318 | if (id == AXP20X_DCDC3) | |
319 | mask = AXP20X_WORKMODE_DCDC3_MASK; | |
dfe7a1b0 | 320 | |
866bd951 BB |
321 | workmode <<= ffs(mask) - 1; |
322 | break; | |
dfe7a1b0 | 323 | |
1b82b4e4 BB |
324 | case AXP221_ID: |
325 | if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5) | |
326 | return -EINVAL; | |
327 | ||
328 | mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1); | |
329 | workmode <<= id - AXP22X_DCDC1; | |
330 | break; | |
331 | ||
866bd951 BB |
332 | default: |
333 | /* should not happen */ | |
334 | WARN_ON(1); | |
335 | return -EINVAL; | |
336 | } | |
dfe7a1b0 CC |
337 | |
338 | return regmap_update_bits(rdev->regmap, AXP20X_DCDC_MODE, mask, workmode); | |
339 | } | |
340 | ||
341 | static int axp20x_regulator_probe(struct platform_device *pdev) | |
342 | { | |
343 | struct regulator_dev *rdev; | |
344 | struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); | |
866bd951 | 345 | const struct regulator_desc *regulators; |
765e8023 CYT |
346 | struct regulator_config config = { |
347 | .dev = pdev->dev.parent, | |
348 | .regmap = axp20x->regmap, | |
866bd951 | 349 | .driver_data = axp20x, |
765e8023 | 350 | }; |
866bd951 | 351 | int ret, i, nregulators; |
dfe7a1b0 | 352 | u32 workmode; |
7118f19c CYT |
353 | const char *axp22x_dc1_name = axp22x_regulators[AXP22X_DCDC1].name; |
354 | const char *axp22x_dc5_name = axp22x_regulators[AXP22X_DCDC5].name; | |
dfe7a1b0 | 355 | |
866bd951 BB |
356 | switch (axp20x->variant) { |
357 | case AXP202_ID: | |
358 | case AXP209_ID: | |
359 | regulators = axp20x_regulators; | |
360 | nregulators = AXP20X_REG_ID_MAX; | |
361 | break; | |
1b82b4e4 BB |
362 | case AXP221_ID: |
363 | regulators = axp22x_regulators; | |
364 | nregulators = AXP22X_REG_ID_MAX; | |
365 | break; | |
866bd951 BB |
366 | default: |
367 | dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n", | |
368 | axp20x->variant); | |
369 | return -EINVAL; | |
370 | } | |
371 | ||
765e8023 CYT |
372 | /* This only sets the dcdc freq. Ignore any errors */ |
373 | axp20x_regulator_parse_dt(pdev); | |
dfe7a1b0 | 374 | |
866bd951 | 375 | for (i = 0; i < nregulators; i++) { |
7118f19c CYT |
376 | const struct regulator_desc *desc = ®ulators[i]; |
377 | struct regulator_desc *new_desc; | |
378 | ||
379 | /* | |
380 | * Regulators DC1SW and DC5LDO are connected internally, | |
381 | * so we have to handle their supply names separately. | |
382 | * | |
383 | * We always register the regulators in proper sequence, | |
384 | * so the supply names are correctly read. See the last | |
385 | * part of this loop to see where we save the DT defined | |
386 | * name. | |
387 | */ | |
388 | if (regulators == axp22x_regulators) { | |
389 | if (i == AXP22X_DC1SW) { | |
390 | new_desc = devm_kzalloc(&pdev->dev, | |
391 | sizeof(*desc), | |
392 | GFP_KERNEL); | |
393 | *new_desc = regulators[i]; | |
394 | new_desc->supply_name = axp22x_dc1_name; | |
395 | desc = new_desc; | |
396 | } else if (i == AXP22X_DC5LDO) { | |
397 | new_desc = devm_kzalloc(&pdev->dev, | |
398 | sizeof(*desc), | |
399 | GFP_KERNEL); | |
400 | *new_desc = regulators[i]; | |
401 | new_desc->supply_name = axp22x_dc5_name; | |
402 | desc = new_desc; | |
403 | } | |
404 | } | |
405 | ||
406 | rdev = devm_regulator_register(&pdev->dev, desc, &config); | |
dfe7a1b0 CC |
407 | if (IS_ERR(rdev)) { |
408 | dev_err(&pdev->dev, "Failed to register %s\n", | |
866bd951 | 409 | regulators[i].name); |
dfe7a1b0 CC |
410 | |
411 | return PTR_ERR(rdev); | |
412 | } | |
413 | ||
765e8023 CYT |
414 | ret = of_property_read_u32(rdev->dev.of_node, |
415 | "x-powers,dcdc-workmode", | |
dfe7a1b0 CC |
416 | &workmode); |
417 | if (!ret) { | |
418 | if (axp20x_set_dcdc_workmode(rdev, i, workmode)) | |
419 | dev_err(&pdev->dev, "Failed to set workmode on %s\n", | |
866bd951 | 420 | rdev->desc->name); |
dfe7a1b0 | 421 | } |
7118f19c CYT |
422 | |
423 | /* | |
424 | * Save AXP22X DCDC1 / DCDC5 regulator names for later. | |
425 | */ | |
426 | if (regulators == axp22x_regulators) { | |
427 | /* Can we use rdev->constraints->name instead? */ | |
428 | if (i == AXP22X_DCDC1) | |
429 | of_property_read_string(rdev->dev.of_node, | |
430 | "regulator-name", | |
431 | &axp22x_dc1_name); | |
432 | else if (i == AXP22X_DCDC5) | |
433 | of_property_read_string(rdev->dev.of_node, | |
434 | "regulator-name", | |
435 | &axp22x_dc5_name); | |
436 | } | |
dfe7a1b0 CC |
437 | } |
438 | ||
439 | return 0; | |
440 | } | |
441 | ||
442 | static struct platform_driver axp20x_regulator_driver = { | |
443 | .probe = axp20x_regulator_probe, | |
444 | .driver = { | |
445 | .name = "axp20x-regulator", | |
dfe7a1b0 CC |
446 | }, |
447 | }; | |
448 | ||
449 | module_platform_driver(axp20x_regulator_driver); | |
450 | ||
451 | MODULE_LICENSE("GPL v2"); | |
452 | MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); | |
453 | MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC"); | |
d4ea7d86 | 454 | MODULE_ALIAS("platform:axp20x-regulator"); |