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08bf1c0a AJ |
1 | /* |
2 | * da9052-regulator.c: Regulator driver for DA9052 | |
3 | * | |
4 | * Copyright(c) 2011 Dialog Semiconductor Ltd. | |
5 | * | |
6 | * Author: David Dajun Chen <dchen@diasemi.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/regulator/driver.h> | |
21 | #include <linux/regulator/machine.h> | |
88c84c14 | 22 | #ifdef CONFIG_OF |
cd22a965 | 23 | #include <linux/of.h> |
88c84c14 YCLP |
24 | #include <linux/regulator/of_regulator.h> |
25 | #endif | |
08bf1c0a AJ |
26 | |
27 | #include <linux/mfd/da9052/da9052.h> | |
28 | #include <linux/mfd/da9052/reg.h> | |
29 | #include <linux/mfd/da9052/pdata.h> | |
30 | ||
31 | /* Buck step size */ | |
32 | #define DA9052_BUCK_PERI_3uV_STEP 100000 | |
33 | #define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV 24 | |
34 | #define DA9052_CONST_3uV 3000000 | |
35 | ||
36 | #define DA9052_MIN_UA 0 | |
37 | #define DA9052_MAX_UA 3 | |
38 | #define DA9052_CURRENT_RANGE 4 | |
39 | ||
40 | /* Bit masks */ | |
41 | #define DA9052_BUCK_ILIM_MASK_EVEN 0x0c | |
42 | #define DA9052_BUCK_ILIM_MASK_ODD 0xc0 | |
43 | ||
9210f05b AL |
44 | /* DA9052 REGULATOR IDs */ |
45 | #define DA9052_ID_BUCK1 0 | |
46 | #define DA9052_ID_BUCK2 1 | |
47 | #define DA9052_ID_BUCK3 2 | |
48 | #define DA9052_ID_BUCK4 3 | |
49 | #define DA9052_ID_LDO1 4 | |
50 | #define DA9052_ID_LDO2 5 | |
51 | #define DA9052_ID_LDO3 6 | |
52 | #define DA9052_ID_LDO4 7 | |
53 | #define DA9052_ID_LDO5 8 | |
54 | #define DA9052_ID_LDO6 9 | |
55 | #define DA9052_ID_LDO7 10 | |
56 | #define DA9052_ID_LDO8 11 | |
57 | #define DA9052_ID_LDO9 12 | |
58 | #define DA9052_ID_LDO10 13 | |
59 | ||
08bf1c0a AJ |
60 | static const u32 da9052_current_limits[3][4] = { |
61 | {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */ | |
62 | {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */ | |
63 | {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO, | |
64 | * BUCK-MEM and BUCK-PERI | |
65 | */ | |
66 | }; | |
67 | ||
68 | struct da9052_regulator_info { | |
69 | struct regulator_desc reg_desc; | |
70 | int step_uV; | |
71 | int min_uV; | |
72 | int max_uV; | |
d706b1e4 | 73 | unsigned char activate_bit; |
08bf1c0a AJ |
74 | }; |
75 | ||
76 | struct da9052_regulator { | |
77 | struct da9052 *da9052; | |
78 | struct da9052_regulator_info *info; | |
79 | struct regulator_dev *rdev; | |
80 | }; | |
81 | ||
82 | static int verify_range(struct da9052_regulator_info *info, | |
83 | int min_uV, int max_uV) | |
84 | { | |
85 | if (min_uV > info->max_uV || max_uV < info->min_uV) | |
86 | return -EINVAL; | |
87 | ||
88 | return 0; | |
89 | } | |
90 | ||
08bf1c0a AJ |
91 | static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) |
92 | { | |
93 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
94 | int offset = rdev_get_id(rdev); | |
95 | int ret, row = 2; | |
96 | ||
97 | ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); | |
98 | if (ret < 0) | |
99 | return ret; | |
100 | ||
101 | /* Determine the even or odd position of the buck current limit | |
102 | * register field | |
103 | */ | |
104 | if (offset % 2 == 0) | |
105 | ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; | |
106 | else | |
107 | ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6; | |
108 | ||
109 | /* Select the appropriate current limit range */ | |
110 | if (regulator->da9052->chip_id == DA9052) | |
111 | row = 0; | |
112 | else if (offset == 0) | |
113 | row = 1; | |
114 | ||
115 | return da9052_current_limits[row][ret]; | |
116 | } | |
117 | ||
118 | static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, | |
119 | int max_uA) | |
120 | { | |
121 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
122 | int offset = rdev_get_id(rdev); | |
123 | int reg_val = 0; | |
124 | int i, row = 2; | |
125 | ||
126 | /* Select the appropriate current limit range */ | |
127 | if (regulator->da9052->chip_id == DA9052) | |
128 | row = 0; | |
129 | else if (offset == 0) | |
130 | row = 1; | |
131 | ||
19d23c21 | 132 | for (i = DA9052_CURRENT_RANGE - 1; i >= 0; i--) { |
1e369bcd AL |
133 | if ((min_uA <= da9052_current_limits[row][i]) && |
134 | (da9052_current_limits[row][i] <= max_uA)) { | |
08bf1c0a AJ |
135 | reg_val = i; |
136 | break; | |
137 | } | |
138 | } | |
139 | ||
1e369bcd AL |
140 | if (i < 0) |
141 | return -EINVAL; | |
142 | ||
08bf1c0a AJ |
143 | /* Determine the even or odd position of the buck current limit |
144 | * register field | |
145 | */ | |
146 | if (offset % 2 == 0) | |
147 | return da9052_reg_update(regulator->da9052, | |
148 | DA9052_BUCKA_REG + offset/2, | |
149 | DA9052_BUCK_ILIM_MASK_EVEN, | |
150 | reg_val << 2); | |
151 | else | |
152 | return da9052_reg_update(regulator->da9052, | |
153 | DA9052_BUCKA_REG + offset/2, | |
154 | DA9052_BUCK_ILIM_MASK_ODD, | |
155 | reg_val << 6); | |
156 | } | |
157 | ||
08bf1c0a AJ |
158 | static int da9052_list_voltage(struct regulator_dev *rdev, |
159 | unsigned int selector) | |
160 | { | |
161 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
162 | struct da9052_regulator_info *info = regulator->info; | |
0ec446ea | 163 | int id = rdev_get_id(rdev); |
08bf1c0a AJ |
164 | int volt_uV; |
165 | ||
0ec446ea AL |
166 | if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) |
167 | && (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) { | |
168 | volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV) | |
169 | + info->min_uV); | |
170 | volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV) | |
171 | * (DA9052_BUCK_PERI_3uV_STEP); | |
172 | } else { | |
173 | volt_uV = (selector * info->step_uV) + info->min_uV; | |
174 | } | |
08bf1c0a AJ |
175 | |
176 | if (volt_uV > info->max_uV) | |
177 | return -EINVAL; | |
178 | ||
179 | return volt_uV; | |
180 | } | |
181 | ||
4923b48b AL |
182 | static int da9052_map_voltage(struct regulator_dev *rdev, |
183 | int min_uV, int max_uV) | |
08bf1c0a AJ |
184 | { |
185 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
186 | struct da9052_regulator_info *info = regulator->info; | |
0ec446ea | 187 | int id = rdev_get_id(rdev); |
4923b48b | 188 | int ret, sel; |
08bf1c0a AJ |
189 | |
190 | ret = verify_range(info, min_uV, max_uV); | |
191 | if (ret < 0) | |
192 | return ret; | |
193 | ||
194 | if (min_uV < info->min_uV) | |
195 | min_uV = info->min_uV; | |
196 | ||
0ec446ea AL |
197 | if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) |
198 | && (min_uV >= DA9052_CONST_3uV)) { | |
4923b48b AL |
199 | sel = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV + |
200 | DIV_ROUND_UP(min_uV - DA9052_CONST_3uV, | |
201 | DA9052_BUCK_PERI_3uV_STEP); | |
0ec446ea | 202 | } else { |
4923b48b | 203 | sel = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV); |
0ec446ea | 204 | } |
08bf1c0a | 205 | |
4923b48b | 206 | ret = da9052_list_voltage(rdev, sel); |
08bf1c0a AJ |
207 | if (ret < 0) |
208 | return ret; | |
209 | ||
4923b48b AL |
210 | return sel; |
211 | } | |
212 | ||
d706b1e4 AL |
213 | static int da9052_regulator_set_voltage_sel(struct regulator_dev *rdev, |
214 | unsigned int selector) | |
215 | { | |
216 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
217 | struct da9052_regulator_info *info = regulator->info; | |
218 | int id = rdev_get_id(rdev); | |
219 | int ret; | |
220 | ||
221 | ret = da9052_reg_update(regulator->da9052, rdev->desc->vsel_reg, | |
222 | rdev->desc->vsel_mask, selector); | |
223 | if (ret < 0) | |
224 | return ret; | |
225 | ||
226 | /* Some LDOs and DCDCs are DVC controlled which requires enabling of | |
227 | * the activate bit to implment the changes on the output. | |
228 | */ | |
229 | switch (id) { | |
230 | case DA9052_ID_BUCK1: | |
231 | case DA9052_ID_BUCK2: | |
232 | case DA9052_ID_BUCK3: | |
233 | case DA9052_ID_LDO2: | |
234 | case DA9052_ID_LDO3: | |
235 | ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG, | |
236 | info->activate_bit, info->activate_bit); | |
237 | break; | |
238 | } | |
239 | ||
240 | return ret; | |
241 | } | |
242 | ||
5c99a7b1 PZ |
243 | static int da9052_regulator_set_voltage_time_sel(struct regulator_dev *rdev, |
244 | unsigned int old_sel, | |
245 | unsigned int new_sel) | |
246 | { | |
247 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
248 | struct da9052_regulator_info *info = regulator->info; | |
249 | int id = rdev_get_id(rdev); | |
250 | int ret = 0; | |
251 | ||
252 | /* The DVC controlled LDOs and DCDCs ramp with 6.25mV/µs after enabling | |
253 | * the activate bit. | |
254 | */ | |
255 | switch (id) { | |
256 | case DA9052_ID_BUCK1: | |
257 | case DA9052_ID_BUCK2: | |
258 | case DA9052_ID_BUCK3: | |
259 | case DA9052_ID_LDO2: | |
260 | case DA9052_ID_LDO3: | |
261 | ret = (new_sel - old_sel) * info->step_uV / 6250; | |
262 | break; | |
263 | } | |
264 | ||
265 | return ret; | |
266 | } | |
267 | ||
71242b49 | 268 | static const struct regulator_ops da9052_dcdc_ops = { |
08bf1c0a AJ |
269 | .get_current_limit = da9052_dcdc_get_current_limit, |
270 | .set_current_limit = da9052_dcdc_set_current_limit, | |
271 | ||
272 | .list_voltage = da9052_list_voltage, | |
4923b48b | 273 | .map_voltage = da9052_map_voltage, |
09812bc4 | 274 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
d706b1e4 | 275 | .set_voltage_sel = da9052_regulator_set_voltage_sel, |
5c99a7b1 | 276 | .set_voltage_time_sel = da9052_regulator_set_voltage_time_sel, |
0d481f74 AL |
277 | .is_enabled = regulator_is_enabled_regmap, |
278 | .enable = regulator_enable_regmap, | |
279 | .disable = regulator_disable_regmap, | |
08bf1c0a AJ |
280 | }; |
281 | ||
71242b49 | 282 | static const struct regulator_ops da9052_ldo_ops = { |
08bf1c0a | 283 | .list_voltage = da9052_list_voltage, |
4923b48b | 284 | .map_voltage = da9052_map_voltage, |
09812bc4 | 285 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
d706b1e4 | 286 | .set_voltage_sel = da9052_regulator_set_voltage_sel, |
5c99a7b1 | 287 | .set_voltage_time_sel = da9052_regulator_set_voltage_time_sel, |
0d481f74 AL |
288 | .is_enabled = regulator_is_enabled_regmap, |
289 | .enable = regulator_enable_regmap, | |
290 | .disable = regulator_disable_regmap, | |
08bf1c0a AJ |
291 | }; |
292 | ||
08bf1c0a AJ |
293 | #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \ |
294 | {\ | |
295 | .reg_desc = {\ | |
9210f05b | 296 | .name = #_id,\ |
08bf1c0a AJ |
297 | .ops = &da9052_ldo_ops,\ |
298 | .type = REGULATOR_VOLTAGE,\ | |
9210f05b | 299 | .id = DA9052_ID_##_id,\ |
7b957654 | 300 | .n_voltages = (max - min) / step + 1, \ |
08bf1c0a | 301 | .owner = THIS_MODULE,\ |
09812bc4 AL |
302 | .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
303 | .vsel_mask = (1 << (sbits)) - 1,\ | |
0d481f74 AL |
304 | .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
305 | .enable_mask = 1 << (ebits),\ | |
08bf1c0a AJ |
306 | },\ |
307 | .min_uV = (min) * 1000,\ | |
308 | .max_uV = (max) * 1000,\ | |
309 | .step_uV = (step) * 1000,\ | |
d706b1e4 | 310 | .activate_bit = (abits),\ |
08bf1c0a AJ |
311 | } |
312 | ||
313 | #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \ | |
314 | {\ | |
315 | .reg_desc = {\ | |
9210f05b | 316 | .name = #_id,\ |
08bf1c0a AJ |
317 | .ops = &da9052_dcdc_ops,\ |
318 | .type = REGULATOR_VOLTAGE,\ | |
9210f05b | 319 | .id = DA9052_ID_##_id,\ |
7b957654 | 320 | .n_voltages = (max - min) / step + 1, \ |
08bf1c0a | 321 | .owner = THIS_MODULE,\ |
09812bc4 AL |
322 | .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
323 | .vsel_mask = (1 << (sbits)) - 1,\ | |
0d481f74 AL |
324 | .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ |
325 | .enable_mask = 1 << (ebits),\ | |
08bf1c0a AJ |
326 | },\ |
327 | .min_uV = (min) * 1000,\ | |
328 | .max_uV = (max) * 1000,\ | |
329 | .step_uV = (step) * 1000,\ | |
d706b1e4 | 330 | .activate_bit = (abits),\ |
08bf1c0a AJ |
331 | } |
332 | ||
6242eae9 | 333 | static struct da9052_regulator_info da9052_regulator_info[] = { |
9210f05b AL |
334 | DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), |
335 | DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), | |
707319b6 | 336 | DA9052_DCDC(BUCK3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), |
0ec446ea | 337 | DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0), |
9210f05b | 338 | DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), |
0ec446ea AL |
339 | DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), |
340 | DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), | |
9210f05b AL |
341 | DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), |
342 | DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), | |
343 | DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), | |
344 | DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), | |
345 | DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), | |
346 | DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), | |
347 | DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), | |
08bf1c0a AJ |
348 | }; |
349 | ||
6242eae9 | 350 | static struct da9052_regulator_info da9053_regulator_info[] = { |
9210f05b AL |
351 | DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), |
352 | DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), | |
707319b6 ST |
353 | DA9052_DCDC(BUCK3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), |
354 | DA9052_DCDC(BUCK4, 25, 950, 2525, 6, 6, 0), | |
9210f05b | 355 | DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), |
0ec446ea AL |
356 | DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), |
357 | DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), | |
9210f05b AL |
358 | DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), |
359 | DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), | |
360 | DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), | |
361 | DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), | |
362 | DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), | |
363 | DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), | |
364 | DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), | |
08bf1c0a AJ |
365 | }; |
366 | ||
367 | static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id, | |
368 | int id) | |
369 | { | |
370 | struct da9052_regulator_info *info; | |
371 | int i; | |
372 | ||
984b5a6b AJ |
373 | switch (chip_id) { |
374 | case DA9052: | |
08bf1c0a AJ |
375 | for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { |
376 | info = &da9052_regulator_info[i]; | |
377 | if (info->reg_desc.id == id) | |
378 | return info; | |
379 | } | |
984b5a6b AJ |
380 | break; |
381 | case DA9053_AA: | |
382 | case DA9053_BA: | |
383 | case DA9053_BB: | |
8b708144 | 384 | case DA9053_BC: |
08bf1c0a AJ |
385 | for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { |
386 | info = &da9053_regulator_info[i]; | |
387 | if (info->reg_desc.id == id) | |
388 | return info; | |
389 | } | |
984b5a6b | 390 | break; |
08bf1c0a AJ |
391 | } |
392 | ||
393 | return NULL; | |
394 | } | |
395 | ||
a5023574 | 396 | static int da9052_regulator_probe(struct platform_device *pdev) |
08bf1c0a | 397 | { |
e0c21530 | 398 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
c172708d | 399 | struct regulator_config config = { }; |
08bf1c0a AJ |
400 | struct da9052_regulator *regulator; |
401 | struct da9052 *da9052; | |
402 | struct da9052_pdata *pdata; | |
08bf1c0a | 403 | |
984b5a6b AJ |
404 | regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), |
405 | GFP_KERNEL); | |
08bf1c0a AJ |
406 | if (!regulator) |
407 | return -ENOMEM; | |
408 | ||
409 | da9052 = dev_get_drvdata(pdev->dev.parent); | |
dff91d0b | 410 | pdata = dev_get_platdata(da9052->dev); |
08bf1c0a AJ |
411 | regulator->da9052 = da9052; |
412 | ||
413 | regulator->info = find_regulator_info(regulator->da9052->chip_id, | |
e0c21530 | 414 | cell->id); |
08bf1c0a AJ |
415 | if (regulator->info == NULL) { |
416 | dev_err(&pdev->dev, "invalid regulator ID specified\n"); | |
7eb6444f | 417 | return -EINVAL; |
08bf1c0a | 418 | } |
c172708d MB |
419 | |
420 | config.dev = &pdev->dev; | |
c172708d | 421 | config.driver_data = regulator; |
0d481f74 | 422 | config.regmap = da9052->regmap; |
88c84c14 | 423 | if (pdata && pdata->regulators) { |
e0c21530 | 424 | config.init_data = pdata->regulators[cell->id]; |
88c84c14 YCLP |
425 | } else { |
426 | #ifdef CONFIG_OF | |
b8b27a44 GX |
427 | struct device_node *nproot = da9052->dev->of_node; |
428 | struct device_node *np; | |
88c84c14 YCLP |
429 | |
430 | if (!nproot) | |
431 | return -ENODEV; | |
432 | ||
b327bcc0 | 433 | nproot = of_get_child_by_name(nproot, "regulators"); |
88c84c14 YCLP |
434 | if (!nproot) |
435 | return -ENODEV; | |
436 | ||
b86bbddd | 437 | for_each_child_of_node(nproot, np) { |
88c84c14 YCLP |
438 | if (!of_node_cmp(np->name, |
439 | regulator->info->reg_desc.name)) { | |
440 | config.init_data = of_get_regulator_init_data( | |
072e78b1 JMC |
441 | &pdev->dev, np, |
442 | ®ulator->info->reg_desc); | |
e76b9cc7 | 443 | config.of_node = np; |
88c84c14 YCLP |
444 | break; |
445 | } | |
446 | } | |
c92f5dd2 | 447 | of_node_put(nproot); |
88c84c14 YCLP |
448 | #endif |
449 | } | |
c172708d | 450 | |
ea49a5eb AL |
451 | regulator->rdev = devm_regulator_register(&pdev->dev, |
452 | ®ulator->info->reg_desc, | |
453 | &config); | |
08bf1c0a AJ |
454 | if (IS_ERR(regulator->rdev)) { |
455 | dev_err(&pdev->dev, "failed to register regulator %s\n", | |
456 | regulator->info->reg_desc.name); | |
7eb6444f | 457 | return PTR_ERR(regulator->rdev); |
08bf1c0a AJ |
458 | } |
459 | ||
460 | platform_set_drvdata(pdev, regulator); | |
461 | ||
462 | return 0; | |
08bf1c0a AJ |
463 | } |
464 | ||
08bf1c0a AJ |
465 | static struct platform_driver da9052_regulator_driver = { |
466 | .probe = da9052_regulator_probe, | |
08bf1c0a AJ |
467 | .driver = { |
468 | .name = "da9052-regulator", | |
08bf1c0a AJ |
469 | }, |
470 | }; | |
471 | ||
472 | static int __init da9052_regulator_init(void) | |
473 | { | |
474 | return platform_driver_register(&da9052_regulator_driver); | |
475 | } | |
476 | subsys_initcall(da9052_regulator_init); | |
477 | ||
478 | static void __exit da9052_regulator_exit(void) | |
479 | { | |
480 | platform_driver_unregister(&da9052_regulator_driver); | |
481 | } | |
482 | module_exit(da9052_regulator_exit); | |
483 | ||
484 | MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>"); | |
485 | MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC"); | |
486 | MODULE_LICENSE("GPL"); | |
487 | MODULE_ALIAS("platform:da9052-regulator"); |