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ade7515f KM |
1 | /* |
2 | * TI LP8788 MFD - ldo regulator driver | |
3 | * | |
4 | * Copyright 2012 Texas Instruments | |
5 | * | |
6 | * Author: Milo(Woogyom) Kim <milo.kim@ti.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/err.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/regulator/driver.h> | |
19 | #include <linux/gpio.h> | |
20 | #include <linux/mfd/lp8788.h> | |
21 | ||
22 | /* register address */ | |
23 | #define LP8788_EN_LDO_A 0x0D /* DLDO 1 ~ 8 */ | |
24 | #define LP8788_EN_LDO_B 0x0E /* DLDO 9 ~ 12, ALDO 1 ~ 4 */ | |
25 | #define LP8788_EN_LDO_C 0x0F /* ALDO 5 ~ 10 */ | |
26 | #define LP8788_EN_SEL 0x10 | |
27 | #define LP8788_DLDO1_VOUT 0x2E | |
28 | #define LP8788_DLDO2_VOUT 0x2F | |
29 | #define LP8788_DLDO3_VOUT 0x30 | |
30 | #define LP8788_DLDO4_VOUT 0x31 | |
31 | #define LP8788_DLDO5_VOUT 0x32 | |
32 | #define LP8788_DLDO6_VOUT 0x33 | |
33 | #define LP8788_DLDO7_VOUT 0x34 | |
34 | #define LP8788_DLDO8_VOUT 0x35 | |
35 | #define LP8788_DLDO9_VOUT 0x36 | |
36 | #define LP8788_DLDO10_VOUT 0x37 | |
37 | #define LP8788_DLDO11_VOUT 0x38 | |
38 | #define LP8788_DLDO12_VOUT 0x39 | |
39 | #define LP8788_ALDO1_VOUT 0x3A | |
40 | #define LP8788_ALDO2_VOUT 0x3B | |
41 | #define LP8788_ALDO3_VOUT 0x3C | |
42 | #define LP8788_ALDO4_VOUT 0x3D | |
43 | #define LP8788_ALDO5_VOUT 0x3E | |
44 | #define LP8788_ALDO6_VOUT 0x3F | |
45 | #define LP8788_ALDO7_VOUT 0x40 | |
46 | #define LP8788_ALDO8_VOUT 0x41 | |
47 | #define LP8788_ALDO9_VOUT 0x42 | |
48 | #define LP8788_ALDO10_VOUT 0x43 | |
49 | #define LP8788_DLDO1_TIMESTEP 0x44 | |
50 | ||
51 | /* mask/shift bits */ | |
52 | #define LP8788_EN_DLDO1_M BIT(0) /* Addr 0Dh ~ 0Fh */ | |
53 | #define LP8788_EN_DLDO2_M BIT(1) | |
54 | #define LP8788_EN_DLDO3_M BIT(2) | |
55 | #define LP8788_EN_DLDO4_M BIT(3) | |
56 | #define LP8788_EN_DLDO5_M BIT(4) | |
57 | #define LP8788_EN_DLDO6_M BIT(5) | |
58 | #define LP8788_EN_DLDO7_M BIT(6) | |
59 | #define LP8788_EN_DLDO8_M BIT(7) | |
60 | #define LP8788_EN_DLDO9_M BIT(0) | |
61 | #define LP8788_EN_DLDO10_M BIT(1) | |
62 | #define LP8788_EN_DLDO11_M BIT(2) | |
63 | #define LP8788_EN_DLDO12_M BIT(3) | |
64 | #define LP8788_EN_ALDO1_M BIT(4) | |
65 | #define LP8788_EN_ALDO2_M BIT(5) | |
66 | #define LP8788_EN_ALDO3_M BIT(6) | |
67 | #define LP8788_EN_ALDO4_M BIT(7) | |
68 | #define LP8788_EN_ALDO5_M BIT(0) | |
69 | #define LP8788_EN_ALDO6_M BIT(1) | |
70 | #define LP8788_EN_ALDO7_M BIT(2) | |
71 | #define LP8788_EN_ALDO8_M BIT(3) | |
72 | #define LP8788_EN_ALDO9_M BIT(4) | |
73 | #define LP8788_EN_ALDO10_M BIT(5) | |
74 | #define LP8788_EN_SEL_DLDO911_M BIT(0) /* Addr 10h */ | |
75 | #define LP8788_EN_SEL_DLDO7_M BIT(1) | |
76 | #define LP8788_EN_SEL_ALDO7_M BIT(2) | |
77 | #define LP8788_EN_SEL_ALDO5_M BIT(3) | |
78 | #define LP8788_EN_SEL_ALDO234_M BIT(4) | |
79 | #define LP8788_EN_SEL_ALDO1_M BIT(5) | |
80 | #define LP8788_VOUT_5BIT_M 0x1F /* Addr 2Eh ~ 43h */ | |
81 | #define LP8788_VOUT_4BIT_M 0x0F | |
82 | #define LP8788_VOUT_3BIT_M 0x07 | |
83 | #define LP8788_VOUT_1BIT_M 0x01 | |
84 | #define LP8788_STARTUP_TIME_M 0xF8 /* Addr 44h ~ 59h */ | |
85 | #define LP8788_STARTUP_TIME_S 3 | |
86 | ||
87 | #define ENABLE_TIME_USEC 32 | |
88 | #define ENABLE GPIOF_OUT_INIT_HIGH | |
89 | #define DISABLE GPIOF_OUT_INIT_LOW | |
90 | ||
91 | enum lp8788_enable_mode { | |
92 | REGISTER, | |
93 | EXTPIN, | |
94 | }; | |
95 | ||
96 | enum lp8788_ldo_id { | |
97 | DLDO1, | |
98 | DLDO2, | |
99 | DLDO3, | |
100 | DLDO4, | |
101 | DLDO5, | |
102 | DLDO6, | |
103 | DLDO7, | |
104 | DLDO8, | |
105 | DLDO9, | |
106 | DLDO10, | |
107 | DLDO11, | |
108 | DLDO12, | |
109 | ALDO1, | |
110 | ALDO2, | |
111 | ALDO3, | |
112 | ALDO4, | |
113 | ALDO5, | |
114 | ALDO6, | |
115 | ALDO7, | |
116 | ALDO8, | |
117 | ALDO9, | |
118 | ALDO10, | |
119 | }; | |
120 | ||
121 | struct lp8788_ldo { | |
122 | struct lp8788 *lp; | |
123 | struct regulator_desc *desc; | |
124 | struct regulator_dev *regulator; | |
125 | struct lp8788_ldo_enable_pin *en_pin; | |
126 | }; | |
127 | ||
128 | /* DLDO 1, 2, 3, 9 voltage table */ | |
4e92920b | 129 | static const int lp8788_dldo1239_vtbl[] = { |
ade7515f KM |
130 | 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, |
131 | 2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000, | |
132 | 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, | |
133 | 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, | |
134 | }; | |
135 | ||
136 | /* DLDO 4 voltage table */ | |
137 | static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 }; | |
138 | ||
139 | /* DLDO 5, 7, 8 and ALDO 6 voltage table */ | |
140 | static const int lp8788_dldo578_aldo6_vtbl[] = { | |
141 | 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, | |
142 | 2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000, | |
143 | }; | |
144 | ||
145 | /* DLDO 6 voltage table */ | |
146 | static const int lp8788_dldo6_vtbl[] = { | |
147 | 3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000, | |
148 | }; | |
149 | ||
150 | /* DLDO 10, 11 voltage table */ | |
151 | static const int lp8788_dldo1011_vtbl[] = { | |
152 | 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, | |
153 | 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, | |
154 | }; | |
155 | ||
156 | /* ALDO 1 voltage table */ | |
157 | static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 }; | |
158 | ||
159 | /* ALDO 7 voltage table */ | |
160 | static const int lp8788_aldo7_vtbl[] = { | |
161 | 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, | |
162 | }; | |
163 | ||
164 | static enum lp8788_ldo_id lp8788_dldo_id[] = { | |
165 | DLDO1, | |
166 | DLDO2, | |
167 | DLDO3, | |
168 | DLDO4, | |
169 | DLDO5, | |
170 | DLDO6, | |
171 | DLDO7, | |
172 | DLDO8, | |
173 | DLDO9, | |
174 | DLDO10, | |
175 | DLDO11, | |
176 | DLDO12, | |
177 | }; | |
178 | ||
179 | static enum lp8788_ldo_id lp8788_aldo_id[] = { | |
180 | ALDO1, | |
181 | ALDO2, | |
182 | ALDO3, | |
183 | ALDO4, | |
184 | ALDO5, | |
185 | ALDO6, | |
186 | ALDO7, | |
187 | ALDO8, | |
188 | ALDO9, | |
189 | ALDO10, | |
190 | }; | |
191 | ||
192 | /* DLDO 7, 9 and 11, ALDO 1 ~ 5 and 7 | |
193 | : can be enabled either by external pin or by i2c register */ | |
194 | static enum lp8788_enable_mode | |
195 | lp8788_get_ldo_enable_mode(struct lp8788_ldo *ldo, enum lp8788_ldo_id id) | |
196 | { | |
197 | int ret; | |
198 | u8 val, mask; | |
199 | ||
200 | ret = lp8788_read_byte(ldo->lp, LP8788_EN_SEL, &val); | |
201 | if (ret) | |
202 | return ret; | |
203 | ||
204 | switch (id) { | |
205 | case DLDO7: | |
206 | mask = LP8788_EN_SEL_DLDO7_M; | |
207 | break; | |
208 | case DLDO9: | |
209 | case DLDO11: | |
210 | mask = LP8788_EN_SEL_DLDO911_M; | |
211 | break; | |
212 | case ALDO1: | |
213 | mask = LP8788_EN_SEL_ALDO1_M; | |
214 | break; | |
215 | case ALDO2 ... ALDO4: | |
216 | mask = LP8788_EN_SEL_ALDO234_M; | |
217 | break; | |
218 | case ALDO5: | |
219 | mask = LP8788_EN_SEL_ALDO5_M; | |
220 | break; | |
221 | case ALDO7: | |
222 | mask = LP8788_EN_SEL_ALDO7_M; | |
223 | break; | |
224 | default: | |
225 | return REGISTER; | |
226 | } | |
227 | ||
228 | return val & mask ? EXTPIN : REGISTER; | |
229 | } | |
230 | ||
231 | static int lp8788_ldo_ctrl_by_extern_pin(struct lp8788_ldo *ldo, int pinstate) | |
232 | { | |
233 | struct lp8788_ldo_enable_pin *pin = ldo->en_pin; | |
234 | ||
235 | if (!pin) | |
236 | return -EINVAL; | |
237 | ||
238 | if (gpio_is_valid(pin->gpio)) | |
239 | gpio_set_value(pin->gpio, pinstate); | |
240 | ||
241 | return 0; | |
242 | } | |
243 | ||
244 | static int lp8788_ldo_is_enabled_by_extern_pin(struct lp8788_ldo *ldo) | |
245 | { | |
246 | struct lp8788_ldo_enable_pin *pin = ldo->en_pin; | |
247 | ||
248 | if (!pin) | |
249 | return -EINVAL; | |
250 | ||
251 | return gpio_get_value(pin->gpio) ? 1 : 0; | |
252 | } | |
253 | ||
254 | static int lp8788_ldo_enable(struct regulator_dev *rdev) | |
255 | { | |
256 | struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); | |
257 | enum lp8788_ldo_id id = rdev_get_id(rdev); | |
258 | enum lp8788_enable_mode mode = lp8788_get_ldo_enable_mode(ldo, id); | |
259 | ||
260 | switch (mode) { | |
261 | case EXTPIN: | |
262 | return lp8788_ldo_ctrl_by_extern_pin(ldo, ENABLE); | |
263 | case REGISTER: | |
264 | return regulator_enable_regmap(rdev); | |
265 | default: | |
266 | return -EINVAL; | |
267 | } | |
268 | } | |
269 | ||
270 | static int lp8788_ldo_disable(struct regulator_dev *rdev) | |
271 | { | |
272 | struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); | |
273 | enum lp8788_ldo_id id = rdev_get_id(rdev); | |
274 | enum lp8788_enable_mode mode = lp8788_get_ldo_enable_mode(ldo, id); | |
275 | ||
276 | switch (mode) { | |
277 | case EXTPIN: | |
278 | return lp8788_ldo_ctrl_by_extern_pin(ldo, DISABLE); | |
279 | case REGISTER: | |
280 | return regulator_disable_regmap(rdev); | |
281 | default: | |
282 | return -EINVAL; | |
283 | } | |
284 | } | |
285 | ||
286 | static int lp8788_ldo_is_enabled(struct regulator_dev *rdev) | |
287 | { | |
288 | struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); | |
289 | enum lp8788_ldo_id id = rdev_get_id(rdev); | |
290 | enum lp8788_enable_mode mode = lp8788_get_ldo_enable_mode(ldo, id); | |
291 | ||
292 | switch (mode) { | |
293 | case EXTPIN: | |
294 | return lp8788_ldo_is_enabled_by_extern_pin(ldo); | |
295 | case REGISTER: | |
296 | return regulator_is_enabled_regmap(rdev); | |
297 | default: | |
298 | return -EINVAL; | |
299 | } | |
300 | } | |
301 | ||
302 | static int lp8788_ldo_enable_time(struct regulator_dev *rdev) | |
303 | { | |
304 | struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); | |
305 | enum lp8788_ldo_id id = rdev_get_id(rdev); | |
306 | u8 val, addr = LP8788_DLDO1_TIMESTEP + id; | |
307 | ||
308 | if (lp8788_read_byte(ldo->lp, addr, &val)) | |
309 | return -EINVAL; | |
310 | ||
311 | val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S; | |
312 | ||
313 | return ENABLE_TIME_USEC * val; | |
314 | } | |
315 | ||
316 | static int lp8788_ldo_fixed_get_voltage(struct regulator_dev *rdev) | |
317 | { | |
318 | enum lp8788_ldo_id id = rdev_get_id(rdev); | |
319 | ||
320 | switch (id) { | |
321 | case ALDO2 ... ALDO5: | |
322 | return 2850000; | |
323 | case DLDO12: | |
324 | case ALDO8 ... ALDO9: | |
325 | return 2500000; | |
326 | case ALDO10: | |
327 | return 1100000; | |
328 | default: | |
329 | return -EINVAL; | |
330 | } | |
331 | } | |
332 | ||
333 | static struct regulator_ops lp8788_ldo_voltage_table_ops = { | |
334 | .list_voltage = regulator_list_voltage_table, | |
335 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
336 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
337 | .enable = lp8788_ldo_enable, | |
338 | .disable = lp8788_ldo_disable, | |
339 | .is_enabled = lp8788_ldo_is_enabled, | |
340 | .enable_time = lp8788_ldo_enable_time, | |
341 | }; | |
342 | ||
343 | static struct regulator_ops lp8788_ldo_voltage_fixed_ops = { | |
344 | .get_voltage = lp8788_ldo_fixed_get_voltage, | |
345 | .enable = lp8788_ldo_enable, | |
346 | .disable = lp8788_ldo_disable, | |
347 | .is_enabled = lp8788_ldo_is_enabled, | |
348 | .enable_time = lp8788_ldo_enable_time, | |
349 | }; | |
350 | ||
351 | static struct regulator_desc lp8788_dldo_desc[] = { | |
352 | { | |
353 | .name = "dldo1", | |
354 | .id = DLDO1, | |
355 | .ops = &lp8788_ldo_voltage_table_ops, | |
356 | .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), | |
357 | .volt_table = lp8788_dldo1239_vtbl, | |
358 | .type = REGULATOR_VOLTAGE, | |
359 | .owner = THIS_MODULE, | |
360 | .vsel_reg = LP8788_DLDO1_VOUT, | |
361 | .vsel_mask = LP8788_VOUT_5BIT_M, | |
362 | .enable_reg = LP8788_EN_LDO_A, | |
363 | .enable_mask = LP8788_EN_DLDO1_M, | |
364 | }, | |
365 | { | |
366 | .name = "dldo2", | |
367 | .id = DLDO2, | |
368 | .ops = &lp8788_ldo_voltage_table_ops, | |
369 | .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), | |
370 | .volt_table = lp8788_dldo1239_vtbl, | |
371 | .type = REGULATOR_VOLTAGE, | |
372 | .owner = THIS_MODULE, | |
373 | .vsel_reg = LP8788_DLDO2_VOUT, | |
374 | .vsel_mask = LP8788_VOUT_5BIT_M, | |
375 | .enable_reg = LP8788_EN_LDO_A, | |
376 | .enable_mask = LP8788_EN_DLDO2_M, | |
377 | }, | |
378 | { | |
379 | .name = "dldo3", | |
380 | .id = DLDO3, | |
381 | .ops = &lp8788_ldo_voltage_table_ops, | |
382 | .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), | |
383 | .volt_table = lp8788_dldo1239_vtbl, | |
384 | .type = REGULATOR_VOLTAGE, | |
385 | .owner = THIS_MODULE, | |
386 | .vsel_reg = LP8788_DLDO3_VOUT, | |
387 | .vsel_mask = LP8788_VOUT_5BIT_M, | |
388 | .enable_reg = LP8788_EN_LDO_A, | |
389 | .enable_mask = LP8788_EN_DLDO3_M, | |
390 | }, | |
391 | { | |
392 | .name = "dldo4", | |
393 | .id = DLDO4, | |
394 | .ops = &lp8788_ldo_voltage_table_ops, | |
395 | .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl), | |
396 | .volt_table = lp8788_dldo4_vtbl, | |
397 | .type = REGULATOR_VOLTAGE, | |
398 | .owner = THIS_MODULE, | |
399 | .vsel_reg = LP8788_DLDO4_VOUT, | |
400 | .vsel_mask = LP8788_VOUT_1BIT_M, | |
401 | .enable_reg = LP8788_EN_LDO_A, | |
402 | .enable_mask = LP8788_EN_DLDO4_M, | |
403 | }, | |
404 | { | |
405 | .name = "dldo5", | |
406 | .id = DLDO5, | |
407 | .ops = &lp8788_ldo_voltage_table_ops, | |
408 | .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), | |
409 | .volt_table = lp8788_dldo578_aldo6_vtbl, | |
410 | .type = REGULATOR_VOLTAGE, | |
411 | .owner = THIS_MODULE, | |
412 | .vsel_reg = LP8788_DLDO5_VOUT, | |
413 | .vsel_mask = LP8788_VOUT_4BIT_M, | |
414 | .enable_reg = LP8788_EN_LDO_A, | |
415 | .enable_mask = LP8788_EN_DLDO5_M, | |
416 | }, | |
417 | { | |
418 | .name = "dldo6", | |
419 | .id = DLDO6, | |
420 | .ops = &lp8788_ldo_voltage_table_ops, | |
421 | .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl), | |
422 | .volt_table = lp8788_dldo6_vtbl, | |
423 | .type = REGULATOR_VOLTAGE, | |
424 | .owner = THIS_MODULE, | |
425 | .vsel_reg = LP8788_DLDO6_VOUT, | |
426 | .vsel_mask = LP8788_VOUT_3BIT_M, | |
427 | .enable_reg = LP8788_EN_LDO_A, | |
428 | .enable_mask = LP8788_EN_DLDO6_M, | |
429 | }, | |
430 | { | |
431 | .name = "dldo7", | |
432 | .id = DLDO7, | |
433 | .ops = &lp8788_ldo_voltage_table_ops, | |
434 | .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), | |
435 | .volt_table = lp8788_dldo578_aldo6_vtbl, | |
436 | .type = REGULATOR_VOLTAGE, | |
437 | .owner = THIS_MODULE, | |
438 | .vsel_reg = LP8788_DLDO7_VOUT, | |
439 | .vsel_mask = LP8788_VOUT_4BIT_M, | |
440 | .enable_reg = LP8788_EN_LDO_A, | |
441 | .enable_mask = LP8788_EN_DLDO7_M, | |
442 | }, | |
443 | { | |
444 | .name = "dldo8", | |
445 | .id = DLDO8, | |
446 | .ops = &lp8788_ldo_voltage_table_ops, | |
447 | .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), | |
448 | .volt_table = lp8788_dldo578_aldo6_vtbl, | |
449 | .type = REGULATOR_VOLTAGE, | |
450 | .owner = THIS_MODULE, | |
451 | .vsel_reg = LP8788_DLDO8_VOUT, | |
452 | .vsel_mask = LP8788_VOUT_4BIT_M, | |
453 | .enable_reg = LP8788_EN_LDO_A, | |
454 | .enable_mask = LP8788_EN_DLDO8_M, | |
455 | }, | |
456 | { | |
457 | .name = "dldo9", | |
458 | .id = DLDO9, | |
459 | .ops = &lp8788_ldo_voltage_table_ops, | |
460 | .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), | |
461 | .volt_table = lp8788_dldo1239_vtbl, | |
462 | .type = REGULATOR_VOLTAGE, | |
463 | .owner = THIS_MODULE, | |
464 | .vsel_reg = LP8788_DLDO9_VOUT, | |
465 | .vsel_mask = LP8788_VOUT_5BIT_M, | |
466 | .enable_reg = LP8788_EN_LDO_B, | |
467 | .enable_mask = LP8788_EN_DLDO9_M, | |
468 | }, | |
469 | { | |
470 | .name = "dldo10", | |
471 | .id = DLDO10, | |
472 | .ops = &lp8788_ldo_voltage_table_ops, | |
473 | .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), | |
474 | .volt_table = lp8788_dldo1011_vtbl, | |
475 | .type = REGULATOR_VOLTAGE, | |
476 | .owner = THIS_MODULE, | |
477 | .vsel_reg = LP8788_DLDO10_VOUT, | |
478 | .vsel_mask = LP8788_VOUT_4BIT_M, | |
479 | .enable_reg = LP8788_EN_LDO_B, | |
480 | .enable_mask = LP8788_EN_DLDO10_M, | |
481 | }, | |
482 | { | |
483 | .name = "dldo11", | |
484 | .id = DLDO11, | |
485 | .ops = &lp8788_ldo_voltage_table_ops, | |
486 | .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), | |
487 | .volt_table = lp8788_dldo1011_vtbl, | |
488 | .type = REGULATOR_VOLTAGE, | |
489 | .owner = THIS_MODULE, | |
490 | .vsel_reg = LP8788_DLDO11_VOUT, | |
491 | .vsel_mask = LP8788_VOUT_4BIT_M, | |
492 | .enable_reg = LP8788_EN_LDO_B, | |
493 | .enable_mask = LP8788_EN_DLDO11_M, | |
494 | }, | |
495 | { | |
496 | .name = "dldo12", | |
497 | .id = DLDO12, | |
498 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 499 | .n_voltages = 1, |
ade7515f KM |
500 | .type = REGULATOR_VOLTAGE, |
501 | .owner = THIS_MODULE, | |
502 | .enable_reg = LP8788_EN_LDO_B, | |
503 | .enable_mask = LP8788_EN_DLDO12_M, | |
504 | }, | |
505 | }; | |
506 | ||
507 | static struct regulator_desc lp8788_aldo_desc[] = { | |
508 | { | |
509 | .name = "aldo1", | |
510 | .id = ALDO1, | |
511 | .ops = &lp8788_ldo_voltage_table_ops, | |
512 | .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl), | |
513 | .volt_table = lp8788_aldo1_vtbl, | |
514 | .type = REGULATOR_VOLTAGE, | |
515 | .owner = THIS_MODULE, | |
516 | .vsel_reg = LP8788_ALDO1_VOUT, | |
517 | .vsel_mask = LP8788_VOUT_1BIT_M, | |
518 | .enable_reg = LP8788_EN_LDO_B, | |
519 | .enable_mask = LP8788_EN_ALDO1_M, | |
520 | }, | |
521 | { | |
522 | .name = "aldo2", | |
523 | .id = ALDO2, | |
524 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 525 | .n_voltages = 1, |
ade7515f KM |
526 | .type = REGULATOR_VOLTAGE, |
527 | .owner = THIS_MODULE, | |
528 | .enable_reg = LP8788_EN_LDO_B, | |
529 | .enable_mask = LP8788_EN_ALDO2_M, | |
530 | }, | |
531 | { | |
532 | .name = "aldo3", | |
533 | .id = ALDO3, | |
534 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 535 | .n_voltages = 1, |
ade7515f KM |
536 | .type = REGULATOR_VOLTAGE, |
537 | .owner = THIS_MODULE, | |
538 | .enable_reg = LP8788_EN_LDO_B, | |
539 | .enable_mask = LP8788_EN_ALDO3_M, | |
540 | }, | |
541 | { | |
542 | .name = "aldo4", | |
543 | .id = ALDO4, | |
544 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 545 | .n_voltages = 1, |
ade7515f KM |
546 | .type = REGULATOR_VOLTAGE, |
547 | .owner = THIS_MODULE, | |
548 | .enable_reg = LP8788_EN_LDO_B, | |
549 | .enable_mask = LP8788_EN_ALDO4_M, | |
550 | }, | |
551 | { | |
552 | .name = "aldo5", | |
553 | .id = ALDO5, | |
554 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 555 | .n_voltages = 1, |
ade7515f KM |
556 | .type = REGULATOR_VOLTAGE, |
557 | .owner = THIS_MODULE, | |
558 | .enable_reg = LP8788_EN_LDO_C, | |
559 | .enable_mask = LP8788_EN_ALDO5_M, | |
560 | }, | |
561 | { | |
562 | .name = "aldo6", | |
563 | .id = ALDO6, | |
564 | .ops = &lp8788_ldo_voltage_table_ops, | |
565 | .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), | |
566 | .volt_table = lp8788_dldo578_aldo6_vtbl, | |
567 | .type = REGULATOR_VOLTAGE, | |
568 | .owner = THIS_MODULE, | |
569 | .vsel_reg = LP8788_ALDO6_VOUT, | |
570 | .vsel_mask = LP8788_VOUT_4BIT_M, | |
571 | .enable_reg = LP8788_EN_LDO_C, | |
572 | .enable_mask = LP8788_EN_ALDO6_M, | |
573 | }, | |
574 | { | |
575 | .name = "aldo7", | |
576 | .id = ALDO7, | |
577 | .ops = &lp8788_ldo_voltage_table_ops, | |
578 | .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl), | |
579 | .volt_table = lp8788_aldo7_vtbl, | |
580 | .type = REGULATOR_VOLTAGE, | |
581 | .owner = THIS_MODULE, | |
582 | .vsel_reg = LP8788_ALDO7_VOUT, | |
583 | .vsel_mask = LP8788_VOUT_3BIT_M, | |
584 | .enable_reg = LP8788_EN_LDO_C, | |
585 | .enable_mask = LP8788_EN_ALDO7_M, | |
586 | }, | |
587 | { | |
588 | .name = "aldo8", | |
589 | .id = ALDO8, | |
590 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 591 | .n_voltages = 1, |
ade7515f KM |
592 | .type = REGULATOR_VOLTAGE, |
593 | .owner = THIS_MODULE, | |
594 | .enable_reg = LP8788_EN_LDO_C, | |
595 | .enable_mask = LP8788_EN_ALDO8_M, | |
596 | }, | |
597 | { | |
598 | .name = "aldo9", | |
599 | .id = ALDO9, | |
600 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 601 | .n_voltages = 1, |
ade7515f KM |
602 | .type = REGULATOR_VOLTAGE, |
603 | .owner = THIS_MODULE, | |
604 | .enable_reg = LP8788_EN_LDO_C, | |
605 | .enable_mask = LP8788_EN_ALDO9_M, | |
606 | }, | |
607 | { | |
608 | .name = "aldo10", | |
609 | .id = ALDO10, | |
610 | .ops = &lp8788_ldo_voltage_fixed_ops, | |
74c8cfda | 611 | .n_voltages = 1, |
ade7515f KM |
612 | .type = REGULATOR_VOLTAGE, |
613 | .owner = THIS_MODULE, | |
614 | .enable_reg = LP8788_EN_LDO_C, | |
615 | .enable_mask = LP8788_EN_ALDO10_M, | |
616 | }, | |
617 | }; | |
618 | ||
619 | static int lp8788_gpio_request_ldo_en(struct lp8788_ldo *ldo, | |
620 | enum lp8788_ext_ldo_en_id id) | |
621 | { | |
622 | struct device *dev = ldo->lp->dev; | |
623 | struct lp8788_ldo_enable_pin *pin = ldo->en_pin; | |
624 | int ret, gpio, pinstate; | |
625 | char *name[] = { | |
626 | [EN_ALDO1] = "LP8788_EN_ALDO1", | |
627 | [EN_ALDO234] = "LP8788_EN_ALDO234", | |
628 | [EN_ALDO5] = "LP8788_EN_ALDO5", | |
629 | [EN_ALDO7] = "LP8788_EN_ALDO7", | |
630 | [EN_DLDO7] = "LP8788_EN_DLDO7", | |
631 | [EN_DLDO911] = "LP8788_EN_DLDO911", | |
632 | }; | |
633 | ||
634 | gpio = pin->gpio; | |
635 | if (!gpio_is_valid(gpio)) { | |
636 | dev_err(dev, "invalid gpio: %d\n", gpio); | |
637 | return -EINVAL; | |
638 | } | |
639 | ||
640 | pinstate = pin->init_state; | |
641 | ret = devm_gpio_request_one(dev, gpio, pinstate, name[id]); | |
642 | if (ret == -EBUSY) { | |
643 | dev_warn(dev, "gpio%d already used\n", gpio); | |
644 | return 0; | |
645 | } | |
646 | ||
647 | return ret; | |
648 | } | |
649 | ||
650 | static int lp8788_config_ldo_enable_mode(struct lp8788_ldo *ldo, | |
651 | enum lp8788_ldo_id id) | |
652 | { | |
653 | int ret; | |
654 | struct lp8788 *lp = ldo->lp; | |
655 | struct lp8788_platform_data *pdata = lp->pdata; | |
656 | enum lp8788_ext_ldo_en_id enable_id; | |
657 | u8 en_mask[] = { | |
658 | [EN_ALDO1] = LP8788_EN_SEL_ALDO1_M, | |
659 | [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M, | |
660 | [EN_ALDO5] = LP8788_EN_SEL_ALDO5_M, | |
661 | [EN_ALDO7] = LP8788_EN_SEL_ALDO7_M, | |
662 | [EN_DLDO7] = LP8788_EN_SEL_DLDO7_M, | |
663 | [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M, | |
664 | }; | |
ade7515f KM |
665 | |
666 | switch (id) { | |
667 | case DLDO7: | |
668 | enable_id = EN_DLDO7; | |
669 | break; | |
670 | case DLDO9: | |
671 | case DLDO11: | |
672 | enable_id = EN_DLDO911; | |
673 | break; | |
674 | case ALDO1: | |
675 | enable_id = EN_ALDO1; | |
676 | break; | |
677 | case ALDO2 ... ALDO4: | |
678 | enable_id = EN_ALDO234; | |
679 | break; | |
680 | case ALDO5: | |
681 | enable_id = EN_ALDO5; | |
682 | break; | |
683 | case ALDO7: | |
684 | enable_id = EN_ALDO7; | |
685 | break; | |
686 | default: | |
687 | return 0; | |
688 | } | |
689 | ||
690 | /* if no platform data for ldo pin, then set default enable mode */ | |
691 | if (!pdata || !pdata->ldo_pin || !pdata->ldo_pin[enable_id]) | |
692 | goto set_default_ldo_enable_mode; | |
693 | ||
694 | ldo->en_pin = pdata->ldo_pin[enable_id]; | |
695 | ||
696 | ret = lp8788_gpio_request_ldo_en(ldo, enable_id); | |
697 | if (ret) | |
698 | goto set_default_ldo_enable_mode; | |
699 | ||
700 | return ret; | |
701 | ||
702 | set_default_ldo_enable_mode: | |
40b5aa8f | 703 | return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0); |
ade7515f KM |
704 | } |
705 | ||
a5023574 | 706 | static int lp8788_dldo_probe(struct platform_device *pdev) |
ade7515f KM |
707 | { |
708 | struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); | |
709 | int id = pdev->id; | |
710 | struct lp8788_ldo *ldo; | |
711 | struct regulator_config cfg = { }; | |
712 | struct regulator_dev *rdev; | |
713 | int ret; | |
714 | ||
715 | ldo = devm_kzalloc(lp->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); | |
716 | if (!ldo) | |
717 | return -ENOMEM; | |
718 | ||
719 | ldo->lp = lp; | |
720 | ret = lp8788_config_ldo_enable_mode(ldo, lp8788_dldo_id[id]); | |
721 | if (ret) | |
722 | return ret; | |
723 | ||
724 | cfg.dev = lp->dev; | |
725 | cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL; | |
726 | cfg.driver_data = ldo; | |
727 | cfg.regmap = lp->regmap; | |
728 | ||
729 | rdev = regulator_register(&lp8788_dldo_desc[id], &cfg); | |
730 | if (IS_ERR(rdev)) { | |
731 | ret = PTR_ERR(rdev); | |
732 | dev_err(lp->dev, "DLDO%d regulator register err = %d\n", | |
733 | id + 1, ret); | |
734 | return ret; | |
735 | } | |
736 | ||
737 | ldo->regulator = rdev; | |
738 | platform_set_drvdata(pdev, ldo); | |
739 | ||
740 | return 0; | |
741 | } | |
742 | ||
8dc995f5 | 743 | static int lp8788_dldo_remove(struct platform_device *pdev) |
ade7515f KM |
744 | { |
745 | struct lp8788_ldo *ldo = platform_get_drvdata(pdev); | |
746 | ||
747 | platform_set_drvdata(pdev, NULL); | |
748 | regulator_unregister(ldo->regulator); | |
749 | ||
750 | return 0; | |
751 | } | |
752 | ||
753 | static struct platform_driver lp8788_dldo_driver = { | |
754 | .probe = lp8788_dldo_probe, | |
5eb9f2b9 | 755 | .remove = lp8788_dldo_remove, |
ade7515f KM |
756 | .driver = { |
757 | .name = LP8788_DEV_DLDO, | |
758 | .owner = THIS_MODULE, | |
759 | }, | |
760 | }; | |
761 | ||
a5023574 | 762 | static int lp8788_aldo_probe(struct platform_device *pdev) |
ade7515f KM |
763 | { |
764 | struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); | |
765 | int id = pdev->id; | |
766 | struct lp8788_ldo *ldo; | |
767 | struct regulator_config cfg = { }; | |
768 | struct regulator_dev *rdev; | |
769 | int ret; | |
770 | ||
771 | ldo = devm_kzalloc(lp->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); | |
772 | if (!ldo) | |
773 | return -ENOMEM; | |
774 | ||
775 | ldo->lp = lp; | |
776 | ret = lp8788_config_ldo_enable_mode(ldo, lp8788_aldo_id[id]); | |
777 | if (ret) | |
778 | return ret; | |
779 | ||
780 | cfg.dev = lp->dev; | |
781 | cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL; | |
782 | cfg.driver_data = ldo; | |
783 | cfg.regmap = lp->regmap; | |
784 | ||
785 | rdev = regulator_register(&lp8788_aldo_desc[id], &cfg); | |
786 | if (IS_ERR(rdev)) { | |
787 | ret = PTR_ERR(rdev); | |
788 | dev_err(lp->dev, "ALDO%d regulator register err = %d\n", | |
789 | id + 1, ret); | |
790 | return ret; | |
791 | } | |
792 | ||
793 | ldo->regulator = rdev; | |
794 | platform_set_drvdata(pdev, ldo); | |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
8dc995f5 | 799 | static int lp8788_aldo_remove(struct platform_device *pdev) |
ade7515f KM |
800 | { |
801 | struct lp8788_ldo *ldo = platform_get_drvdata(pdev); | |
802 | ||
803 | platform_set_drvdata(pdev, NULL); | |
804 | regulator_unregister(ldo->regulator); | |
805 | ||
806 | return 0; | |
807 | } | |
808 | ||
809 | static struct platform_driver lp8788_aldo_driver = { | |
810 | .probe = lp8788_aldo_probe, | |
5eb9f2b9 | 811 | .remove = lp8788_aldo_remove, |
ade7515f KM |
812 | .driver = { |
813 | .name = LP8788_DEV_ALDO, | |
814 | .owner = THIS_MODULE, | |
815 | }, | |
816 | }; | |
817 | ||
818 | static int __init lp8788_ldo_init(void) | |
819 | { | |
820 | int ret; | |
821 | ||
822 | ret = platform_driver_register(&lp8788_dldo_driver); | |
823 | if (ret) | |
824 | return ret; | |
825 | ||
826 | return platform_driver_register(&lp8788_aldo_driver); | |
827 | } | |
828 | subsys_initcall(lp8788_ldo_init); | |
829 | ||
830 | static void __exit lp8788_ldo_exit(void) | |
831 | { | |
832 | platform_driver_unregister(&lp8788_aldo_driver); | |
833 | platform_driver_unregister(&lp8788_dldo_driver); | |
834 | } | |
835 | module_exit(lp8788_ldo_exit); | |
836 | ||
837 | MODULE_DESCRIPTION("TI LP8788 LDO Driver"); | |
838 | MODULE_AUTHOR("Milo Kim"); | |
839 | MODULE_LICENSE("GPL"); | |
840 | MODULE_ALIAS("platform:lp8788-dldo"); | |
841 | MODULE_ALIAS("platform:lp8788-aldo"); |