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Merge remote-tracking branch 'asoc/topic/sn95031' into asoc-next
[deliverable/linux.git] / drivers / regulator / palmas-regulator.c
CommitLineData
e5ce4208
GG		 1/*
2 * Driver for Regulator part of Palmas PMIC Chips
3 *
7be859f7 4 * Copyright 2011-2013 Texas Instruments Inc.
e5ce4208
GG		 5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
a7dddf27 7 * Author: Ian Lartey <ian@slimlogic.co.uk>
e5ce4208
GG		 8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/regmap.h>
25#include <linux/mfd/palmas.h>
a361cd9f
GG		 26#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/regulator/of_regulator.h>
e5ce4208
GG		 29
30struct regs_info {
31 char *name;
504382c9 32 char *sname;
e5ce4208
GG		 33 u8 vsel_addr;
34 u8 ctrl_addr;
35 u8 tstep_addr;
36};
37
38static const struct regs_info palmas_regs_info[] = {
39 {
40 .name = "SMPS12",
504382c9 41 .sname = "smps1-in",
e5ce4208
GG		 42 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
43 .ctrl_addr = PALMAS_SMPS12_CTRL,
44 .tstep_addr = PALMAS_SMPS12_TSTEP,
45 },
46 {
47 .name = "SMPS123",
504382c9 48 .sname = "smps1-in",
e5ce4208
GG		 49 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
50 .ctrl_addr = PALMAS_SMPS12_CTRL,
51 .tstep_addr = PALMAS_SMPS12_TSTEP,
52 },
53 {
54 .name = "SMPS3",
504382c9 55 .sname = "smps3-in",
e5ce4208
GG		 56 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
57 .ctrl_addr = PALMAS_SMPS3_CTRL,
58 },
59 {
60 .name = "SMPS45",
504382c9 61 .sname = "smps4-in",
e5ce4208
GG		 62 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
63 .ctrl_addr = PALMAS_SMPS45_CTRL,
64 .tstep_addr = PALMAS_SMPS45_TSTEP,
65 },
66 {
67 .name = "SMPS457",
504382c9 68 .sname = "smps4-in",
e5ce4208
GG		 69 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
70 .ctrl_addr = PALMAS_SMPS45_CTRL,
71 .tstep_addr = PALMAS_SMPS45_TSTEP,
72 },
73 {
74 .name = "SMPS6",
504382c9 75 .sname = "smps6-in",
e5ce4208
GG		 76 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
77 .ctrl_addr = PALMAS_SMPS6_CTRL,
78 .tstep_addr = PALMAS_SMPS6_TSTEP,
79 },
80 {
81 .name = "SMPS7",
504382c9 82 .sname = "smps7-in",
e5ce4208
GG		 83 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
84 .ctrl_addr = PALMAS_SMPS7_CTRL,
85 },
86 {
87 .name = "SMPS8",
504382c9 88 .sname = "smps8-in",
e5ce4208
GG		 89 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
90 .ctrl_addr = PALMAS_SMPS8_CTRL,
91 .tstep_addr = PALMAS_SMPS8_TSTEP,
92 },
93 {
94 .name = "SMPS9",
504382c9 95 .sname = "smps9-in",
e5ce4208
GG		 96 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
97 .ctrl_addr = PALMAS_SMPS9_CTRL,
98 },
99 {
77409d9b 100 .name = "SMPS10_OUT2",
504382c9 101 .sname = "smps10-in",
e31089c6 102 .ctrl_addr = PALMAS_SMPS10_CTRL,
e5ce4208 103 },
77409d9b
KVA		 104 {
105 .name = "SMPS10_OUT1",
106 .sname = "smps10-out2",
107 .ctrl_addr = PALMAS_SMPS10_CTRL,
108 },
e5ce4208
GG		 109 {
110 .name = "LDO1",
504382c9 111 .sname = "ldo1-in",
e5ce4208
GG		 112 .vsel_addr = PALMAS_LDO1_VOLTAGE,
113 .ctrl_addr = PALMAS_LDO1_CTRL,
114 },
115 {
116 .name = "LDO2",
504382c9 117 .sname = "ldo2-in",
e5ce4208
GG		 118 .vsel_addr = PALMAS_LDO2_VOLTAGE,
119 .ctrl_addr = PALMAS_LDO2_CTRL,
120 },
121 {
122 .name = "LDO3",
504382c9 123 .sname = "ldo3-in",
e5ce4208
GG		 124 .vsel_addr = PALMAS_LDO3_VOLTAGE,
125 .ctrl_addr = PALMAS_LDO3_CTRL,
126 },
127 {
128 .name = "LDO4",
504382c9 129 .sname = "ldo4-in",
e5ce4208
GG		 130 .vsel_addr = PALMAS_LDO4_VOLTAGE,
131 .ctrl_addr = PALMAS_LDO4_CTRL,
132 },
133 {
134 .name = "LDO5",
504382c9 135 .sname = "ldo5-in",
e5ce4208
GG		 136 .vsel_addr = PALMAS_LDO5_VOLTAGE,
137 .ctrl_addr = PALMAS_LDO5_CTRL,
138 },
139 {
140 .name = "LDO6",
504382c9 141 .sname = "ldo6-in",
e5ce4208
GG		 142 .vsel_addr = PALMAS_LDO6_VOLTAGE,
143 .ctrl_addr = PALMAS_LDO6_CTRL,
144 },
145 {
146 .name = "LDO7",
504382c9 147 .sname = "ldo7-in",
e5ce4208
GG		 148 .vsel_addr = PALMAS_LDO7_VOLTAGE,
149 .ctrl_addr = PALMAS_LDO7_CTRL,
150 },
151 {
152 .name = "LDO8",
504382c9 153 .sname = "ldo8-in",
e5ce4208
GG		 154 .vsel_addr = PALMAS_LDO8_VOLTAGE,
155 .ctrl_addr = PALMAS_LDO8_CTRL,
156 },
157 {
158 .name = "LDO9",
504382c9 159 .sname = "ldo9-in",
e5ce4208
GG		 160 .vsel_addr = PALMAS_LDO9_VOLTAGE,
161 .ctrl_addr = PALMAS_LDO9_CTRL,
162 },
163 {
164 .name = "LDOLN",
504382c9 165 .sname = "ldoln-in",
e5ce4208
GG		 166 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
167 .ctrl_addr = PALMAS_LDOLN_CTRL,
168 },
169 {
170 .name = "LDOUSB",
504382c9 171 .sname = "ldousb-in",
e5ce4208
GG		 172 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
173 .ctrl_addr = PALMAS_LDOUSB_CTRL,
174 },
aa07f027
LD		 175 {
176 .name = "REGEN1",
177 .ctrl_addr = PALMAS_REGEN1_CTRL,
178 },
179 {
180 .name = "REGEN2",
181 .ctrl_addr = PALMAS_REGEN2_CTRL,
182 },
183 {
184 .name = "REGEN3",
185 .ctrl_addr = PALMAS_REGEN3_CTRL,
186 },
187 {
188 .name = "SYSEN1",
189 .ctrl_addr = PALMAS_SYSEN1_CTRL,
190 },
191 {
192 .name = "SYSEN2",
193 .ctrl_addr = PALMAS_SYSEN2_CTRL,
194 },
e5ce4208
GG		 195};
196
28d1e8cd
LD		 197static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
198
e5ce4208
GG		 199#define SMPS_CTRL_MODE_OFF 0x00
200#define SMPS_CTRL_MODE_ON 0x01
201#define SMPS_CTRL_MODE_ECO 0x02
202#define SMPS_CTRL_MODE_PWM 0x03
203
0f45aa84 204#define PALMAS_SMPS_NUM_VOLTAGES 122
e5ce4208
GG		 205#define PALMAS_SMPS10_NUM_VOLTAGES 2
206#define PALMAS_LDO_NUM_VOLTAGES 50
207
208#define SMPS10_VSEL (1<<3)
209#define SMPS10_BOOST_EN (1<<2)
210#define SMPS10_BYPASS_EN (1<<1)
211#define SMPS10_SWITCH_EN (1<<0)
212
213#define REGULATOR_SLAVE 0
214
215static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
216 unsigned int *dest)
217{
218 unsigned int addr;
219
220 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
221
222 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
223}
224
225static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
226 unsigned int value)
227{
228 unsigned int addr;
229
230 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
231
232 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
233}
234
235static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
236 unsigned int *dest)
237{
238 unsigned int addr;
239
240 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
241
242 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
243}
244
245static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
246 unsigned int value)
247{
248 unsigned int addr;
249
250 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
251
252 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
253}
254
255static int palmas_is_enabled_smps(struct regulator_dev *dev)
256{
257 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
258 int id = rdev_get_id(dev);
259 unsigned int reg;
260
261 palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
262
263 reg &= PALMAS_SMPS12_CTRL_STATUS_MASK;
264 reg >>= PALMAS_SMPS12_CTRL_STATUS_SHIFT;
265
266 return !!(reg);
267}
268
269static int palmas_enable_smps(struct regulator_dev *dev)
270{
271 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
272 int id = rdev_get_id(dev);
273 unsigned int reg;
274
275 palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
276
277 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
51d3a0c9
LD		 278 if (pmic->current_reg_mode[id])
279 reg |= pmic->current_reg_mode[id];
280 else
281 reg |= SMPS_CTRL_MODE_ON;
e5ce4208
GG		 282
283 palmas_smps_write(pmic->palmas, palmas_regs_info[id].ctrl_addr, reg);
284
285 return 0;
286}
287
288static int palmas_disable_smps(struct regulator_dev *dev)
289{
290 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
291 int id = rdev_get_id(dev);
292 unsigned int reg;
293
294 palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
295
296 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
297
298 palmas_smps_write(pmic->palmas, palmas_regs_info[id].ctrl_addr, reg);
299
300 return 0;
301}
302
e5ce4208
GG		 303static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
304{
305 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
306 int id = rdev_get_id(dev);
307 unsigned int reg;
51d3a0c9 308 bool rail_enable = true;
e5ce4208
GG		 309
310 palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
999f0c7c 311 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
e5ce4208 312
51d3a0c9
LD		 313 if (reg == SMPS_CTRL_MODE_OFF)
314 rail_enable = false;
315
e5ce4208
GG		 316 switch (mode) {
317 case REGULATOR_MODE_NORMAL:
318 reg |= SMPS_CTRL_MODE_ON;
319 break;
320 case REGULATOR_MODE_IDLE:
321 reg |= SMPS_CTRL_MODE_ECO;
322 break;
323 case REGULATOR_MODE_FAST:
324 reg |= SMPS_CTRL_MODE_PWM;
325 break;
326 default:
327 return -EINVAL;
328 }
e5ce4208 329
51d3a0c9
LD		 330 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
331 if (rail_enable)
332 palmas_smps_write(pmic->palmas,
333 palmas_regs_info[id].ctrl_addr, reg);
e5ce4208
GG		 334 return 0;
335}
336
337static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
338{
339 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
340 int id = rdev_get_id(dev);
341 unsigned int reg;
342
51d3a0c9 343 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
e5ce4208
GG		 344
345 switch (reg) {
346 case SMPS_CTRL_MODE_ON:
347 return REGULATOR_MODE_NORMAL;
348 case SMPS_CTRL_MODE_ECO:
349 return REGULATOR_MODE_IDLE;
350 case SMPS_CTRL_MODE_PWM:
351 return REGULATOR_MODE_FAST;
352 }
353
354 return 0;
355}
356
357static int palmas_list_voltage_smps(struct regulator_dev *dev,
358 unsigned selector)
359{
360 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
361 int id = rdev_get_id(dev);
362 int mult = 1;
363
e5ce4208
GG		 364 /* Read the multiplier set in VSEL register to return
365 * the correct voltage.
366 */
367 if (pmic->range[id])
368 mult = 2;
369
ad02e846
AL		 370 if (selector == 0)
371 return 0;
372 else if (selector < 6)
373 return 500000 * mult;
374 else
375 /* Voltage is linear mapping starting from selector 6,
376 * volt = (0.49V + ((selector - 5) * 0.01V)) * RANGE
377 * RANGE is either x1 or x2
378 */
379 return (490000 + ((selector - 5) * 10000)) * mult;
e5ce4208
GG		 380}
381
382static int palmas_map_voltage_smps(struct regulator_dev *rdev,
383 int min_uV, int max_uV)
384{
8a165df7
AL		 385 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
386 int id = rdev_get_id(rdev);
e5ce4208
GG		 387 int ret, voltage;
388
8a165df7
AL		 389 if (min_uV == 0)
390 return 0;
391
392 if (pmic->range[id]) { /* RANGE is x2 */
393 if (min_uV < 1000000)
394 min_uV = 1000000;
ad02e846 395 ret = DIV_ROUND_UP(min_uV - 1000000, 20000) + 6;
8a165df7
AL		 396 } else { /* RANGE is x1 */
397 if (min_uV < 500000)
398 min_uV = 500000;
ad02e846 399 ret = DIV_ROUND_UP(min_uV - 500000, 10000) + 6;
8a165df7 400 }
e5ce4208
GG		 401
402 /* Map back into a voltage to verify we're still in bounds */
403 voltage = palmas_list_voltage_smps(rdev, ret);
404 if (voltage < min_uV || voltage > max_uV)
405 return -EINVAL;
406
407 return ret;
408}
409
28d1e8cd
LD		 410static int palma_smps_set_voltage_smps_time_sel(struct regulator_dev *rdev,
411 unsigned int old_selector, unsigned int new_selector)
412{
413 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
414 int id = rdev_get_id(rdev);
415 int old_uv, new_uv;
416 unsigned int ramp_delay = pmic->ramp_delay[id];
417
418 if (!ramp_delay)
419 return 0;
420
421 old_uv = palmas_list_voltage_smps(rdev, old_selector);
422 if (old_uv < 0)
423 return old_uv;
424
425 new_uv = palmas_list_voltage_smps(rdev, new_selector);
426 if (new_uv < 0)
427 return new_uv;
428
429 return DIV_ROUND_UP(abs(old_uv - new_uv), ramp_delay);
430}
431
432static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
433 int ramp_delay)
434{
435 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
436 int id = rdev_get_id(rdev);
437 unsigned int reg = 0;
438 unsigned int addr = palmas_regs_info[id].tstep_addr;
439 int ret;
440
f22c2bae
AL		 441 /* SMPS3 and SMPS7 do not have tstep_addr setting */
442 switch (id) {
443 case PALMAS_REG_SMPS3:
444 case PALMAS_REG_SMPS7:
445 return 0;
446 }
447
28d1e8cd
LD		 448 if (ramp_delay <= 0)
449 reg = 0;
0ea34b57 450 else if (ramp_delay <= 2500)
28d1e8cd 451 reg = 3;
0ea34b57 452 else if (ramp_delay <= 5000)
28d1e8cd
LD		 453 reg = 2;
454 else
455 reg = 1;
456
457 ret = palmas_smps_write(pmic->palmas, addr, reg);
458 if (ret < 0) {
459 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
460 return ret;
461 }
462
463 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
464 return ret;
465}
466
e5ce4208
GG		 467static struct regulator_ops palmas_ops_smps = {
468 .is_enabled = palmas_is_enabled_smps,
469 .enable = palmas_enable_smps,
470 .disable = palmas_disable_smps,
471 .set_mode = palmas_set_mode_smps,
472 .get_mode = palmas_get_mode_smps,
bdc4baac
AL		 473 .get_voltage_sel = regulator_get_voltage_sel_regmap,
474 .set_voltage_sel = regulator_set_voltage_sel_regmap,
e5ce4208
GG		 475 .list_voltage = palmas_list_voltage_smps,
476 .map_voltage = palmas_map_voltage_smps,
28d1e8cd
LD		 477 .set_voltage_time_sel = palma_smps_set_voltage_smps_time_sel,
478 .set_ramp_delay = palmas_smps_set_ramp_delay,
e5ce4208
GG		 479};
480
e5ce4208
GG		 481static struct regulator_ops palmas_ops_smps10 = {
482 .is_enabled = regulator_is_enabled_regmap,
483 .enable = regulator_enable_regmap,
484 .disable = regulator_disable_regmap,
485 .get_voltage_sel = regulator_get_voltage_sel_regmap,
486 .set_voltage_sel = regulator_set_voltage_sel_regmap,
8029a006
AL		 487 .list_voltage = regulator_list_voltage_linear,
488 .map_voltage = regulator_map_voltage_linear,
77409d9b
KVA		 489 .set_bypass = regulator_set_bypass_regmap,
490 .get_bypass = regulator_get_bypass_regmap,
e5ce4208
GG		 491};
492
493static int palmas_is_enabled_ldo(struct regulator_dev *dev)
494{
495 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
496 int id = rdev_get_id(dev);
497 unsigned int reg;
498
499 palmas_ldo_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
500
501 reg &= PALMAS_LDO1_CTRL_STATUS;
502
503 return !!(reg);
504}
505
e5ce4208
GG		 506static struct regulator_ops palmas_ops_ldo = {
507 .is_enabled = palmas_is_enabled_ldo,
508 .enable = regulator_enable_regmap,
509 .disable = regulator_disable_regmap,
4a247a96
AL		 510 .get_voltage_sel = regulator_get_voltage_sel_regmap,
511 .set_voltage_sel = regulator_set_voltage_sel_regmap,
9119ff6a
AL		 512 .list_voltage = regulator_list_voltage_linear,
513 .map_voltage = regulator_map_voltage_linear,
e5ce4208
GG		 514};
515
aa07f027
LD		 516static struct regulator_ops palmas_ops_extreg = {
517 .is_enabled = regulator_is_enabled_regmap,
518 .enable = regulator_enable_regmap,
519 .disable = regulator_disable_regmap,
520};
521
e5ce4208
GG		 522/*
523 * setup the hardware based sleep configuration of the SMPS/LDO regulators
524 * from the platform data. This is different to the software based control
525 * supported by the regulator framework as it is controlled by toggling
526 * pins on the PMIC such as PREQ, SYSEN, ...
527 */
528static int palmas_smps_init(struct palmas *palmas, int id,
529 struct palmas_reg_init *reg_init)
530{
531 unsigned int reg;
532 unsigned int addr;
533 int ret;
534
535 addr = palmas_regs_info[id].ctrl_addr;
536
537 ret = palmas_smps_read(palmas, addr, &reg);
538 if (ret)
539 return ret;
540
fedd89b1 541 switch (id) {
77409d9b
KVA		 542 case PALMAS_REG_SMPS10_OUT1:
543 case PALMAS_REG_SMPS10_OUT2:
30590d04
LD		 544 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
545 if (reg_init->mode_sleep)
fedd89b1
AL		 546 reg |= reg_init->mode_sleep <<
547 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
fedd89b1
AL		 548 break;
549 default:
e5ce4208
GG		 550 if (reg_init->warm_reset)
551 reg |= PALMAS_SMPS12_CTRL_WR_S;
30590d04
LD		 552 else
553 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
e5ce4208
GG		 554
555 if (reg_init->roof_floor)
556 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
30590d04
LD		 557 else
558 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
e5ce4208 559
30590d04
LD		 560 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
561 if (reg_init->mode_sleep)
e5ce4208
GG		 562 reg |= reg_init->mode_sleep <<
563 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
e5ce4208 564 }
fedd89b1 565
e5ce4208
GG		 566 ret = palmas_smps_write(palmas, addr, reg);
567 if (ret)
568 return ret;
569
e5ce4208
GG		 570 if (palmas_regs_info[id].vsel_addr && reg_init->vsel) {
571 addr = palmas_regs_info[id].vsel_addr;
572
573 reg = reg_init->vsel;
574
575 ret = palmas_smps_write(palmas, addr, reg);
576 if (ret)
577 return ret;
578 }
579
580
581 return 0;
582}
583
584static int palmas_ldo_init(struct palmas *palmas, int id,
585 struct palmas_reg_init *reg_init)
586{
587 unsigned int reg;
588 unsigned int addr;
589 int ret;
590
591 addr = palmas_regs_info[id].ctrl_addr;
592
2735daeb 593 ret = palmas_ldo_read(palmas, addr, &reg);
e5ce4208
GG		 594 if (ret)
595 return ret;
596
597 if (reg_init->warm_reset)
598 reg |= PALMAS_LDO1_CTRL_WR_S;
30590d04
LD		 599 else
600 reg &= ~PALMAS_LDO1_CTRL_WR_S;
e5ce4208
GG		 601
602 if (reg_init->mode_sleep)
603 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
30590d04
LD		 604 else
605 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
e5ce4208 606
2735daeb 607 ret = palmas_ldo_write(palmas, addr, reg);
e5ce4208
GG		 608 if (ret)
609 return ret;
610
611 return 0;
612}
613
aa07f027
LD		 614static int palmas_extreg_init(struct palmas *palmas, int id,
615 struct palmas_reg_init *reg_init)
616{
617 unsigned int addr;
618 int ret;
619 unsigned int val = 0;
620
621 addr = palmas_regs_info[id].ctrl_addr;
622
623 if (reg_init->mode_sleep)
624 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
625
626 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
627 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
628 if (ret < 0) {
629 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
630 addr, ret);
631 return ret;
632 }
633 return 0;
634}
635
17c11a76
LD		 636static void palmas_enable_ldo8_track(struct palmas *palmas)
637{
638 unsigned int reg;
639 unsigned int addr;
640 int ret;
641
642 addr = palmas_regs_info[PALMAS_REG_LDO8].ctrl_addr;
643
644 ret = palmas_ldo_read(palmas, addr, &reg);
645 if (ret) {
646 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
647 return;
648 }
649
650 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
651 ret = palmas_ldo_write(palmas, addr, reg);
652 if (ret < 0) {
653 dev_err(palmas->dev, "Error in enabling tracking mode\n");
654 return;
655 }
656 /*
657 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
658 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
659 * and can be set from 0.45 to 1.65 V.
660 */
661 addr = palmas_regs_info[PALMAS_REG_LDO8].vsel_addr;
662 ret = palmas_ldo_read(palmas, addr, &reg);
663 if (ret) {
664 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
665 return;
666 }
667
668 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
669 ret = palmas_ldo_write(palmas, addr, reg);
670 if (ret < 0)
671 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
672
673 return;
674}
675
a361cd9f
GG		 676static struct of_regulator_match palmas_matches[] = {
677 { .name = "smps12", },
678 { .name = "smps123", },
679 { .name = "smps3", },
680 { .name = "smps45", },
681 { .name = "smps457", },
682 { .name = "smps6", },
683 { .name = "smps7", },
684 { .name = "smps8", },
685 { .name = "smps9", },
77409d9b
KVA		 686 { .name = "smps10_out2", },
687 { .name = "smps10_out1", },
a361cd9f
GG		 688 { .name = "ldo1", },
689 { .name = "ldo2", },
690 { .name = "ldo3", },
691 { .name = "ldo4", },
692 { .name = "ldo5", },
693 { .name = "ldo6", },
694 { .name = "ldo7", },
695 { .name = "ldo8", },
696 { .name = "ldo9", },
697 { .name = "ldoln", },
698 { .name = "ldousb", },
aa07f027
LD		 699 { .name = "regen1", },
700 { .name = "regen2", },
701 { .name = "regen3", },
702 { .name = "sysen1", },
703 { .name = "sysen2", },
a361cd9f
GG		 704};
705
a5023574 706static void palmas_dt_to_pdata(struct device *dev,
a361cd9f
GG		 707 struct device_node *node,
708 struct palmas_pmic_platform_data *pdata)
709{
710 struct device_node *regulators;
711 u32 prop;
712 int idx, ret;
713
c92f5dd2 714 node = of_node_get(node);
a361cd9f
GG		 715 regulators = of_find_node_by_name(node, "regulators");
716 if (!regulators) {
717 dev_info(dev, "regulator node not found\n");
718 return;
719 }
720
721 ret = of_regulator_match(dev, regulators, palmas_matches,
722 PALMAS_NUM_REGS);
c92f5dd2 723 of_node_put(regulators);
a361cd9f
GG		 724 if (ret < 0) {
725 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
726 return;
727 }
728
729 for (idx = 0; idx < PALMAS_NUM_REGS; idx++) {
730 if (!palmas_matches[idx].init_data ||
731 !palmas_matches[idx].of_node)
732 continue;
733
734 pdata->reg_data[idx] = palmas_matches[idx].init_data;
735
736 pdata->reg_init[idx] = devm_kzalloc(dev,
737 sizeof(struct palmas_reg_init), GFP_KERNEL);
738
7be859f7 739 pdata->reg_init[idx]->warm_reset =
71f2146f
AL		 740 of_property_read_bool(palmas_matches[idx].of_node,
741 "ti,warm-reset");
a361cd9f 742
7be859f7
GG		 743 pdata->reg_init[idx]->roof_floor =
744 of_property_read_bool(palmas_matches[idx].of_node,
745 "ti,roof-floor");
a361cd9f
GG		 746
747 ret = of_property_read_u32(palmas_matches[idx].of_node,
3c870e3f 748 "ti,mode-sleep", &prop);
a361cd9f
GG		 749 if (!ret)
750 pdata->reg_init[idx]->mode_sleep = prop;
751
7be859f7
GG		 752 ret = of_property_read_bool(palmas_matches[idx].of_node,
753 "ti,smps-range");
754 if (ret)
755 pdata->reg_init[idx]->vsel =
756 PALMAS_SMPS12_VOLTAGE_RANGE;
a361cd9f 757
17c11a76
LD		 758 if (idx == PALMAS_REG_LDO8)
759 pdata->enable_ldo8_tracking = of_property_read_bool(
760 palmas_matches[idx].of_node,
761 "ti,enable-ldo8-tracking");
a361cd9f
GG		 762 }
763
7be859f7 764 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
a361cd9f
GG		 765}
766
767
bbcf50b1 768static int palmas_regulators_probe(struct platform_device *pdev)
e5ce4208
GG		 769{
770 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
dff91d0b 771 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
a361cd9f 772 struct device_node *node = pdev->dev.of_node;
e5ce4208
GG		 773 struct regulator_dev *rdev;
774 struct regulator_config config = { };
775 struct palmas_pmic *pmic;
776 struct palmas_reg_init *reg_init;
777 int id = 0, ret;
778 unsigned int addr, reg;
779
a361cd9f
GG		 780 if (node && !pdata) {
781 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
782
783 if (!pdata)
784 return -ENOMEM;
785
786 palmas_dt_to_pdata(&pdev->dev, node, pdata);
787 }
e5ce4208
GG		 788
789 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
790 if (!pmic)
791 return -ENOMEM;
792
793 pmic->dev = &pdev->dev;
794 pmic->palmas = palmas;
795 palmas->pmic = pmic;
796 platform_set_drvdata(pdev, pmic);
797
798 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
799 if (ret)
1c9d2d71 800 return ret;
e5ce4208
GG		 801
802 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
803 pmic->smps123 = 1;
804
805 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
806 pmic->smps457 = 1;
807
808 config.regmap = palmas->regmap[REGULATOR_SLAVE];
809 config.dev = &pdev->dev;
810 config.driver_data = pmic;
811
812 for (id = 0; id < PALMAS_REG_LDO1; id++) {
28d1e8cd 813 bool ramp_delay_support = false;
e5ce4208
GG		 814
815 /*
816 * Miss out regulators which are not available due
817 * to slaving configurations.
818 */
819 switch (id) {
820 case PALMAS_REG_SMPS12:
821 case PALMAS_REG_SMPS3:
822 if (pmic->smps123)
823 continue;
28d1e8cd
LD		 824 if (id == PALMAS_REG_SMPS12)
825 ramp_delay_support = true;
e5ce4208
GG		 826 break;
827 case PALMAS_REG_SMPS123:
828 if (!pmic->smps123)
829 continue;
28d1e8cd 830 ramp_delay_support = true;
e5ce4208
GG		 831 break;
832 case PALMAS_REG_SMPS45:
833 case PALMAS_REG_SMPS7:
834 if (pmic->smps457)
835 continue;
28d1e8cd
LD		 836 if (id == PALMAS_REG_SMPS45)
837 ramp_delay_support = true;
e5ce4208
GG		 838 break;
839 case PALMAS_REG_SMPS457:
840 if (!pmic->smps457)
841 continue;
28d1e8cd
LD		 842 ramp_delay_support = true;
843 break;
77409d9b
KVA		 844 case PALMAS_REG_SMPS10_OUT1:
845 case PALMAS_REG_SMPS10_OUT2:
1ffb0be3
K		 846 if (!PALMAS_PMIC_HAS(palmas, SMPS10_BOOST))
847 continue;
28d1e8cd
LD		 848 }
849
3f4d6364 850 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
28d1e8cd
LD		 851 ramp_delay_support = true;
852
853 if (ramp_delay_support) {
854 addr = palmas_regs_info[id].tstep_addr;
855 ret = palmas_smps_read(pmic->palmas, addr, &reg);
856 if (ret < 0) {
857 dev_err(&pdev->dev,
858 "reading TSTEP reg failed: %d\n", ret);
859 goto err_unregister_regulator;
860 }
861 pmic->desc[id].ramp_delay =
862 palmas_smps_ramp_delay[reg & 0x3];
863 pmic->ramp_delay[id] = pmic->desc[id].ramp_delay;
e5ce4208
GG		 864 }
865
bdc4baac
AL		 866 /* Initialise sleep/init values from platform data */
867 if (pdata && pdata->reg_init[id]) {
868 reg_init = pdata->reg_init[id];
869 ret = palmas_smps_init(palmas, id, reg_init);
870 if (ret)
871 goto err_unregister_regulator;
872 }
873
e5ce4208
GG		 874 /* Register the regulators */
875 pmic->desc[id].name = palmas_regs_info[id].name;
876 pmic->desc[id].id = id;
877
fedd89b1 878 switch (id) {
77409d9b
KVA		 879 case PALMAS_REG_SMPS10_OUT1:
880 case PALMAS_REG_SMPS10_OUT2:
e5ce4208
GG		 881 pmic->desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
882 pmic->desc[id].ops = &palmas_ops_smps10;
12565b16
AL		 883 pmic->desc[id].vsel_reg =
884 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
885 PALMAS_SMPS10_CTRL);
e5ce4208 886 pmic->desc[id].vsel_mask = SMPS10_VSEL;
a68de074
GG		 887 pmic->desc[id].enable_reg =
888 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
f232168d 889 PALMAS_SMPS10_CTRL);
77409d9b
KVA		 890 if (id == PALMAS_REG_SMPS10_OUT1)
891 pmic->desc[id].enable_mask = SMPS10_SWITCH_EN;
892 else
893 pmic->desc[id].enable_mask = SMPS10_BOOST_EN;
894 pmic->desc[id].bypass_reg =
895 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
896 PALMAS_SMPS10_CTRL);
897 pmic->desc[id].bypass_mask = SMPS10_BYPASS_EN;
8029a006
AL		 898 pmic->desc[id].min_uV = 3750000;
899 pmic->desc[id].uV_step = 1250000;
fedd89b1
AL		 900 break;
901 default:
bdc4baac
AL		 902 /*
903 * Read and store the RANGE bit for later use
904 * This must be done before regulator is probed,
51d3a0c9
LD		 905 * otherwise we error in probe with unsupportable
906 * ranges. Read the current smps mode for later use.
bdc4baac 907 */
e5ce4208
GG		 908 addr = palmas_regs_info[id].vsel_addr;
909
910 ret = palmas_smps_read(pmic->palmas, addr, &reg);
911 if (ret)
912 goto err_unregister_regulator;
913 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
914 pmic->range[id] = 1;
bdc4baac
AL		 915
916 pmic->desc[id].ops = &palmas_ops_smps;
917 pmic->desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
918 pmic->desc[id].vsel_reg =
919 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
920 palmas_regs_info[id].vsel_addr);
921 pmic->desc[id].vsel_mask =
922 PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
51d3a0c9
LD		 923
924 /* Read the smps mode for later use. */
925 addr = palmas_regs_info[id].ctrl_addr;
926 ret = palmas_smps_read(pmic->palmas, addr, &reg);
927 if (ret)
928 goto err_unregister_regulator;
929 pmic->current_reg_mode[id] = reg &
930 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
e5ce4208
GG		 931 }
932
bdc4baac
AL		 933 pmic->desc[id].type = REGULATOR_VOLTAGE;
934 pmic->desc[id].owner = THIS_MODULE;
935
a361cd9f 936 if (pdata)
e5ce4208
GG		 937 config.init_data = pdata->reg_data[id];
938 else
939 config.init_data = NULL;
940
504382c9 941 pmic->desc[id].supply_name = palmas_regs_info[id].sname;
a361cd9f
GG		 942 config.of_node = palmas_matches[id].of_node;
943
e5ce4208
GG		 944 rdev = regulator_register(&pmic->desc[id], &config);
945 if (IS_ERR(rdev)) {
946 dev_err(&pdev->dev,
947 "failed to register %s regulator\n",
948 pdev->name);
949 ret = PTR_ERR(rdev);
950 goto err_unregister_regulator;
951 }
952
953 /* Save regulator for cleanup */
954 pmic->rdev[id] = rdev;
955 }
956
957 /* Start this loop from the id left from previous loop */
958 for (; id < PALMAS_NUM_REGS; id++) {
959
960 /* Miss out regulators which are not available due
961 * to alternate functions.
962 */
963
964 /* Register the regulators */
965 pmic->desc[id].name = palmas_regs_info[id].name;
966 pmic->desc[id].id = id;
e5ce4208
GG		 967 pmic->desc[id].type = REGULATOR_VOLTAGE;
968 pmic->desc[id].owner = THIS_MODULE;
aa07f027
LD		 969
970 if (id < PALMAS_REG_REGEN1) {
971 pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;
972 pmic->desc[id].ops = &palmas_ops_ldo;
973 pmic->desc[id].min_uV = 900000;
974 pmic->desc[id].uV_step = 50000;
975 pmic->desc[id].linear_min_sel = 1;
087d30e3 976 pmic->desc[id].enable_time = 500;
aa07f027
LD		 977 pmic->desc[id].vsel_reg =
978 PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
4a247a96 979 palmas_regs_info[id].vsel_addr);
aa07f027
LD		 980 pmic->desc[id].vsel_mask =
981 PALMAS_LDO1_VOLTAGE_VSEL_MASK;
982 pmic->desc[id].enable_reg =
983 PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
984 palmas_regs_info[id].ctrl_addr);
985 pmic->desc[id].enable_mask =
986 PALMAS_LDO1_CTRL_MODE_ACTIVE;
17c11a76
LD		 987
988 /* Check if LDO8 is in tracking mode or not */
989 if (pdata && (id == PALMAS_REG_LDO8) &&
990 pdata->enable_ldo8_tracking) {
991 palmas_enable_ldo8_track(palmas);
3df4a81c 992 pmic->desc[id].min_uV = 450000;
17c11a76
LD		 993 pmic->desc[id].uV_step = 25000;
994 }
087d30e3
LD		 995
996 /* LOD6 in vibrator mode will have enable time 2000us */
997 if (pdata && pdata->ldo6_vibrator &&
998 (id == PALMAS_REG_LDO6))
999 pmic->desc[id].enable_time = 2000;
aa07f027
LD		 1000 } else {
1001 pmic->desc[id].n_voltages = 1;
1002 pmic->desc[id].ops = &palmas_ops_extreg;
1003 pmic->desc[id].enable_reg =
1004 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
a68de074 1005 palmas_regs_info[id].ctrl_addr);
aa07f027
LD		 1006 pmic->desc[id].enable_mask =
1007 PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1008 }
e5ce4208 1009
a361cd9f 1010 if (pdata)
e5ce4208
GG		 1011 config.init_data = pdata->reg_data[id];
1012 else
1013 config.init_data = NULL;
1014
504382c9 1015 pmic->desc[id].supply_name = palmas_regs_info[id].sname;
a361cd9f
GG		 1016 config.of_node = palmas_matches[id].of_node;
1017
e5ce4208
GG		 1018 rdev = regulator_register(&pmic->desc[id], &config);
1019 if (IS_ERR(rdev)) {
1020 dev_err(&pdev->dev,
1021 "failed to register %s regulator\n",
1022 pdev->name);
1023 ret = PTR_ERR(rdev);
1024 goto err_unregister_regulator;
1025 }
1026
1027 /* Save regulator for cleanup */
1028 pmic->rdev[id] = rdev;
1029
1030 /* Initialise sleep/init values from platform data */
a361cd9f 1031 if (pdata) {
e5ce4208
GG		 1032 reg_init = pdata->reg_init[id];
1033 if (reg_init) {
aa07f027
LD		 1034 if (id < PALMAS_REG_REGEN1)
1035 ret = palmas_ldo_init(palmas,
1036 id, reg_init);
1037 else
1038 ret = palmas_extreg_init(palmas,
1039 id, reg_init);
1c9d2d71
AL		 1040 if (ret) {
1041 regulator_unregister(pmic->rdev[id]);
e5ce4208 1042 goto err_unregister_regulator;
1c9d2d71 1043 }
e5ce4208
GG		 1044 }
1045 }
1046 }
1047
17c11a76 1048
e5ce4208
GG		 1049 return 0;
1050
1051err_unregister_regulator:
1052 while (--id >= 0)
1053 regulator_unregister(pmic->rdev[id]);
e5ce4208
GG		 1054 return ret;
1055}
1056
bbcf50b1 1057static int palmas_regulators_remove(struct platform_device *pdev)
e5ce4208
GG		 1058{
1059 struct palmas_pmic *pmic = platform_get_drvdata(pdev);
1060 int id;
1061
1062 for (id = 0; id < PALMAS_NUM_REGS; id++)
1063 regulator_unregister(pmic->rdev[id]);
e5ce4208
GG		 1064 return 0;
1065}
1066
3d68dfe3 1067static struct of_device_id of_palmas_match_tbl[] = {
a361cd9f 1068 { .compatible = "ti,palmas-pmic", },
7be859f7
GG		 1069 { .compatible = "ti,twl6035-pmic", },
1070 { .compatible = "ti,twl6036-pmic", },
1071 { .compatible = "ti,twl6037-pmic", },
1072 { .compatible = "ti,tps65913-pmic", },
1073 { .compatible = "ti,tps65914-pmic", },
1074 { .compatible = "ti,tps80036-pmic", },
b5c46787 1075 { .compatible = "ti,tps659038-pmic", },
a361cd9f
GG		 1076 { /* end */ }
1077};
1078
e5ce4208
GG		 1079static struct platform_driver palmas_driver = {
1080 .driver = {
1081 .name = "palmas-pmic",
a361cd9f 1082 .of_match_table = of_palmas_match_tbl,
e5ce4208
GG		 1083 .owner = THIS_MODULE,
1084 },
bbcf50b1
LD		 1085 .probe = palmas_regulators_probe,
1086 .remove = palmas_regulators_remove,
e5ce4208
GG		 1087};
1088
1089static int __init palmas_init(void)
1090{
1091 return platform_driver_register(&palmas_driver);
1092}
1093subsys_initcall(palmas_init);
1094
1095static void __exit palmas_exit(void)
1096{
1097 platform_driver_unregister(&palmas_driver);
1098}
1099module_exit(palmas_exit);
1100
1101MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1102MODULE_DESCRIPTION("Palmas voltage regulator driver");
1103MODULE_LICENSE("GPL");
1104MODULE_ALIAS("platform:palmas-pmic");
a361cd9f 1105MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
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