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Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
[deliverable/linux.git] / drivers / regulator / palmas-regulator.c
CommitLineData
e5ce4208
GG		 1/*
2 * Driver for Regulator part of Palmas PMIC Chips
3 *
7be859f7 4 * Copyright 2011-2013 Texas Instruments Inc.
e5ce4208
GG		 5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
a7dddf27 7 * Author: Ian Lartey <ian@slimlogic.co.uk>
e5ce4208
GG		 8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/regmap.h>
25#include <linux/mfd/palmas.h>
a361cd9f
GG		 26#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/regulator/of_regulator.h>
e5ce4208
GG		 29
30struct regs_info {
31 char *name;
504382c9 32 char *sname;
e5ce4208
GG		 33 u8 vsel_addr;
34 u8 ctrl_addr;
35 u8 tstep_addr;
32b6d3f6 36 int sleep_id;
e5ce4208
GG		 37};
38
dbabd624 39static const struct regulator_linear_range smps_low_ranges[] = {
6b7f2d82 40 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
dbabd624
K		 41 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
42 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
43 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
44};
45
46static const struct regulator_linear_range smps_high_ranges[] = {
6b7f2d82 47 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
dbabd624
K		 48 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
49 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
50 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
51};
52
e5ce4208
GG		 53static const struct regs_info palmas_regs_info[] = {
54 {
55 .name = "SMPS12",
504382c9 56 .sname = "smps1-in",
e5ce4208
GG		 57 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
58 .ctrl_addr = PALMAS_SMPS12_CTRL,
59 .tstep_addr = PALMAS_SMPS12_TSTEP,
32b6d3f6 60 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
e5ce4208
GG		 61 },
62 {
63 .name = "SMPS123",
504382c9 64 .sname = "smps1-in",
e5ce4208
GG		 65 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
66 .ctrl_addr = PALMAS_SMPS12_CTRL,
67 .tstep_addr = PALMAS_SMPS12_TSTEP,
32b6d3f6 68 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
e5ce4208
GG		 69 },
70 {
71 .name = "SMPS3",
504382c9 72 .sname = "smps3-in",
e5ce4208
GG		 73 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
74 .ctrl_addr = PALMAS_SMPS3_CTRL,
32b6d3f6 75 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
e5ce4208
GG		 76 },
77 {
78 .name = "SMPS45",
504382c9 79 .sname = "smps4-in",
e5ce4208
GG		 80 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
81 .ctrl_addr = PALMAS_SMPS45_CTRL,
82 .tstep_addr = PALMAS_SMPS45_TSTEP,
32b6d3f6 83 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
e5ce4208
GG		 84 },
85 {
86 .name = "SMPS457",
504382c9 87 .sname = "smps4-in",
e5ce4208
GG		 88 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
89 .ctrl_addr = PALMAS_SMPS45_CTRL,
90 .tstep_addr = PALMAS_SMPS45_TSTEP,
32b6d3f6 91 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
e5ce4208
GG		 92 },
93 {
94 .name = "SMPS6",
504382c9 95 .sname = "smps6-in",
e5ce4208
GG		 96 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
97 .ctrl_addr = PALMAS_SMPS6_CTRL,
98 .tstep_addr = PALMAS_SMPS6_TSTEP,
32b6d3f6 99 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
e5ce4208
GG		 100 },
101 {
102 .name = "SMPS7",
504382c9 103 .sname = "smps7-in",
e5ce4208
GG		 104 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
105 .ctrl_addr = PALMAS_SMPS7_CTRL,
32b6d3f6 106 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
e5ce4208
GG		 107 },
108 {
109 .name = "SMPS8",
504382c9 110 .sname = "smps8-in",
e5ce4208
GG		 111 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
112 .ctrl_addr = PALMAS_SMPS8_CTRL,
113 .tstep_addr = PALMAS_SMPS8_TSTEP,
32b6d3f6 114 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
e5ce4208
GG		 115 },
116 {
117 .name = "SMPS9",
504382c9 118 .sname = "smps9-in",
e5ce4208
GG		 119 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
120 .ctrl_addr = PALMAS_SMPS9_CTRL,
32b6d3f6 121 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
e5ce4208
GG		 122 },
123 {
77409d9b 124 .name = "SMPS10_OUT2",
504382c9 125 .sname = "smps10-in",
e31089c6 126 .ctrl_addr = PALMAS_SMPS10_CTRL,
32b6d3f6 127 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
e5ce4208 128 },
77409d9b
KVA		 129 {
130 .name = "SMPS10_OUT1",
131 .sname = "smps10-out2",
132 .ctrl_addr = PALMAS_SMPS10_CTRL,
32b6d3f6 133 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
77409d9b 134 },
e5ce4208
GG		 135 {
136 .name = "LDO1",
504382c9 137 .sname = "ldo1-in",
e5ce4208
GG		 138 .vsel_addr = PALMAS_LDO1_VOLTAGE,
139 .ctrl_addr = PALMAS_LDO1_CTRL,
32b6d3f6 140 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
e5ce4208
GG		 141 },
142 {
143 .name = "LDO2",
504382c9 144 .sname = "ldo2-in",
e5ce4208
GG		 145 .vsel_addr = PALMAS_LDO2_VOLTAGE,
146 .ctrl_addr = PALMAS_LDO2_CTRL,
32b6d3f6 147 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
e5ce4208
GG		 148 },
149 {
150 .name = "LDO3",
504382c9 151 .sname = "ldo3-in",
e5ce4208
GG		 152 .vsel_addr = PALMAS_LDO3_VOLTAGE,
153 .ctrl_addr = PALMAS_LDO3_CTRL,
32b6d3f6 154 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
e5ce4208
GG		 155 },
156 {
157 .name = "LDO4",
504382c9 158 .sname = "ldo4-in",
e5ce4208
GG		 159 .vsel_addr = PALMAS_LDO4_VOLTAGE,
160 .ctrl_addr = PALMAS_LDO4_CTRL,
32b6d3f6 161 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
e5ce4208
GG		 162 },
163 {
164 .name = "LDO5",
504382c9 165 .sname = "ldo5-in",
e5ce4208
GG		 166 .vsel_addr = PALMAS_LDO5_VOLTAGE,
167 .ctrl_addr = PALMAS_LDO5_CTRL,
32b6d3f6 168 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
e5ce4208
GG		 169 },
170 {
171 .name = "LDO6",
504382c9 172 .sname = "ldo6-in",
e5ce4208
GG		 173 .vsel_addr = PALMAS_LDO6_VOLTAGE,
174 .ctrl_addr = PALMAS_LDO6_CTRL,
32b6d3f6 175 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
e5ce4208
GG		 176 },
177 {
178 .name = "LDO7",
504382c9 179 .sname = "ldo7-in",
e5ce4208
GG		 180 .vsel_addr = PALMAS_LDO7_VOLTAGE,
181 .ctrl_addr = PALMAS_LDO7_CTRL,
32b6d3f6 182 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
e5ce4208
GG		 183 },
184 {
185 .name = "LDO8",
504382c9 186 .sname = "ldo8-in",
e5ce4208
GG		 187 .vsel_addr = PALMAS_LDO8_VOLTAGE,
188 .ctrl_addr = PALMAS_LDO8_CTRL,
32b6d3f6 189 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
e5ce4208
GG		 190 },
191 {
192 .name = "LDO9",
504382c9 193 .sname = "ldo9-in",
e5ce4208
GG		 194 .vsel_addr = PALMAS_LDO9_VOLTAGE,
195 .ctrl_addr = PALMAS_LDO9_CTRL,
32b6d3f6 196 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
e5ce4208
GG		 197 },
198 {
199 .name = "LDOLN",
504382c9 200 .sname = "ldoln-in",
e5ce4208
GG		 201 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
202 .ctrl_addr = PALMAS_LDOLN_CTRL,
32b6d3f6 203 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
e5ce4208
GG		 204 },
205 {
206 .name = "LDOUSB",
504382c9 207 .sname = "ldousb-in",
e5ce4208
GG		 208 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
209 .ctrl_addr = PALMAS_LDOUSB_CTRL,
32b6d3f6 210 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
e5ce4208 211 },
aa07f027
LD		 212 {
213 .name = "REGEN1",
214 .ctrl_addr = PALMAS_REGEN1_CTRL,
32b6d3f6 215 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
aa07f027
LD		 216 },
217 {
218 .name = "REGEN2",
219 .ctrl_addr = PALMAS_REGEN2_CTRL,
32b6d3f6 220 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
aa07f027
LD		 221 },
222 {
223 .name = "REGEN3",
224 .ctrl_addr = PALMAS_REGEN3_CTRL,
32b6d3f6 225 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
aa07f027
LD		 226 },
227 {
228 .name = "SYSEN1",
229 .ctrl_addr = PALMAS_SYSEN1_CTRL,
32b6d3f6 230 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
aa07f027
LD		 231 },
232 {
233 .name = "SYSEN2",
234 .ctrl_addr = PALMAS_SYSEN2_CTRL,
32b6d3f6 235 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
aa07f027 236 },
e5ce4208
GG		 237};
238
28d1e8cd
LD		 239static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
240
e5ce4208
GG		 241#define SMPS_CTRL_MODE_OFF 0x00
242#define SMPS_CTRL_MODE_ON 0x01
243#define SMPS_CTRL_MODE_ECO 0x02
244#define SMPS_CTRL_MODE_PWM 0x03
245
0f45aa84 246#define PALMAS_SMPS_NUM_VOLTAGES 122
e5ce4208
GG		 247#define PALMAS_SMPS10_NUM_VOLTAGES 2
248#define PALMAS_LDO_NUM_VOLTAGES 50
249
250#define SMPS10_VSEL (1<<3)
251#define SMPS10_BOOST_EN (1<<2)
252#define SMPS10_BYPASS_EN (1<<1)
253#define SMPS10_SWITCH_EN (1<<0)
254
255#define REGULATOR_SLAVE 0
256
257static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
258 unsigned int *dest)
259{
260 unsigned int addr;
261
262 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
263
264 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
265}
266
267static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
268 unsigned int value)
269{
270 unsigned int addr;
271
272 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
273
274 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
275}
276
277static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
278 unsigned int *dest)
279{
280 unsigned int addr;
281
282 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
283
284 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
285}
286
287static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
288 unsigned int value)
289{
290 unsigned int addr;
291
292 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
293
294 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
295}
296
e5ce4208
GG		 297static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
298{
299 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
300 int id = rdev_get_id(dev);
301 unsigned int reg;
51d3a0c9 302 bool rail_enable = true;
e5ce4208
GG		 303
304 palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
999f0c7c 305 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
e5ce4208 306
51d3a0c9
LD		 307 if (reg == SMPS_CTRL_MODE_OFF)
308 rail_enable = false;
309
e5ce4208
GG		 310 switch (mode) {
311 case REGULATOR_MODE_NORMAL:
312 reg |= SMPS_CTRL_MODE_ON;
313 break;
314 case REGULATOR_MODE_IDLE:
315 reg |= SMPS_CTRL_MODE_ECO;
316 break;
317 case REGULATOR_MODE_FAST:
318 reg |= SMPS_CTRL_MODE_PWM;
319 break;
320 default:
321 return -EINVAL;
322 }
e5ce4208 323
51d3a0c9
LD		 324 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
325 if (rail_enable)
326 palmas_smps_write(pmic->palmas,
327 palmas_regs_info[id].ctrl_addr, reg);
318dbb02
NM		 328
329 /* Switch the enable value to ensure this is used for enable */
330 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
331
e5ce4208
GG		 332 return 0;
333}
334
335static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
336{
337 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
338 int id = rdev_get_id(dev);
339 unsigned int reg;
340
51d3a0c9 341 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
e5ce4208
GG		 342
343 switch (reg) {
344 case SMPS_CTRL_MODE_ON:
345 return REGULATOR_MODE_NORMAL;
346 case SMPS_CTRL_MODE_ECO:
347 return REGULATOR_MODE_IDLE;
348 case SMPS_CTRL_MODE_PWM:
349 return REGULATOR_MODE_FAST;
350 }
351
352 return 0;
353}
354
28d1e8cd
LD		 355static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
356 int ramp_delay)
357{
358 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
359 int id = rdev_get_id(rdev);
360 unsigned int reg = 0;
361 unsigned int addr = palmas_regs_info[id].tstep_addr;
362 int ret;
363
f22c2bae
AL		 364 /* SMPS3 and SMPS7 do not have tstep_addr setting */
365 switch (id) {
366 case PALMAS_REG_SMPS3:
367 case PALMAS_REG_SMPS7:
368 return 0;
369 }
370
28d1e8cd
LD		 371 if (ramp_delay <= 0)
372 reg = 0;
0ea34b57 373 else if (ramp_delay <= 2500)
28d1e8cd 374 reg = 3;
0ea34b57 375 else if (ramp_delay <= 5000)
28d1e8cd
LD		 376 reg = 2;
377 else
378 reg = 1;
379
380 ret = palmas_smps_write(pmic->palmas, addr, reg);
381 if (ret < 0) {
382 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
383 return ret;
384 }
385
386 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
387 return ret;
388}
389
e5ce4208 390static struct regulator_ops palmas_ops_smps = {
dbabd624
K		 391 .is_enabled = regulator_is_enabled_regmap,
392 .enable = regulator_enable_regmap,
393 .disable = regulator_disable_regmap,
e5ce4208
GG		 394 .set_mode = palmas_set_mode_smps,
395 .get_mode = palmas_get_mode_smps,
bdc4baac
AL		 396 .get_voltage_sel = regulator_get_voltage_sel_regmap,
397 .set_voltage_sel = regulator_set_voltage_sel_regmap,
dbabd624
K		 398 .list_voltage = regulator_list_voltage_linear_range,
399 .map_voltage = regulator_map_voltage_linear_range,
400 .set_voltage_time_sel = regulator_set_voltage_time_sel,
28d1e8cd 401 .set_ramp_delay = palmas_smps_set_ramp_delay,
e5ce4208
GG		 402};
403
32b6d3f6
LD		 404static struct regulator_ops palmas_ops_ext_control_smps = {
405 .set_mode = palmas_set_mode_smps,
406 .get_mode = palmas_get_mode_smps,
407 .get_voltage_sel = regulator_get_voltage_sel_regmap,
408 .set_voltage_sel = regulator_set_voltage_sel_regmap,
dbabd624
K		 409 .list_voltage = regulator_list_voltage_linear_range,
410 .map_voltage = regulator_map_voltage_linear_range,
411 .set_voltage_time_sel = regulator_set_voltage_time_sel,
32b6d3f6
LD		 412 .set_ramp_delay = palmas_smps_set_ramp_delay,
413};
414
e5ce4208
GG		 415static struct regulator_ops palmas_ops_smps10 = {
416 .is_enabled = regulator_is_enabled_regmap,
417 .enable = regulator_enable_regmap,
418 .disable = regulator_disable_regmap,
419 .get_voltage_sel = regulator_get_voltage_sel_regmap,
420 .set_voltage_sel = regulator_set_voltage_sel_regmap,
8029a006
AL		 421 .list_voltage = regulator_list_voltage_linear,
422 .map_voltage = regulator_map_voltage_linear,
77409d9b
KVA		 423 .set_bypass = regulator_set_bypass_regmap,
424 .get_bypass = regulator_get_bypass_regmap,
e5ce4208
GG		 425};
426
427static int palmas_is_enabled_ldo(struct regulator_dev *dev)
428{
429 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
430 int id = rdev_get_id(dev);
431 unsigned int reg;
432
433 palmas_ldo_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
434
435 reg &= PALMAS_LDO1_CTRL_STATUS;
436
437 return !!(reg);
438}
439
e5ce4208
GG		 440static struct regulator_ops palmas_ops_ldo = {
441 .is_enabled = palmas_is_enabled_ldo,
442 .enable = regulator_enable_regmap,
443 .disable = regulator_disable_regmap,
4a247a96
AL		 444 .get_voltage_sel = regulator_get_voltage_sel_regmap,
445 .set_voltage_sel = regulator_set_voltage_sel_regmap,
9119ff6a
AL		 446 .list_voltage = regulator_list_voltage_linear,
447 .map_voltage = regulator_map_voltage_linear,
e5ce4208
GG		 448};
449
32b6d3f6
LD		 450static struct regulator_ops palmas_ops_ext_control_ldo = {
451 .get_voltage_sel = regulator_get_voltage_sel_regmap,
452 .set_voltage_sel = regulator_set_voltage_sel_regmap,
453 .list_voltage = regulator_list_voltage_linear,
454 .map_voltage = regulator_map_voltage_linear,
455};
456
aa07f027
LD		 457static struct regulator_ops palmas_ops_extreg = {
458 .is_enabled = regulator_is_enabled_regmap,
459 .enable = regulator_enable_regmap,
460 .disable = regulator_disable_regmap,
461};
462
32b6d3f6
LD		 463static struct regulator_ops palmas_ops_ext_control_extreg = {
464};
465
466static int palmas_regulator_config_external(struct palmas *palmas, int id,
467 struct palmas_reg_init *reg_init)
468{
469 int sleep_id = palmas_regs_info[id].sleep_id;
470 int ret;
471
472 ret = palmas_ext_control_req_config(palmas, sleep_id,
473 reg_init->roof_floor, true);
474 if (ret < 0)
475 dev_err(palmas->dev,
476 "Ext control config for regulator %d failed %d\n",
477 id, ret);
478 return ret;
479}
480
e5ce4208
GG		 481/*
482 * setup the hardware based sleep configuration of the SMPS/LDO regulators
483 * from the platform data. This is different to the software based control
484 * supported by the regulator framework as it is controlled by toggling
485 * pins on the PMIC such as PREQ, SYSEN, ...
486 */
487static int palmas_smps_init(struct palmas *palmas, int id,
488 struct palmas_reg_init *reg_init)
489{
490 unsigned int reg;
491 unsigned int addr;
492 int ret;
493
494 addr = palmas_regs_info[id].ctrl_addr;
495
496 ret = palmas_smps_read(palmas, addr, &reg);
497 if (ret)
498 return ret;
499
fedd89b1 500 switch (id) {
77409d9b
KVA		 501 case PALMAS_REG_SMPS10_OUT1:
502 case PALMAS_REG_SMPS10_OUT2:
30590d04
LD		 503 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
504 if (reg_init->mode_sleep)
fedd89b1
AL		 505 reg |= reg_init->mode_sleep <<
506 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
fedd89b1
AL		 507 break;
508 default:
e5ce4208
GG		 509 if (reg_init->warm_reset)
510 reg |= PALMAS_SMPS12_CTRL_WR_S;
30590d04
LD		 511 else
512 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
e5ce4208
GG		 513
514 if (reg_init->roof_floor)
515 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
30590d04
LD		 516 else
517 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
e5ce4208 518
30590d04
LD		 519 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
520 if (reg_init->mode_sleep)
e5ce4208
GG		 521 reg |= reg_init->mode_sleep <<
522 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
e5ce4208 523 }
fedd89b1 524
e5ce4208
GG		 525 ret = palmas_smps_write(palmas, addr, reg);
526 if (ret)
527 return ret;
528
e5ce4208
GG		 529 if (palmas_regs_info[id].vsel_addr && reg_init->vsel) {
530 addr = palmas_regs_info[id].vsel_addr;
531
532 reg = reg_init->vsel;
533
534 ret = palmas_smps_write(palmas, addr, reg);
535 if (ret)
536 return ret;
537 }
538
32b6d3f6
LD		 539 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
540 (id != PALMAS_REG_SMPS10_OUT2)) {
541 /* Enable externally controlled regulator */
542 addr = palmas_regs_info[id].ctrl_addr;
543 ret = palmas_smps_read(palmas, addr, &reg);
544 if (ret < 0)
545 return ret;
e5ce4208 546
32b6d3f6
LD		 547 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
548 reg |= SMPS_CTRL_MODE_ON;
549 ret = palmas_smps_write(palmas, addr, reg);
550 if (ret < 0)
551 return ret;
552 }
553 return palmas_regulator_config_external(palmas, id, reg_init);
554 }
e5ce4208
GG		 555 return 0;
556}
557
558static int palmas_ldo_init(struct palmas *palmas, int id,
559 struct palmas_reg_init *reg_init)
560{
561 unsigned int reg;
562 unsigned int addr;
563 int ret;
564
565 addr = palmas_regs_info[id].ctrl_addr;
566
2735daeb 567 ret = palmas_ldo_read(palmas, addr, &reg);
e5ce4208
GG		 568 if (ret)
569 return ret;
570
571 if (reg_init->warm_reset)
572 reg |= PALMAS_LDO1_CTRL_WR_S;
30590d04
LD		 573 else
574 reg &= ~PALMAS_LDO1_CTRL_WR_S;
e5ce4208
GG		 575
576 if (reg_init->mode_sleep)
577 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
30590d04
LD		 578 else
579 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
e5ce4208 580
2735daeb 581 ret = palmas_ldo_write(palmas, addr, reg);
e5ce4208
GG		 582 if (ret)
583 return ret;
584
32b6d3f6
LD		 585 if (reg_init->roof_floor) {
586 /* Enable externally controlled regulator */
587 addr = palmas_regs_info[id].ctrl_addr;
588 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
589 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
590 PALMAS_LDO1_CTRL_MODE_ACTIVE);
591 if (ret < 0) {
592 dev_err(palmas->dev,
593 "LDO Register 0x%02x update failed %d\n",
594 addr, ret);
595 return ret;
596 }
597 return palmas_regulator_config_external(palmas, id, reg_init);
598 }
e5ce4208
GG		 599 return 0;
600}
601
aa07f027
LD		 602static int palmas_extreg_init(struct palmas *palmas, int id,
603 struct palmas_reg_init *reg_init)
604{
605 unsigned int addr;
606 int ret;
607 unsigned int val = 0;
608
609 addr = palmas_regs_info[id].ctrl_addr;
610
611 if (reg_init->mode_sleep)
612 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
613
614 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
615 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
616 if (ret < 0) {
617 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
618 addr, ret);
619 return ret;
620 }
32b6d3f6
LD		 621
622 if (reg_init->roof_floor) {
623 /* Enable externally controlled regulator */
624 addr = palmas_regs_info[id].ctrl_addr;
625 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
626 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
627 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
628 if (ret < 0) {
629 dev_err(palmas->dev,
630 "Resource Register 0x%02x update failed %d\n",
631 addr, ret);
632 return ret;
633 }
634 return palmas_regulator_config_external(palmas, id, reg_init);
635 }
aa07f027
LD		 636 return 0;
637}
638
17c11a76
LD		 639static void palmas_enable_ldo8_track(struct palmas *palmas)
640{
641 unsigned int reg;
642 unsigned int addr;
643 int ret;
644
645 addr = palmas_regs_info[PALMAS_REG_LDO8].ctrl_addr;
646
647 ret = palmas_ldo_read(palmas, addr, &reg);
648 if (ret) {
649 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
650 return;
651 }
652
653 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
654 ret = palmas_ldo_write(palmas, addr, reg);
655 if (ret < 0) {
656 dev_err(palmas->dev, "Error in enabling tracking mode\n");
657 return;
658 }
659 /*
660 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
661 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
662 * and can be set from 0.45 to 1.65 V.
663 */
664 addr = palmas_regs_info[PALMAS_REG_LDO8].vsel_addr;
665 ret = palmas_ldo_read(palmas, addr, &reg);
666 if (ret) {
667 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
668 return;
669 }
670
671 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
672 ret = palmas_ldo_write(palmas, addr, reg);
673 if (ret < 0)
674 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
675
676 return;
677}
678
a361cd9f
GG		 679static struct of_regulator_match palmas_matches[] = {
680 { .name = "smps12", },
681 { .name = "smps123", },
682 { .name = "smps3", },
683 { .name = "smps45", },
684 { .name = "smps457", },
685 { .name = "smps6", },
686 { .name = "smps7", },
687 { .name = "smps8", },
688 { .name = "smps9", },
77409d9b
KVA		 689 { .name = "smps10_out2", },
690 { .name = "smps10_out1", },
a361cd9f
GG		 691 { .name = "ldo1", },
692 { .name = "ldo2", },
693 { .name = "ldo3", },
694 { .name = "ldo4", },
695 { .name = "ldo5", },
696 { .name = "ldo6", },
697 { .name = "ldo7", },
698 { .name = "ldo8", },
699 { .name = "ldo9", },
700 { .name = "ldoln", },
701 { .name = "ldousb", },
aa07f027
LD		 702 { .name = "regen1", },
703 { .name = "regen2", },
704 { .name = "regen3", },
705 { .name = "sysen1", },
706 { .name = "sysen2", },
a361cd9f
GG		 707};
708
a5023574 709static void palmas_dt_to_pdata(struct device *dev,
a361cd9f
GG		 710 struct device_node *node,
711 struct palmas_pmic_platform_data *pdata)
712{
713 struct device_node *regulators;
714 u32 prop;
715 int idx, ret;
716
c92f5dd2 717 node = of_node_get(node);
acc1ccad 718 regulators = of_get_child_by_name(node, "regulators");
a361cd9f
GG		 719 if (!regulators) {
720 dev_info(dev, "regulator node not found\n");
721 return;
722 }
723
724 ret = of_regulator_match(dev, regulators, palmas_matches,
725 PALMAS_NUM_REGS);
c92f5dd2 726 of_node_put(regulators);
a361cd9f
GG		 727 if (ret < 0) {
728 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
729 return;
730 }
731
732 for (idx = 0; idx < PALMAS_NUM_REGS; idx++) {
733 if (!palmas_matches[idx].init_data ||
734 !palmas_matches[idx].of_node)
735 continue;
736
737 pdata->reg_data[idx] = palmas_matches[idx].init_data;
738
739 pdata->reg_init[idx] = devm_kzalloc(dev,
740 sizeof(struct palmas_reg_init), GFP_KERNEL);
741
7be859f7 742 pdata->reg_init[idx]->warm_reset =
71f2146f
AL		 743 of_property_read_bool(palmas_matches[idx].of_node,
744 "ti,warm-reset");
a361cd9f 745
32b6d3f6
LD		 746 ret = of_property_read_u32(palmas_matches[idx].of_node,
747 "ti,roof-floor", &prop);
748 /* EINVAL: Property not found */
749 if (ret != -EINVAL) {
750 int econtrol;
751
752 /* use default value, when no value is specified */
753 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
754 if (!ret) {
755 switch (prop) {
756 case 1:
757 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
758 break;
759 case 2:
760 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
761 break;
762 case 3:
763 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
764 break;
765 default:
766 WARN_ON(1);
767 dev_warn(dev,
768 "%s: Invalid roof-floor option: %u\n",
769 palmas_matches[idx].name, prop);
770 break;
771 }
772 }
773 pdata->reg_init[idx]->roof_floor = econtrol;
774 }
a361cd9f
GG		 775
776 ret = of_property_read_u32(palmas_matches[idx].of_node,
3c870e3f 777 "ti,mode-sleep", &prop);
a361cd9f
GG		 778 if (!ret)
779 pdata->reg_init[idx]->mode_sleep = prop;
780
7be859f7
GG		 781 ret = of_property_read_bool(palmas_matches[idx].of_node,
782 "ti,smps-range");
783 if (ret)
784 pdata->reg_init[idx]->vsel =
785 PALMAS_SMPS12_VOLTAGE_RANGE;
a361cd9f 786
17c11a76
LD		 787 if (idx == PALMAS_REG_LDO8)
788 pdata->enable_ldo8_tracking = of_property_read_bool(
789 palmas_matches[idx].of_node,
790 "ti,enable-ldo8-tracking");
a361cd9f
GG		 791 }
792
7be859f7 793 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
a361cd9f
GG		 794}
795
796
bbcf50b1 797static int palmas_regulators_probe(struct platform_device *pdev)
e5ce4208
GG		 798{
799 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
dff91d0b 800 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
a361cd9f 801 struct device_node *node = pdev->dev.of_node;
e5ce4208
GG		 802 struct regulator_dev *rdev;
803 struct regulator_config config = { };
804 struct palmas_pmic *pmic;
805 struct palmas_reg_init *reg_init;
806 int id = 0, ret;
807 unsigned int addr, reg;
808
a361cd9f
GG		 809 if (node && !pdata) {
810 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
811
812 if (!pdata)
813 return -ENOMEM;
814
815 palmas_dt_to_pdata(&pdev->dev, node, pdata);
816 }
e5ce4208
GG		 817
818 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
819 if (!pmic)
820 return -ENOMEM;
821
822 pmic->dev = &pdev->dev;
823 pmic->palmas = palmas;
824 palmas->pmic = pmic;
825 platform_set_drvdata(pdev, pmic);
826
827 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
828 if (ret)
1c9d2d71 829 return ret;
e5ce4208
GG		 830
831 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
832 pmic->smps123 = 1;
833
834 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
835 pmic->smps457 = 1;
836
837 config.regmap = palmas->regmap[REGULATOR_SLAVE];
838 config.dev = &pdev->dev;
839 config.driver_data = pmic;
840
841 for (id = 0; id < PALMAS_REG_LDO1; id++) {
28d1e8cd 842 bool ramp_delay_support = false;
e5ce4208
GG		 843
844 /*
845 * Miss out regulators which are not available due
846 * to slaving configurations.
847 */
848 switch (id) {
849 case PALMAS_REG_SMPS12:
850 case PALMAS_REG_SMPS3:
851 if (pmic->smps123)
852 continue;
28d1e8cd
LD		 853 if (id == PALMAS_REG_SMPS12)
854 ramp_delay_support = true;
e5ce4208
GG		 855 break;
856 case PALMAS_REG_SMPS123:
857 if (!pmic->smps123)
858 continue;
28d1e8cd 859 ramp_delay_support = true;
e5ce4208
GG		 860 break;
861 case PALMAS_REG_SMPS45:
862 case PALMAS_REG_SMPS7:
863 if (pmic->smps457)
864 continue;
28d1e8cd
LD		 865 if (id == PALMAS_REG_SMPS45)
866 ramp_delay_support = true;
e5ce4208
GG		 867 break;
868 case PALMAS_REG_SMPS457:
869 if (!pmic->smps457)
870 continue;
28d1e8cd
LD		 871 ramp_delay_support = true;
872 break;
77409d9b
KVA		 873 case PALMAS_REG_SMPS10_OUT1:
874 case PALMAS_REG_SMPS10_OUT2:
1ffb0be3
K		 875 if (!PALMAS_PMIC_HAS(palmas, SMPS10_BOOST))
876 continue;
28d1e8cd
LD		 877 }
878
3f4d6364 879 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
28d1e8cd
LD		 880 ramp_delay_support = true;
881
882 if (ramp_delay_support) {
883 addr = palmas_regs_info[id].tstep_addr;
884 ret = palmas_smps_read(pmic->palmas, addr, &reg);
885 if (ret < 0) {
886 dev_err(&pdev->dev,
887 "reading TSTEP reg failed: %d\n", ret);
51c86b3e 888 return ret;
28d1e8cd
LD		 889 }
890 pmic->desc[id].ramp_delay =
891 palmas_smps_ramp_delay[reg & 0x3];
892 pmic->ramp_delay[id] = pmic->desc[id].ramp_delay;
e5ce4208
GG		 893 }
894
bdc4baac
AL		 895 /* Initialise sleep/init values from platform data */
896 if (pdata && pdata->reg_init[id]) {
897 reg_init = pdata->reg_init[id];
898 ret = palmas_smps_init(palmas, id, reg_init);
899 if (ret)
51c86b3e 900 return ret;
32b6d3f6
LD		 901 } else {
902 reg_init = NULL;
bdc4baac
AL		 903 }
904
e5ce4208
GG		 905 /* Register the regulators */
906 pmic->desc[id].name = palmas_regs_info[id].name;
907 pmic->desc[id].id = id;
908
fedd89b1 909 switch (id) {
77409d9b
KVA		 910 case PALMAS_REG_SMPS10_OUT1:
911 case PALMAS_REG_SMPS10_OUT2:
e5ce4208
GG		 912 pmic->desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
913 pmic->desc[id].ops = &palmas_ops_smps10;
12565b16
AL		 914 pmic->desc[id].vsel_reg =
915 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
916 PALMAS_SMPS10_CTRL);
e5ce4208 917 pmic->desc[id].vsel_mask = SMPS10_VSEL;
a68de074
GG		 918 pmic->desc[id].enable_reg =
919 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
f232168d 920 PALMAS_SMPS10_CTRL);
77409d9b
KVA		 921 if (id == PALMAS_REG_SMPS10_OUT1)
922 pmic->desc[id].enable_mask = SMPS10_SWITCH_EN;
923 else
924 pmic->desc[id].enable_mask = SMPS10_BOOST_EN;
925 pmic->desc[id].bypass_reg =
926 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
927 PALMAS_SMPS10_CTRL);
928 pmic->desc[id].bypass_mask = SMPS10_BYPASS_EN;
8029a006
AL		 929 pmic->desc[id].min_uV = 3750000;
930 pmic->desc[id].uV_step = 1250000;
fedd89b1
AL		 931 break;
932 default:
bdc4baac
AL		 933 /*
934 * Read and store the RANGE bit for later use
935 * This must be done before regulator is probed,
51d3a0c9
LD		 936 * otherwise we error in probe with unsupportable
937 * ranges. Read the current smps mode for later use.
bdc4baac 938 */
e5ce4208 939 addr = palmas_regs_info[id].vsel_addr;
dbabd624 940 pmic->desc[id].n_linear_ranges = 3;
e5ce4208
GG		 941
942 ret = palmas_smps_read(pmic->palmas, addr, &reg);
943 if (ret)
51c86b3e 944 return ret;
e5ce4208
GG		 945 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
946 pmic->range[id] = 1;
dbabd624
K		 947 if (pmic->range[id])
948 pmic->desc[id].linear_ranges = smps_high_ranges;
949 else
950 pmic->desc[id].linear_ranges = smps_low_ranges;
bdc4baac 951
32b6d3f6
LD		 952 if (reg_init && reg_init->roof_floor)
953 pmic->desc[id].ops =
954 &palmas_ops_ext_control_smps;
955 else
956 pmic->desc[id].ops = &palmas_ops_smps;
bdc4baac
AL		 957 pmic->desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
958 pmic->desc[id].vsel_reg =
959 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
960 palmas_regs_info[id].vsel_addr);
961 pmic->desc[id].vsel_mask =
962 PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
51d3a0c9
LD		 963
964 /* Read the smps mode for later use. */
965 addr = palmas_regs_info[id].ctrl_addr;
966 ret = palmas_smps_read(pmic->palmas, addr, &reg);
967 if (ret)
51c86b3e 968 return ret;
51d3a0c9
LD		 969 pmic->current_reg_mode[id] = reg &
970 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
318dbb02
NM		 971
972 pmic->desc[id].enable_reg =
5b01bd11 973 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
318dbb02
NM		 974 palmas_regs_info[id].ctrl_addr);
975 pmic->desc[id].enable_mask =
976 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
977 /* set_mode overrides this value */
978 pmic->desc[id].enable_val = SMPS_CTRL_MODE_ON;
e5ce4208
GG		 979 }
980
bdc4baac
AL		 981 pmic->desc[id].type = REGULATOR_VOLTAGE;
982 pmic->desc[id].owner = THIS_MODULE;
983
a361cd9f 984 if (pdata)
e5ce4208
GG		 985 config.init_data = pdata->reg_data[id];
986 else
987 config.init_data = NULL;
988
504382c9 989 pmic->desc[id].supply_name = palmas_regs_info[id].sname;
a361cd9f
GG		 990 config.of_node = palmas_matches[id].of_node;
991
51c86b3e
SK		 992 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
993 &config);
e5ce4208
GG		 994 if (IS_ERR(rdev)) {
995 dev_err(&pdev->dev,
996 "failed to register %s regulator\n",
997 pdev->name);
51c86b3e 998 return PTR_ERR(rdev);
e5ce4208
GG		 999 }
1000
1001 /* Save regulator for cleanup */
1002 pmic->rdev[id] = rdev;
1003 }
1004
1005 /* Start this loop from the id left from previous loop */
1006 for (; id < PALMAS_NUM_REGS; id++) {
32b6d3f6
LD		 1007 if (pdata && pdata->reg_init[id])
1008 reg_init = pdata->reg_init[id];
1009 else
1010 reg_init = NULL;
e5ce4208
GG		 1011
1012 /* Miss out regulators which are not available due
1013 * to alternate functions.
1014 */
1015
1016 /* Register the regulators */
1017 pmic->desc[id].name = palmas_regs_info[id].name;
1018 pmic->desc[id].id = id;
e5ce4208
GG		 1019 pmic->desc[id].type = REGULATOR_VOLTAGE;
1020 pmic->desc[id].owner = THIS_MODULE;
aa07f027
LD		 1021
1022 if (id < PALMAS_REG_REGEN1) {
1023 pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;
32b6d3f6
LD		 1024 if (reg_init && reg_init->roof_floor)
1025 pmic->desc[id].ops =
1026 &palmas_ops_ext_control_ldo;
1027 else
1028 pmic->desc[id].ops = &palmas_ops_ldo;
aa07f027
LD		 1029 pmic->desc[id].min_uV = 900000;
1030 pmic->desc[id].uV_step = 50000;
1031 pmic->desc[id].linear_min_sel = 1;
087d30e3 1032 pmic->desc[id].enable_time = 500;
aa07f027
LD		 1033 pmic->desc[id].vsel_reg =
1034 PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
4a247a96 1035 palmas_regs_info[id].vsel_addr);
aa07f027
LD		 1036 pmic->desc[id].vsel_mask =
1037 PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1038 pmic->desc[id].enable_reg =
1039 PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1040 palmas_regs_info[id].ctrl_addr);
1041 pmic->desc[id].enable_mask =
1042 PALMAS_LDO1_CTRL_MODE_ACTIVE;
17c11a76
LD		 1043
1044 /* Check if LDO8 is in tracking mode or not */
1045 if (pdata && (id == PALMAS_REG_LDO8) &&
1046 pdata->enable_ldo8_tracking) {
1047 palmas_enable_ldo8_track(palmas);
3df4a81c 1048 pmic->desc[id].min_uV = 450000;
17c11a76
LD		 1049 pmic->desc[id].uV_step = 25000;
1050 }
087d30e3
LD		 1051
1052 /* LOD6 in vibrator mode will have enable time 2000us */
1053 if (pdata && pdata->ldo6_vibrator &&
1054 (id == PALMAS_REG_LDO6))
1055 pmic->desc[id].enable_time = 2000;
aa07f027
LD		 1056 } else {
1057 pmic->desc[id].n_voltages = 1;
32b6d3f6
LD		 1058 if (reg_init && reg_init->roof_floor)
1059 pmic->desc[id].ops =
1060 &palmas_ops_ext_control_extreg;
1061 else
1062 pmic->desc[id].ops = &palmas_ops_extreg;
aa07f027
LD		 1063 pmic->desc[id].enable_reg =
1064 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
a68de074 1065 palmas_regs_info[id].ctrl_addr);
aa07f027
LD		 1066 pmic->desc[id].enable_mask =
1067 PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1068 }
e5ce4208 1069
a361cd9f 1070 if (pdata)
e5ce4208
GG		 1071 config.init_data = pdata->reg_data[id];
1072 else
1073 config.init_data = NULL;
1074
504382c9 1075 pmic->desc[id].supply_name = palmas_regs_info[id].sname;
a361cd9f
GG		 1076 config.of_node = palmas_matches[id].of_node;
1077
51c86b3e
SK		 1078 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
1079 &config);
e5ce4208
GG		 1080 if (IS_ERR(rdev)) {
1081 dev_err(&pdev->dev,
1082 "failed to register %s regulator\n",
1083 pdev->name);
51c86b3e 1084 return PTR_ERR(rdev);
e5ce4208
GG		 1085 }
1086
1087 /* Save regulator for cleanup */
1088 pmic->rdev[id] = rdev;
1089
1090 /* Initialise sleep/init values from platform data */
a361cd9f 1091 if (pdata) {
e5ce4208
GG		 1092 reg_init = pdata->reg_init[id];
1093 if (reg_init) {
aa07f027
LD		 1094 if (id < PALMAS_REG_REGEN1)
1095 ret = palmas_ldo_init(palmas,
1096 id, reg_init);
1097 else
1098 ret = palmas_extreg_init(palmas,
1099 id, reg_init);
cb2e45e3 1100 if (ret)
51c86b3e 1101 return ret;
e5ce4208
GG		 1102 }
1103 }
1104 }
1105
17c11a76 1106
e5ce4208 1107 return 0;
e5ce4208
GG		 1108}
1109
2449df9f 1110static const struct of_device_id of_palmas_match_tbl[] = {
a361cd9f 1111 { .compatible = "ti,palmas-pmic", },
7be859f7
GG		 1112 { .compatible = "ti,twl6035-pmic", },
1113 { .compatible = "ti,twl6036-pmic", },
1114 { .compatible = "ti,twl6037-pmic", },
1115 { .compatible = "ti,tps65913-pmic", },
1116 { .compatible = "ti,tps65914-pmic", },
1117 { .compatible = "ti,tps80036-pmic", },
b5c46787 1118 { .compatible = "ti,tps659038-pmic", },
a361cd9f
GG		 1119 { /* end */ }
1120};
1121
e5ce4208
GG		 1122static struct platform_driver palmas_driver = {
1123 .driver = {
1124 .name = "palmas-pmic",
a361cd9f 1125 .of_match_table = of_palmas_match_tbl,
e5ce4208
GG		 1126 .owner = THIS_MODULE,
1127 },
bbcf50b1 1128 .probe = palmas_regulators_probe,
e5ce4208
GG		 1129};
1130
1131static int __init palmas_init(void)
1132{
1133 return platform_driver_register(&palmas_driver);
1134}
1135subsys_initcall(palmas_init);
1136
1137static void __exit palmas_exit(void)
1138{
1139 platform_driver_unregister(&palmas_driver);
1140}
1141module_exit(palmas_exit);
1142
1143MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1144MODULE_DESCRIPTION("Palmas voltage regulator driver");
1145MODULE_LICENSE("GPL");
1146MODULE_ALIAS("platform:palmas-pmic");
a361cd9f 1147MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
Linux kernel - Deliverables
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