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regulator: wm8994: Convert to devm_kzalloc()
[deliverable/linux.git] / drivers / regulator / tps65910-regulator.c
CommitLineData
518fb721
GG		 1/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65910.h>
27
518fb721 28#define TPS65910_SUPPLY_STATE_ENABLED 0x1
1e0c66f4
LD		 29#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
31 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
518fb721
GG		 32
33/* supported VIO voltages in milivolts */
34static const u16 VIO_VSEL_table[] = {
35 1500, 1800, 2500, 3300,
36};
37
a320e3c3
JEC		 38/* VSEL tables for TPS65910 specific LDOs and dcdc's */
39
40/* supported VDD3 voltages in milivolts */
518fb721
GG		 41static const u16 VDD3_VSEL_table[] = {
42 5000,
43};
44
45/* supported VDIG1 voltages in milivolts */
46static const u16 VDIG1_VSEL_table[] = {
47 1200, 1500, 1800, 2700,
48};
49
50/* supported VDIG2 voltages in milivolts */
51static const u16 VDIG2_VSEL_table[] = {
52 1000, 1100, 1200, 1800,
53};
54
55/* supported VPLL voltages in milivolts */
56static const u16 VPLL_VSEL_table[] = {
57 1000, 1100, 1800, 2500,
58};
59
60/* supported VDAC voltages in milivolts */
61static const u16 VDAC_VSEL_table[] = {
62 1800, 2600, 2800, 2850,
63};
64
65/* supported VAUX1 voltages in milivolts */
66static const u16 VAUX1_VSEL_table[] = {
67 1800, 2500, 2800, 2850,
68};
69
70/* supported VAUX2 voltages in milivolts */
71static const u16 VAUX2_VSEL_table[] = {
72 1800, 2800, 2900, 3300,
73};
74
75/* supported VAUX33 voltages in milivolts */
76static const u16 VAUX33_VSEL_table[] = {
77 1800, 2000, 2800, 3300,
78};
79
80/* supported VMMC voltages in milivolts */
81static const u16 VMMC_VSEL_table[] = {
82 1800, 2800, 3000, 3300,
83};
84
85struct tps_info {
86 const char *name;
87 unsigned min_uV;
88 unsigned max_uV;
7d38a3cb
LD		 89 u8 n_voltages;
90 const u16 *voltage_table;
518fb721
GG		 91};
92
93static struct tps_info tps65910_regs[] = {
94 {
95 .name = "VRTC",
96 },
97 {
98 .name = "VIO",
99 .min_uV = 1500000,
100 .max_uV = 3300000,
7d38a3cb
LD		 101 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
102 .voltage_table = VIO_VSEL_table,
518fb721
GG		 103 },
104 {
105 .name = "VDD1",
106 .min_uV = 600000,
107 .max_uV = 4500000,
108 },
109 {
110 .name = "VDD2",
111 .min_uV = 600000,
112 .max_uV = 4500000,
113 },
114 {
115 .name = "VDD3",
116 .min_uV = 5000000,
117 .max_uV = 5000000,
7d38a3cb
LD		 118 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
119 .voltage_table = VDD3_VSEL_table,
518fb721
GG		 120 },
121 {
122 .name = "VDIG1",
123 .min_uV = 1200000,
124 .max_uV = 2700000,
7d38a3cb
LD		 125 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
126 .voltage_table = VDIG1_VSEL_table,
518fb721
GG		 127 },
128 {
129 .name = "VDIG2",
130 .min_uV = 1000000,
131 .max_uV = 1800000,
7d38a3cb
LD		 132 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
133 .voltage_table = VDIG2_VSEL_table,
518fb721
GG		 134 },
135 {
136 .name = "VPLL",
137 .min_uV = 1000000,
138 .max_uV = 2500000,
7d38a3cb
LD		 139 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
140 .voltage_table = VPLL_VSEL_table,
518fb721
GG		 141 },
142 {
143 .name = "VDAC",
144 .min_uV = 1800000,
145 .max_uV = 2850000,
7d38a3cb
LD		 146 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
147 .voltage_table = VDAC_VSEL_table,
518fb721
GG		 148 },
149 {
150 .name = "VAUX1",
151 .min_uV = 1800000,
152 .max_uV = 2850000,
7d38a3cb
LD		 153 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
154 .voltage_table = VAUX1_VSEL_table,
518fb721
GG		 155 },
156 {
157 .name = "VAUX2",
158 .min_uV = 1800000,
159 .max_uV = 3300000,
7d38a3cb
LD		 160 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
161 .voltage_table = VAUX2_VSEL_table,
518fb721
GG		 162 },
163 {
164 .name = "VAUX33",
165 .min_uV = 1800000,
166 .max_uV = 3300000,
7d38a3cb
LD		 167 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
168 .voltage_table = VAUX33_VSEL_table,
518fb721
GG		 169 },
170 {
171 .name = "VMMC",
172 .min_uV = 1800000,
173 .max_uV = 3300000,
7d38a3cb
LD		 174 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
175 .voltage_table = VMMC_VSEL_table,
518fb721
GG		 176 },
177};
178
a320e3c3 179static struct tps_info tps65911_regs[] = {
c2f8efd7
LD		 180 {
181 .name = "VRTC",
182 },
a320e3c3
JEC		 183 {
184 .name = "VIO",
185 .min_uV = 1500000,
186 .max_uV = 3300000,
7d38a3cb
LD		 187 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
188 .voltage_table = VIO_VSEL_table,
a320e3c3
JEC		 189 },
190 {
191 .name = "VDD1",
192 .min_uV = 600000,
193 .max_uV = 4500000,
7d38a3cb 194 .n_voltages = 73,
a320e3c3
JEC		 195 },
196 {
197 .name = "VDD2",
198 .min_uV = 600000,
199 .max_uV = 4500000,
7d38a3cb 200 .n_voltages = 73,
a320e3c3
JEC		 201 },
202 {
203 .name = "VDDCTRL",
204 .min_uV = 600000,
205 .max_uV = 1400000,
7d38a3cb 206 .n_voltages = 65,
a320e3c3
JEC		 207 },
208 {
209 .name = "LDO1",
210 .min_uV = 1000000,
211 .max_uV = 3300000,
7d38a3cb 212 .n_voltages = 47,
a320e3c3
JEC		 213 },
214 {
215 .name = "LDO2",
216 .min_uV = 1000000,
217 .max_uV = 3300000,
7d38a3cb 218 .n_voltages = 47,
a320e3c3
JEC		 219 },
220 {
221 .name = "LDO3",
222 .min_uV = 1000000,
223 .max_uV = 3300000,
7d38a3cb 224 .n_voltages = 24,
a320e3c3
JEC		 225 },
226 {
227 .name = "LDO4",
228 .min_uV = 1000000,
229 .max_uV = 3300000,
7d38a3cb 230 .n_voltages = 47,
a320e3c3
JEC		 231 },
232 {
233 .name = "LDO5",
234 .min_uV = 1000000,
235 .max_uV = 3300000,
7d38a3cb 236 .n_voltages = 24,
a320e3c3
JEC		 237 },
238 {
239 .name = "LDO6",
240 .min_uV = 1000000,
241 .max_uV = 3300000,
7d38a3cb 242 .n_voltages = 24,
a320e3c3
JEC		 243 },
244 {
245 .name = "LDO7",
246 .min_uV = 1000000,
247 .max_uV = 3300000,
7d38a3cb 248 .n_voltages = 24,
a320e3c3
JEC		 249 },
250 {
251 .name = "LDO8",
252 .min_uV = 1000000,
253 .max_uV = 3300000,
7d38a3cb 254 .n_voltages = 24,
a320e3c3
JEC		 255 },
256};
257
1e0c66f4
LD		 258#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
259static unsigned int tps65910_ext_sleep_control[] = {
260 0,
261 EXT_CONTROL_REG_BITS(VIO, 1, 0),
262 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
263 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
264 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
265 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
266 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
267 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
268 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
269 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
270 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
271 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
272 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
273};
274
275static unsigned int tps65911_ext_sleep_control[] = {
276 0,
277 EXT_CONTROL_REG_BITS(VIO, 1, 0),
278 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
279 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
280 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
281 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
282 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
283 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
284 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
285 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
286 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
287 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
288 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
289};
290
518fb721 291struct tps65910_reg {
39aa9b6e 292 struct regulator_desc *desc;
518fb721 293 struct tps65910 *mfd;
39aa9b6e
AL		 294 struct regulator_dev **rdev;
295 struct tps_info **info;
518fb721 296 struct mutex mutex;
39aa9b6e 297 int num_regulators;
518fb721 298 int mode;
a320e3c3 299 int (*get_ctrl_reg)(int);
1e0c66f4
LD		 300 unsigned int *ext_sleep_control;
301 unsigned int board_ext_control[TPS65910_NUM_REGS];
518fb721
GG		 302};
303
304static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
305{
306 u8 val;
307 int err;
308
309 err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
310 if (err)
311 return err;
312
313 return val;
314}
315
316static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
317{
318 return pmic->mfd->write(pmic->mfd, reg, 1, &val);
319}
320
321static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
322 u8 set_mask, u8 clear_mask)
323{
324 int err, data;
325
326 mutex_lock(&pmic->mutex);
327
328 data = tps65910_read(pmic, reg);
329 if (data < 0) {
330 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
331 err = data;
332 goto out;
333 }
334
335 data &= ~clear_mask;
336 data |= set_mask;
337 err = tps65910_write(pmic, reg, data);
338 if (err)
339 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
340
341out:
342 mutex_unlock(&pmic->mutex);
343 return err;
344}
345
346static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
347{
348 int data;
349
350 mutex_lock(&pmic->mutex);
351
352 data = tps65910_read(pmic, reg);
353 if (data < 0)
354 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
355
356 mutex_unlock(&pmic->mutex);
357 return data;
358}
359
360static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
361{
362 int err;
363
364 mutex_lock(&pmic->mutex);
365
366 err = tps65910_write(pmic, reg, val);
367 if (err < 0)
368 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
369
370 mutex_unlock(&pmic->mutex);
371 return err;
372}
373
374static int tps65910_get_ctrl_register(int id)
375{
376 switch (id) {
377 case TPS65910_REG_VRTC:
378 return TPS65910_VRTC;
379 case TPS65910_REG_VIO:
380 return TPS65910_VIO;
381 case TPS65910_REG_VDD1:
382 return TPS65910_VDD1;
383 case TPS65910_REG_VDD2:
384 return TPS65910_VDD2;
385 case TPS65910_REG_VDD3:
386 return TPS65910_VDD3;
387 case TPS65910_REG_VDIG1:
388 return TPS65910_VDIG1;
389 case TPS65910_REG_VDIG2:
390 return TPS65910_VDIG2;
391 case TPS65910_REG_VPLL:
392 return TPS65910_VPLL;
393 case TPS65910_REG_VDAC:
394 return TPS65910_VDAC;
395 case TPS65910_REG_VAUX1:
396 return TPS65910_VAUX1;
397 case TPS65910_REG_VAUX2:
398 return TPS65910_VAUX2;
399 case TPS65910_REG_VAUX33:
400 return TPS65910_VAUX33;
401 case TPS65910_REG_VMMC:
402 return TPS65910_VMMC;
403 default:
404 return -EINVAL;
405 }
406}
407
a320e3c3
JEC		 408static int tps65911_get_ctrl_register(int id)
409{
410 switch (id) {
411 case TPS65910_REG_VRTC:
412 return TPS65910_VRTC;
413 case TPS65910_REG_VIO:
414 return TPS65910_VIO;
415 case TPS65910_REG_VDD1:
416 return TPS65910_VDD1;
417 case TPS65910_REG_VDD2:
418 return TPS65910_VDD2;
419 case TPS65911_REG_VDDCTRL:
420 return TPS65911_VDDCTRL;
421 case TPS65911_REG_LDO1:
422 return TPS65911_LDO1;
423 case TPS65911_REG_LDO2:
424 return TPS65911_LDO2;
425 case TPS65911_REG_LDO3:
426 return TPS65911_LDO3;
427 case TPS65911_REG_LDO4:
428 return TPS65911_LDO4;
429 case TPS65911_REG_LDO5:
430 return TPS65911_LDO5;
431 case TPS65911_REG_LDO6:
432 return TPS65911_LDO6;
433 case TPS65911_REG_LDO7:
434 return TPS65911_LDO7;
435 case TPS65911_REG_LDO8:
436 return TPS65911_LDO8;
437 default:
438 return -EINVAL;
439 }
440}
441
518fb721
GG		 442static int tps65910_is_enabled(struct regulator_dev *dev)
443{
444 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
445 int reg, value, id = rdev_get_id(dev);
446
a320e3c3 447 reg = pmic->get_ctrl_reg(id);
518fb721
GG		 448 if (reg < 0)
449 return reg;
450
451 value = tps65910_reg_read(pmic, reg);
452 if (value < 0)
453 return value;
454
455 return value & TPS65910_SUPPLY_STATE_ENABLED;
456}
457
458static int tps65910_enable(struct regulator_dev *dev)
459{
460 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
461 struct tps65910 *mfd = pmic->mfd;
462 int reg, id = rdev_get_id(dev);
463
a320e3c3 464 reg = pmic->get_ctrl_reg(id);
518fb721
GG		 465 if (reg < 0)
466 return reg;
467
468 return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
469}
470
471static int tps65910_disable(struct regulator_dev *dev)
472{
473 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
474 struct tps65910 *mfd = pmic->mfd;
475 int reg, id = rdev_get_id(dev);
476
a320e3c3 477 reg = pmic->get_ctrl_reg(id);
518fb721
GG		 478 if (reg < 0)
479 return reg;
480
481 return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
482}
483
484
485static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
486{
487 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
488 struct tps65910 *mfd = pmic->mfd;
489 int reg, value, id = rdev_get_id(dev);
a320e3c3
JEC		 490
491 reg = pmic->get_ctrl_reg(id);
518fb721
GG		 492 if (reg < 0)
493 return reg;
494
495 switch (mode) {
496 case REGULATOR_MODE_NORMAL:
497 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
498 LDO_ST_MODE_BIT);
499 case REGULATOR_MODE_IDLE:
500 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
501 return tps65910_set_bits(mfd, reg, value);
502 case REGULATOR_MODE_STANDBY:
503 return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
504 }
505
506 return -EINVAL;
507}
508
509static unsigned int tps65910_get_mode(struct regulator_dev *dev)
510{
511 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
512 int reg, value, id = rdev_get_id(dev);
513
a320e3c3 514 reg = pmic->get_ctrl_reg(id);
518fb721
GG		 515 if (reg < 0)
516 return reg;
517
518 value = tps65910_reg_read(pmic, reg);
519 if (value < 0)
520 return value;
521
522 if (value & LDO_ST_ON_BIT)
523 return REGULATOR_MODE_STANDBY;
524 else if (value & LDO_ST_MODE_BIT)
525 return REGULATOR_MODE_IDLE;
526 else
527 return REGULATOR_MODE_NORMAL;
528}
529
530static int tps65910_get_voltage_dcdc(struct regulator_dev *dev)
531{
532 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
533 int id = rdev_get_id(dev), voltage = 0;
a320e3c3 534 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
518fb721
GG		 535
536 switch (id) {
537 case TPS65910_REG_VDD1:
538 opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
539 mult = tps65910_reg_read(pmic, TPS65910_VDD1);
540 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
541 srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
542 sr = opvsel & VDD1_OP_CMD_MASK;
543 opvsel &= VDD1_OP_SEL_MASK;
544 srvsel &= VDD1_SR_SEL_MASK;
a320e3c3 545 vselmax = 75;
518fb721
GG		 546 break;
547 case TPS65910_REG_VDD2:
548 opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
549 mult = tps65910_reg_read(pmic, TPS65910_VDD2);
550 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
551 srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
552 sr = opvsel & VDD2_OP_CMD_MASK;
553 opvsel &= VDD2_OP_SEL_MASK;
554 srvsel &= VDD2_SR_SEL_MASK;
a320e3c3
JEC		 555 vselmax = 75;
556 break;
557 case TPS65911_REG_VDDCTRL:
558 opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
559 srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
560 sr = opvsel & VDDCTRL_OP_CMD_MASK;
561 opvsel &= VDDCTRL_OP_SEL_MASK;
562 srvsel &= VDDCTRL_SR_SEL_MASK;
563 vselmax = 64;
518fb721
GG		 564 break;
565 }
566
567 /* multiplier 0 == 1 but 2,3 normal */
568 if (!mult)
569 mult=1;
570
571 if (sr) {
a320e3c3
JEC		 572 /* normalise to valid range */
573 if (srvsel < 3)
574 srvsel = 3;
575 if (srvsel > vselmax)
576 srvsel = vselmax;
518fb721
GG		 577 srvsel -= 3;
578
579 voltage = (srvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
580 } else {
581
a320e3c3
JEC		 582 /* normalise to valid range*/
583 if (opvsel < 3)
584 opvsel = 3;
585 if (opvsel > vselmax)
586 opvsel = vselmax;
518fb721
GG		 587 opvsel -= 3;
588
589 voltage = (opvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
590 }
591
592 voltage *= mult;
593
594 return voltage;
595}
596
597static int tps65910_get_voltage(struct regulator_dev *dev)
598{
599 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
600 int reg, value, id = rdev_get_id(dev), voltage = 0;
601
a320e3c3 602 reg = pmic->get_ctrl_reg(id);
518fb721
GG		 603 if (reg < 0)
604 return reg;
605
606 value = tps65910_reg_read(pmic, reg);
607 if (value < 0)
608 return value;
609
610 switch (id) {
611 case TPS65910_REG_VIO:
612 case TPS65910_REG_VDIG1:
613 case TPS65910_REG_VDIG2:
614 case TPS65910_REG_VPLL:
615 case TPS65910_REG_VDAC:
616 case TPS65910_REG_VAUX1:
617 case TPS65910_REG_VAUX2:
618 case TPS65910_REG_VAUX33:
619 case TPS65910_REG_VMMC:
620 value &= LDO_SEL_MASK;
621 value >>= LDO_SEL_SHIFT;
622 break;
623 default:
624 return -EINVAL;
625 }
626
7d38a3cb 627 voltage = pmic->info[id]->voltage_table[value] * 1000;
518fb721
GG		 628
629 return voltage;
630}
631
632static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
633{
634 return 5 * 1000 * 1000;
635}
636
a320e3c3
JEC		 637static int tps65911_get_voltage(struct regulator_dev *dev)
638{
639 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
640 int step_mv, id = rdev_get_id(dev);
641 u8 value, reg;
642
643 reg = pmic->get_ctrl_reg(id);
644
645 value = tps65910_reg_read(pmic, reg);
646
647 switch (id) {
648 case TPS65911_REG_LDO1:
649 case TPS65911_REG_LDO2:
650 case TPS65911_REG_LDO4:
651 value &= LDO1_SEL_MASK;
652 value >>= LDO_SEL_SHIFT;
653 /* The first 5 values of the selector correspond to 1V */
654 if (value < 5)
655 value = 0;
656 else
657 value -= 4;
658
659 step_mv = 50;
660 break;
661 case TPS65911_REG_LDO3:
662 case TPS65911_REG_LDO5:
663 case TPS65911_REG_LDO6:
664 case TPS65911_REG_LDO7:
665 case TPS65911_REG_LDO8:
666 value &= LDO3_SEL_MASK;
667 value >>= LDO_SEL_SHIFT;
668 /* The first 3 values of the selector correspond to 1V */
669 if (value < 3)
670 value = 0;
671 else
672 value -= 2;
673
674 step_mv = 100;
675 break;
676 case TPS65910_REG_VIO:
7d38a3cb 677 return pmic->info[id]->voltage_table[value] * 1000;
a320e3c3
JEC		 678 break;
679 default:
680 return -EINVAL;
681 }
682
683 return (LDO_MIN_VOLT + value * step_mv) * 1000;
684}
685
518fb721
GG		 686static int tps65910_set_voltage_dcdc(struct regulator_dev *dev,
687 unsigned selector)
688{
689 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
690 int id = rdev_get_id(dev), vsel;
a320e3c3 691 int dcdc_mult = 0;
518fb721 692
a320e3c3
JEC		 693 switch (id) {
694 case TPS65910_REG_VDD1:
780dc9ba 695 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
a320e3c3
JEC		 696 if (dcdc_mult == 1)
697 dcdc_mult--;
780dc9ba 698 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
518fb721 699
518fb721
GG		 700 tps65910_modify_bits(pmic, TPS65910_VDD1,
701 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
702 VDD1_VGAIN_SEL_MASK);
703 tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
a320e3c3
JEC		 704 break;
705 case TPS65910_REG_VDD2:
780dc9ba 706 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
a320e3c3
JEC		 707 if (dcdc_mult == 1)
708 dcdc_mult--;
780dc9ba 709 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
a320e3c3 710
518fb721
GG		 711 tps65910_modify_bits(pmic, TPS65910_VDD2,
712 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
713 VDD1_VGAIN_SEL_MASK);
714 tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
a320e3c3
JEC		 715 break;
716 case TPS65911_REG_VDDCTRL:
717 vsel = selector;
718 tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
518fb721
GG		 719 }
720
721 return 0;
722}
723
724static int tps65910_set_voltage(struct regulator_dev *dev, unsigned selector)
725{
726 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
727 int reg, id = rdev_get_id(dev);
728
a320e3c3 729 reg = pmic->get_ctrl_reg(id);
518fb721
GG		 730 if (reg < 0)
731 return reg;
732
733 switch (id) {
734 case TPS65910_REG_VIO:
735 case TPS65910_REG_VDIG1:
736 case TPS65910_REG_VDIG2:
737 case TPS65910_REG_VPLL:
738 case TPS65910_REG_VDAC:
739 case TPS65910_REG_VAUX1:
740 case TPS65910_REG_VAUX2:
741 case TPS65910_REG_VAUX33:
742 case TPS65910_REG_VMMC:
743 return tps65910_modify_bits(pmic, reg,
744 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
745 }
746
747 return -EINVAL;
748}
749
a320e3c3
JEC		 750static int tps65911_set_voltage(struct regulator_dev *dev, unsigned selector)
751{
752 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
753 int reg, id = rdev_get_id(dev);
754
755 reg = pmic->get_ctrl_reg(id);
756 if (reg < 0)
757 return reg;
758
759 switch (id) {
760 case TPS65911_REG_LDO1:
761 case TPS65911_REG_LDO2:
762 case TPS65911_REG_LDO4:
763 return tps65910_modify_bits(pmic, reg,
764 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
765 case TPS65911_REG_LDO3:
766 case TPS65911_REG_LDO5:
767 case TPS65911_REG_LDO6:
768 case TPS65911_REG_LDO7:
769 case TPS65911_REG_LDO8:
770 case TPS65910_REG_VIO:
771 return tps65910_modify_bits(pmic, reg,
772 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
773 }
774
775 return -EINVAL;
776}
777
778
518fb721
GG		 779static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
780 unsigned selector)
781{
a320e3c3 782 int volt, mult = 1, id = rdev_get_id(dev);
518fb721 783
a320e3c3
JEC		 784 switch (id) {
785 case TPS65910_REG_VDD1:
786 case TPS65910_REG_VDD2:
780dc9ba 787 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
a320e3c3 788 volt = VDD1_2_MIN_VOLT +
780dc9ba 789 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
d04156bc 790 break;
a320e3c3
JEC		 791 case TPS65911_REG_VDDCTRL:
792 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
d04156bc
AL		 793 break;
794 default:
795 BUG();
796 return -EINVAL;
a320e3c3 797 }
518fb721
GG		 798
799 return volt * 100 * mult;
800}
801
802static int tps65910_list_voltage(struct regulator_dev *dev,
803 unsigned selector)
804{
805 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
806 int id = rdev_get_id(dev), voltage;
807
808 if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
809 return -EINVAL;
810
7d38a3cb 811 if (selector >= pmic->info[id]->n_voltages)
518fb721
GG		 812 return -EINVAL;
813 else
7d38a3cb 814 voltage = pmic->info[id]->voltage_table[selector] * 1000;
518fb721
GG		 815
816 return voltage;
817}
818
a320e3c3
JEC		 819static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
820{
821 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
822 int step_mv = 0, id = rdev_get_id(dev);
823
824 switch(id) {
825 case TPS65911_REG_LDO1:
826 case TPS65911_REG_LDO2:
827 case TPS65911_REG_LDO4:
828 /* The first 5 values of the selector correspond to 1V */
829 if (selector < 5)
830 selector = 0;
831 else
832 selector -= 4;
833
834 step_mv = 50;
835 break;
836 case TPS65911_REG_LDO3:
837 case TPS65911_REG_LDO5:
838 case TPS65911_REG_LDO6:
839 case TPS65911_REG_LDO7:
840 case TPS65911_REG_LDO8:
841 /* The first 3 values of the selector correspond to 1V */
842 if (selector < 3)
843 selector = 0;
844 else
845 selector -= 2;
846
847 step_mv = 100;
848 break;
849 case TPS65910_REG_VIO:
7d38a3cb 850 return pmic->info[id]->voltage_table[selector] * 1000;
a320e3c3
JEC		 851 default:
852 return -EINVAL;
853 }
854
855 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
856}
857
518fb721
GG		 858/* Regulator ops (except VRTC) */
859static struct regulator_ops tps65910_ops_dcdc = {
860 .is_enabled = tps65910_is_enabled,
861 .enable = tps65910_enable,
862 .disable = tps65910_disable,
863 .set_mode = tps65910_set_mode,
864 .get_mode = tps65910_get_mode,
865 .get_voltage = tps65910_get_voltage_dcdc,
866 .set_voltage_sel = tps65910_set_voltage_dcdc,
867 .list_voltage = tps65910_list_voltage_dcdc,
868};
869
870static struct regulator_ops tps65910_ops_vdd3 = {
871 .is_enabled = tps65910_is_enabled,
872 .enable = tps65910_enable,
873 .disable = tps65910_disable,
874 .set_mode = tps65910_set_mode,
875 .get_mode = tps65910_get_mode,
876 .get_voltage = tps65910_get_voltage_vdd3,
877 .list_voltage = tps65910_list_voltage,
878};
879
880static struct regulator_ops tps65910_ops = {
881 .is_enabled = tps65910_is_enabled,
882 .enable = tps65910_enable,
883 .disable = tps65910_disable,
884 .set_mode = tps65910_set_mode,
885 .get_mode = tps65910_get_mode,
886 .get_voltage = tps65910_get_voltage,
887 .set_voltage_sel = tps65910_set_voltage,
888 .list_voltage = tps65910_list_voltage,
889};
890
a320e3c3
JEC		 891static struct regulator_ops tps65911_ops = {
892 .is_enabled = tps65910_is_enabled,
893 .enable = tps65910_enable,
894 .disable = tps65910_disable,
895 .set_mode = tps65910_set_mode,
896 .get_mode = tps65910_get_mode,
897 .get_voltage = tps65911_get_voltage,
898 .set_voltage_sel = tps65911_set_voltage,
899 .list_voltage = tps65911_list_voltage,
900};
901
1e0c66f4
LD		 902static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
903 int id, int ext_sleep_config)
904{
905 struct tps65910 *mfd = pmic->mfd;
906 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
907 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
908 int ret;
909
910 /*
911 * Regulator can not be control from multiple external input EN1, EN2
912 * and EN3 together.
913 */
914 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
915 int en_count;
916 en_count = ((ext_sleep_config &
917 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
918 en_count += ((ext_sleep_config &
919 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
920 en_count += ((ext_sleep_config &
921 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
922 if (en_count > 1) {
923 dev_err(mfd->dev,
924 "External sleep control flag is not proper\n");
925 return -EINVAL;
926 }
927 }
928
929 pmic->board_ext_control[id] = ext_sleep_config;
930
931 /* External EN1 control */
932 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
933 ret = tps65910_set_bits(mfd,
934 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
935 else
936 ret = tps65910_clear_bits(mfd,
937 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
938 if (ret < 0) {
939 dev_err(mfd->dev,
940 "Error in configuring external control EN1\n");
941 return ret;
942 }
943
944 /* External EN2 control */
945 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
946 ret = tps65910_set_bits(mfd,
947 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
948 else
949 ret = tps65910_clear_bits(mfd,
950 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
951 if (ret < 0) {
952 dev_err(mfd->dev,
953 "Error in configuring external control EN2\n");
954 return ret;
955 }
956
957 /* External EN3 control for TPS65910 LDO only */
958 if ((tps65910_chip_id(mfd) == TPS65910) &&
959 (id >= TPS65910_REG_VDIG1)) {
960 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
961 ret = tps65910_set_bits(mfd,
962 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
963 else
964 ret = tps65910_clear_bits(mfd,
965 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
966 if (ret < 0) {
967 dev_err(mfd->dev,
968 "Error in configuring external control EN3\n");
969 return ret;
970 }
971 }
972
973 /* Return if no external control is selected */
974 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
975 /* Clear all sleep controls */
976 ret = tps65910_clear_bits(mfd,
977 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
978 if (!ret)
979 ret = tps65910_clear_bits(mfd,
980 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
981 if (ret < 0)
982 dev_err(mfd->dev,
983 "Error in configuring SLEEP register\n");
984 return ret;
985 }
986
987 /*
988 * For regulator that has separate operational and sleep register make
989 * sure that operational is used and clear sleep register to turn
990 * regulator off when external control is inactive
991 */
992 if ((id == TPS65910_REG_VDD1) ||
993 (id == TPS65910_REG_VDD2) ||
994 ((id == TPS65911_REG_VDDCTRL) &&
995 (tps65910_chip_id(mfd) == TPS65911))) {
996 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
997 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
998 int opvsel = tps65910_reg_read(pmic, op_reg_add);
999 int srvsel = tps65910_reg_read(pmic, sr_reg_add);
1000 if (opvsel & VDD1_OP_CMD_MASK) {
1001 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
1002 ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
1003 if (ret < 0) {
1004 dev_err(mfd->dev,
1005 "Error in configuring op register\n");
1006 return ret;
1007 }
1008 }
1009 ret = tps65910_reg_write(pmic, sr_reg_add, 0);
1010 if (ret < 0) {
1011 dev_err(mfd->dev, "Error in settting sr register\n");
1012 return ret;
1013 }
1014 }
1015
1016 ret = tps65910_clear_bits(mfd,
1017 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1018 if (!ret)
1019 ret = tps65910_set_bits(mfd,
1020 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1021 if (ret < 0)
1022 dev_err(mfd->dev,
1023 "Error in configuring SLEEP register\n");
1024 return ret;
1025}
1026
518fb721
GG		 1027static __devinit int tps65910_probe(struct platform_device *pdev)
1028{
1029 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
a320e3c3 1030 struct tps_info *info;
518fb721
GG		 1031 struct regulator_init_data *reg_data;
1032 struct regulator_dev *rdev;
1033 struct tps65910_reg *pmic;
1034 struct tps65910_board *pmic_plat_data;
518fb721
GG		 1035 int i, err;
1036
1037 pmic_plat_data = dev_get_platdata(tps65910->dev);
1038 if (!pmic_plat_data)
1039 return -EINVAL;
1040
518fb721
GG		 1041 pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);
1042 if (!pmic)
1043 return -ENOMEM;
1044
1045 mutex_init(&pmic->mutex);
1046 pmic->mfd = tps65910;
1047 platform_set_drvdata(pdev, pmic);
1048
1049 /* Give control of all register to control port */
1050 tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1051 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1052
a320e3c3
JEC		 1053 switch(tps65910_chip_id(tps65910)) {
1054 case TPS65910:
1055 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
39aa9b6e 1056 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
1e0c66f4 1057 pmic->ext_sleep_control = tps65910_ext_sleep_control;
a320e3c3 1058 info = tps65910_regs;
d04156bc 1059 break;
a320e3c3
JEC		 1060 case TPS65911:
1061 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
39aa9b6e 1062 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
1e0c66f4 1063 pmic->ext_sleep_control = tps65911_ext_sleep_control;
a320e3c3 1064 info = tps65911_regs;
d04156bc 1065 break;
a320e3c3
JEC		 1066 default:
1067 pr_err("Invalid tps chip version\n");
a3ee13ee 1068 kfree(pmic);
a320e3c3
JEC		 1069 return -ENODEV;
1070 }
1071
39aa9b6e
AL		 1072 pmic->desc = kcalloc(pmic->num_regulators,
1073 sizeof(struct regulator_desc), GFP_KERNEL);
1074 if (!pmic->desc) {
1075 err = -ENOMEM;
1076 goto err_free_pmic;
1077 }
1078
1079 pmic->info = kcalloc(pmic->num_regulators,
1080 sizeof(struct tps_info *), GFP_KERNEL);
1081 if (!pmic->info) {
1082 err = -ENOMEM;
1083 goto err_free_desc;
1084 }
1085
1086 pmic->rdev = kcalloc(pmic->num_regulators,
1087 sizeof(struct regulator_dev *), GFP_KERNEL);
1088 if (!pmic->rdev) {
1089 err = -ENOMEM;
1090 goto err_free_info;
1091 }
1092
c1fc1480
KM		 1093 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1094 i++, info++) {
1095
1096 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1097
1098 /* Regulator API handles empty constraints but not NULL
1099 * constraints */
1100 if (!reg_data)
1101 continue;
1102
518fb721
GG		 1103 /* Register the regulators */
1104 pmic->info[i] = info;
1105
1106 pmic->desc[i].name = info->name;
77fa44d0 1107 pmic->desc[i].id = i;
7d38a3cb 1108 pmic->desc[i].n_voltages = info->n_voltages;
518fb721 1109
a320e3c3 1110 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
518fb721 1111 pmic->desc[i].ops = &tps65910_ops_dcdc;
780dc9ba
AM		 1112 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1113 VDD1_2_NUM_VOLT_COARSE;
a320e3c3
JEC		 1114 } else if (i == TPS65910_REG_VDD3) {
1115 if (tps65910_chip_id(tps65910) == TPS65910)
1116 pmic->desc[i].ops = &tps65910_ops_vdd3;
1117 else
1118 pmic->desc[i].ops = &tps65910_ops_dcdc;
1119 } else {
1120 if (tps65910_chip_id(tps65910) == TPS65910)
1121 pmic->desc[i].ops = &tps65910_ops;
1122 else
1123 pmic->desc[i].ops = &tps65911_ops;
1124 }
518fb721 1125
1e0c66f4
LD		 1126 err = tps65910_set_ext_sleep_config(pmic, i,
1127 pmic_plat_data->regulator_ext_sleep_control[i]);
1128 /*
1129 * Failing on regulator for configuring externally control
1130 * is not a serious issue, just throw warning.
1131 */
1132 if (err < 0)
1133 dev_warn(tps65910->dev,
1134 "Failed to initialise ext control config\n");
1135
518fb721
GG		 1136 pmic->desc[i].type = REGULATOR_VOLTAGE;
1137 pmic->desc[i].owner = THIS_MODULE;
1138
1139 rdev = regulator_register(&pmic->desc[i],
2c043bcb 1140 tps65910->dev, reg_data, pmic, NULL);
518fb721
GG		 1141 if (IS_ERR(rdev)) {
1142 dev_err(tps65910->dev,
1143 "failed to register %s regulator\n",
1144 pdev->name);
1145 err = PTR_ERR(rdev);
39aa9b6e 1146 goto err_unregister_regulator;
518fb721
GG		 1147 }
1148
1149 /* Save regulator for cleanup */
1150 pmic->rdev[i] = rdev;
1151 }
1152 return 0;
1153
39aa9b6e 1154err_unregister_regulator:
518fb721
GG		 1155 while (--i >= 0)
1156 regulator_unregister(pmic->rdev[i]);
39aa9b6e
AL		 1157 kfree(pmic->rdev);
1158err_free_info:
1159 kfree(pmic->info);
1160err_free_desc:
1161 kfree(pmic->desc);
1162err_free_pmic:
518fb721
GG		 1163 kfree(pmic);
1164 return err;
1165}
1166
1167static int __devexit tps65910_remove(struct platform_device *pdev)
1168{
39aa9b6e 1169 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
518fb721
GG		 1170 int i;
1171
39aa9b6e
AL		 1172 for (i = 0; i < pmic->num_regulators; i++)
1173 regulator_unregister(pmic->rdev[i]);
518fb721 1174
39aa9b6e
AL		 1175 kfree(pmic->rdev);
1176 kfree(pmic->info);
1177 kfree(pmic->desc);
1178 kfree(pmic);
518fb721
GG		 1179 return 0;
1180}
1181
1e0c66f4
LD		 1182static void tps65910_shutdown(struct platform_device *pdev)
1183{
1184 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1185 int i;
1186
1187 /*
1188 * Before bootloader jumps to kernel, it makes sure that required
1189 * external control signals are in desired state so that given rails
1190 * can be configure accordingly.
1191 * If rails are configured to be controlled from external control
1192 * then before shutting down/rebooting the system, the external
1193 * control configuration need to be remove from the rails so that
1194 * its output will be available as per register programming even
1195 * if external controls are removed. This is require when the POR
1196 * value of the control signals are not in active state and before
1197 * bootloader initializes it, the system requires the rail output
1198 * to be active for booting.
1199 */
1200 for (i = 0; i < pmic->num_regulators; i++) {
1201 int err;
1202 if (!pmic->rdev[i])
1203 continue;
1204
1205 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1206 if (err < 0)
1207 dev_err(&pdev->dev,
1208 "Error in clearing external control\n");
1209 }
1210}
1211
518fb721
GG		 1212static struct platform_driver tps65910_driver = {
1213 .driver = {
1214 .name = "tps65910-pmic",
1215 .owner = THIS_MODULE,
1216 },
1217 .probe = tps65910_probe,
1218 .remove = __devexit_p(tps65910_remove),
1e0c66f4 1219 .shutdown = tps65910_shutdown,
518fb721
GG		 1220};
1221
1222static int __init tps65910_init(void)
1223{
1224 return platform_driver_register(&tps65910_driver);
1225}
1226subsys_initcall(tps65910_init);
1227
1228static void __exit tps65910_cleanup(void)
1229{
1230 platform_driver_unregister(&tps65910_driver);
1231}
1232module_exit(tps65910_cleanup);
1233
1234MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1235MODULE_DESCRIPTION("TPS6507x voltage regulator driver");
1236MODULE_LICENSE("GPL v2");
1237MODULE_ALIAS("platform:tps65910-pmic");
Linux kernel - Deliverables
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