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gpu: host1x: Remove second host1x driver
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB		 3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
8f52a580
SR		 13#include <linux/string.h>
14#include <linux/slab.h>
fa16a5c1
DB		 15#include <linux/init.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
2098e95c
RN		 18#include <linux/of.h>
19#include <linux/of_device.h>
fa16a5c1
DB		 20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
2098e95c 22#include <linux/regulator/of_regulator.h>
b07682b6 23#include <linux/i2c/twl.h>
fa16a5c1
DB		 24
25
26/*
c4aa6f31 27 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB		 28 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
29 * include an audio codec, battery charger, and more voltage regulators.
30 * These chips are often used in OMAP-based systems.
31 *
32 * This driver implements software-based resource control for various
33 * voltage regulators. This is usually augmented with state machine
34 * based control.
35 */
36
37struct twlreg_info {
38 /* start of regulator's PM_RECEIVER control register bank */
39 u8 base;
40
c4aa6f31 41 /* twl resource ID, for resource control state machine */
fa16a5c1
DB		 42 u8 id;
43
44 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
45 u8 table_len;
46 const u16 *table;
47
045f972f
JKS		 48 /* State REMAP default configuration */
49 u8 remap;
50
fa16a5c1
DB		 51 /* chip constraints on regulator behavior */
52 u16 min_mV;
3e3d3be7 53 u16 max_mV;
fa16a5c1 54
4d94aee5
GG		 55 u8 flags;
56
fa16a5c1
DB		 57 /* used by regulator core */
58 struct regulator_desc desc;
4d94aee5
GG		 59
60 /* chip specific features */
61 unsigned long features;
63bfff4e
TK		 62
63 /*
64 * optional override functions for voltage set/get
65 * these are currently only used for SMPS regulators
66 */
67 int (*get_voltage)(void *data);
68 int (*set_voltage)(void *data, int target_uV);
69
70 /* data passed from board for external get/set voltage */
71 void *data;
fa16a5c1
DB		 72};
73
74
75/* LDO control registers ... offset is from the base of its register bank.
76 * The first three registers of all power resource banks help hardware to
77 * manage the various resource groups.
78 */
441a4505 79/* Common offset in TWL4030/6030 */
fa16a5c1 80#define VREG_GRP 0
441a4505 81/* TWL4030 register offsets */
fa16a5c1
DB		 82#define VREG_TYPE 1
83#define VREG_REMAP 2
84#define VREG_DEDICATED 3 /* LDO control */
ba305e31 85#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN		 86/* TWL6030 register offsets */
87#define VREG_TRANS 1
88#define VREG_STATE 2
89#define VREG_VOLTAGE 3
4d94aee5 90#define VREG_VOLTAGE_SMPS 4
441a4505
RN		 91/* TWL6030 Misc register offsets */
92#define VREG_BC_ALL 1
93#define VREG_BC_REF 2
94#define VREG_BC_PROC 3
95#define VREG_BC_CLK_RST 4
fa16a5c1 96
21657ebf
SH		 97/* TWL6030 LDO register values for CFG_STATE */
98#define TWL6030_CFG_STATE_OFF 0x00
99#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH		 100#define TWL6030_CFG_STATE_OFF2 0x02
101#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 102#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH		 103#define TWL6030_CFG_STATE_APP_SHIFT 2
104#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
105#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
106 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 107
4d94aee5
GG		 108/* Flags for SMPS Voltage reading */
109#define SMPS_OFFSET_EN BIT(0)
110#define SMPS_EXTENDED_EN BIT(1)
111
112/* twl6025 SMPS EPROM values */
113#define TWL6030_SMPS_OFFSET 0xB0
114#define TWL6030_SMPS_MULT 0xB3
115#define SMPS_MULTOFFSET_SMPS4 BIT(0)
116#define SMPS_MULTOFFSET_VIO BIT(1)
117#define SMPS_MULTOFFSET_SMPS3 BIT(6)
118
fa16a5c1 119static inline int
441a4505 120twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB		 121{
122 u8 value;
123 int status;
124
441a4505 125 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB		 126 &value, info->base + offset);
127 return (status < 0) ? status : value;
128}
129
130static inline int
441a4505
RN		 131twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
132 u8 value)
fa16a5c1 133{
441a4505 134 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB		 135 value, info->base + offset);
136}
137
138/*----------------------------------------------------------------------*/
139
140/* generic power resource operations, which work on all regulators */
141
c4aa6f31 142static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 143{
441a4505
RN		 144 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
145 VREG_GRP);
fa16a5c1
DB		 146}
147
148/*
149 * Enable/disable regulators by joining/leaving the P1 (processor) group.
150 * We assume nobody else is updating the DEV_GRP registers.
151 */
441a4505
RN		 152/* definition for 4030 family */
153#define P3_GRP_4030 BIT(7) /* "peripherals" */
154#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
155#define P1_GRP_4030 BIT(5) /* CPU/Linux */
156/* definition for 6030 family */
157#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
158#define P2_GRP_6030 BIT(1) /* "peripherals" */
159#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 160
b2456779 161static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 162{
c4aa6f31 163 int state = twlreg_grp(rdev);
fa16a5c1
DB		 164
165 if (state < 0)
166 return state;
167
b2456779
SH		 168 return state & P1_GRP_4030;
169}
170
171static int twl6030reg_is_enabled(struct regulator_dev *rdev)
172{
173 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 174 int grp = 0, val;
b2456779 175
b6f476c2
AL		 176 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) {
177 grp = twlreg_grp(rdev);
178 if (grp < 0)
179 return grp;
4d94aee5 180 grp &= P1_GRP_6030;
b6f476c2 181 } else {
4d94aee5 182 grp = 1;
b6f476c2 183 }
b2456779
SH		 184
185 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
186 val = TWL6030_CFG_STATE_APP(val);
187
188 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB		 189}
190
f8c2940b 191static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB		 192{
193 struct twlreg_info *info = rdev_get_drvdata(rdev);
194 int grp;
53b8a9d9 195 int ret;
fa16a5c1 196
b6f476c2 197 grp = twlreg_grp(rdev);
fa16a5c1
DB		 198 if (grp < 0)
199 return grp;
200
f8c2940b 201 grp |= P1_GRP_4030;
441a4505 202
53b8a9d9
JKS		 203 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
204
f8c2940b
B		 205 return ret;
206}
207
208static int twl6030reg_enable(struct regulator_dev *rdev)
209{
210 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 211 int grp = 0;
f8c2940b
B		 212 int ret;
213
4d94aee5 214 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 215 grp = twlreg_grp(rdev);
f8c2940b
B		 216 if (grp < 0)
217 return grp;
218
219 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
220 grp << TWL6030_CFG_STATE_GRP_SHIFT |
221 TWL6030_CFG_STATE_ON);
48c936d6
AL		 222 return ret;
223}
21657ebf 224
0ff3897d 225static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB		 226{
227 struct twlreg_info *info = rdev_get_drvdata(rdev);
228 int grp;
21657ebf 229 int ret;
fa16a5c1 230
b6f476c2 231 grp = twlreg_grp(rdev);
fa16a5c1
DB		 232 if (grp < 0)
233 return grp;
234
0ff3897d 235 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 236
21657ebf
SH		 237 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
238
0ff3897d
B		 239 return ret;
240}
241
242static int twl6030reg_disable(struct regulator_dev *rdev)
243{
244 struct twlreg_info *info = rdev_get_drvdata(rdev);
245 int grp = 0;
246 int ret;
247
4d94aee5
GG		 248 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
249 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B		 250
251 /* For 6030, set the off state for all grps enabled */
252 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
253 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
254 TWL6030_CFG_STATE_OFF);
21657ebf
SH		 255
256 return ret;
fa16a5c1
DB		 257}
258
9a0244ad 259static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 260{
c4aa6f31 261 int state = twlreg_grp(rdev);
fa16a5c1
DB		 262
263 if (state < 0)
264 return state;
265 state &= 0x0f;
266
267 /* assume state != WARM_RESET; we'd not be running... */
268 if (!state)
269 return REGULATOR_STATUS_OFF;
270 return (state & BIT(3))
271 ? REGULATOR_STATUS_NORMAL
272 : REGULATOR_STATUS_STANDBY;
273}
274
9a0244ad
SH		 275static int twl6030reg_get_status(struct regulator_dev *rdev)
276{
277 struct twlreg_info *info = rdev_get_drvdata(rdev);
278 int val;
279
280 val = twlreg_grp(rdev);
281 if (val < 0)
282 return val;
283
284 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
285
286 switch (TWL6030_CFG_STATE_APP(val)) {
287 case TWL6030_CFG_STATE_ON:
288 return REGULATOR_STATUS_NORMAL;
289
290 case TWL6030_CFG_STATE_SLEEP:
291 return REGULATOR_STATUS_STANDBY;
292
293 case TWL6030_CFG_STATE_OFF:
294 case TWL6030_CFG_STATE_OFF2:
295 default:
296 break;
297 }
298
299 return REGULATOR_STATUS_OFF;
300}
301
1a39962f 302static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB		 303{
304 struct twlreg_info *info = rdev_get_drvdata(rdev);
305 unsigned message;
306 int status;
307
308 /* We can only set the mode through state machine commands... */
309 switch (mode) {
310 case REGULATOR_MODE_NORMAL:
311 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
312 break;
313 case REGULATOR_MODE_STANDBY:
314 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
315 break;
316 default:
317 return -EINVAL;
318 }
319
320 /* Ensure the resource is associated with some group */
c4aa6f31 321 status = twlreg_grp(rdev);
fa16a5c1
DB		 322 if (status < 0)
323 return status;
441a4505 324 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB		 325 return -EACCES;
326
c4aa6f31 327 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL		 328 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
329 if (status < 0)
fa16a5c1
DB		 330 return status;
331
c4aa6f31 332 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 333 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB		 334}
335
1a39962f
SH		 336static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
337{
338 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 339 int grp = 0;
1a39962f
SH		 340 int val;
341
4d94aee5 342 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 343 grp = twlreg_grp(rdev);
1a39962f
SH		 344
345 if (grp < 0)
346 return grp;
347
348 /* Compose the state register settings */
349 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
350 /* We can only set the mode through state machine commands... */
351 switch (mode) {
352 case REGULATOR_MODE_NORMAL:
353 val |= TWL6030_CFG_STATE_ON;
354 break;
355 case REGULATOR_MODE_STANDBY:
356 val |= TWL6030_CFG_STATE_SLEEP;
357 break;
358
359 default:
360 return -EINVAL;
361 }
362
363 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
364}
365
fa16a5c1
DB		 366/*----------------------------------------------------------------------*/
367
368/*
369 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
370 * select field in its control register. We use tables indexed by VSEL
371 * to record voltages in milliVolts. (Accuracy is about three percent.)
372 *
373 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
374 * currently handled by listing two slightly different VAUX2 regulators,
375 * only one of which will be configured.
376 *
377 * VSEL values documented as "TI cannot support these values" are flagged
378 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH		 379 *
380 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
381 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 382 */
fa16a5c1 383#define UNSUP_MASK 0x8000
fa16a5c1
DB		 384
385#define UNSUP(x) (UNSUP_MASK | (x))
411a2df5
N		 386#define IS_UNSUP(info, x) \
387 ((UNSUP_MASK & (x)) && \
388 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
fa16a5c1
DB		 389#define LDO_MV(x) (~UNSUP_MASK & (x))
390
391
392static const u16 VAUX1_VSEL_table[] = {
393 UNSUP(1500), UNSUP(1800), 2500, 2800,
394 3000, 3000, 3000, 3000,
395};
396static const u16 VAUX2_4030_VSEL_table[] = {
397 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
398 1500, 1800, UNSUP(1850), 2500,
399 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
400 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
401};
402static const u16 VAUX2_VSEL_table[] = {
403 1700, 1700, 1900, 1300,
404 1500, 1800, 2000, 2500,
405 2100, 2800, 2200, 2300,
406 2400, 2400, 2400, 2400,
407};
408static const u16 VAUX3_VSEL_table[] = {
409 1500, 1800, 2500, 2800,
d6bb69cf 410 3000, 3000, 3000, 3000,
fa16a5c1
DB		 411};
412static const u16 VAUX4_VSEL_table[] = {
413 700, 1000, 1200, UNSUP(1300),
414 1500, 1800, UNSUP(1850), 2500,
1897e742
DB		 415 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
416 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB		 417};
418static const u16 VMMC1_VSEL_table[] = {
419 1850, 2850, 3000, 3150,
420};
421static const u16 VMMC2_VSEL_table[] = {
422 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
423 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
424 2600, 2800, 2850, 3000,
425 3150, 3150, 3150, 3150,
426};
427static const u16 VPLL1_VSEL_table[] = {
428 1000, 1200, 1300, 1800,
429 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
430};
431static const u16 VPLL2_VSEL_table[] = {
432 700, 1000, 1200, 1300,
433 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
434 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
435 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
436};
437static const u16 VSIM_VSEL_table[] = {
438 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
439 2800, 3000, 3000, 3000,
440};
441static const u16 VDAC_VSEL_table[] = {
442 1200, 1300, 1800, 1800,
443};
07fc493f
JKS		 444static const u16 VDD1_VSEL_table[] = {
445 800, 1450,
446};
447static const u16 VDD2_VSEL_table[] = {
448 800, 1450, 1500,
449};
450static const u16 VIO_VSEL_table[] = {
451 1800, 1850,
452};
453static const u16 VINTANA2_VSEL_table[] = {
454 2500, 2750,
455};
fa16a5c1 456
3e3d3be7 457static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB		 458{
459 struct twlreg_info *info = rdev_get_drvdata(rdev);
460 int mV = info->table[index];
461
411a2df5 462 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
66b659e6
DB		 463}
464
fa16a5c1 465static int
dd16b1f8 466twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB		 467{
468 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 469
dd16b1f8
AL		 470 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
471 selector);
fa16a5c1
DB		 472}
473
6949fbe5 474static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev)
fa16a5c1
DB		 475{
476 struct twlreg_info *info = rdev_get_drvdata(rdev);
6949fbe5 477 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
fa16a5c1
DB		 478
479 if (vsel < 0)
480 return vsel;
481
482 vsel &= info->table_len - 1;
6949fbe5 483 return vsel;
fa16a5c1
DB		 484}
485
3e3d3be7
RN		 486static struct regulator_ops twl4030ldo_ops = {
487 .list_voltage = twl4030ldo_list_voltage,
66b659e6 488
dd16b1f8 489 .set_voltage_sel = twl4030ldo_set_voltage_sel,
6949fbe5 490 .get_voltage_sel = twl4030ldo_get_voltage_sel,
3e3d3be7 491
f8c2940b 492 .enable = twl4030reg_enable,
0ff3897d 493 .disable = twl4030reg_disable,
b2456779 494 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 495
1a39962f 496 .set_mode = twl4030reg_set_mode,
3e3d3be7 497
9a0244ad 498 .get_status = twl4030reg_get_status,
3e3d3be7
RN		 499};
500
ba305e31
TK		 501static int
502twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
503 unsigned *selector)
504{
505 struct twlreg_info *info = rdev_get_drvdata(rdev);
506 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
507
63bfff4e
TK		 508 if (info->set_voltage) {
509 return info->set_voltage(info->data, min_uV);
510 } else {
511 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
512 VREG_VOLTAGE_SMPS_4030, vsel);
513 }
514
ba305e31
TK		 515 return 0;
516}
517
518static int twl4030smps_get_voltage(struct regulator_dev *rdev)
519{
520 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK		 521 int vsel;
522
523 if (info->get_voltage)
524 return info->get_voltage(info->data);
525
526 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK		 527 VREG_VOLTAGE_SMPS_4030);
528
529 return vsel * 12500 + 600000;
530}
531
532static struct regulator_ops twl4030smps_ops = {
533 .set_voltage = twl4030smps_set_voltage,
534 .get_voltage = twl4030smps_get_voltage,
535};
536
34a38440
TK		 537static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
538 int max_uV, unsigned *selector)
539{
540 struct twlreg_info *info = rdev_get_drvdata(rdev);
541
542 if (info->set_voltage)
543 return info->set_voltage(info->data, min_uV);
544
545 return -ENODEV;
546}
547
548static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
549{
550 struct twlreg_info *info = rdev_get_drvdata(rdev);
551
552 if (info->get_voltage)
553 return info->get_voltage(info->data);
554
555 return -ENODEV;
556}
557
558static struct regulator_ops twl6030coresmps_ops = {
559 .set_voltage = twl6030coresmps_set_voltage,
560 .get_voltage = twl6030coresmps_get_voltage,
561};
562
c6a717c9
AL		 563static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned sel)
564{
565 struct twlreg_info *info = rdev_get_drvdata(rdev);
566
567 switch (sel) {
568 case 0:
569 return 0;
570 case 1 ... 24:
571 /* Linear mapping from 00000001 to 00011000:
572 * Absolute voltage value = 1.0 V + 0.1 V × (sel – 00000001)
573 */
574 return (info->min_mV + 100 * (sel - 1)) * 1000;
575 case 25 ... 30:
576 return -EINVAL;
577 case 31:
578 return 2750000;
579 default:
580 return -EINVAL;
581 }
582}
583
3e3d3be7 584static int
4bcb9f43 585twl6030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
3e3d3be7
RN		 586{
587 struct twlreg_info *info = rdev_get_drvdata(rdev);
3e3d3be7 588
4bcb9f43
AL		 589 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
590 selector);
3e3d3be7
RN		 591}
592
4bcb9f43 593static int twl6030ldo_get_voltage_sel(struct regulator_dev *rdev)
3e3d3be7
RN		 594{
595 struct twlreg_info *info = rdev_get_drvdata(rdev);
a3cb80f4 596 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
3e3d3be7 597
4bcb9f43 598 return vsel;
3e3d3be7
RN		 599}
600
601static struct regulator_ops twl6030ldo_ops = {
c6a717c9 602 .list_voltage = twl6030ldo_list_voltage,
3e3d3be7 603
4bcb9f43
AL		 604 .set_voltage_sel = twl6030ldo_set_voltage_sel,
605 .get_voltage_sel = twl6030ldo_get_voltage_sel,
fa16a5c1 606
f8c2940b 607 .enable = twl6030reg_enable,
0ff3897d 608 .disable = twl6030reg_disable,
b2456779 609 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 610
1a39962f 611 .set_mode = twl6030reg_set_mode,
fa16a5c1 612
9a0244ad 613 .get_status = twl6030reg_get_status,
fa16a5c1
DB		 614};
615
616/*----------------------------------------------------------------------*/
617
618/*
619 * Fixed voltage LDOs don't have a VSEL field to update.
620 */
c4aa6f31 621static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB		 622{
623 struct twlreg_info *info = rdev_get_drvdata(rdev);
624
625 return info->min_mV * 1000;
626}
627
b2456779
SH		 628static struct regulator_ops twl4030fixed_ops = {
629 .list_voltage = twlfixed_list_voltage,
630
f8c2940b 631 .enable = twl4030reg_enable,
0ff3897d 632 .disable = twl4030reg_disable,
b2456779
SH		 633 .is_enabled = twl4030reg_is_enabled,
634
1a39962f 635 .set_mode = twl4030reg_set_mode,
b2456779 636
9a0244ad 637 .get_status = twl4030reg_get_status,
b2456779
SH		 638};
639
640static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 641 .list_voltage = twlfixed_list_voltage,
66b659e6 642
f8c2940b 643 .enable = twl6030reg_enable,
0ff3897d 644 .disable = twl6030reg_disable,
b2456779 645 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 646
1a39962f 647 .set_mode = twl6030reg_set_mode,
fa16a5c1 648
9a0244ad 649 .get_status = twl6030reg_get_status,
fa16a5c1
DB		 650};
651
4d94aee5
GG		 652/*
653 * SMPS status and control
654 */
655
656static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
657{
658 struct twlreg_info *info = rdev_get_drvdata(rdev);
659
660 int voltage = 0;
661
662 switch (info->flags) {
663 case SMPS_OFFSET_EN:
664 voltage = 100000;
665 /* fall through */
666 case 0:
667 switch (index) {
668 case 0:
669 voltage = 0;
670 break;
671 case 58:
672 voltage = 1350 * 1000;
673 break;
674 case 59:
675 voltage = 1500 * 1000;
676 break;
677 case 60:
678 voltage = 1800 * 1000;
679 break;
680 case 61:
681 voltage = 1900 * 1000;
682 break;
683 case 62:
684 voltage = 2100 * 1000;
685 break;
686 default:
687 voltage += (600000 + (12500 * (index - 1)));
688 }
689 break;
690 case SMPS_EXTENDED_EN:
691 switch (index) {
692 case 0:
693 voltage = 0;
694 break;
695 case 58:
696 voltage = 2084 * 1000;
697 break;
698 case 59:
699 voltage = 2315 * 1000;
700 break;
701 case 60:
702 voltage = 2778 * 1000;
703 break;
704 case 61:
705 voltage = 2932 * 1000;
706 break;
707 case 62:
708 voltage = 3241 * 1000;
709 break;
710 default:
711 voltage = (1852000 + (38600 * (index - 1)));
712 }
713 break;
714 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
715 switch (index) {
716 case 0:
717 voltage = 0;
718 break;
719 case 58:
720 voltage = 4167 * 1000;
721 break;
722 case 59:
723 voltage = 2315 * 1000;
724 break;
725 case 60:
726 voltage = 2778 * 1000;
727 break;
728 case 61:
729 voltage = 2932 * 1000;
730 break;
731 case 62:
732 voltage = 3241 * 1000;
733 break;
734 default:
735 voltage = (2161000 + (38600 * (index - 1)));
736 }
737 break;
738 }
739
740 return voltage;
741}
742
38f8f43c
AL		 743static int twl6030smps_map_voltage(struct regulator_dev *rdev, int min_uV,
744 int max_uV)
4d94aee5 745{
38f8f43c
AL		 746 struct twlreg_info *info = rdev_get_drvdata(rdev);
747 int vsel = 0;
4d94aee5
GG		 748
749 switch (info->flags) {
750 case 0:
751 if (min_uV == 0)
752 vsel = 0;
a33b6e5a 753 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
268a1641 754 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 755 vsel++;
4d94aee5
GG		 756 }
757 /* Values 1..57 for vsel are linear and can be calculated
758 * values 58..62 are non linear.
759 */
78292f4e 760 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 761 vsel = 62;
78292f4e 762 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 763 vsel = 61;
78292f4e 764 else if ((min_uV > 1500000) && (min_uV <= 1800000))
4d94aee5 765 vsel = 60;
78292f4e 766 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 767 vsel = 59;
78292f4e 768 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG		 769 vsel = 58;
770 else
771 return -EINVAL;
772 break;
773 case SMPS_OFFSET_EN:
774 if (min_uV == 0)
775 vsel = 0;
a33b6e5a 776 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
268a1641 777 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 778 vsel++;
4d94aee5
GG		 779 }
780 /* Values 1..57 for vsel are linear and can be calculated
781 * values 58..62 are non linear.
782 */
78292f4e 783 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 784 vsel = 62;
78292f4e 785 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 786 vsel = 61;
78292f4e 787 else if ((min_uV > 1350000) && (min_uV <= 1800000))
4d94aee5 788 vsel = 60;
78292f4e 789 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 790 vsel = 59;
78292f4e 791 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG		 792 vsel = 58;
793 else
794 return -EINVAL;
795 break;
796 case SMPS_EXTENDED_EN:
0cb2f123 797 if (min_uV == 0) {
4d94aee5 798 vsel = 0;
0cb2f123 799 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 800 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL		 801 vsel++;
802 }
4d94aee5
GG		 803 break;
804 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 805 if (min_uV == 0) {
4d94aee5 806 vsel = 0;
78292f4e 807 } else if ((min_uV >= 2161000) && (min_uV <= 4321000)) {
268a1641 808 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL		 809 vsel++;
810 }
4d94aee5
GG		 811 break;
812 }
813
38f8f43c
AL		 814 return vsel;
815}
78292f4e 816
38f8f43c
AL		 817static int twl6030smps_set_voltage_sel(struct regulator_dev *rdev,
818 unsigned int selector)
819{
820 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5
GG		 821
822 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
38f8f43c 823 selector);
4d94aee5
GG		 824}
825
826static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
827{
828 struct twlreg_info *info = rdev_get_drvdata(rdev);
829
830 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
831}
832
833static struct regulator_ops twlsmps_ops = {
834 .list_voltage = twl6030smps_list_voltage,
38f8f43c 835 .map_voltage = twl6030smps_map_voltage,
4d94aee5 836
38f8f43c 837 .set_voltage_sel = twl6030smps_set_voltage_sel,
4d94aee5
GG		 838 .get_voltage_sel = twl6030smps_get_voltage_sel,
839
840 .enable = twl6030reg_enable,
841 .disable = twl6030reg_disable,
842 .is_enabled = twl6030reg_is_enabled,
843
844 .set_mode = twl6030reg_set_mode,
845
846 .get_status = twl6030reg_get_status,
847};
848
fa16a5c1
DB		 849/*----------------------------------------------------------------------*/
850
045f972f
JKS		 851#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
852 remap_conf) \
853 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 854 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A		 855#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
856 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 857 0x0, TWL6030, twl6030fixed_ops)
045f972f 858
2098e95c 859#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 860static const struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB		 861 .base = offset, \
862 .id = num, \
863 .table_len = ARRAY_SIZE(label##_VSEL_table), \
864 .table = label##_VSEL_table, \
045f972f 865 .remap = remap_conf, \
fa16a5c1
DB		 866 .desc = { \
867 .name = #label, \
3e3d3be7 868 .id = TWL4030_REG_##label, \
66b659e6 869 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN		 870 .ops = &twl4030ldo_ops, \
871 .type = REGULATOR_VOLTAGE, \
872 .owner = THIS_MODULE, \
fca53d86 873 .enable_time = turnon_delay, \
3e3d3be7
RN		 874 }, \
875 }
876
ba305e31 877#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 878static const struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK		 879 .base = offset, \
880 .id = num, \
ba305e31
TK		 881 .remap = remap_conf, \
882 .desc = { \
883 .name = #label, \
884 .id = TWL4030_REG_##label, \
885 .ops = &twl4030smps_ops, \
886 .type = REGULATOR_VOLTAGE, \
887 .owner = THIS_MODULE, \
fca53d86 888 .enable_time = turnon_delay, \
ba305e31
TK		 889 }, \
890 }
891
2098e95c 892#define TWL6030_ADJUSTABLE_SMPS(label) \
0ffff5a6 893static const struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK		 894 .desc = { \
895 .name = #label, \
896 .id = TWL6030_REG_##label, \
897 .ops = &twl6030coresmps_ops, \
898 .type = REGULATOR_VOLTAGE, \
899 .owner = THIS_MODULE, \
900 }, \
901 }
902
2098e95c 903#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
0ffff5a6 904static const struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 905 .base = offset, \
3e3d3be7
RN		 906 .min_mV = min_mVolts, \
907 .max_mV = max_mVolts, \
3e3d3be7
RN		 908 .desc = { \
909 .name = #label, \
910 .id = TWL6030_REG_##label, \
c6a717c9 911 .n_voltages = 32, \
3e3d3be7 912 .ops = &twl6030ldo_ops, \
fa16a5c1
DB		 913 .type = REGULATOR_VOLTAGE, \
914 .owner = THIS_MODULE, \
915 }, \
916 }
917
2098e95c 918#define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
0ffff5a6 919static const struct twlreg_info TWL6025_INFO_##label = { \
4d94aee5 920 .base = offset, \
4d94aee5
GG		 921 .min_mV = min_mVolts, \
922 .max_mV = max_mVolts, \
923 .desc = { \
924 .name = #label, \
925 .id = TWL6025_REG_##label, \
c6a717c9 926 .n_voltages = 32, \
4d94aee5
GG		 927 .ops = &twl6030ldo_ops, \
928 .type = REGULATOR_VOLTAGE, \
929 .owner = THIS_MODULE, \
930 }, \
931 }
3e3d3be7 932
045f972f 933#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c 934 family, operations) \
0ffff5a6 935static const struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB		 936 .base = offset, \
937 .id = num, \
938 .min_mV = mVolts, \
045f972f 939 .remap = remap_conf, \
fa16a5c1
DB		 940 .desc = { \
941 .name = #label, \
c4aa6f31 942 .id = family##_REG_##label, \
66b659e6 943 .n_voltages = 1, \
b2456779 944 .ops = &operations, \
fa16a5c1
DB		 945 .type = REGULATOR_VOLTAGE, \
946 .owner = THIS_MODULE, \
fca53d86 947 .enable_time = turnon_delay, \
fa16a5c1
DB		 948 }, \
949 }
950
2098e95c
RN		 951#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
952static struct twlreg_info TWLRES_INFO_##label = { \
8e6de4a3 953 .base = offset, \
8e6de4a3
B		 954 .desc = { \
955 .name = #label, \
956 .id = TWL6030_REG_##label, \
957 .ops = &twl6030_fixed_resource, \
958 .type = REGULATOR_VOLTAGE, \
959 .owner = THIS_MODULE, \
fca53d86 960 .enable_time = turnon_delay, \
8e6de4a3
B		 961 }, \
962 }
963
2098e95c 964#define TWL6025_ADJUSTABLE_SMPS(label, offset) \
0ffff5a6 965static const struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 966 .base = offset, \
4d94aee5
GG		 967 .min_mV = 600, \
968 .max_mV = 2100, \
969 .desc = { \
970 .name = #label, \
971 .id = TWL6025_REG_##label, \
972 .n_voltages = 63, \
973 .ops = &twlsmps_ops, \
974 .type = REGULATOR_VOLTAGE, \
975 .owner = THIS_MODULE, \
976 }, \
977 }
978
fa16a5c1
DB		 979/*
980 * We list regulators here if systems need some level of
981 * software control over them after boot.
982 */
2098e95c
RN		 983TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
984TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
985TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
986TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
987TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
988TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
989TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
990TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
991TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
992TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
993TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
994TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
995TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
996TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
997TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
998/* VUSBCP is managed *only* by the USB subchip */
999/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1000/* Turnon-delay and remap configuration values for 6030 are not
1001 verified since the specification is not public */
1002TWL6030_ADJUSTABLE_SMPS(VDD1);
1003TWL6030_ADJUSTABLE_SMPS(VDD2);
1004TWL6030_ADJUSTABLE_SMPS(VDD3);
1005TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1006TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1007TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1008TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1009TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1010TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1011/* 6025 are renamed compared to 6030 versions */
1012TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1013TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1014TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1015TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1016TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1017TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1018TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1019TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1020TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
908d6d52 1021TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
2098e95c
RN		 1022TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1023TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1024TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1025TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1026TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1027TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1028TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1029TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU		 1030TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1031TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
2098e95c
RN		 1032TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34);
1033TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10);
1034TWL6025_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1035
4d94aee5
GG		 1036static u8 twl_get_smps_offset(void)
1037{
1038 u8 value;
1039
1040 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1041 TWL6030_SMPS_OFFSET);
1042 return value;
1043}
1044
1045static u8 twl_get_smps_mult(void)
1046{
1047 u8 value;
1048
1049 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1050 TWL6030_SMPS_MULT);
1051 return value;
1052}
1053
2098e95c
RN		 1054#define TWL_OF_MATCH(comp, family, label) \
1055 { \
1056 .compatible = comp, \
1057 .data = &family##_INFO_##label, \
1058 }
1059
1060#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1061#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
1062#define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label)
1063#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
2098e95c
RN		 1064#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1065
3d68dfe3 1066static const struct of_device_id twl_of_match[] = {
2098e95c
RN		 1067 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1068 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1069 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1070 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1071 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1072 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1073 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1074 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1075 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1076 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1077 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1078 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1079 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1080 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1081 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1082 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1083 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1084 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1085 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1086 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1087 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1088 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1089 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1090 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
1091 TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2),
1092 TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4),
1093 TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3),
1094 TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5),
1095 TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1),
1096 TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7),
1097 TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6),
1098 TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN),
1099 TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB),
908d6d52 1100 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
2098e95c
RN		 1101 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1102 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1103 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1104 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1105 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1106 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1107 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1108 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU		 1109 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1110 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
2098e95c
RN		 1111 TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3),
1112 TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4),
1113 TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO),
1114 {},
1115};
1116MODULE_DEVICE_TABLE(of, twl_of_match);
1117
a5023574 1118static int twlreg_probe(struct platform_device *pdev)
fa16a5c1 1119{
2098e95c 1120 int i, id;
fa16a5c1 1121 struct twlreg_info *info;
0ffff5a6 1122 const struct twlreg_info *template;
fa16a5c1
DB		 1123 struct regulator_init_data *initdata;
1124 struct regulation_constraints *c;
1125 struct regulator_dev *rdev;
63bfff4e 1126 struct twl_regulator_driver_data *drvdata;
2098e95c 1127 const struct of_device_id *match;
c172708d 1128 struct regulator_config config = { };
2098e95c
RN		 1129
1130 match = of_match_device(twl_of_match, &pdev->dev);
1131 if (match) {
0ffff5a6
AB		 1132 template = match->data;
1133 id = template->desc.id;
2098e95c
RN		 1134 initdata = of_get_regulator_init_data(&pdev->dev,
1135 pdev->dev.of_node);
1136 drvdata = NULL;
1137 } else {
1138 id = pdev->id;
1139 initdata = pdev->dev.platform_data;
0ffff5a6
AB		 1140 for (i = 0, template = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1141 template = twl_of_match[i].data;
1142 if (template && template->desc.id == id)
5ade3935 1143 break;
2098e95c 1144 }
5ade3935
AL		 1145 if (i == ARRAY_SIZE(twl_of_match))
1146 return -ENODEV;
1147
2098e95c
RN		 1148 drvdata = initdata->driver_data;
1149 if (!drvdata)
1150 return -EINVAL;
fa16a5c1 1151 }
2098e95c 1152
0ffff5a6 1153 if (!template)
fa16a5c1
DB		 1154 return -ENODEV;
1155
fa16a5c1
DB		 1156 if (!initdata)
1157 return -EINVAL;
1158
0ffff5a6
AB		 1159 info = kmemdup(template, sizeof (*info), GFP_KERNEL);
1160 if (!info)
1161 return -ENOMEM;
1162
2098e95c
RN		 1163 if (drvdata) {
1164 /* copy the driver data into regulator data */
1165 info->features = drvdata->features;
1166 info->data = drvdata->data;
1167 info->set_voltage = drvdata->set_voltage;
1168 info->get_voltage = drvdata->get_voltage;
1169 }
4d94aee5 1170
fa16a5c1
DB		 1171 /* Constrain board-specific capabilities according to what
1172 * this driver and the chip itself can actually do.
1173 */
1174 c = &initdata->constraints;
fa16a5c1
DB		 1175 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1176 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1177 | REGULATOR_CHANGE_MODE
1178 | REGULATOR_CHANGE_STATUS;
2098e95c 1179 switch (id) {
205e5cd3
JKS		 1180 case TWL4030_REG_VIO:
1181 case TWL4030_REG_VDD1:
1182 case TWL4030_REG_VDD2:
1183 case TWL4030_REG_VPLL1:
1184 case TWL4030_REG_VINTANA1:
1185 case TWL4030_REG_VINTANA2:
1186 case TWL4030_REG_VINTDIG:
1187 c->always_on = true;
1188 break;
1189 default:
1190 break;
1191 }
fa16a5c1 1192
2098e95c 1193 switch (id) {
4d94aee5
GG		 1194 case TWL6025_REG_SMPS3:
1195 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1196 info->flags |= SMPS_EXTENDED_EN;
1197 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1198 info->flags |= SMPS_OFFSET_EN;
1199 break;
1200 case TWL6025_REG_SMPS4:
1201 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1202 info->flags |= SMPS_EXTENDED_EN;
1203 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1204 info->flags |= SMPS_OFFSET_EN;
1205 break;
1206 case TWL6025_REG_VIO:
1207 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1208 info->flags |= SMPS_EXTENDED_EN;
1209 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1210 info->flags |= SMPS_OFFSET_EN;
1211 break;
1212 }
1213
c172708d
MB		 1214 config.dev = &pdev->dev;
1215 config.init_data = initdata;
1216 config.driver_data = info;
1217 config.of_node = pdev->dev.of_node;
1218
1219 rdev = regulator_register(&info->desc, &config);
fa16a5c1
DB		 1220 if (IS_ERR(rdev)) {
1221 dev_err(&pdev->dev, "can't register %s, %ld\n",
1222 info->desc.name, PTR_ERR(rdev));
0ffff5a6 1223 kfree(info);
fa16a5c1
DB		 1224 return PTR_ERR(rdev);
1225 }
1226 platform_set_drvdata(pdev, rdev);
1227
776dc923
SH		 1228 if (twl_class_is_4030())
1229 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS		 1230 info->remap);
1231
fa16a5c1
DB		 1232 /* NOTE: many regulators support short-circuit IRQs (presentable
1233 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1234 * - SC_CONFIG
1235 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1236 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1237 * - IT_CONFIG
1238 */
1239
1240 return 0;
1241}
1242
8dc995f5 1243static int twlreg_remove(struct platform_device *pdev)
fa16a5c1 1244{
0ffff5a6
AB		 1245 struct regulator_dev *rdev = platform_get_drvdata(pdev);
1246 struct twlreg_info *info = rdev->reg_data;
1247
1248 regulator_unregister(rdev);
1249 kfree(info);
fa16a5c1
DB		 1250 return 0;
1251}
1252
c4aa6f31 1253MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1254
c4aa6f31
RN		 1255static struct platform_driver twlreg_driver = {
1256 .probe = twlreg_probe,
5eb9f2b9 1257 .remove = twlreg_remove,
fa16a5c1 1258 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1259 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1260 */
2098e95c
RN		 1261 .driver = {
1262 .name = "twl_reg",
1263 .owner = THIS_MODULE,
1264 .of_match_table = of_match_ptr(twl_of_match),
1265 },
fa16a5c1
DB		 1266};
1267
c4aa6f31 1268static int __init twlreg_init(void)
fa16a5c1 1269{
c4aa6f31 1270 return platform_driver_register(&twlreg_driver);
fa16a5c1 1271}
c4aa6f31 1272subsys_initcall(twlreg_init);
fa16a5c1 1273
c4aa6f31 1274static void __exit twlreg_exit(void)
fa16a5c1 1275{
c4aa6f31 1276 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1277}
c4aa6f31 1278module_exit(twlreg_exit)
fa16a5c1 1279
c4aa6f31 1280MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1281MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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