regulator: twl6030: do not write to _GRP for regulator disable
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
53b8a9d9 15#include <linux/delay.h>
fa16a5c1
DB
16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
b07682b6 19#include <linux/i2c/twl.h>
fa16a5c1
DB
20
21
22/*
c4aa6f31 23 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
24 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
25 * include an audio codec, battery charger, and more voltage regulators.
26 * These chips are often used in OMAP-based systems.
27 *
28 * This driver implements software-based resource control for various
29 * voltage regulators. This is usually augmented with state machine
30 * based control.
31 */
32
33struct twlreg_info {
34 /* start of regulator's PM_RECEIVER control register bank */
35 u8 base;
36
c4aa6f31 37 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
38 u8 id;
39
40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
41 u8 table_len;
42 const u16 *table;
43
045f972f
JKS
44 /* regulator specific turn-on delay */
45 u16 delay;
46
47 /* State REMAP default configuration */
48 u8 remap;
49
fa16a5c1
DB
50 /* chip constraints on regulator behavior */
51 u16 min_mV;
3e3d3be7 52 u16 max_mV;
fa16a5c1
DB
53
54 /* used by regulator core */
55 struct regulator_desc desc;
56};
57
58
59/* LDO control registers ... offset is from the base of its register bank.
60 * The first three registers of all power resource banks help hardware to
61 * manage the various resource groups.
62 */
441a4505 63/* Common offset in TWL4030/6030 */
fa16a5c1 64#define VREG_GRP 0
441a4505 65/* TWL4030 register offsets */
fa16a5c1
DB
66#define VREG_TYPE 1
67#define VREG_REMAP 2
68#define VREG_DEDICATED 3 /* LDO control */
441a4505
RN
69/* TWL6030 register offsets */
70#define VREG_TRANS 1
71#define VREG_STATE 2
72#define VREG_VOLTAGE 3
73/* TWL6030 Misc register offsets */
74#define VREG_BC_ALL 1
75#define VREG_BC_REF 2
76#define VREG_BC_PROC 3
77#define VREG_BC_CLK_RST 4
fa16a5c1 78
21657ebf
SH
79/* TWL6030 LDO register values for CFG_STATE */
80#define TWL6030_CFG_STATE_OFF 0x00
81#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
82#define TWL6030_CFG_STATE_OFF2 0x02
83#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 84#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
85#define TWL6030_CFG_STATE_APP_SHIFT 2
86#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
87#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
88 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 89
fa16a5c1 90static inline int
441a4505 91twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
92{
93 u8 value;
94 int status;
95
441a4505 96 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
97 &value, info->base + offset);
98 return (status < 0) ? status : value;
99}
100
101static inline int
441a4505
RN
102twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
103 u8 value)
fa16a5c1 104{
441a4505 105 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
106 value, info->base + offset);
107}
108
109/*----------------------------------------------------------------------*/
110
111/* generic power resource operations, which work on all regulators */
112
c4aa6f31 113static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 114{
441a4505
RN
115 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
116 VREG_GRP);
fa16a5c1
DB
117}
118
119/*
120 * Enable/disable regulators by joining/leaving the P1 (processor) group.
121 * We assume nobody else is updating the DEV_GRP registers.
122 */
441a4505
RN
123/* definition for 4030 family */
124#define P3_GRP_4030 BIT(7) /* "peripherals" */
125#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
126#define P1_GRP_4030 BIT(5) /* CPU/Linux */
127/* definition for 6030 family */
128#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
129#define P2_GRP_6030 BIT(1) /* "peripherals" */
130#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 131
b2456779 132static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 133{
c4aa6f31 134 int state = twlreg_grp(rdev);
fa16a5c1
DB
135
136 if (state < 0)
137 return state;
138
b2456779
SH
139 return state & P1_GRP_4030;
140}
141
142static int twl6030reg_is_enabled(struct regulator_dev *rdev)
143{
144 struct twlreg_info *info = rdev_get_drvdata(rdev);
145 int grp, val;
146
147 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
148 if (grp < 0)
149 return grp;
150
151 grp &= P1_GRP_6030;
152
153 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
154 val = TWL6030_CFG_STATE_APP(val);
155
156 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
157}
158
f8c2940b 159static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
160{
161 struct twlreg_info *info = rdev_get_drvdata(rdev);
162 int grp;
53b8a9d9 163 int ret;
fa16a5c1 164
441a4505 165 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
166 if (grp < 0)
167 return grp;
168
f8c2940b 169 grp |= P1_GRP_4030;
441a4505 170
53b8a9d9
JKS
171 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
172
f8c2940b
B
173 udelay(info->delay);
174
175 return ret;
176}
177
178static int twl6030reg_enable(struct regulator_dev *rdev)
179{
180 struct twlreg_info *info = rdev_get_drvdata(rdev);
181 int grp;
182 int ret;
183
184 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
185 if (grp < 0)
186 return grp;
187
188 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
189 grp << TWL6030_CFG_STATE_GRP_SHIFT |
190 TWL6030_CFG_STATE_ON);
21657ebf 191
53b8a9d9
JKS
192 udelay(info->delay);
193
194 return ret;
fa16a5c1
DB
195}
196
0ff3897d 197static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
198{
199 struct twlreg_info *info = rdev_get_drvdata(rdev);
200 int grp;
21657ebf 201 int ret;
fa16a5c1 202
441a4505 203 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
204 if (grp < 0)
205 return grp;
206
0ff3897d 207 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 208
21657ebf
SH
209 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
210
0ff3897d
B
211 return ret;
212}
213
214static int twl6030reg_disable(struct regulator_dev *rdev)
215{
216 struct twlreg_info *info = rdev_get_drvdata(rdev);
217 int grp = 0;
218 int ret;
219
220 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
221
222 /* For 6030, set the off state for all grps enabled */
223 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
224 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
225 TWL6030_CFG_STATE_OFF);
21657ebf
SH
226
227 return ret;
fa16a5c1
DB
228}
229
9a0244ad 230static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 231{
c4aa6f31 232 int state = twlreg_grp(rdev);
fa16a5c1
DB
233
234 if (state < 0)
235 return state;
236 state &= 0x0f;
237
238 /* assume state != WARM_RESET; we'd not be running... */
239 if (!state)
240 return REGULATOR_STATUS_OFF;
241 return (state & BIT(3))
242 ? REGULATOR_STATUS_NORMAL
243 : REGULATOR_STATUS_STANDBY;
244}
245
9a0244ad
SH
246static int twl6030reg_get_status(struct regulator_dev *rdev)
247{
248 struct twlreg_info *info = rdev_get_drvdata(rdev);
249 int val;
250
251 val = twlreg_grp(rdev);
252 if (val < 0)
253 return val;
254
255 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
256
257 switch (TWL6030_CFG_STATE_APP(val)) {
258 case TWL6030_CFG_STATE_ON:
259 return REGULATOR_STATUS_NORMAL;
260
261 case TWL6030_CFG_STATE_SLEEP:
262 return REGULATOR_STATUS_STANDBY;
263
264 case TWL6030_CFG_STATE_OFF:
265 case TWL6030_CFG_STATE_OFF2:
266 default:
267 break;
268 }
269
270 return REGULATOR_STATUS_OFF;
271}
272
1a39962f 273static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
274{
275 struct twlreg_info *info = rdev_get_drvdata(rdev);
276 unsigned message;
277 int status;
278
279 /* We can only set the mode through state machine commands... */
280 switch (mode) {
281 case REGULATOR_MODE_NORMAL:
282 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
283 break;
284 case REGULATOR_MODE_STANDBY:
285 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
286 break;
287 default:
288 return -EINVAL;
289 }
290
291 /* Ensure the resource is associated with some group */
c4aa6f31 292 status = twlreg_grp(rdev);
fa16a5c1
DB
293 if (status < 0)
294 return status;
441a4505 295 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
296 return -EACCES;
297
c4aa6f31 298 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
299 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
300 if (status < 0)
fa16a5c1
DB
301 return status;
302
c4aa6f31 303 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 304 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
305}
306
1a39962f
SH
307static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
308{
309 struct twlreg_info *info = rdev_get_drvdata(rdev);
310 int grp;
311 int val;
312
313 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
314
315 if (grp < 0)
316 return grp;
317
318 /* Compose the state register settings */
319 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
320 /* We can only set the mode through state machine commands... */
321 switch (mode) {
322 case REGULATOR_MODE_NORMAL:
323 val |= TWL6030_CFG_STATE_ON;
324 break;
325 case REGULATOR_MODE_STANDBY:
326 val |= TWL6030_CFG_STATE_SLEEP;
327 break;
328
329 default:
330 return -EINVAL;
331 }
332
333 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
334}
335
fa16a5c1
DB
336/*----------------------------------------------------------------------*/
337
338/*
339 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
340 * select field in its control register. We use tables indexed by VSEL
341 * to record voltages in milliVolts. (Accuracy is about three percent.)
342 *
343 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
344 * currently handled by listing two slightly different VAUX2 regulators,
345 * only one of which will be configured.
346 *
347 * VSEL values documented as "TI cannot support these values" are flagged
348 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
349 *
350 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
351 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB
352 */
353#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
354#define UNSUP_MASK 0x0000
355#else
356#define UNSUP_MASK 0x8000
357#endif
358
359#define UNSUP(x) (UNSUP_MASK | (x))
360#define IS_UNSUP(x) (UNSUP_MASK & (x))
361#define LDO_MV(x) (~UNSUP_MASK & (x))
362
363
364static const u16 VAUX1_VSEL_table[] = {
365 UNSUP(1500), UNSUP(1800), 2500, 2800,
366 3000, 3000, 3000, 3000,
367};
368static const u16 VAUX2_4030_VSEL_table[] = {
369 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
370 1500, 1800, UNSUP(1850), 2500,
371 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
372 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
373};
374static const u16 VAUX2_VSEL_table[] = {
375 1700, 1700, 1900, 1300,
376 1500, 1800, 2000, 2500,
377 2100, 2800, 2200, 2300,
378 2400, 2400, 2400, 2400,
379};
380static const u16 VAUX3_VSEL_table[] = {
381 1500, 1800, 2500, 2800,
d6bb69cf 382 3000, 3000, 3000, 3000,
fa16a5c1
DB
383};
384static const u16 VAUX4_VSEL_table[] = {
385 700, 1000, 1200, UNSUP(1300),
386 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
387 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
388 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
389};
390static const u16 VMMC1_VSEL_table[] = {
391 1850, 2850, 3000, 3150,
392};
393static const u16 VMMC2_VSEL_table[] = {
394 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
395 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
396 2600, 2800, 2850, 3000,
397 3150, 3150, 3150, 3150,
398};
399static const u16 VPLL1_VSEL_table[] = {
400 1000, 1200, 1300, 1800,
401 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
402};
403static const u16 VPLL2_VSEL_table[] = {
404 700, 1000, 1200, 1300,
405 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
406 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
407 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
408};
409static const u16 VSIM_VSEL_table[] = {
410 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
411 2800, 3000, 3000, 3000,
412};
413static const u16 VDAC_VSEL_table[] = {
414 1200, 1300, 1800, 1800,
415};
07fc493f
JKS
416static const u16 VDD1_VSEL_table[] = {
417 800, 1450,
418};
419static const u16 VDD2_VSEL_table[] = {
420 800, 1450, 1500,
421};
422static const u16 VIO_VSEL_table[] = {
423 1800, 1850,
424};
425static const u16 VINTANA2_VSEL_table[] = {
426 2500, 2750,
427};
fa16a5c1 428
3e3d3be7 429static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
430{
431 struct twlreg_info *info = rdev_get_drvdata(rdev);
432 int mV = info->table[index];
433
434 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
435}
436
fa16a5c1 437static int
3a93f2a9
MB
438twl4030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
439 unsigned *selector)
fa16a5c1
DB
440{
441 struct twlreg_info *info = rdev_get_drvdata(rdev);
442 int vsel;
443
444 for (vsel = 0; vsel < info->table_len; vsel++) {
445 int mV = info->table[vsel];
446 int uV;
447
448 if (IS_UNSUP(mV))
449 continue;
450 uV = LDO_MV(mV) * 1000;
451
66b659e6
DB
452 /* REVISIT for VAUX2, first match may not be best/lowest */
453
fa16a5c1 454 /* use the first in-range value */
3a93f2a9
MB
455 if (min_uV <= uV && uV <= max_uV) {
456 *selector = vsel;
441a4505
RN
457 return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
458 VREG_VOLTAGE, vsel);
3a93f2a9 459 }
fa16a5c1
DB
460 }
461
462 return -EDOM;
463}
464
3e3d3be7 465static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
466{
467 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
468 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
469 VREG_VOLTAGE);
fa16a5c1
DB
470
471 if (vsel < 0)
472 return vsel;
473
474 vsel &= info->table_len - 1;
475 return LDO_MV(info->table[vsel]) * 1000;
476}
477
3e3d3be7
RN
478static struct regulator_ops twl4030ldo_ops = {
479 .list_voltage = twl4030ldo_list_voltage,
66b659e6 480
3e3d3be7
RN
481 .set_voltage = twl4030ldo_set_voltage,
482 .get_voltage = twl4030ldo_get_voltage,
483
f8c2940b 484 .enable = twl4030reg_enable,
0ff3897d 485 .disable = twl4030reg_disable,
b2456779 486 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 487
1a39962f 488 .set_mode = twl4030reg_set_mode,
3e3d3be7 489
9a0244ad 490 .get_status = twl4030reg_get_status,
3e3d3be7
RN
491};
492
493static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
494{
495 struct twlreg_info *info = rdev_get_drvdata(rdev);
496
497 return ((info->min_mV + (index * 100)) * 1000);
498}
499
500static int
3a93f2a9
MB
501twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
502 unsigned *selector)
3e3d3be7
RN
503{
504 struct twlreg_info *info = rdev_get_drvdata(rdev);
505 int vsel;
506
507 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
508 return -EDOM;
509
510 /*
511 * Use the below formula to calculate vsel
512 * mV = 1000mv + 100mv * (vsel - 1)
513 */
514 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 515 *selector = vsel;
3e3d3be7
RN
516 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
517
518}
519
520static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
521{
522 struct twlreg_info *info = rdev_get_drvdata(rdev);
523 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
524 VREG_VOLTAGE);
525
526 if (vsel < 0)
527 return vsel;
528
529 /*
530 * Use the below formula to calculate vsel
531 * mV = 1000mv + 100mv * (vsel - 1)
532 */
533 return (1000 + (100 * (vsel - 1))) * 1000;
534}
535
536static struct regulator_ops twl6030ldo_ops = {
537 .list_voltage = twl6030ldo_list_voltage,
538
539 .set_voltage = twl6030ldo_set_voltage,
540 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 541
f8c2940b 542 .enable = twl6030reg_enable,
0ff3897d 543 .disable = twl6030reg_disable,
b2456779 544 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 545
1a39962f 546 .set_mode = twl6030reg_set_mode,
fa16a5c1 547
9a0244ad 548 .get_status = twl6030reg_get_status,
fa16a5c1
DB
549};
550
551/*----------------------------------------------------------------------*/
552
553/*
554 * Fixed voltage LDOs don't have a VSEL field to update.
555 */
c4aa6f31 556static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
557{
558 struct twlreg_info *info = rdev_get_drvdata(rdev);
559
560 return info->min_mV * 1000;
561}
562
c4aa6f31 563static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
564{
565 struct twlreg_info *info = rdev_get_drvdata(rdev);
566
567 return info->min_mV * 1000;
568}
569
b2456779
SH
570static struct regulator_ops twl4030fixed_ops = {
571 .list_voltage = twlfixed_list_voltage,
572
573 .get_voltage = twlfixed_get_voltage,
574
f8c2940b 575 .enable = twl4030reg_enable,
0ff3897d 576 .disable = twl4030reg_disable,
b2456779
SH
577 .is_enabled = twl4030reg_is_enabled,
578
1a39962f 579 .set_mode = twl4030reg_set_mode,
b2456779 580
9a0244ad 581 .get_status = twl4030reg_get_status,
b2456779
SH
582};
583
584static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 585 .list_voltage = twlfixed_list_voltage,
66b659e6 586
c4aa6f31 587 .get_voltage = twlfixed_get_voltage,
fa16a5c1 588
f8c2940b 589 .enable = twl6030reg_enable,
0ff3897d 590 .disable = twl6030reg_disable,
b2456779 591 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 592
1a39962f 593 .set_mode = twl6030reg_set_mode,
fa16a5c1 594
9a0244ad 595 .get_status = twl6030reg_get_status,
fa16a5c1
DB
596};
597
8e6de4a3 598static struct regulator_ops twl6030_fixed_resource = {
f8c2940b 599 .enable = twl6030reg_enable,
0ff3897d 600 .disable = twl6030reg_disable,
b2456779 601 .is_enabled = twl6030reg_is_enabled,
9a0244ad 602 .get_status = twl6030reg_get_status,
8e6de4a3
B
603};
604
fa16a5c1
DB
605/*----------------------------------------------------------------------*/
606
045f972f
JKS
607#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
608 remap_conf) \
609 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 610 remap_conf, TWL4030, twl4030fixed_ops)
776dc923 611#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay) \
045f972f 612 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 613 0x0, TWL6030, twl6030fixed_ops)
045f972f 614
3e3d3be7 615#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) { \
fa16a5c1
DB
616 .base = offset, \
617 .id = num, \
618 .table_len = ARRAY_SIZE(label##_VSEL_table), \
619 .table = label##_VSEL_table, \
045f972f
JKS
620 .delay = turnon_delay, \
621 .remap = remap_conf, \
fa16a5c1
DB
622 .desc = { \
623 .name = #label, \
3e3d3be7 624 .id = TWL4030_REG_##label, \
66b659e6 625 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
626 .ops = &twl4030ldo_ops, \
627 .type = REGULATOR_VOLTAGE, \
628 .owner = THIS_MODULE, \
629 }, \
630 }
631
776dc923 632#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts, num) { \
3e3d3be7
RN
633 .base = offset, \
634 .id = num, \
635 .min_mV = min_mVolts, \
636 .max_mV = max_mVolts, \
3e3d3be7
RN
637 .desc = { \
638 .name = #label, \
639 .id = TWL6030_REG_##label, \
640 .n_voltages = (max_mVolts - min_mVolts)/100, \
641 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
642 .type = REGULATOR_VOLTAGE, \
643 .owner = THIS_MODULE, \
644 }, \
645 }
646
3e3d3be7 647
045f972f 648#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
b2456779 649 family, operations) { \
fa16a5c1
DB
650 .base = offset, \
651 .id = num, \
652 .min_mV = mVolts, \
045f972f
JKS
653 .delay = turnon_delay, \
654 .remap = remap_conf, \
fa16a5c1
DB
655 .desc = { \
656 .name = #label, \
c4aa6f31 657 .id = family##_REG_##label, \
66b659e6 658 .n_voltages = 1, \
b2456779 659 .ops = &operations, \
fa16a5c1
DB
660 .type = REGULATOR_VOLTAGE, \
661 .owner = THIS_MODULE, \
662 }, \
663 }
664
776dc923 665#define TWL6030_FIXED_RESOURCE(label, offset, num, turnon_delay) { \
8e6de4a3
B
666 .base = offset, \
667 .id = num, \
668 .delay = turnon_delay, \
8e6de4a3
B
669 .desc = { \
670 .name = #label, \
671 .id = TWL6030_REG_##label, \
672 .ops = &twl6030_fixed_resource, \
673 .type = REGULATOR_VOLTAGE, \
674 .owner = THIS_MODULE, \
675 }, \
676 }
677
fa16a5c1
DB
678/*
679 * We list regulators here if systems need some level of
680 * software control over them after boot.
681 */
c4aa6f31 682static struct twlreg_info twl_regs[] = {
045f972f
JKS
683 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
684 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
685 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
686 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
687 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
688 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
689 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
690 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
691 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
692 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
693 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
694 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
695 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
696 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
697 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
698 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
699 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
700 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
701 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
702 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
fa16a5c1 703 /* VUSBCP is managed *only* by the USB subchip */
441a4505
RN
704
705 /* 6030 REG with base as PMC Slave Misc : 0x0030 */
045f972f
JKS
706 /* Turnon-delay and remap configuration values for 6030 are not
707 verified since the specification is not public */
776dc923
SH
708 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300, 1),
709 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300, 2),
710 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300, 3),
711 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300, 4),
712 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300, 5),
713 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300, 7),
714 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0),
715 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0),
716 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0),
717 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0),
718 TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 48, 0),
fa16a5c1
DB
719};
720
24c29020 721static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1
DB
722{
723 int i;
724 struct twlreg_info *info;
725 struct regulator_init_data *initdata;
726 struct regulation_constraints *c;
727 struct regulator_dev *rdev;
fa16a5c1 728
c4aa6f31
RN
729 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
730 if (twl_regs[i].desc.id != pdev->id)
fa16a5c1 731 continue;
c4aa6f31 732 info = twl_regs + i;
fa16a5c1
DB
733 break;
734 }
735 if (!info)
736 return -ENODEV;
737
738 initdata = pdev->dev.platform_data;
739 if (!initdata)
740 return -EINVAL;
741
742 /* Constrain board-specific capabilities according to what
743 * this driver and the chip itself can actually do.
744 */
745 c = &initdata->constraints;
fa16a5c1
DB
746 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
747 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
748 | REGULATOR_CHANGE_MODE
749 | REGULATOR_CHANGE_STATUS;
205e5cd3
JKS
750 switch (pdev->id) {
751 case TWL4030_REG_VIO:
752 case TWL4030_REG_VDD1:
753 case TWL4030_REG_VDD2:
754 case TWL4030_REG_VPLL1:
755 case TWL4030_REG_VINTANA1:
756 case TWL4030_REG_VINTANA2:
757 case TWL4030_REG_VINTDIG:
758 c->always_on = true;
759 break;
760 default:
761 break;
762 }
fa16a5c1
DB
763
764 rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
765 if (IS_ERR(rdev)) {
766 dev_err(&pdev->dev, "can't register %s, %ld\n",
767 info->desc.name, PTR_ERR(rdev));
768 return PTR_ERR(rdev);
769 }
770 platform_set_drvdata(pdev, rdev);
771
776dc923
SH
772 if (twl_class_is_4030())
773 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
774 info->remap);
775
fa16a5c1
DB
776 /* NOTE: many regulators support short-circuit IRQs (presentable
777 * as REGULATOR_OVER_CURRENT notifications?) configured via:
778 * - SC_CONFIG
779 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
780 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
781 * - IT_CONFIG
782 */
783
784 return 0;
785}
786
c4aa6f31 787static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
788{
789 regulator_unregister(platform_get_drvdata(pdev));
790 return 0;
791}
792
c4aa6f31 793MODULE_ALIAS("platform:twl_reg");
fa16a5c1 794
c4aa6f31
RN
795static struct platform_driver twlreg_driver = {
796 .probe = twlreg_probe,
797 .remove = __devexit_p(twlreg_remove),
fa16a5c1 798 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 799 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 800 */
c4aa6f31 801 .driver.name = "twl_reg",
fa16a5c1
DB
802 .driver.owner = THIS_MODULE,
803};
804
c4aa6f31 805static int __init twlreg_init(void)
fa16a5c1 806{
c4aa6f31 807 return platform_driver_register(&twlreg_driver);
fa16a5c1 808}
c4aa6f31 809subsys_initcall(twlreg_init);
fa16a5c1 810
c4aa6f31 811static void __exit twlreg_exit(void)
fa16a5c1 812{
c4aa6f31 813 platform_driver_unregister(&twlreg_driver);
fa16a5c1 814}
c4aa6f31 815module_exit(twlreg_exit)
fa16a5c1 816
c4aa6f31 817MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 818MODULE_LICENSE("GPL");
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