regulator: twl-regulator: Implement enable_time callback
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
53b8a9d9 15#include <linux/delay.h>
fa16a5c1 16#include <linux/platform_device.h>
2098e95c
RN
17#include <linux/of.h>
18#include <linux/of_device.h>
fa16a5c1
DB
19#include <linux/regulator/driver.h>
20#include <linux/regulator/machine.h>
2098e95c 21#include <linux/regulator/of_regulator.h>
b07682b6 22#include <linux/i2c/twl.h>
fa16a5c1
DB
23
24
25/*
c4aa6f31 26 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
27 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
28 * include an audio codec, battery charger, and more voltage regulators.
29 * These chips are often used in OMAP-based systems.
30 *
31 * This driver implements software-based resource control for various
32 * voltage regulators. This is usually augmented with state machine
33 * based control.
34 */
35
36struct twlreg_info {
37 /* start of regulator's PM_RECEIVER control register bank */
38 u8 base;
39
c4aa6f31 40 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
41 u8 id;
42
43 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
44 u8 table_len;
45 const u16 *table;
46
045f972f
JKS
47 /* regulator specific turn-on delay */
48 u16 delay;
49
50 /* State REMAP default configuration */
51 u8 remap;
52
fa16a5c1
DB
53 /* chip constraints on regulator behavior */
54 u16 min_mV;
3e3d3be7 55 u16 max_mV;
fa16a5c1 56
4d94aee5
GG
57 u8 flags;
58
fa16a5c1
DB
59 /* used by regulator core */
60 struct regulator_desc desc;
4d94aee5
GG
61
62 /* chip specific features */
63 unsigned long features;
63bfff4e
TK
64
65 /*
66 * optional override functions for voltage set/get
67 * these are currently only used for SMPS regulators
68 */
69 int (*get_voltage)(void *data);
70 int (*set_voltage)(void *data, int target_uV);
71
72 /* data passed from board for external get/set voltage */
73 void *data;
fa16a5c1
DB
74};
75
76
77/* LDO control registers ... offset is from the base of its register bank.
78 * The first three registers of all power resource banks help hardware to
79 * manage the various resource groups.
80 */
441a4505 81/* Common offset in TWL4030/6030 */
fa16a5c1 82#define VREG_GRP 0
441a4505 83/* TWL4030 register offsets */
fa16a5c1
DB
84#define VREG_TYPE 1
85#define VREG_REMAP 2
86#define VREG_DEDICATED 3 /* LDO control */
ba305e31 87#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
88/* TWL6030 register offsets */
89#define VREG_TRANS 1
90#define VREG_STATE 2
91#define VREG_VOLTAGE 3
4d94aee5 92#define VREG_VOLTAGE_SMPS 4
441a4505
RN
93/* TWL6030 Misc register offsets */
94#define VREG_BC_ALL 1
95#define VREG_BC_REF 2
96#define VREG_BC_PROC 3
97#define VREG_BC_CLK_RST 4
fa16a5c1 98
21657ebf
SH
99/* TWL6030 LDO register values for CFG_STATE */
100#define TWL6030_CFG_STATE_OFF 0x00
101#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
102#define TWL6030_CFG_STATE_OFF2 0x02
103#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 104#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
105#define TWL6030_CFG_STATE_APP_SHIFT 2
106#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
107#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
108 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 109
4d94aee5
GG
110/* Flags for SMPS Voltage reading */
111#define SMPS_OFFSET_EN BIT(0)
112#define SMPS_EXTENDED_EN BIT(1)
113
114/* twl6025 SMPS EPROM values */
115#define TWL6030_SMPS_OFFSET 0xB0
116#define TWL6030_SMPS_MULT 0xB3
117#define SMPS_MULTOFFSET_SMPS4 BIT(0)
118#define SMPS_MULTOFFSET_VIO BIT(1)
119#define SMPS_MULTOFFSET_SMPS3 BIT(6)
120
fa16a5c1 121static inline int
441a4505 122twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
123{
124 u8 value;
125 int status;
126
441a4505 127 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
128 &value, info->base + offset);
129 return (status < 0) ? status : value;
130}
131
132static inline int
441a4505
RN
133twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
134 u8 value)
fa16a5c1 135{
441a4505 136 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
137 value, info->base + offset);
138}
139
140/*----------------------------------------------------------------------*/
141
142/* generic power resource operations, which work on all regulators */
143
c4aa6f31 144static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 145{
441a4505
RN
146 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
147 VREG_GRP);
fa16a5c1
DB
148}
149
150/*
151 * Enable/disable regulators by joining/leaving the P1 (processor) group.
152 * We assume nobody else is updating the DEV_GRP registers.
153 */
441a4505
RN
154/* definition for 4030 family */
155#define P3_GRP_4030 BIT(7) /* "peripherals" */
156#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
157#define P1_GRP_4030 BIT(5) /* CPU/Linux */
158/* definition for 6030 family */
159#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
160#define P2_GRP_6030 BIT(1) /* "peripherals" */
161#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 162
b2456779 163static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 164{
c4aa6f31 165 int state = twlreg_grp(rdev);
fa16a5c1
DB
166
167 if (state < 0)
168 return state;
169
b2456779
SH
170 return state & P1_GRP_4030;
171}
172
173static int twl6030reg_is_enabled(struct regulator_dev *rdev)
174{
175 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 176 int grp = 0, val;
b2456779 177
4d94aee5
GG
178 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
179 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
b2456779
SH
180 if (grp < 0)
181 return grp;
182
4d94aee5
GG
183 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
184 grp &= P1_GRP_6030;
185 else
186 grp = 1;
b2456779
SH
187
188 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
189 val = TWL6030_CFG_STATE_APP(val);
190
191 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
192}
193
f8c2940b 194static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
195{
196 struct twlreg_info *info = rdev_get_drvdata(rdev);
197 int grp;
53b8a9d9 198 int ret;
fa16a5c1 199
441a4505 200 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
201 if (grp < 0)
202 return grp;
203
f8c2940b 204 grp |= P1_GRP_4030;
441a4505 205
53b8a9d9
JKS
206 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
207
f8c2940b
B
208 return ret;
209}
210
211static int twl6030reg_enable(struct regulator_dev *rdev)
212{
213 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 214 int grp = 0;
f8c2940b
B
215 int ret;
216
4d94aee5
GG
217 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
218 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
f8c2940b
B
219 if (grp < 0)
220 return grp;
221
222 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
223 grp << TWL6030_CFG_STATE_GRP_SHIFT |
224 TWL6030_CFG_STATE_ON);
48c936d6
AL
225 return ret;
226}
21657ebf 227
48c936d6
AL
228static int twl4030reg_enable_time(struct regulator_dev *rdev)
229{
230 struct twlreg_info *info = rdev_get_drvdata(rdev);
53b8a9d9 231
48c936d6
AL
232 return info->delay;
233}
234
235static int twl6030reg_enable_time(struct regulator_dev *rdev)
236{
237 struct twlreg_info *info = rdev_get_drvdata(rdev);
238
239 return info->delay;
fa16a5c1
DB
240}
241
0ff3897d 242static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
243{
244 struct twlreg_info *info = rdev_get_drvdata(rdev);
245 int grp;
21657ebf 246 int ret;
fa16a5c1 247
441a4505 248 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
249 if (grp < 0)
250 return grp;
251
0ff3897d 252 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 253
21657ebf
SH
254 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
255
0ff3897d
B
256 return ret;
257}
258
259static int twl6030reg_disable(struct regulator_dev *rdev)
260{
261 struct twlreg_info *info = rdev_get_drvdata(rdev);
262 int grp = 0;
263 int ret;
264
4d94aee5
GG
265 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
266 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B
267
268 /* For 6030, set the off state for all grps enabled */
269 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
270 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
271 TWL6030_CFG_STATE_OFF);
21657ebf
SH
272
273 return ret;
fa16a5c1
DB
274}
275
9a0244ad 276static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 277{
c4aa6f31 278 int state = twlreg_grp(rdev);
fa16a5c1
DB
279
280 if (state < 0)
281 return state;
282 state &= 0x0f;
283
284 /* assume state != WARM_RESET; we'd not be running... */
285 if (!state)
286 return REGULATOR_STATUS_OFF;
287 return (state & BIT(3))
288 ? REGULATOR_STATUS_NORMAL
289 : REGULATOR_STATUS_STANDBY;
290}
291
9a0244ad
SH
292static int twl6030reg_get_status(struct regulator_dev *rdev)
293{
294 struct twlreg_info *info = rdev_get_drvdata(rdev);
295 int val;
296
297 val = twlreg_grp(rdev);
298 if (val < 0)
299 return val;
300
301 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
302
303 switch (TWL6030_CFG_STATE_APP(val)) {
304 case TWL6030_CFG_STATE_ON:
305 return REGULATOR_STATUS_NORMAL;
306
307 case TWL6030_CFG_STATE_SLEEP:
308 return REGULATOR_STATUS_STANDBY;
309
310 case TWL6030_CFG_STATE_OFF:
311 case TWL6030_CFG_STATE_OFF2:
312 default:
313 break;
314 }
315
316 return REGULATOR_STATUS_OFF;
317}
318
1a39962f 319static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
320{
321 struct twlreg_info *info = rdev_get_drvdata(rdev);
322 unsigned message;
323 int status;
324
325 /* We can only set the mode through state machine commands... */
326 switch (mode) {
327 case REGULATOR_MODE_NORMAL:
328 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
329 break;
330 case REGULATOR_MODE_STANDBY:
331 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
332 break;
333 default:
334 return -EINVAL;
335 }
336
337 /* Ensure the resource is associated with some group */
c4aa6f31 338 status = twlreg_grp(rdev);
fa16a5c1
DB
339 if (status < 0)
340 return status;
441a4505 341 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
342 return -EACCES;
343
c4aa6f31 344 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
345 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
346 if (status < 0)
fa16a5c1
DB
347 return status;
348
c4aa6f31 349 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 350 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
351}
352
1a39962f
SH
353static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
354{
355 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 356 int grp = 0;
1a39962f
SH
357 int val;
358
4d94aee5
GG
359 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
360 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
1a39962f
SH
361
362 if (grp < 0)
363 return grp;
364
365 /* Compose the state register settings */
366 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
367 /* We can only set the mode through state machine commands... */
368 switch (mode) {
369 case REGULATOR_MODE_NORMAL:
370 val |= TWL6030_CFG_STATE_ON;
371 break;
372 case REGULATOR_MODE_STANDBY:
373 val |= TWL6030_CFG_STATE_SLEEP;
374 break;
375
376 default:
377 return -EINVAL;
378 }
379
380 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
381}
382
fa16a5c1
DB
383/*----------------------------------------------------------------------*/
384
385/*
386 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
387 * select field in its control register. We use tables indexed by VSEL
388 * to record voltages in milliVolts. (Accuracy is about three percent.)
389 *
390 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
391 * currently handled by listing two slightly different VAUX2 regulators,
392 * only one of which will be configured.
393 *
394 * VSEL values documented as "TI cannot support these values" are flagged
395 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
396 *
397 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
398 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB
399 */
400#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
401#define UNSUP_MASK 0x0000
402#else
403#define UNSUP_MASK 0x8000
404#endif
405
406#define UNSUP(x) (UNSUP_MASK | (x))
407#define IS_UNSUP(x) (UNSUP_MASK & (x))
408#define LDO_MV(x) (~UNSUP_MASK & (x))
409
410
411static const u16 VAUX1_VSEL_table[] = {
412 UNSUP(1500), UNSUP(1800), 2500, 2800,
413 3000, 3000, 3000, 3000,
414};
415static const u16 VAUX2_4030_VSEL_table[] = {
416 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
417 1500, 1800, UNSUP(1850), 2500,
418 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
419 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
420};
421static const u16 VAUX2_VSEL_table[] = {
422 1700, 1700, 1900, 1300,
423 1500, 1800, 2000, 2500,
424 2100, 2800, 2200, 2300,
425 2400, 2400, 2400, 2400,
426};
427static const u16 VAUX3_VSEL_table[] = {
428 1500, 1800, 2500, 2800,
d6bb69cf 429 3000, 3000, 3000, 3000,
fa16a5c1
DB
430};
431static const u16 VAUX4_VSEL_table[] = {
432 700, 1000, 1200, UNSUP(1300),
433 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
434 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
435 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
436};
437static const u16 VMMC1_VSEL_table[] = {
438 1850, 2850, 3000, 3150,
439};
440static const u16 VMMC2_VSEL_table[] = {
441 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
442 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
443 2600, 2800, 2850, 3000,
444 3150, 3150, 3150, 3150,
445};
446static const u16 VPLL1_VSEL_table[] = {
447 1000, 1200, 1300, 1800,
448 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
449};
450static const u16 VPLL2_VSEL_table[] = {
451 700, 1000, 1200, 1300,
452 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
453 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
454 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
455};
456static const u16 VSIM_VSEL_table[] = {
457 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
458 2800, 3000, 3000, 3000,
459};
460static const u16 VDAC_VSEL_table[] = {
461 1200, 1300, 1800, 1800,
462};
07fc493f
JKS
463static const u16 VDD1_VSEL_table[] = {
464 800, 1450,
465};
466static const u16 VDD2_VSEL_table[] = {
467 800, 1450, 1500,
468};
469static const u16 VIO_VSEL_table[] = {
470 1800, 1850,
471};
472static const u16 VINTANA2_VSEL_table[] = {
473 2500, 2750,
474};
fa16a5c1 475
3e3d3be7 476static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
477{
478 struct twlreg_info *info = rdev_get_drvdata(rdev);
479 int mV = info->table[index];
480
481 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
482}
483
fa16a5c1 484static int
dd16b1f8 485twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
486{
487 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 488
dd16b1f8
AL
489 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
490 selector);
fa16a5c1
DB
491}
492
3e3d3be7 493static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
494{
495 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
496 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
497 VREG_VOLTAGE);
fa16a5c1
DB
498
499 if (vsel < 0)
500 return vsel;
501
502 vsel &= info->table_len - 1;
503 return LDO_MV(info->table[vsel]) * 1000;
504}
505
3e3d3be7
RN
506static struct regulator_ops twl4030ldo_ops = {
507 .list_voltage = twl4030ldo_list_voltage,
66b659e6 508
dd16b1f8 509 .set_voltage_sel = twl4030ldo_set_voltage_sel,
3e3d3be7
RN
510 .get_voltage = twl4030ldo_get_voltage,
511
f8c2940b 512 .enable = twl4030reg_enable,
0ff3897d 513 .disable = twl4030reg_disable,
b2456779 514 .is_enabled = twl4030reg_is_enabled,
48c936d6 515 .enable_time = twl4030reg_enable_time,
3e3d3be7 516
1a39962f 517 .set_mode = twl4030reg_set_mode,
3e3d3be7 518
9a0244ad 519 .get_status = twl4030reg_get_status,
3e3d3be7
RN
520};
521
ba305e31
TK
522static int
523twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
524 unsigned *selector)
525{
526 struct twlreg_info *info = rdev_get_drvdata(rdev);
527 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
528
63bfff4e
TK
529 if (info->set_voltage) {
530 return info->set_voltage(info->data, min_uV);
531 } else {
532 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
533 VREG_VOLTAGE_SMPS_4030, vsel);
534 }
535
ba305e31
TK
536 return 0;
537}
538
539static int twl4030smps_get_voltage(struct regulator_dev *rdev)
540{
541 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
542 int vsel;
543
544 if (info->get_voltage)
545 return info->get_voltage(info->data);
546
547 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
548 VREG_VOLTAGE_SMPS_4030);
549
550 return vsel * 12500 + 600000;
551}
552
553static struct regulator_ops twl4030smps_ops = {
554 .set_voltage = twl4030smps_set_voltage,
555 .get_voltage = twl4030smps_get_voltage,
556};
557
34a38440
TK
558static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
559 int max_uV, unsigned *selector)
560{
561 struct twlreg_info *info = rdev_get_drvdata(rdev);
562
563 if (info->set_voltage)
564 return info->set_voltage(info->data, min_uV);
565
566 return -ENODEV;
567}
568
569static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
570{
571 struct twlreg_info *info = rdev_get_drvdata(rdev);
572
573 if (info->get_voltage)
574 return info->get_voltage(info->data);
575
576 return -ENODEV;
577}
578
579static struct regulator_ops twl6030coresmps_ops = {
580 .set_voltage = twl6030coresmps_set_voltage,
581 .get_voltage = twl6030coresmps_get_voltage,
582};
583
3e3d3be7
RN
584static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
585{
586 struct twlreg_info *info = rdev_get_drvdata(rdev);
587
588 return ((info->min_mV + (index * 100)) * 1000);
589}
590
591static int
3a93f2a9
MB
592twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
593 unsigned *selector)
3e3d3be7
RN
594{
595 struct twlreg_info *info = rdev_get_drvdata(rdev);
596 int vsel;
597
598 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
599 return -EDOM;
600
601 /*
602 * Use the below formula to calculate vsel
603 * mV = 1000mv + 100mv * (vsel - 1)
604 */
605 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 606 *selector = vsel;
3e3d3be7
RN
607 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
608
609}
610
611static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
612{
613 struct twlreg_info *info = rdev_get_drvdata(rdev);
614 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
615 VREG_VOLTAGE);
616
617 if (vsel < 0)
618 return vsel;
619
620 /*
621 * Use the below formula to calculate vsel
622 * mV = 1000mv + 100mv * (vsel - 1)
623 */
624 return (1000 + (100 * (vsel - 1))) * 1000;
625}
626
627static struct regulator_ops twl6030ldo_ops = {
628 .list_voltage = twl6030ldo_list_voltage,
629
630 .set_voltage = twl6030ldo_set_voltage,
631 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 632
f8c2940b 633 .enable = twl6030reg_enable,
0ff3897d 634 .disable = twl6030reg_disable,
b2456779 635 .is_enabled = twl6030reg_is_enabled,
48c936d6 636 .enable_time = twl6030reg_enable_time,
fa16a5c1 637
1a39962f 638 .set_mode = twl6030reg_set_mode,
fa16a5c1 639
9a0244ad 640 .get_status = twl6030reg_get_status,
fa16a5c1
DB
641};
642
643/*----------------------------------------------------------------------*/
644
645/*
646 * Fixed voltage LDOs don't have a VSEL field to update.
647 */
c4aa6f31 648static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
649{
650 struct twlreg_info *info = rdev_get_drvdata(rdev);
651
652 return info->min_mV * 1000;
653}
654
c4aa6f31 655static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
656{
657 struct twlreg_info *info = rdev_get_drvdata(rdev);
658
659 return info->min_mV * 1000;
660}
661
b2456779
SH
662static struct regulator_ops twl4030fixed_ops = {
663 .list_voltage = twlfixed_list_voltage,
664
665 .get_voltage = twlfixed_get_voltage,
666
f8c2940b 667 .enable = twl4030reg_enable,
0ff3897d 668 .disable = twl4030reg_disable,
b2456779 669 .is_enabled = twl4030reg_is_enabled,
48c936d6 670 .enable_time = twl4030reg_enable_time,
b2456779 671
1a39962f 672 .set_mode = twl4030reg_set_mode,
b2456779 673
9a0244ad 674 .get_status = twl4030reg_get_status,
b2456779
SH
675};
676
677static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 678 .list_voltage = twlfixed_list_voltage,
66b659e6 679
c4aa6f31 680 .get_voltage = twlfixed_get_voltage,
fa16a5c1 681
f8c2940b 682 .enable = twl6030reg_enable,
0ff3897d 683 .disable = twl6030reg_disable,
b2456779 684 .is_enabled = twl6030reg_is_enabled,
48c936d6 685 .enable_time = twl6030reg_enable_time,
fa16a5c1 686
1a39962f 687 .set_mode = twl6030reg_set_mode,
fa16a5c1 688
9a0244ad 689 .get_status = twl6030reg_get_status,
fa16a5c1
DB
690};
691
8e6de4a3 692static struct regulator_ops twl6030_fixed_resource = {
f8c2940b 693 .enable = twl6030reg_enable,
0ff3897d 694 .disable = twl6030reg_disable,
b2456779 695 .is_enabled = twl6030reg_is_enabled,
48c936d6 696 .enable_time = twl6030reg_enable_time,
9a0244ad 697 .get_status = twl6030reg_get_status,
8e6de4a3
B
698};
699
4d94aee5
GG
700/*
701 * SMPS status and control
702 */
703
704static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
705{
706 struct twlreg_info *info = rdev_get_drvdata(rdev);
707
708 int voltage = 0;
709
710 switch (info->flags) {
711 case SMPS_OFFSET_EN:
712 voltage = 100000;
713 /* fall through */
714 case 0:
715 switch (index) {
716 case 0:
717 voltage = 0;
718 break;
719 case 58:
720 voltage = 1350 * 1000;
721 break;
722 case 59:
723 voltage = 1500 * 1000;
724 break;
725 case 60:
726 voltage = 1800 * 1000;
727 break;
728 case 61:
729 voltage = 1900 * 1000;
730 break;
731 case 62:
732 voltage = 2100 * 1000;
733 break;
734 default:
735 voltage += (600000 + (12500 * (index - 1)));
736 }
737 break;
738 case SMPS_EXTENDED_EN:
739 switch (index) {
740 case 0:
741 voltage = 0;
742 break;
743 case 58:
744 voltage = 2084 * 1000;
745 break;
746 case 59:
747 voltage = 2315 * 1000;
748 break;
749 case 60:
750 voltage = 2778 * 1000;
751 break;
752 case 61:
753 voltage = 2932 * 1000;
754 break;
755 case 62:
756 voltage = 3241 * 1000;
757 break;
758 default:
759 voltage = (1852000 + (38600 * (index - 1)));
760 }
761 break;
762 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
763 switch (index) {
764 case 0:
765 voltage = 0;
766 break;
767 case 58:
768 voltage = 4167 * 1000;
769 break;
770 case 59:
771 voltage = 2315 * 1000;
772 break;
773 case 60:
774 voltage = 2778 * 1000;
775 break;
776 case 61:
777 voltage = 2932 * 1000;
778 break;
779 case 62:
780 voltage = 3241 * 1000;
781 break;
782 default:
783 voltage = (2161000 + (38600 * (index - 1)));
784 }
785 break;
786 }
787
788 return voltage;
789}
790
791static int
792twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
793 unsigned int *selector)
794{
795 struct twlreg_info *info = rdev_get_drvdata(rdev);
796 int vsel = 0;
797
798 switch (info->flags) {
799 case 0:
800 if (min_uV == 0)
801 vsel = 0;
a33b6e5a
LD
802 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
803 int calc_uV;
268a1641 804 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 805 vsel++;
a33b6e5a
LD
806 calc_uV = twl6030smps_list_voltage(rdev, vsel);
807 if (calc_uV > max_uV)
808 return -EINVAL;
4d94aee5
GG
809 }
810 /* Values 1..57 for vsel are linear and can be calculated
811 * values 58..62 are non linear.
812 */
813 else if ((min_uV > 1900000) && (max_uV >= 2100000))
814 vsel = 62;
815 else if ((min_uV > 1800000) && (max_uV >= 1900000))
816 vsel = 61;
817 else if ((min_uV > 1500000) && (max_uV >= 1800000))
818 vsel = 60;
819 else if ((min_uV > 1350000) && (max_uV >= 1500000))
820 vsel = 59;
821 else if ((min_uV > 1300000) && (max_uV >= 1350000))
822 vsel = 58;
823 else
824 return -EINVAL;
825 break;
826 case SMPS_OFFSET_EN:
827 if (min_uV == 0)
828 vsel = 0;
a33b6e5a
LD
829 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
830 int calc_uV;
268a1641 831 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 832 vsel++;
a33b6e5a
LD
833 calc_uV = twl6030smps_list_voltage(rdev, vsel);
834 if (calc_uV > max_uV)
835 return -EINVAL;
4d94aee5
GG
836 }
837 /* Values 1..57 for vsel are linear and can be calculated
838 * values 58..62 are non linear.
839 */
840 else if ((min_uV > 1900000) && (max_uV >= 2100000))
841 vsel = 62;
842 else if ((min_uV > 1800000) && (max_uV >= 1900000))
843 vsel = 61;
844 else if ((min_uV > 1350000) && (max_uV >= 1800000))
845 vsel = 60;
846 else if ((min_uV > 1350000) && (max_uV >= 1500000))
847 vsel = 59;
848 else if ((min_uV > 1300000) && (max_uV >= 1350000))
849 vsel = 58;
850 else
851 return -EINVAL;
852 break;
853 case SMPS_EXTENDED_EN:
0cb2f123 854 if (min_uV == 0) {
4d94aee5 855 vsel = 0;
0cb2f123 856 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 857 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL
858 vsel++;
859 }
4d94aee5
GG
860 break;
861 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 862 if (min_uV == 0) {
4d94aee5 863 vsel = 0;
0cb2f123 864 } else if ((min_uV >= 2161000) && (max_uV <= 4321000)) {
268a1641 865 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL
866 vsel++;
867 }
4d94aee5
GG
868 break;
869 }
870
871 *selector = vsel;
872
873 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
874 vsel);
875}
876
877static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
878{
879 struct twlreg_info *info = rdev_get_drvdata(rdev);
880
881 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
882}
883
884static struct regulator_ops twlsmps_ops = {
885 .list_voltage = twl6030smps_list_voltage,
886
887 .set_voltage = twl6030smps_set_voltage,
888 .get_voltage_sel = twl6030smps_get_voltage_sel,
889
890 .enable = twl6030reg_enable,
891 .disable = twl6030reg_disable,
892 .is_enabled = twl6030reg_is_enabled,
48c936d6 893 .enable_time = twl6030reg_enable_time,
4d94aee5
GG
894
895 .set_mode = twl6030reg_set_mode,
896
897 .get_status = twl6030reg_get_status,
898};
899
fa16a5c1
DB
900/*----------------------------------------------------------------------*/
901
045f972f
JKS
902#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
903 remap_conf) \
904 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 905 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A
906#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
907 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 908 0x0, TWL6030, twl6030fixed_ops)
045f972f 909
2098e95c
RN
910#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
911static struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
912 .base = offset, \
913 .id = num, \
914 .table_len = ARRAY_SIZE(label##_VSEL_table), \
915 .table = label##_VSEL_table, \
045f972f
JKS
916 .delay = turnon_delay, \
917 .remap = remap_conf, \
fa16a5c1
DB
918 .desc = { \
919 .name = #label, \
3e3d3be7 920 .id = TWL4030_REG_##label, \
66b659e6 921 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
922 .ops = &twl4030ldo_ops, \
923 .type = REGULATOR_VOLTAGE, \
924 .owner = THIS_MODULE, \
925 }, \
926 }
927
ba305e31 928#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
2098e95c 929static struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
930 .base = offset, \
931 .id = num, \
932 .delay = turnon_delay, \
933 .remap = remap_conf, \
934 .desc = { \
935 .name = #label, \
936 .id = TWL4030_REG_##label, \
937 .ops = &twl4030smps_ops, \
938 .type = REGULATOR_VOLTAGE, \
939 .owner = THIS_MODULE, \
940 }, \
941 }
942
2098e95c
RN
943#define TWL6030_ADJUSTABLE_SMPS(label) \
944static struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK
945 .desc = { \
946 .name = #label, \
947 .id = TWL6030_REG_##label, \
948 .ops = &twl6030coresmps_ops, \
949 .type = REGULATOR_VOLTAGE, \
950 .owner = THIS_MODULE, \
951 }, \
952 }
953
2098e95c
RN
954#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
955static struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 956 .base = offset, \
3e3d3be7
RN
957 .min_mV = min_mVolts, \
958 .max_mV = max_mVolts, \
3e3d3be7
RN
959 .desc = { \
960 .name = #label, \
961 .id = TWL6030_REG_##label, \
7736f11d 962 .n_voltages = (max_mVolts - min_mVolts)/100 + 1, \
3e3d3be7 963 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
964 .type = REGULATOR_VOLTAGE, \
965 .owner = THIS_MODULE, \
966 }, \
967 }
968
2098e95c
RN
969#define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
970static struct twlreg_info TWL6025_INFO_##label = { \
4d94aee5 971 .base = offset, \
4d94aee5
GG
972 .min_mV = min_mVolts, \
973 .max_mV = max_mVolts, \
974 .desc = { \
975 .name = #label, \
976 .id = TWL6025_REG_##label, \
977 .n_voltages = ((max_mVolts - min_mVolts)/100) + 1, \
978 .ops = &twl6030ldo_ops, \
979 .type = REGULATOR_VOLTAGE, \
980 .owner = THIS_MODULE, \
981 }, \
982 }
3e3d3be7 983
045f972f 984#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c
RN
985 family, operations) \
986static struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
987 .base = offset, \
988 .id = num, \
989 .min_mV = mVolts, \
045f972f
JKS
990 .delay = turnon_delay, \
991 .remap = remap_conf, \
fa16a5c1
DB
992 .desc = { \
993 .name = #label, \
c4aa6f31 994 .id = family##_REG_##label, \
66b659e6 995 .n_voltages = 1, \
b2456779 996 .ops = &operations, \
fa16a5c1
DB
997 .type = REGULATOR_VOLTAGE, \
998 .owner = THIS_MODULE, \
999 }, \
1000 }
1001
2098e95c
RN
1002#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
1003static struct twlreg_info TWLRES_INFO_##label = { \
8e6de4a3 1004 .base = offset, \
8e6de4a3 1005 .delay = turnon_delay, \
8e6de4a3
B
1006 .desc = { \
1007 .name = #label, \
1008 .id = TWL6030_REG_##label, \
1009 .ops = &twl6030_fixed_resource, \
1010 .type = REGULATOR_VOLTAGE, \
1011 .owner = THIS_MODULE, \
1012 }, \
1013 }
1014
2098e95c
RN
1015#define TWL6025_ADJUSTABLE_SMPS(label, offset) \
1016static struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 1017 .base = offset, \
4d94aee5
GG
1018 .min_mV = 600, \
1019 .max_mV = 2100, \
1020 .desc = { \
1021 .name = #label, \
1022 .id = TWL6025_REG_##label, \
1023 .n_voltages = 63, \
1024 .ops = &twlsmps_ops, \
1025 .type = REGULATOR_VOLTAGE, \
1026 .owner = THIS_MODULE, \
1027 }, \
1028 }
1029
fa16a5c1
DB
1030/*
1031 * We list regulators here if systems need some level of
1032 * software control over them after boot.
1033 */
2098e95c
RN
1034TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
1035TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
1036TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
1037TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
1038TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
1039TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
1040TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
1041TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
1042TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
1043TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
1044TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
1045TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
1046TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
1047TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
1048TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
1049/* VUSBCP is managed *only* by the USB subchip */
1050/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1051/* Turnon-delay and remap configuration values for 6030 are not
1052 verified since the specification is not public */
1053TWL6030_ADJUSTABLE_SMPS(VDD1);
1054TWL6030_ADJUSTABLE_SMPS(VDD2);
1055TWL6030_ADJUSTABLE_SMPS(VDD3);
1056TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1057TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1058TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1059TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1060TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1061TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1062/* 6025 are renamed compared to 6030 versions */
1063TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1064TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1065TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1066TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1067TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1068TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1069TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1070TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1071TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
1072TWL4030_FIXED_LDO(VINTANA2, 0x3f, 1500, 11, 100, 0x08);
1073TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1074TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1075TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1076TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1077TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1078TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1079TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1080TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU
1081TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1082TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
2098e95c
RN
1083TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0);
1084TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34);
1085TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10);
1086TWL6025_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1087
4d94aee5
GG
1088static u8 twl_get_smps_offset(void)
1089{
1090 u8 value;
1091
1092 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1093 TWL6030_SMPS_OFFSET);
1094 return value;
1095}
1096
1097static u8 twl_get_smps_mult(void)
1098{
1099 u8 value;
1100
1101 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1102 TWL6030_SMPS_MULT);
1103 return value;
1104}
1105
2098e95c
RN
1106#define TWL_OF_MATCH(comp, family, label) \
1107 { \
1108 .compatible = comp, \
1109 .data = &family##_INFO_##label, \
1110 }
1111
1112#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1113#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
1114#define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label)
1115#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
1116#define TWLRES_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLRES, label)
1117#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1118
1119static const struct of_device_id twl_of_match[] __devinitconst = {
1120 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1121 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1122 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1123 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1124 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1125 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1126 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1127 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1128 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1129 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1130 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1131 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1132 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1133 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1134 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1135 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1136 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1137 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1138 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1139 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1140 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1141 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1142 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1143 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
1144 TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2),
1145 TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4),
1146 TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3),
1147 TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5),
1148 TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1),
1149 TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7),
1150 TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6),
1151 TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN),
1152 TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB),
1153 TWLFIXED_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1154 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1155 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1156 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1157 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1158 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1159 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1160 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1161 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU
1162 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1163 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
2098e95c
RN
1164 TWLRES_OF_MATCH("ti,twl6030-clk32kg", CLK32KG),
1165 TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3),
1166 TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4),
1167 TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO),
1168 {},
1169};
1170MODULE_DEVICE_TABLE(of, twl_of_match);
1171
24c29020 1172static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1 1173{
2098e95c 1174 int i, id;
fa16a5c1
DB
1175 struct twlreg_info *info;
1176 struct regulator_init_data *initdata;
1177 struct regulation_constraints *c;
1178 struct regulator_dev *rdev;
63bfff4e 1179 struct twl_regulator_driver_data *drvdata;
2098e95c 1180 const struct of_device_id *match;
c172708d 1181 struct regulator_config config = { };
2098e95c
RN
1182
1183 match = of_match_device(twl_of_match, &pdev->dev);
1184 if (match) {
1185 info = match->data;
1186 id = info->desc.id;
1187 initdata = of_get_regulator_init_data(&pdev->dev,
1188 pdev->dev.of_node);
1189 drvdata = NULL;
1190 } else {
1191 id = pdev->id;
1192 initdata = pdev->dev.platform_data;
1193 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1194 info = twl_of_match[i].data;
5ade3935
AL
1195 if (info && info->desc.id == id)
1196 break;
2098e95c 1197 }
5ade3935
AL
1198 if (i == ARRAY_SIZE(twl_of_match))
1199 return -ENODEV;
1200
2098e95c
RN
1201 drvdata = initdata->driver_data;
1202 if (!drvdata)
1203 return -EINVAL;
fa16a5c1 1204 }
2098e95c 1205
fa16a5c1
DB
1206 if (!info)
1207 return -ENODEV;
1208
fa16a5c1
DB
1209 if (!initdata)
1210 return -EINVAL;
1211
2098e95c
RN
1212 if (drvdata) {
1213 /* copy the driver data into regulator data */
1214 info->features = drvdata->features;
1215 info->data = drvdata->data;
1216 info->set_voltage = drvdata->set_voltage;
1217 info->get_voltage = drvdata->get_voltage;
1218 }
4d94aee5 1219
fa16a5c1
DB
1220 /* Constrain board-specific capabilities according to what
1221 * this driver and the chip itself can actually do.
1222 */
1223 c = &initdata->constraints;
fa16a5c1
DB
1224 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1225 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1226 | REGULATOR_CHANGE_MODE
1227 | REGULATOR_CHANGE_STATUS;
2098e95c 1228 switch (id) {
205e5cd3
JKS
1229 case TWL4030_REG_VIO:
1230 case TWL4030_REG_VDD1:
1231 case TWL4030_REG_VDD2:
1232 case TWL4030_REG_VPLL1:
1233 case TWL4030_REG_VINTANA1:
1234 case TWL4030_REG_VINTANA2:
1235 case TWL4030_REG_VINTDIG:
1236 c->always_on = true;
1237 break;
1238 default:
1239 break;
1240 }
fa16a5c1 1241
2098e95c 1242 switch (id) {
4d94aee5
GG
1243 case TWL6025_REG_SMPS3:
1244 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1245 info->flags |= SMPS_EXTENDED_EN;
1246 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1247 info->flags |= SMPS_OFFSET_EN;
1248 break;
1249 case TWL6025_REG_SMPS4:
1250 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1251 info->flags |= SMPS_EXTENDED_EN;
1252 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1253 info->flags |= SMPS_OFFSET_EN;
1254 break;
1255 case TWL6025_REG_VIO:
1256 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1257 info->flags |= SMPS_EXTENDED_EN;
1258 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1259 info->flags |= SMPS_OFFSET_EN;
1260 break;
1261 }
1262
c172708d
MB
1263 config.dev = &pdev->dev;
1264 config.init_data = initdata;
1265 config.driver_data = info;
1266 config.of_node = pdev->dev.of_node;
1267
1268 rdev = regulator_register(&info->desc, &config);
fa16a5c1
DB
1269 if (IS_ERR(rdev)) {
1270 dev_err(&pdev->dev, "can't register %s, %ld\n",
1271 info->desc.name, PTR_ERR(rdev));
1272 return PTR_ERR(rdev);
1273 }
1274 platform_set_drvdata(pdev, rdev);
1275
776dc923
SH
1276 if (twl_class_is_4030())
1277 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
1278 info->remap);
1279
fa16a5c1
DB
1280 /* NOTE: many regulators support short-circuit IRQs (presentable
1281 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1282 * - SC_CONFIG
1283 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1284 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1285 * - IT_CONFIG
1286 */
1287
1288 return 0;
1289}
1290
c4aa6f31 1291static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
1292{
1293 regulator_unregister(platform_get_drvdata(pdev));
1294 return 0;
1295}
1296
c4aa6f31 1297MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1298
c4aa6f31
RN
1299static struct platform_driver twlreg_driver = {
1300 .probe = twlreg_probe,
1301 .remove = __devexit_p(twlreg_remove),
fa16a5c1 1302 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1303 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1304 */
2098e95c
RN
1305 .driver = {
1306 .name = "twl_reg",
1307 .owner = THIS_MODULE,
1308 .of_match_table = of_match_ptr(twl_of_match),
1309 },
fa16a5c1
DB
1310};
1311
c4aa6f31 1312static int __init twlreg_init(void)
fa16a5c1 1313{
c4aa6f31 1314 return platform_driver_register(&twlreg_driver);
fa16a5c1 1315}
c4aa6f31 1316subsys_initcall(twlreg_init);
fa16a5c1 1317
c4aa6f31 1318static void __exit twlreg_exit(void)
fa16a5c1 1319{
c4aa6f31 1320 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1321}
c4aa6f31 1322module_exit(twlreg_exit)
fa16a5c1 1323
c4aa6f31 1324MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1325MODULE_LICENSE("GPL");
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