regulator: twl-regulator: Simplify the code matching regulator id
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
53b8a9d9 15#include <linux/delay.h>
fa16a5c1 16#include <linux/platform_device.h>
2098e95c
RN
17#include <linux/of.h>
18#include <linux/of_device.h>
fa16a5c1
DB
19#include <linux/regulator/driver.h>
20#include <linux/regulator/machine.h>
2098e95c 21#include <linux/regulator/of_regulator.h>
b07682b6 22#include <linux/i2c/twl.h>
fa16a5c1
DB
23
24
25/*
c4aa6f31 26 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
27 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
28 * include an audio codec, battery charger, and more voltage regulators.
29 * These chips are often used in OMAP-based systems.
30 *
31 * This driver implements software-based resource control for various
32 * voltage regulators. This is usually augmented with state machine
33 * based control.
34 */
35
36struct twlreg_info {
37 /* start of regulator's PM_RECEIVER control register bank */
38 u8 base;
39
c4aa6f31 40 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
41 u8 id;
42
43 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
44 u8 table_len;
45 const u16 *table;
46
045f972f
JKS
47 /* regulator specific turn-on delay */
48 u16 delay;
49
50 /* State REMAP default configuration */
51 u8 remap;
52
fa16a5c1
DB
53 /* chip constraints on regulator behavior */
54 u16 min_mV;
3e3d3be7 55 u16 max_mV;
fa16a5c1 56
4d94aee5
GG
57 u8 flags;
58
fa16a5c1
DB
59 /* used by regulator core */
60 struct regulator_desc desc;
4d94aee5
GG
61
62 /* chip specific features */
63 unsigned long features;
63bfff4e
TK
64
65 /*
66 * optional override functions for voltage set/get
67 * these are currently only used for SMPS regulators
68 */
69 int (*get_voltage)(void *data);
70 int (*set_voltage)(void *data, int target_uV);
71
72 /* data passed from board for external get/set voltage */
73 void *data;
fa16a5c1
DB
74};
75
76
77/* LDO control registers ... offset is from the base of its register bank.
78 * The first three registers of all power resource banks help hardware to
79 * manage the various resource groups.
80 */
441a4505 81/* Common offset in TWL4030/6030 */
fa16a5c1 82#define VREG_GRP 0
441a4505 83/* TWL4030 register offsets */
fa16a5c1
DB
84#define VREG_TYPE 1
85#define VREG_REMAP 2
86#define VREG_DEDICATED 3 /* LDO control */
ba305e31 87#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
88/* TWL6030 register offsets */
89#define VREG_TRANS 1
90#define VREG_STATE 2
91#define VREG_VOLTAGE 3
4d94aee5 92#define VREG_VOLTAGE_SMPS 4
441a4505
RN
93/* TWL6030 Misc register offsets */
94#define VREG_BC_ALL 1
95#define VREG_BC_REF 2
96#define VREG_BC_PROC 3
97#define VREG_BC_CLK_RST 4
fa16a5c1 98
21657ebf
SH
99/* TWL6030 LDO register values for CFG_STATE */
100#define TWL6030_CFG_STATE_OFF 0x00
101#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
102#define TWL6030_CFG_STATE_OFF2 0x02
103#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 104#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
105#define TWL6030_CFG_STATE_APP_SHIFT 2
106#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
107#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
108 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 109
4d94aee5
GG
110/* Flags for SMPS Voltage reading */
111#define SMPS_OFFSET_EN BIT(0)
112#define SMPS_EXTENDED_EN BIT(1)
113
114/* twl6025 SMPS EPROM values */
115#define TWL6030_SMPS_OFFSET 0xB0
116#define TWL6030_SMPS_MULT 0xB3
117#define SMPS_MULTOFFSET_SMPS4 BIT(0)
118#define SMPS_MULTOFFSET_VIO BIT(1)
119#define SMPS_MULTOFFSET_SMPS3 BIT(6)
120
fa16a5c1 121static inline int
441a4505 122twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
123{
124 u8 value;
125 int status;
126
441a4505 127 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
128 &value, info->base + offset);
129 return (status < 0) ? status : value;
130}
131
132static inline int
441a4505
RN
133twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
134 u8 value)
fa16a5c1 135{
441a4505 136 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
137 value, info->base + offset);
138}
139
140/*----------------------------------------------------------------------*/
141
142/* generic power resource operations, which work on all regulators */
143
c4aa6f31 144static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 145{
441a4505
RN
146 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
147 VREG_GRP);
fa16a5c1
DB
148}
149
150/*
151 * Enable/disable regulators by joining/leaving the P1 (processor) group.
152 * We assume nobody else is updating the DEV_GRP registers.
153 */
441a4505
RN
154/* definition for 4030 family */
155#define P3_GRP_4030 BIT(7) /* "peripherals" */
156#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
157#define P1_GRP_4030 BIT(5) /* CPU/Linux */
158/* definition for 6030 family */
159#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
160#define P2_GRP_6030 BIT(1) /* "peripherals" */
161#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 162
b2456779 163static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 164{
c4aa6f31 165 int state = twlreg_grp(rdev);
fa16a5c1
DB
166
167 if (state < 0)
168 return state;
169
b2456779
SH
170 return state & P1_GRP_4030;
171}
172
173static int twl6030reg_is_enabled(struct regulator_dev *rdev)
174{
175 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 176 int grp = 0, val;
b2456779 177
4d94aee5
GG
178 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
179 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
b2456779
SH
180 if (grp < 0)
181 return grp;
182
4d94aee5
GG
183 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
184 grp &= P1_GRP_6030;
185 else
186 grp = 1;
b2456779
SH
187
188 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
189 val = TWL6030_CFG_STATE_APP(val);
190
191 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
192}
193
f8c2940b 194static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
195{
196 struct twlreg_info *info = rdev_get_drvdata(rdev);
197 int grp;
53b8a9d9 198 int ret;
fa16a5c1 199
441a4505 200 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
201 if (grp < 0)
202 return grp;
203
f8c2940b 204 grp |= P1_GRP_4030;
441a4505 205
53b8a9d9
JKS
206 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
207
f8c2940b
B
208 udelay(info->delay);
209
210 return ret;
211}
212
213static int twl6030reg_enable(struct regulator_dev *rdev)
214{
215 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 216 int grp = 0;
f8c2940b
B
217 int ret;
218
4d94aee5
GG
219 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
220 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
f8c2940b
B
221 if (grp < 0)
222 return grp;
223
224 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
225 grp << TWL6030_CFG_STATE_GRP_SHIFT |
226 TWL6030_CFG_STATE_ON);
21657ebf 227
53b8a9d9
JKS
228 udelay(info->delay);
229
230 return ret;
fa16a5c1
DB
231}
232
0ff3897d 233static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
234{
235 struct twlreg_info *info = rdev_get_drvdata(rdev);
236 int grp;
21657ebf 237 int ret;
fa16a5c1 238
441a4505 239 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
240 if (grp < 0)
241 return grp;
242
0ff3897d 243 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 244
21657ebf
SH
245 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
246
0ff3897d
B
247 return ret;
248}
249
250static int twl6030reg_disable(struct regulator_dev *rdev)
251{
252 struct twlreg_info *info = rdev_get_drvdata(rdev);
253 int grp = 0;
254 int ret;
255
4d94aee5
GG
256 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
257 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B
258
259 /* For 6030, set the off state for all grps enabled */
260 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
261 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
262 TWL6030_CFG_STATE_OFF);
21657ebf
SH
263
264 return ret;
fa16a5c1
DB
265}
266
9a0244ad 267static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 268{
c4aa6f31 269 int state = twlreg_grp(rdev);
fa16a5c1
DB
270
271 if (state < 0)
272 return state;
273 state &= 0x0f;
274
275 /* assume state != WARM_RESET; we'd not be running... */
276 if (!state)
277 return REGULATOR_STATUS_OFF;
278 return (state & BIT(3))
279 ? REGULATOR_STATUS_NORMAL
280 : REGULATOR_STATUS_STANDBY;
281}
282
9a0244ad
SH
283static int twl6030reg_get_status(struct regulator_dev *rdev)
284{
285 struct twlreg_info *info = rdev_get_drvdata(rdev);
286 int val;
287
288 val = twlreg_grp(rdev);
289 if (val < 0)
290 return val;
291
292 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
293
294 switch (TWL6030_CFG_STATE_APP(val)) {
295 case TWL6030_CFG_STATE_ON:
296 return REGULATOR_STATUS_NORMAL;
297
298 case TWL6030_CFG_STATE_SLEEP:
299 return REGULATOR_STATUS_STANDBY;
300
301 case TWL6030_CFG_STATE_OFF:
302 case TWL6030_CFG_STATE_OFF2:
303 default:
304 break;
305 }
306
307 return REGULATOR_STATUS_OFF;
308}
309
1a39962f 310static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
311{
312 struct twlreg_info *info = rdev_get_drvdata(rdev);
313 unsigned message;
314 int status;
315
316 /* We can only set the mode through state machine commands... */
317 switch (mode) {
318 case REGULATOR_MODE_NORMAL:
319 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
320 break;
321 case REGULATOR_MODE_STANDBY:
322 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
323 break;
324 default:
325 return -EINVAL;
326 }
327
328 /* Ensure the resource is associated with some group */
c4aa6f31 329 status = twlreg_grp(rdev);
fa16a5c1
DB
330 if (status < 0)
331 return status;
441a4505 332 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
333 return -EACCES;
334
c4aa6f31 335 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
336 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
337 if (status < 0)
fa16a5c1
DB
338 return status;
339
c4aa6f31 340 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 341 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
342}
343
1a39962f
SH
344static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
345{
346 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 347 int grp = 0;
1a39962f
SH
348 int val;
349
4d94aee5
GG
350 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
351 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
1a39962f
SH
352
353 if (grp < 0)
354 return grp;
355
356 /* Compose the state register settings */
357 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
358 /* We can only set the mode through state machine commands... */
359 switch (mode) {
360 case REGULATOR_MODE_NORMAL:
361 val |= TWL6030_CFG_STATE_ON;
362 break;
363 case REGULATOR_MODE_STANDBY:
364 val |= TWL6030_CFG_STATE_SLEEP;
365 break;
366
367 default:
368 return -EINVAL;
369 }
370
371 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
372}
373
fa16a5c1
DB
374/*----------------------------------------------------------------------*/
375
376/*
377 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
378 * select field in its control register. We use tables indexed by VSEL
379 * to record voltages in milliVolts. (Accuracy is about three percent.)
380 *
381 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
382 * currently handled by listing two slightly different VAUX2 regulators,
383 * only one of which will be configured.
384 *
385 * VSEL values documented as "TI cannot support these values" are flagged
386 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
387 *
388 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
389 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB
390 */
391#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
392#define UNSUP_MASK 0x0000
393#else
394#define UNSUP_MASK 0x8000
395#endif
396
397#define UNSUP(x) (UNSUP_MASK | (x))
398#define IS_UNSUP(x) (UNSUP_MASK & (x))
399#define LDO_MV(x) (~UNSUP_MASK & (x))
400
401
402static const u16 VAUX1_VSEL_table[] = {
403 UNSUP(1500), UNSUP(1800), 2500, 2800,
404 3000, 3000, 3000, 3000,
405};
406static const u16 VAUX2_4030_VSEL_table[] = {
407 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
408 1500, 1800, UNSUP(1850), 2500,
409 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
410 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
411};
412static const u16 VAUX2_VSEL_table[] = {
413 1700, 1700, 1900, 1300,
414 1500, 1800, 2000, 2500,
415 2100, 2800, 2200, 2300,
416 2400, 2400, 2400, 2400,
417};
418static const u16 VAUX3_VSEL_table[] = {
419 1500, 1800, 2500, 2800,
d6bb69cf 420 3000, 3000, 3000, 3000,
fa16a5c1
DB
421};
422static const u16 VAUX4_VSEL_table[] = {
423 700, 1000, 1200, UNSUP(1300),
424 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
425 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
426 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
427};
428static const u16 VMMC1_VSEL_table[] = {
429 1850, 2850, 3000, 3150,
430};
431static const u16 VMMC2_VSEL_table[] = {
432 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
433 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
434 2600, 2800, 2850, 3000,
435 3150, 3150, 3150, 3150,
436};
437static const u16 VPLL1_VSEL_table[] = {
438 1000, 1200, 1300, 1800,
439 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
440};
441static const u16 VPLL2_VSEL_table[] = {
442 700, 1000, 1200, 1300,
443 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
444 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
445 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
446};
447static const u16 VSIM_VSEL_table[] = {
448 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
449 2800, 3000, 3000, 3000,
450};
451static const u16 VDAC_VSEL_table[] = {
452 1200, 1300, 1800, 1800,
453};
07fc493f
JKS
454static const u16 VDD1_VSEL_table[] = {
455 800, 1450,
456};
457static const u16 VDD2_VSEL_table[] = {
458 800, 1450, 1500,
459};
460static const u16 VIO_VSEL_table[] = {
461 1800, 1850,
462};
463static const u16 VINTANA2_VSEL_table[] = {
464 2500, 2750,
465};
fa16a5c1 466
3e3d3be7 467static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
468{
469 struct twlreg_info *info = rdev_get_drvdata(rdev);
470 int mV = info->table[index];
471
472 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
473}
474
fa16a5c1 475static int
dd16b1f8 476twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
477{
478 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 479
dd16b1f8
AL
480 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
481 selector);
fa16a5c1
DB
482}
483
3e3d3be7 484static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
485{
486 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
487 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
488 VREG_VOLTAGE);
fa16a5c1
DB
489
490 if (vsel < 0)
491 return vsel;
492
493 vsel &= info->table_len - 1;
494 return LDO_MV(info->table[vsel]) * 1000;
495}
496
3e3d3be7
RN
497static struct regulator_ops twl4030ldo_ops = {
498 .list_voltage = twl4030ldo_list_voltage,
66b659e6 499
dd16b1f8 500 .set_voltage_sel = twl4030ldo_set_voltage_sel,
3e3d3be7
RN
501 .get_voltage = twl4030ldo_get_voltage,
502
f8c2940b 503 .enable = twl4030reg_enable,
0ff3897d 504 .disable = twl4030reg_disable,
b2456779 505 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 506
1a39962f 507 .set_mode = twl4030reg_set_mode,
3e3d3be7 508
9a0244ad 509 .get_status = twl4030reg_get_status,
3e3d3be7
RN
510};
511
ba305e31
TK
512static int
513twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
514 unsigned *selector)
515{
516 struct twlreg_info *info = rdev_get_drvdata(rdev);
517 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
518
63bfff4e
TK
519 if (info->set_voltage) {
520 return info->set_voltage(info->data, min_uV);
521 } else {
522 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
523 VREG_VOLTAGE_SMPS_4030, vsel);
524 }
525
ba305e31
TK
526 return 0;
527}
528
529static int twl4030smps_get_voltage(struct regulator_dev *rdev)
530{
531 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
532 int vsel;
533
534 if (info->get_voltage)
535 return info->get_voltage(info->data);
536
537 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
538 VREG_VOLTAGE_SMPS_4030);
539
540 return vsel * 12500 + 600000;
541}
542
543static struct regulator_ops twl4030smps_ops = {
544 .set_voltage = twl4030smps_set_voltage,
545 .get_voltage = twl4030smps_get_voltage,
546};
547
34a38440
TK
548static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
549 int max_uV, unsigned *selector)
550{
551 struct twlreg_info *info = rdev_get_drvdata(rdev);
552
553 if (info->set_voltage)
554 return info->set_voltage(info->data, min_uV);
555
556 return -ENODEV;
557}
558
559static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
560{
561 struct twlreg_info *info = rdev_get_drvdata(rdev);
562
563 if (info->get_voltage)
564 return info->get_voltage(info->data);
565
566 return -ENODEV;
567}
568
569static struct regulator_ops twl6030coresmps_ops = {
570 .set_voltage = twl6030coresmps_set_voltage,
571 .get_voltage = twl6030coresmps_get_voltage,
572};
573
3e3d3be7
RN
574static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
575{
576 struct twlreg_info *info = rdev_get_drvdata(rdev);
577
578 return ((info->min_mV + (index * 100)) * 1000);
579}
580
581static int
3a93f2a9
MB
582twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
583 unsigned *selector)
3e3d3be7
RN
584{
585 struct twlreg_info *info = rdev_get_drvdata(rdev);
586 int vsel;
587
588 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
589 return -EDOM;
590
591 /*
592 * Use the below formula to calculate vsel
593 * mV = 1000mv + 100mv * (vsel - 1)
594 */
595 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 596 *selector = vsel;
3e3d3be7
RN
597 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
598
599}
600
601static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
602{
603 struct twlreg_info *info = rdev_get_drvdata(rdev);
604 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
605 VREG_VOLTAGE);
606
607 if (vsel < 0)
608 return vsel;
609
610 /*
611 * Use the below formula to calculate vsel
612 * mV = 1000mv + 100mv * (vsel - 1)
613 */
614 return (1000 + (100 * (vsel - 1))) * 1000;
615}
616
617static struct regulator_ops twl6030ldo_ops = {
618 .list_voltage = twl6030ldo_list_voltage,
619
620 .set_voltage = twl6030ldo_set_voltage,
621 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 622
f8c2940b 623 .enable = twl6030reg_enable,
0ff3897d 624 .disable = twl6030reg_disable,
b2456779 625 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 626
1a39962f 627 .set_mode = twl6030reg_set_mode,
fa16a5c1 628
9a0244ad 629 .get_status = twl6030reg_get_status,
fa16a5c1
DB
630};
631
632/*----------------------------------------------------------------------*/
633
634/*
635 * Fixed voltage LDOs don't have a VSEL field to update.
636 */
c4aa6f31 637static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
638{
639 struct twlreg_info *info = rdev_get_drvdata(rdev);
640
641 return info->min_mV * 1000;
642}
643
c4aa6f31 644static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
645{
646 struct twlreg_info *info = rdev_get_drvdata(rdev);
647
648 return info->min_mV * 1000;
649}
650
b2456779
SH
651static struct regulator_ops twl4030fixed_ops = {
652 .list_voltage = twlfixed_list_voltage,
653
654 .get_voltage = twlfixed_get_voltage,
655
f8c2940b 656 .enable = twl4030reg_enable,
0ff3897d 657 .disable = twl4030reg_disable,
b2456779
SH
658 .is_enabled = twl4030reg_is_enabled,
659
1a39962f 660 .set_mode = twl4030reg_set_mode,
b2456779 661
9a0244ad 662 .get_status = twl4030reg_get_status,
b2456779
SH
663};
664
665static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 666 .list_voltage = twlfixed_list_voltage,
66b659e6 667
c4aa6f31 668 .get_voltage = twlfixed_get_voltage,
fa16a5c1 669
f8c2940b 670 .enable = twl6030reg_enable,
0ff3897d 671 .disable = twl6030reg_disable,
b2456779 672 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 673
1a39962f 674 .set_mode = twl6030reg_set_mode,
fa16a5c1 675
9a0244ad 676 .get_status = twl6030reg_get_status,
fa16a5c1
DB
677};
678
8e6de4a3 679static struct regulator_ops twl6030_fixed_resource = {
f8c2940b 680 .enable = twl6030reg_enable,
0ff3897d 681 .disable = twl6030reg_disable,
b2456779 682 .is_enabled = twl6030reg_is_enabled,
9a0244ad 683 .get_status = twl6030reg_get_status,
8e6de4a3
B
684};
685
4d94aee5
GG
686/*
687 * SMPS status and control
688 */
689
690static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
691{
692 struct twlreg_info *info = rdev_get_drvdata(rdev);
693
694 int voltage = 0;
695
696 switch (info->flags) {
697 case SMPS_OFFSET_EN:
698 voltage = 100000;
699 /* fall through */
700 case 0:
701 switch (index) {
702 case 0:
703 voltage = 0;
704 break;
705 case 58:
706 voltage = 1350 * 1000;
707 break;
708 case 59:
709 voltage = 1500 * 1000;
710 break;
711 case 60:
712 voltage = 1800 * 1000;
713 break;
714 case 61:
715 voltage = 1900 * 1000;
716 break;
717 case 62:
718 voltage = 2100 * 1000;
719 break;
720 default:
721 voltage += (600000 + (12500 * (index - 1)));
722 }
723 break;
724 case SMPS_EXTENDED_EN:
725 switch (index) {
726 case 0:
727 voltage = 0;
728 break;
729 case 58:
730 voltage = 2084 * 1000;
731 break;
732 case 59:
733 voltage = 2315 * 1000;
734 break;
735 case 60:
736 voltage = 2778 * 1000;
737 break;
738 case 61:
739 voltage = 2932 * 1000;
740 break;
741 case 62:
742 voltage = 3241 * 1000;
743 break;
744 default:
745 voltage = (1852000 + (38600 * (index - 1)));
746 }
747 break;
748 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
749 switch (index) {
750 case 0:
751 voltage = 0;
752 break;
753 case 58:
754 voltage = 4167 * 1000;
755 break;
756 case 59:
757 voltage = 2315 * 1000;
758 break;
759 case 60:
760 voltage = 2778 * 1000;
761 break;
762 case 61:
763 voltage = 2932 * 1000;
764 break;
765 case 62:
766 voltage = 3241 * 1000;
767 break;
768 default:
769 voltage = (2161000 + (38600 * (index - 1)));
770 }
771 break;
772 }
773
774 return voltage;
775}
776
777static int
778twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
779 unsigned int *selector)
780{
781 struct twlreg_info *info = rdev_get_drvdata(rdev);
782 int vsel = 0;
783
784 switch (info->flags) {
785 case 0:
786 if (min_uV == 0)
787 vsel = 0;
a33b6e5a
LD
788 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
789 int calc_uV;
4d94aee5
GG
790 vsel = (min_uV - 600000) / 125;
791 if (vsel % 100)
792 vsel += 100;
793 vsel /= 100;
794 vsel++;
a33b6e5a
LD
795 calc_uV = twl6030smps_list_voltage(rdev, vsel);
796 if (calc_uV > max_uV)
797 return -EINVAL;
4d94aee5
GG
798 }
799 /* Values 1..57 for vsel are linear and can be calculated
800 * values 58..62 are non linear.
801 */
802 else if ((min_uV > 1900000) && (max_uV >= 2100000))
803 vsel = 62;
804 else if ((min_uV > 1800000) && (max_uV >= 1900000))
805 vsel = 61;
806 else if ((min_uV > 1500000) && (max_uV >= 1800000))
807 vsel = 60;
808 else if ((min_uV > 1350000) && (max_uV >= 1500000))
809 vsel = 59;
810 else if ((min_uV > 1300000) && (max_uV >= 1350000))
811 vsel = 58;
812 else
813 return -EINVAL;
814 break;
815 case SMPS_OFFSET_EN:
816 if (min_uV == 0)
817 vsel = 0;
a33b6e5a
LD
818 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
819 int calc_uV;
4d94aee5
GG
820 vsel = (min_uV - 700000) / 125;
821 if (vsel % 100)
822 vsel += 100;
823 vsel /= 100;
824 vsel++;
a33b6e5a
LD
825 calc_uV = twl6030smps_list_voltage(rdev, vsel);
826 if (calc_uV > max_uV)
827 return -EINVAL;
4d94aee5
GG
828 }
829 /* Values 1..57 for vsel are linear and can be calculated
830 * values 58..62 are non linear.
831 */
832 else if ((min_uV > 1900000) && (max_uV >= 2100000))
833 vsel = 62;
834 else if ((min_uV > 1800000) && (max_uV >= 1900000))
835 vsel = 61;
836 else if ((min_uV > 1350000) && (max_uV >= 1800000))
837 vsel = 60;
838 else if ((min_uV > 1350000) && (max_uV >= 1500000))
839 vsel = 59;
840 else if ((min_uV > 1300000) && (max_uV >= 1350000))
841 vsel = 58;
842 else
843 return -EINVAL;
844 break;
845 case SMPS_EXTENDED_EN:
846 if (min_uV == 0)
847 vsel = 0;
848 else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
849 vsel = (min_uV - 1852000) / 386;
850 if (vsel % 100)
851 vsel += 100;
852 vsel /= 100;
853 vsel++;
854 }
855 break;
856 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
857 if (min_uV == 0)
858 vsel = 0;
859 else if ((min_uV >= 2161000) && (max_uV <= 4321000)) {
a33b6e5a 860 vsel = (min_uV - 2161000) / 386;
4d94aee5
GG
861 if (vsel % 100)
862 vsel += 100;
863 vsel /= 100;
864 vsel++;
865 }
866 break;
867 }
868
869 *selector = vsel;
870
871 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
872 vsel);
873}
874
875static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
876{
877 struct twlreg_info *info = rdev_get_drvdata(rdev);
878
879 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
880}
881
882static struct regulator_ops twlsmps_ops = {
883 .list_voltage = twl6030smps_list_voltage,
884
885 .set_voltage = twl6030smps_set_voltage,
886 .get_voltage_sel = twl6030smps_get_voltage_sel,
887
888 .enable = twl6030reg_enable,
889 .disable = twl6030reg_disable,
890 .is_enabled = twl6030reg_is_enabled,
891
892 .set_mode = twl6030reg_set_mode,
893
894 .get_status = twl6030reg_get_status,
895};
896
fa16a5c1
DB
897/*----------------------------------------------------------------------*/
898
045f972f
JKS
899#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
900 remap_conf) \
901 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 902 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A
903#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
904 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 905 0x0, TWL6030, twl6030fixed_ops)
045f972f 906
2098e95c
RN
907#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
908static struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
909 .base = offset, \
910 .id = num, \
911 .table_len = ARRAY_SIZE(label##_VSEL_table), \
912 .table = label##_VSEL_table, \
045f972f
JKS
913 .delay = turnon_delay, \
914 .remap = remap_conf, \
fa16a5c1
DB
915 .desc = { \
916 .name = #label, \
3e3d3be7 917 .id = TWL4030_REG_##label, \
66b659e6 918 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
919 .ops = &twl4030ldo_ops, \
920 .type = REGULATOR_VOLTAGE, \
921 .owner = THIS_MODULE, \
922 }, \
923 }
924
ba305e31 925#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
2098e95c 926static struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
927 .base = offset, \
928 .id = num, \
929 .delay = turnon_delay, \
930 .remap = remap_conf, \
931 .desc = { \
932 .name = #label, \
933 .id = TWL4030_REG_##label, \
934 .ops = &twl4030smps_ops, \
935 .type = REGULATOR_VOLTAGE, \
936 .owner = THIS_MODULE, \
937 }, \
938 }
939
2098e95c
RN
940#define TWL6030_ADJUSTABLE_SMPS(label) \
941static struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK
942 .desc = { \
943 .name = #label, \
944 .id = TWL6030_REG_##label, \
945 .ops = &twl6030coresmps_ops, \
946 .type = REGULATOR_VOLTAGE, \
947 .owner = THIS_MODULE, \
948 }, \
949 }
950
2098e95c
RN
951#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
952static struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 953 .base = offset, \
3e3d3be7
RN
954 .min_mV = min_mVolts, \
955 .max_mV = max_mVolts, \
3e3d3be7
RN
956 .desc = { \
957 .name = #label, \
958 .id = TWL6030_REG_##label, \
7736f11d 959 .n_voltages = (max_mVolts - min_mVolts)/100 + 1, \
3e3d3be7 960 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
961 .type = REGULATOR_VOLTAGE, \
962 .owner = THIS_MODULE, \
963 }, \
964 }
965
2098e95c
RN
966#define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
967static struct twlreg_info TWL6025_INFO_##label = { \
4d94aee5 968 .base = offset, \
4d94aee5
GG
969 .min_mV = min_mVolts, \
970 .max_mV = max_mVolts, \
971 .desc = { \
972 .name = #label, \
973 .id = TWL6025_REG_##label, \
974 .n_voltages = ((max_mVolts - min_mVolts)/100) + 1, \
975 .ops = &twl6030ldo_ops, \
976 .type = REGULATOR_VOLTAGE, \
977 .owner = THIS_MODULE, \
978 }, \
979 }
3e3d3be7 980
045f972f 981#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c
RN
982 family, operations) \
983static struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
984 .base = offset, \
985 .id = num, \
986 .min_mV = mVolts, \
045f972f
JKS
987 .delay = turnon_delay, \
988 .remap = remap_conf, \
fa16a5c1
DB
989 .desc = { \
990 .name = #label, \
c4aa6f31 991 .id = family##_REG_##label, \
66b659e6 992 .n_voltages = 1, \
b2456779 993 .ops = &operations, \
fa16a5c1
DB
994 .type = REGULATOR_VOLTAGE, \
995 .owner = THIS_MODULE, \
996 }, \
997 }
998
2098e95c
RN
999#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
1000static struct twlreg_info TWLRES_INFO_##label = { \
8e6de4a3 1001 .base = offset, \
8e6de4a3 1002 .delay = turnon_delay, \
8e6de4a3
B
1003 .desc = { \
1004 .name = #label, \
1005 .id = TWL6030_REG_##label, \
1006 .ops = &twl6030_fixed_resource, \
1007 .type = REGULATOR_VOLTAGE, \
1008 .owner = THIS_MODULE, \
1009 }, \
1010 }
1011
2098e95c
RN
1012#define TWL6025_ADJUSTABLE_SMPS(label, offset) \
1013static struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 1014 .base = offset, \
4d94aee5
GG
1015 .min_mV = 600, \
1016 .max_mV = 2100, \
1017 .desc = { \
1018 .name = #label, \
1019 .id = TWL6025_REG_##label, \
1020 .n_voltages = 63, \
1021 .ops = &twlsmps_ops, \
1022 .type = REGULATOR_VOLTAGE, \
1023 .owner = THIS_MODULE, \
1024 }, \
1025 }
1026
fa16a5c1
DB
1027/*
1028 * We list regulators here if systems need some level of
1029 * software control over them after boot.
1030 */
2098e95c
RN
1031TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
1032TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
1033TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
1034TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
1035TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
1036TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
1037TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
1038TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
1039TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
1040TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
1041TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
1042TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
1043TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
1044TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
1045TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
1046/* VUSBCP is managed *only* by the USB subchip */
1047/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1048/* Turnon-delay and remap configuration values for 6030 are not
1049 verified since the specification is not public */
1050TWL6030_ADJUSTABLE_SMPS(VDD1);
1051TWL6030_ADJUSTABLE_SMPS(VDD2);
1052TWL6030_ADJUSTABLE_SMPS(VDD3);
1053TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1054TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1055TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1056TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1057TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1058TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1059/* 6025 are renamed compared to 6030 versions */
1060TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1061TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1062TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1063TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1064TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1065TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1066TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1067TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1068TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
1069TWL4030_FIXED_LDO(VINTANA2, 0x3f, 1500, 11, 100, 0x08);
1070TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1071TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1072TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1073TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1074TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1075TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1076TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1077TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU
1078TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1079TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
2098e95c
RN
1080TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0);
1081TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34);
1082TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10);
1083TWL6025_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1084
4d94aee5
GG
1085static u8 twl_get_smps_offset(void)
1086{
1087 u8 value;
1088
1089 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1090 TWL6030_SMPS_OFFSET);
1091 return value;
1092}
1093
1094static u8 twl_get_smps_mult(void)
1095{
1096 u8 value;
1097
1098 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1099 TWL6030_SMPS_MULT);
1100 return value;
1101}
1102
2098e95c
RN
1103#define TWL_OF_MATCH(comp, family, label) \
1104 { \
1105 .compatible = comp, \
1106 .data = &family##_INFO_##label, \
1107 }
1108
1109#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1110#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
1111#define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label)
1112#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
1113#define TWLRES_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLRES, label)
1114#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1115
1116static const struct of_device_id twl_of_match[] __devinitconst = {
1117 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1118 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1119 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1120 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1121 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1122 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1123 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1124 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1125 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1126 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1127 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1128 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1129 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1130 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1131 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1132 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1133 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1134 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1135 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1136 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1137 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1138 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1139 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1140 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
1141 TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2),
1142 TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4),
1143 TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3),
1144 TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5),
1145 TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1),
1146 TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7),
1147 TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6),
1148 TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN),
1149 TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB),
1150 TWLFIXED_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1151 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1152 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1153 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1154 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1155 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1156 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1157 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1158 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU
1159 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1160 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
2098e95c
RN
1161 TWLRES_OF_MATCH("ti,twl6030-clk32kg", CLK32KG),
1162 TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3),
1163 TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4),
1164 TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO),
1165 {},
1166};
1167MODULE_DEVICE_TABLE(of, twl_of_match);
1168
24c29020 1169static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1 1170{
2098e95c 1171 int i, id;
fa16a5c1
DB
1172 struct twlreg_info *info;
1173 struct regulator_init_data *initdata;
1174 struct regulation_constraints *c;
1175 struct regulator_dev *rdev;
63bfff4e 1176 struct twl_regulator_driver_data *drvdata;
2098e95c 1177 const struct of_device_id *match;
c172708d 1178 struct regulator_config config = { };
2098e95c
RN
1179
1180 match = of_match_device(twl_of_match, &pdev->dev);
1181 if (match) {
1182 info = match->data;
1183 id = info->desc.id;
1184 initdata = of_get_regulator_init_data(&pdev->dev,
1185 pdev->dev.of_node);
1186 drvdata = NULL;
1187 } else {
1188 id = pdev->id;
1189 initdata = pdev->dev.platform_data;
1190 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1191 info = twl_of_match[i].data;
5ade3935
AL
1192 if (info && info->desc.id == id)
1193 break;
2098e95c 1194 }
5ade3935
AL
1195 if (i == ARRAY_SIZE(twl_of_match))
1196 return -ENODEV;
1197
2098e95c
RN
1198 drvdata = initdata->driver_data;
1199 if (!drvdata)
1200 return -EINVAL;
fa16a5c1 1201 }
2098e95c 1202
fa16a5c1
DB
1203 if (!info)
1204 return -ENODEV;
1205
fa16a5c1
DB
1206 if (!initdata)
1207 return -EINVAL;
1208
2098e95c
RN
1209 if (drvdata) {
1210 /* copy the driver data into regulator data */
1211 info->features = drvdata->features;
1212 info->data = drvdata->data;
1213 info->set_voltage = drvdata->set_voltage;
1214 info->get_voltage = drvdata->get_voltage;
1215 }
4d94aee5 1216
fa16a5c1
DB
1217 /* Constrain board-specific capabilities according to what
1218 * this driver and the chip itself can actually do.
1219 */
1220 c = &initdata->constraints;
fa16a5c1
DB
1221 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1222 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1223 | REGULATOR_CHANGE_MODE
1224 | REGULATOR_CHANGE_STATUS;
2098e95c 1225 switch (id) {
205e5cd3
JKS
1226 case TWL4030_REG_VIO:
1227 case TWL4030_REG_VDD1:
1228 case TWL4030_REG_VDD2:
1229 case TWL4030_REG_VPLL1:
1230 case TWL4030_REG_VINTANA1:
1231 case TWL4030_REG_VINTANA2:
1232 case TWL4030_REG_VINTDIG:
1233 c->always_on = true;
1234 break;
1235 default:
1236 break;
1237 }
fa16a5c1 1238
2098e95c 1239 switch (id) {
4d94aee5
GG
1240 case TWL6025_REG_SMPS3:
1241 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1242 info->flags |= SMPS_EXTENDED_EN;
1243 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1244 info->flags |= SMPS_OFFSET_EN;
1245 break;
1246 case TWL6025_REG_SMPS4:
1247 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1248 info->flags |= SMPS_EXTENDED_EN;
1249 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1250 info->flags |= SMPS_OFFSET_EN;
1251 break;
1252 case TWL6025_REG_VIO:
1253 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1254 info->flags |= SMPS_EXTENDED_EN;
1255 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1256 info->flags |= SMPS_OFFSET_EN;
1257 break;
1258 }
1259
c172708d
MB
1260 config.dev = &pdev->dev;
1261 config.init_data = initdata;
1262 config.driver_data = info;
1263 config.of_node = pdev->dev.of_node;
1264
1265 rdev = regulator_register(&info->desc, &config);
fa16a5c1
DB
1266 if (IS_ERR(rdev)) {
1267 dev_err(&pdev->dev, "can't register %s, %ld\n",
1268 info->desc.name, PTR_ERR(rdev));
1269 return PTR_ERR(rdev);
1270 }
1271 platform_set_drvdata(pdev, rdev);
1272
776dc923
SH
1273 if (twl_class_is_4030())
1274 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
1275 info->remap);
1276
fa16a5c1
DB
1277 /* NOTE: many regulators support short-circuit IRQs (presentable
1278 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1279 * - SC_CONFIG
1280 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1281 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1282 * - IT_CONFIG
1283 */
1284
1285 return 0;
1286}
1287
c4aa6f31 1288static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
1289{
1290 regulator_unregister(platform_get_drvdata(pdev));
1291 return 0;
1292}
1293
c4aa6f31 1294MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1295
c4aa6f31
RN
1296static struct platform_driver twlreg_driver = {
1297 .probe = twlreg_probe,
1298 .remove = __devexit_p(twlreg_remove),
fa16a5c1 1299 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1300 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1301 */
2098e95c
RN
1302 .driver = {
1303 .name = "twl_reg",
1304 .owner = THIS_MODULE,
1305 .of_match_table = of_match_ptr(twl_of_match),
1306 },
fa16a5c1
DB
1307};
1308
c4aa6f31 1309static int __init twlreg_init(void)
fa16a5c1 1310{
c4aa6f31 1311 return platform_driver_register(&twlreg_driver);
fa16a5c1 1312}
c4aa6f31 1313subsys_initcall(twlreg_init);
fa16a5c1 1314
c4aa6f31 1315static void __exit twlreg_exit(void)
fa16a5c1 1316{
c4aa6f31 1317 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1318}
c4aa6f31 1319module_exit(twlreg_exit)
fa16a5c1 1320
c4aa6f31 1321MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1322MODULE_LICENSE("GPL");
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