regulator: remove use of __devexit_p
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
8f52a580
SR
13#include <linux/string.h>
14#include <linux/slab.h>
fa16a5c1
DB
15#include <linux/init.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
2098e95c
RN
18#include <linux/of.h>
19#include <linux/of_device.h>
fa16a5c1
DB
20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
2098e95c 22#include <linux/regulator/of_regulator.h>
b07682b6 23#include <linux/i2c/twl.h>
fa16a5c1
DB
24
25
26/*
c4aa6f31 27 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
28 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
29 * include an audio codec, battery charger, and more voltage regulators.
30 * These chips are often used in OMAP-based systems.
31 *
32 * This driver implements software-based resource control for various
33 * voltage regulators. This is usually augmented with state machine
34 * based control.
35 */
36
37struct twlreg_info {
38 /* start of regulator's PM_RECEIVER control register bank */
39 u8 base;
40
c4aa6f31 41 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
42 u8 id;
43
44 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
45 u8 table_len;
46 const u16 *table;
47
045f972f
JKS
48 /* State REMAP default configuration */
49 u8 remap;
50
fa16a5c1
DB
51 /* chip constraints on regulator behavior */
52 u16 min_mV;
3e3d3be7 53 u16 max_mV;
fa16a5c1 54
4d94aee5
GG
55 u8 flags;
56
fa16a5c1
DB
57 /* used by regulator core */
58 struct regulator_desc desc;
4d94aee5
GG
59
60 /* chip specific features */
61 unsigned long features;
63bfff4e
TK
62
63 /*
64 * optional override functions for voltage set/get
65 * these are currently only used for SMPS regulators
66 */
67 int (*get_voltage)(void *data);
68 int (*set_voltage)(void *data, int target_uV);
69
70 /* data passed from board for external get/set voltage */
71 void *data;
fa16a5c1
DB
72};
73
74
75/* LDO control registers ... offset is from the base of its register bank.
76 * The first three registers of all power resource banks help hardware to
77 * manage the various resource groups.
78 */
441a4505 79/* Common offset in TWL4030/6030 */
fa16a5c1 80#define VREG_GRP 0
441a4505 81/* TWL4030 register offsets */
fa16a5c1
DB
82#define VREG_TYPE 1
83#define VREG_REMAP 2
84#define VREG_DEDICATED 3 /* LDO control */
ba305e31 85#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
86/* TWL6030 register offsets */
87#define VREG_TRANS 1
88#define VREG_STATE 2
89#define VREG_VOLTAGE 3
4d94aee5 90#define VREG_VOLTAGE_SMPS 4
441a4505
RN
91/* TWL6030 Misc register offsets */
92#define VREG_BC_ALL 1
93#define VREG_BC_REF 2
94#define VREG_BC_PROC 3
95#define VREG_BC_CLK_RST 4
fa16a5c1 96
21657ebf
SH
97/* TWL6030 LDO register values for CFG_STATE */
98#define TWL6030_CFG_STATE_OFF 0x00
99#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
100#define TWL6030_CFG_STATE_OFF2 0x02
101#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 102#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
103#define TWL6030_CFG_STATE_APP_SHIFT 2
104#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
105#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
106 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 107
4d94aee5
GG
108/* Flags for SMPS Voltage reading */
109#define SMPS_OFFSET_EN BIT(0)
110#define SMPS_EXTENDED_EN BIT(1)
111
112/* twl6025 SMPS EPROM values */
113#define TWL6030_SMPS_OFFSET 0xB0
114#define TWL6030_SMPS_MULT 0xB3
115#define SMPS_MULTOFFSET_SMPS4 BIT(0)
116#define SMPS_MULTOFFSET_VIO BIT(1)
117#define SMPS_MULTOFFSET_SMPS3 BIT(6)
118
fa16a5c1 119static inline int
441a4505 120twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
121{
122 u8 value;
123 int status;
124
441a4505 125 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
126 &value, info->base + offset);
127 return (status < 0) ? status : value;
128}
129
130static inline int
441a4505
RN
131twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
132 u8 value)
fa16a5c1 133{
441a4505 134 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
135 value, info->base + offset);
136}
137
138/*----------------------------------------------------------------------*/
139
140/* generic power resource operations, which work on all regulators */
141
c4aa6f31 142static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 143{
441a4505
RN
144 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
145 VREG_GRP);
fa16a5c1
DB
146}
147
148/*
149 * Enable/disable regulators by joining/leaving the P1 (processor) group.
150 * We assume nobody else is updating the DEV_GRP registers.
151 */
441a4505
RN
152/* definition for 4030 family */
153#define P3_GRP_4030 BIT(7) /* "peripherals" */
154#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
155#define P1_GRP_4030 BIT(5) /* CPU/Linux */
156/* definition for 6030 family */
157#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
158#define P2_GRP_6030 BIT(1) /* "peripherals" */
159#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 160
b2456779 161static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 162{
c4aa6f31 163 int state = twlreg_grp(rdev);
fa16a5c1
DB
164
165 if (state < 0)
166 return state;
167
b2456779
SH
168 return state & P1_GRP_4030;
169}
170
171static int twl6030reg_is_enabled(struct regulator_dev *rdev)
172{
173 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 174 int grp = 0, val;
b2456779 175
b6f476c2
AL
176 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) {
177 grp = twlreg_grp(rdev);
178 if (grp < 0)
179 return grp;
4d94aee5 180 grp &= P1_GRP_6030;
b6f476c2 181 } else {
4d94aee5 182 grp = 1;
b6f476c2 183 }
b2456779
SH
184
185 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
186 val = TWL6030_CFG_STATE_APP(val);
187
188 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
189}
190
f8c2940b 191static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
192{
193 struct twlreg_info *info = rdev_get_drvdata(rdev);
194 int grp;
53b8a9d9 195 int ret;
fa16a5c1 196
b6f476c2 197 grp = twlreg_grp(rdev);
fa16a5c1
DB
198 if (grp < 0)
199 return grp;
200
f8c2940b 201 grp |= P1_GRP_4030;
441a4505 202
53b8a9d9
JKS
203 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
204
f8c2940b
B
205 return ret;
206}
207
208static int twl6030reg_enable(struct regulator_dev *rdev)
209{
210 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 211 int grp = 0;
f8c2940b
B
212 int ret;
213
4d94aee5 214 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 215 grp = twlreg_grp(rdev);
f8c2940b
B
216 if (grp < 0)
217 return grp;
218
219 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
220 grp << TWL6030_CFG_STATE_GRP_SHIFT |
221 TWL6030_CFG_STATE_ON);
48c936d6
AL
222 return ret;
223}
21657ebf 224
0ff3897d 225static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
226{
227 struct twlreg_info *info = rdev_get_drvdata(rdev);
228 int grp;
21657ebf 229 int ret;
fa16a5c1 230
b6f476c2 231 grp = twlreg_grp(rdev);
fa16a5c1
DB
232 if (grp < 0)
233 return grp;
234
0ff3897d 235 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 236
21657ebf
SH
237 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
238
0ff3897d
B
239 return ret;
240}
241
242static int twl6030reg_disable(struct regulator_dev *rdev)
243{
244 struct twlreg_info *info = rdev_get_drvdata(rdev);
245 int grp = 0;
246 int ret;
247
4d94aee5
GG
248 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
249 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B
250
251 /* For 6030, set the off state for all grps enabled */
252 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
253 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
254 TWL6030_CFG_STATE_OFF);
21657ebf
SH
255
256 return ret;
fa16a5c1
DB
257}
258
9a0244ad 259static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 260{
c4aa6f31 261 int state = twlreg_grp(rdev);
fa16a5c1
DB
262
263 if (state < 0)
264 return state;
265 state &= 0x0f;
266
267 /* assume state != WARM_RESET; we'd not be running... */
268 if (!state)
269 return REGULATOR_STATUS_OFF;
270 return (state & BIT(3))
271 ? REGULATOR_STATUS_NORMAL
272 : REGULATOR_STATUS_STANDBY;
273}
274
9a0244ad
SH
275static int twl6030reg_get_status(struct regulator_dev *rdev)
276{
277 struct twlreg_info *info = rdev_get_drvdata(rdev);
278 int val;
279
280 val = twlreg_grp(rdev);
281 if (val < 0)
282 return val;
283
284 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
285
286 switch (TWL6030_CFG_STATE_APP(val)) {
287 case TWL6030_CFG_STATE_ON:
288 return REGULATOR_STATUS_NORMAL;
289
290 case TWL6030_CFG_STATE_SLEEP:
291 return REGULATOR_STATUS_STANDBY;
292
293 case TWL6030_CFG_STATE_OFF:
294 case TWL6030_CFG_STATE_OFF2:
295 default:
296 break;
297 }
298
299 return REGULATOR_STATUS_OFF;
300}
301
1a39962f 302static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
303{
304 struct twlreg_info *info = rdev_get_drvdata(rdev);
305 unsigned message;
306 int status;
307
308 /* We can only set the mode through state machine commands... */
309 switch (mode) {
310 case REGULATOR_MODE_NORMAL:
311 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
312 break;
313 case REGULATOR_MODE_STANDBY:
314 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
315 break;
316 default:
317 return -EINVAL;
318 }
319
320 /* Ensure the resource is associated with some group */
c4aa6f31 321 status = twlreg_grp(rdev);
fa16a5c1
DB
322 if (status < 0)
323 return status;
441a4505 324 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
325 return -EACCES;
326
c4aa6f31 327 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
328 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
329 if (status < 0)
fa16a5c1
DB
330 return status;
331
c4aa6f31 332 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 333 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
334}
335
1a39962f
SH
336static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
337{
338 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 339 int grp = 0;
1a39962f
SH
340 int val;
341
4d94aee5 342 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 343 grp = twlreg_grp(rdev);
1a39962f
SH
344
345 if (grp < 0)
346 return grp;
347
348 /* Compose the state register settings */
349 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
350 /* We can only set the mode through state machine commands... */
351 switch (mode) {
352 case REGULATOR_MODE_NORMAL:
353 val |= TWL6030_CFG_STATE_ON;
354 break;
355 case REGULATOR_MODE_STANDBY:
356 val |= TWL6030_CFG_STATE_SLEEP;
357 break;
358
359 default:
360 return -EINVAL;
361 }
362
363 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
364}
365
fa16a5c1
DB
366/*----------------------------------------------------------------------*/
367
368/*
369 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
370 * select field in its control register. We use tables indexed by VSEL
371 * to record voltages in milliVolts. (Accuracy is about three percent.)
372 *
373 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
374 * currently handled by listing two slightly different VAUX2 regulators,
375 * only one of which will be configured.
376 *
377 * VSEL values documented as "TI cannot support these values" are flagged
378 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
379 *
380 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
381 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 382 */
fa16a5c1 383#define UNSUP_MASK 0x8000
fa16a5c1
DB
384
385#define UNSUP(x) (UNSUP_MASK | (x))
411a2df5
N
386#define IS_UNSUP(info, x) \
387 ((UNSUP_MASK & (x)) && \
388 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
fa16a5c1
DB
389#define LDO_MV(x) (~UNSUP_MASK & (x))
390
391
392static const u16 VAUX1_VSEL_table[] = {
393 UNSUP(1500), UNSUP(1800), 2500, 2800,
394 3000, 3000, 3000, 3000,
395};
396static const u16 VAUX2_4030_VSEL_table[] = {
397 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
398 1500, 1800, UNSUP(1850), 2500,
399 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
400 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
401};
402static const u16 VAUX2_VSEL_table[] = {
403 1700, 1700, 1900, 1300,
404 1500, 1800, 2000, 2500,
405 2100, 2800, 2200, 2300,
406 2400, 2400, 2400, 2400,
407};
408static const u16 VAUX3_VSEL_table[] = {
409 1500, 1800, 2500, 2800,
d6bb69cf 410 3000, 3000, 3000, 3000,
fa16a5c1
DB
411};
412static const u16 VAUX4_VSEL_table[] = {
413 700, 1000, 1200, UNSUP(1300),
414 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
415 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
416 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
417};
418static const u16 VMMC1_VSEL_table[] = {
419 1850, 2850, 3000, 3150,
420};
421static const u16 VMMC2_VSEL_table[] = {
422 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
423 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
424 2600, 2800, 2850, 3000,
425 3150, 3150, 3150, 3150,
426};
427static const u16 VPLL1_VSEL_table[] = {
428 1000, 1200, 1300, 1800,
429 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
430};
431static const u16 VPLL2_VSEL_table[] = {
432 700, 1000, 1200, 1300,
433 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
434 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
435 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
436};
437static const u16 VSIM_VSEL_table[] = {
438 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
439 2800, 3000, 3000, 3000,
440};
441static const u16 VDAC_VSEL_table[] = {
442 1200, 1300, 1800, 1800,
443};
07fc493f
JKS
444static const u16 VDD1_VSEL_table[] = {
445 800, 1450,
446};
447static const u16 VDD2_VSEL_table[] = {
448 800, 1450, 1500,
449};
450static const u16 VIO_VSEL_table[] = {
451 1800, 1850,
452};
453static const u16 VINTANA2_VSEL_table[] = {
454 2500, 2750,
455};
fa16a5c1 456
3e3d3be7 457static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
458{
459 struct twlreg_info *info = rdev_get_drvdata(rdev);
460 int mV = info->table[index];
461
411a2df5 462 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
66b659e6
DB
463}
464
fa16a5c1 465static int
dd16b1f8 466twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
467{
468 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 469
dd16b1f8
AL
470 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
471 selector);
fa16a5c1
DB
472}
473
3e3d3be7 474static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
475{
476 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
477 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
478 VREG_VOLTAGE);
fa16a5c1
DB
479
480 if (vsel < 0)
481 return vsel;
482
483 vsel &= info->table_len - 1;
484 return LDO_MV(info->table[vsel]) * 1000;
485}
486
3e3d3be7
RN
487static struct regulator_ops twl4030ldo_ops = {
488 .list_voltage = twl4030ldo_list_voltage,
66b659e6 489
dd16b1f8 490 .set_voltage_sel = twl4030ldo_set_voltage_sel,
3e3d3be7
RN
491 .get_voltage = twl4030ldo_get_voltage,
492
f8c2940b 493 .enable = twl4030reg_enable,
0ff3897d 494 .disable = twl4030reg_disable,
b2456779 495 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 496
1a39962f 497 .set_mode = twl4030reg_set_mode,
3e3d3be7 498
9a0244ad 499 .get_status = twl4030reg_get_status,
3e3d3be7
RN
500};
501
ba305e31
TK
502static int
503twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
504 unsigned *selector)
505{
506 struct twlreg_info *info = rdev_get_drvdata(rdev);
507 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
508
63bfff4e
TK
509 if (info->set_voltage) {
510 return info->set_voltage(info->data, min_uV);
511 } else {
512 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
513 VREG_VOLTAGE_SMPS_4030, vsel);
514 }
515
ba305e31
TK
516 return 0;
517}
518
519static int twl4030smps_get_voltage(struct regulator_dev *rdev)
520{
521 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
522 int vsel;
523
524 if (info->get_voltage)
525 return info->get_voltage(info->data);
526
527 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
528 VREG_VOLTAGE_SMPS_4030);
529
530 return vsel * 12500 + 600000;
531}
532
533static struct regulator_ops twl4030smps_ops = {
534 .set_voltage = twl4030smps_set_voltage,
535 .get_voltage = twl4030smps_get_voltage,
536};
537
34a38440
TK
538static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
539 int max_uV, unsigned *selector)
540{
541 struct twlreg_info *info = rdev_get_drvdata(rdev);
542
543 if (info->set_voltage)
544 return info->set_voltage(info->data, min_uV);
545
546 return -ENODEV;
547}
548
549static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
550{
551 struct twlreg_info *info = rdev_get_drvdata(rdev);
552
553 if (info->get_voltage)
554 return info->get_voltage(info->data);
555
556 return -ENODEV;
557}
558
559static struct regulator_ops twl6030coresmps_ops = {
560 .set_voltage = twl6030coresmps_set_voltage,
561 .get_voltage = twl6030coresmps_get_voltage,
562};
563
c6a717c9
AL
564static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned sel)
565{
566 struct twlreg_info *info = rdev_get_drvdata(rdev);
567
568 switch (sel) {
569 case 0:
570 return 0;
571 case 1 ... 24:
572 /* Linear mapping from 00000001 to 00011000:
573 * Absolute voltage value = 1.0 V + 0.1 V × (sel – 00000001)
574 */
575 return (info->min_mV + 100 * (sel - 1)) * 1000;
576 case 25 ... 30:
577 return -EINVAL;
578 case 31:
579 return 2750000;
580 default:
581 return -EINVAL;
582 }
583}
584
3e3d3be7 585static int
4bcb9f43 586twl6030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
3e3d3be7
RN
587{
588 struct twlreg_info *info = rdev_get_drvdata(rdev);
3e3d3be7 589
4bcb9f43
AL
590 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
591 selector);
3e3d3be7
RN
592}
593
4bcb9f43 594static int twl6030ldo_get_voltage_sel(struct regulator_dev *rdev)
3e3d3be7
RN
595{
596 struct twlreg_info *info = rdev_get_drvdata(rdev);
a3cb80f4 597 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
3e3d3be7 598
4bcb9f43 599 return vsel;
3e3d3be7
RN
600}
601
602static struct regulator_ops twl6030ldo_ops = {
c6a717c9 603 .list_voltage = twl6030ldo_list_voltage,
3e3d3be7 604
4bcb9f43
AL
605 .set_voltage_sel = twl6030ldo_set_voltage_sel,
606 .get_voltage_sel = twl6030ldo_get_voltage_sel,
fa16a5c1 607
f8c2940b 608 .enable = twl6030reg_enable,
0ff3897d 609 .disable = twl6030reg_disable,
b2456779 610 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 611
1a39962f 612 .set_mode = twl6030reg_set_mode,
fa16a5c1 613
9a0244ad 614 .get_status = twl6030reg_get_status,
fa16a5c1
DB
615};
616
617/*----------------------------------------------------------------------*/
618
619/*
620 * Fixed voltage LDOs don't have a VSEL field to update.
621 */
c4aa6f31 622static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
623{
624 struct twlreg_info *info = rdev_get_drvdata(rdev);
625
626 return info->min_mV * 1000;
627}
628
b2456779
SH
629static struct regulator_ops twl4030fixed_ops = {
630 .list_voltage = twlfixed_list_voltage,
631
f8c2940b 632 .enable = twl4030reg_enable,
0ff3897d 633 .disable = twl4030reg_disable,
b2456779
SH
634 .is_enabled = twl4030reg_is_enabled,
635
1a39962f 636 .set_mode = twl4030reg_set_mode,
b2456779 637
9a0244ad 638 .get_status = twl4030reg_get_status,
b2456779
SH
639};
640
641static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 642 .list_voltage = twlfixed_list_voltage,
66b659e6 643
f8c2940b 644 .enable = twl6030reg_enable,
0ff3897d 645 .disable = twl6030reg_disable,
b2456779 646 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 647
1a39962f 648 .set_mode = twl6030reg_set_mode,
fa16a5c1 649
9a0244ad 650 .get_status = twl6030reg_get_status,
fa16a5c1
DB
651};
652
4d94aee5
GG
653/*
654 * SMPS status and control
655 */
656
657static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
658{
659 struct twlreg_info *info = rdev_get_drvdata(rdev);
660
661 int voltage = 0;
662
663 switch (info->flags) {
664 case SMPS_OFFSET_EN:
665 voltage = 100000;
666 /* fall through */
667 case 0:
668 switch (index) {
669 case 0:
670 voltage = 0;
671 break;
672 case 58:
673 voltage = 1350 * 1000;
674 break;
675 case 59:
676 voltage = 1500 * 1000;
677 break;
678 case 60:
679 voltage = 1800 * 1000;
680 break;
681 case 61:
682 voltage = 1900 * 1000;
683 break;
684 case 62:
685 voltage = 2100 * 1000;
686 break;
687 default:
688 voltage += (600000 + (12500 * (index - 1)));
689 }
690 break;
691 case SMPS_EXTENDED_EN:
692 switch (index) {
693 case 0:
694 voltage = 0;
695 break;
696 case 58:
697 voltage = 2084 * 1000;
698 break;
699 case 59:
700 voltage = 2315 * 1000;
701 break;
702 case 60:
703 voltage = 2778 * 1000;
704 break;
705 case 61:
706 voltage = 2932 * 1000;
707 break;
708 case 62:
709 voltage = 3241 * 1000;
710 break;
711 default:
712 voltage = (1852000 + (38600 * (index - 1)));
713 }
714 break;
715 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
716 switch (index) {
717 case 0:
718 voltage = 0;
719 break;
720 case 58:
721 voltage = 4167 * 1000;
722 break;
723 case 59:
724 voltage = 2315 * 1000;
725 break;
726 case 60:
727 voltage = 2778 * 1000;
728 break;
729 case 61:
730 voltage = 2932 * 1000;
731 break;
732 case 62:
733 voltage = 3241 * 1000;
734 break;
735 default:
736 voltage = (2161000 + (38600 * (index - 1)));
737 }
738 break;
739 }
740
741 return voltage;
742}
743
38f8f43c
AL
744static int twl6030smps_map_voltage(struct regulator_dev *rdev, int min_uV,
745 int max_uV)
4d94aee5 746{
38f8f43c
AL
747 struct twlreg_info *info = rdev_get_drvdata(rdev);
748 int vsel = 0;
4d94aee5
GG
749
750 switch (info->flags) {
751 case 0:
752 if (min_uV == 0)
753 vsel = 0;
a33b6e5a 754 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
268a1641 755 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 756 vsel++;
4d94aee5
GG
757 }
758 /* Values 1..57 for vsel are linear and can be calculated
759 * values 58..62 are non linear.
760 */
78292f4e 761 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 762 vsel = 62;
78292f4e 763 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 764 vsel = 61;
78292f4e 765 else if ((min_uV > 1500000) && (min_uV <= 1800000))
4d94aee5 766 vsel = 60;
78292f4e 767 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 768 vsel = 59;
78292f4e 769 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG
770 vsel = 58;
771 else
772 return -EINVAL;
773 break;
774 case SMPS_OFFSET_EN:
775 if (min_uV == 0)
776 vsel = 0;
a33b6e5a 777 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
268a1641 778 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 779 vsel++;
4d94aee5
GG
780 }
781 /* Values 1..57 for vsel are linear and can be calculated
782 * values 58..62 are non linear.
783 */
78292f4e 784 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 785 vsel = 62;
78292f4e 786 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 787 vsel = 61;
78292f4e 788 else if ((min_uV > 1350000) && (min_uV <= 1800000))
4d94aee5 789 vsel = 60;
78292f4e 790 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 791 vsel = 59;
78292f4e 792 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG
793 vsel = 58;
794 else
795 return -EINVAL;
796 break;
797 case SMPS_EXTENDED_EN:
0cb2f123 798 if (min_uV == 0) {
4d94aee5 799 vsel = 0;
0cb2f123 800 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 801 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL
802 vsel++;
803 }
4d94aee5
GG
804 break;
805 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 806 if (min_uV == 0) {
4d94aee5 807 vsel = 0;
78292f4e 808 } else if ((min_uV >= 2161000) && (min_uV <= 4321000)) {
268a1641 809 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL
810 vsel++;
811 }
4d94aee5
GG
812 break;
813 }
814
38f8f43c
AL
815 return vsel;
816}
78292f4e 817
38f8f43c
AL
818static int twl6030smps_set_voltage_sel(struct regulator_dev *rdev,
819 unsigned int selector)
820{
821 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5
GG
822
823 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
38f8f43c 824 selector);
4d94aee5
GG
825}
826
827static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
828{
829 struct twlreg_info *info = rdev_get_drvdata(rdev);
830
831 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
832}
833
834static struct regulator_ops twlsmps_ops = {
835 .list_voltage = twl6030smps_list_voltage,
38f8f43c 836 .map_voltage = twl6030smps_map_voltage,
4d94aee5 837
38f8f43c 838 .set_voltage_sel = twl6030smps_set_voltage_sel,
4d94aee5
GG
839 .get_voltage_sel = twl6030smps_get_voltage_sel,
840
841 .enable = twl6030reg_enable,
842 .disable = twl6030reg_disable,
843 .is_enabled = twl6030reg_is_enabled,
844
845 .set_mode = twl6030reg_set_mode,
846
847 .get_status = twl6030reg_get_status,
848};
849
fa16a5c1
DB
850/*----------------------------------------------------------------------*/
851
045f972f
JKS
852#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
853 remap_conf) \
854 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 855 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A
856#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
857 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 858 0x0, TWL6030, twl6030fixed_ops)
045f972f 859
2098e95c 860#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 861static const struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
862 .base = offset, \
863 .id = num, \
864 .table_len = ARRAY_SIZE(label##_VSEL_table), \
865 .table = label##_VSEL_table, \
045f972f 866 .remap = remap_conf, \
fa16a5c1
DB
867 .desc = { \
868 .name = #label, \
3e3d3be7 869 .id = TWL4030_REG_##label, \
66b659e6 870 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
871 .ops = &twl4030ldo_ops, \
872 .type = REGULATOR_VOLTAGE, \
873 .owner = THIS_MODULE, \
fca53d86 874 .enable_time = turnon_delay, \
3e3d3be7
RN
875 }, \
876 }
877
ba305e31 878#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 879static const struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
880 .base = offset, \
881 .id = num, \
ba305e31
TK
882 .remap = remap_conf, \
883 .desc = { \
884 .name = #label, \
885 .id = TWL4030_REG_##label, \
886 .ops = &twl4030smps_ops, \
887 .type = REGULATOR_VOLTAGE, \
888 .owner = THIS_MODULE, \
fca53d86 889 .enable_time = turnon_delay, \
ba305e31
TK
890 }, \
891 }
892
2098e95c 893#define TWL6030_ADJUSTABLE_SMPS(label) \
0ffff5a6 894static const struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK
895 .desc = { \
896 .name = #label, \
897 .id = TWL6030_REG_##label, \
898 .ops = &twl6030coresmps_ops, \
899 .type = REGULATOR_VOLTAGE, \
900 .owner = THIS_MODULE, \
901 }, \
902 }
903
2098e95c 904#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
0ffff5a6 905static const struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 906 .base = offset, \
3e3d3be7
RN
907 .min_mV = min_mVolts, \
908 .max_mV = max_mVolts, \
3e3d3be7
RN
909 .desc = { \
910 .name = #label, \
911 .id = TWL6030_REG_##label, \
c6a717c9 912 .n_voltages = 32, \
3e3d3be7 913 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
914 .type = REGULATOR_VOLTAGE, \
915 .owner = THIS_MODULE, \
916 }, \
917 }
918
2098e95c 919#define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
0ffff5a6 920static const struct twlreg_info TWL6025_INFO_##label = { \
4d94aee5 921 .base = offset, \
4d94aee5
GG
922 .min_mV = min_mVolts, \
923 .max_mV = max_mVolts, \
924 .desc = { \
925 .name = #label, \
926 .id = TWL6025_REG_##label, \
c6a717c9 927 .n_voltages = 32, \
4d94aee5
GG
928 .ops = &twl6030ldo_ops, \
929 .type = REGULATOR_VOLTAGE, \
930 .owner = THIS_MODULE, \
931 }, \
932 }
3e3d3be7 933
045f972f 934#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c 935 family, operations) \
0ffff5a6 936static const struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
937 .base = offset, \
938 .id = num, \
939 .min_mV = mVolts, \
045f972f 940 .remap = remap_conf, \
fa16a5c1
DB
941 .desc = { \
942 .name = #label, \
c4aa6f31 943 .id = family##_REG_##label, \
66b659e6 944 .n_voltages = 1, \
b2456779 945 .ops = &operations, \
fa16a5c1
DB
946 .type = REGULATOR_VOLTAGE, \
947 .owner = THIS_MODULE, \
fca53d86 948 .enable_time = turnon_delay, \
fa16a5c1
DB
949 }, \
950 }
951
2098e95c
RN
952#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
953static struct twlreg_info TWLRES_INFO_##label = { \
8e6de4a3 954 .base = offset, \
8e6de4a3
B
955 .desc = { \
956 .name = #label, \
957 .id = TWL6030_REG_##label, \
958 .ops = &twl6030_fixed_resource, \
959 .type = REGULATOR_VOLTAGE, \
960 .owner = THIS_MODULE, \
fca53d86 961 .enable_time = turnon_delay, \
8e6de4a3
B
962 }, \
963 }
964
2098e95c 965#define TWL6025_ADJUSTABLE_SMPS(label, offset) \
0ffff5a6 966static const struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 967 .base = offset, \
4d94aee5
GG
968 .min_mV = 600, \
969 .max_mV = 2100, \
970 .desc = { \
971 .name = #label, \
972 .id = TWL6025_REG_##label, \
973 .n_voltages = 63, \
974 .ops = &twlsmps_ops, \
975 .type = REGULATOR_VOLTAGE, \
976 .owner = THIS_MODULE, \
977 }, \
978 }
979
fa16a5c1
DB
980/*
981 * We list regulators here if systems need some level of
982 * software control over them after boot.
983 */
2098e95c
RN
984TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
985TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
986TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
987TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
988TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
989TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
990TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
991TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
992TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
993TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
994TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
995TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
996TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
997TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
998TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
999/* VUSBCP is managed *only* by the USB subchip */
1000/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1001/* Turnon-delay and remap configuration values for 6030 are not
1002 verified since the specification is not public */
1003TWL6030_ADJUSTABLE_SMPS(VDD1);
1004TWL6030_ADJUSTABLE_SMPS(VDD2);
1005TWL6030_ADJUSTABLE_SMPS(VDD3);
1006TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1007TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1008TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1009TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1010TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1011TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1012/* 6025 are renamed compared to 6030 versions */
1013TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1014TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1015TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1016TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1017TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1018TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1019TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1020TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1021TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
908d6d52 1022TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
2098e95c
RN
1023TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1024TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1025TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1026TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1027TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1028TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1029TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1030TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU
1031TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1032TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
2098e95c
RN
1033TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34);
1034TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10);
1035TWL6025_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1036
4d94aee5
GG
1037static u8 twl_get_smps_offset(void)
1038{
1039 u8 value;
1040
1041 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1042 TWL6030_SMPS_OFFSET);
1043 return value;
1044}
1045
1046static u8 twl_get_smps_mult(void)
1047{
1048 u8 value;
1049
1050 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1051 TWL6030_SMPS_MULT);
1052 return value;
1053}
1054
2098e95c
RN
1055#define TWL_OF_MATCH(comp, family, label) \
1056 { \
1057 .compatible = comp, \
1058 .data = &family##_INFO_##label, \
1059 }
1060
1061#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1062#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
1063#define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label)
1064#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
2098e95c
RN
1065#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1066
1067static const struct of_device_id twl_of_match[] __devinitconst = {
1068 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1069 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1070 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1071 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1072 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1073 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1074 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1075 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1076 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1077 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1078 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1079 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1080 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1081 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1082 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1083 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1084 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1085 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1086 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1087 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1088 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1089 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1090 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1091 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
1092 TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2),
1093 TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4),
1094 TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3),
1095 TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5),
1096 TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1),
1097 TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7),
1098 TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6),
1099 TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN),
1100 TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB),
908d6d52 1101 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
2098e95c
RN
1102 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1103 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1104 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1105 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1106 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1107 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1108 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1109 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU
1110 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1111 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
2098e95c
RN
1112 TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3),
1113 TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4),
1114 TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO),
1115 {},
1116};
1117MODULE_DEVICE_TABLE(of, twl_of_match);
1118
24c29020 1119static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1 1120{
2098e95c 1121 int i, id;
fa16a5c1 1122 struct twlreg_info *info;
0ffff5a6 1123 const struct twlreg_info *template;
fa16a5c1
DB
1124 struct regulator_init_data *initdata;
1125 struct regulation_constraints *c;
1126 struct regulator_dev *rdev;
63bfff4e 1127 struct twl_regulator_driver_data *drvdata;
2098e95c 1128 const struct of_device_id *match;
c172708d 1129 struct regulator_config config = { };
2098e95c
RN
1130
1131 match = of_match_device(twl_of_match, &pdev->dev);
1132 if (match) {
0ffff5a6
AB
1133 template = match->data;
1134 id = template->desc.id;
2098e95c
RN
1135 initdata = of_get_regulator_init_data(&pdev->dev,
1136 pdev->dev.of_node);
1137 drvdata = NULL;
1138 } else {
1139 id = pdev->id;
1140 initdata = pdev->dev.platform_data;
0ffff5a6
AB
1141 for (i = 0, template = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1142 template = twl_of_match[i].data;
1143 if (template && template->desc.id == id)
5ade3935 1144 break;
2098e95c 1145 }
5ade3935
AL
1146 if (i == ARRAY_SIZE(twl_of_match))
1147 return -ENODEV;
1148
2098e95c
RN
1149 drvdata = initdata->driver_data;
1150 if (!drvdata)
1151 return -EINVAL;
fa16a5c1 1152 }
2098e95c 1153
0ffff5a6 1154 if (!template)
fa16a5c1
DB
1155 return -ENODEV;
1156
fa16a5c1
DB
1157 if (!initdata)
1158 return -EINVAL;
1159
0ffff5a6
AB
1160 info = kmemdup(template, sizeof (*info), GFP_KERNEL);
1161 if (!info)
1162 return -ENOMEM;
1163
2098e95c
RN
1164 if (drvdata) {
1165 /* copy the driver data into regulator data */
1166 info->features = drvdata->features;
1167 info->data = drvdata->data;
1168 info->set_voltage = drvdata->set_voltage;
1169 info->get_voltage = drvdata->get_voltage;
1170 }
4d94aee5 1171
fa16a5c1
DB
1172 /* Constrain board-specific capabilities according to what
1173 * this driver and the chip itself can actually do.
1174 */
1175 c = &initdata->constraints;
fa16a5c1
DB
1176 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1177 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1178 | REGULATOR_CHANGE_MODE
1179 | REGULATOR_CHANGE_STATUS;
2098e95c 1180 switch (id) {
205e5cd3
JKS
1181 case TWL4030_REG_VIO:
1182 case TWL4030_REG_VDD1:
1183 case TWL4030_REG_VDD2:
1184 case TWL4030_REG_VPLL1:
1185 case TWL4030_REG_VINTANA1:
1186 case TWL4030_REG_VINTANA2:
1187 case TWL4030_REG_VINTDIG:
1188 c->always_on = true;
1189 break;
1190 default:
1191 break;
1192 }
fa16a5c1 1193
2098e95c 1194 switch (id) {
4d94aee5
GG
1195 case TWL6025_REG_SMPS3:
1196 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1197 info->flags |= SMPS_EXTENDED_EN;
1198 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1199 info->flags |= SMPS_OFFSET_EN;
1200 break;
1201 case TWL6025_REG_SMPS4:
1202 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1203 info->flags |= SMPS_EXTENDED_EN;
1204 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1205 info->flags |= SMPS_OFFSET_EN;
1206 break;
1207 case TWL6025_REG_VIO:
1208 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1209 info->flags |= SMPS_EXTENDED_EN;
1210 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1211 info->flags |= SMPS_OFFSET_EN;
1212 break;
1213 }
1214
c172708d
MB
1215 config.dev = &pdev->dev;
1216 config.init_data = initdata;
1217 config.driver_data = info;
1218 config.of_node = pdev->dev.of_node;
1219
1220 rdev = regulator_register(&info->desc, &config);
fa16a5c1
DB
1221 if (IS_ERR(rdev)) {
1222 dev_err(&pdev->dev, "can't register %s, %ld\n",
1223 info->desc.name, PTR_ERR(rdev));
0ffff5a6 1224 kfree(info);
fa16a5c1
DB
1225 return PTR_ERR(rdev);
1226 }
1227 platform_set_drvdata(pdev, rdev);
1228
776dc923
SH
1229 if (twl_class_is_4030())
1230 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
1231 info->remap);
1232
fa16a5c1
DB
1233 /* NOTE: many regulators support short-circuit IRQs (presentable
1234 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1235 * - SC_CONFIG
1236 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1237 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1238 * - IT_CONFIG
1239 */
1240
1241 return 0;
1242}
1243
c4aa6f31 1244static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1 1245{
0ffff5a6
AB
1246 struct regulator_dev *rdev = platform_get_drvdata(pdev);
1247 struct twlreg_info *info = rdev->reg_data;
1248
1249 regulator_unregister(rdev);
1250 kfree(info);
fa16a5c1
DB
1251 return 0;
1252}
1253
c4aa6f31 1254MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1255
c4aa6f31
RN
1256static struct platform_driver twlreg_driver = {
1257 .probe = twlreg_probe,
5eb9f2b9 1258 .remove = twlreg_remove,
fa16a5c1 1259 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1260 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1261 */
2098e95c
RN
1262 .driver = {
1263 .name = "twl_reg",
1264 .owner = THIS_MODULE,
1265 .of_match_table = of_match_ptr(twl_of_match),
1266 },
fa16a5c1
DB
1267};
1268
c4aa6f31 1269static int __init twlreg_init(void)
fa16a5c1 1270{
c4aa6f31 1271 return platform_driver_register(&twlreg_driver);
fa16a5c1 1272}
c4aa6f31 1273subsys_initcall(twlreg_init);
fa16a5c1 1274
c4aa6f31 1275static void __exit twlreg_exit(void)
fa16a5c1 1276{
c4aa6f31 1277 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1278}
c4aa6f31 1279module_exit(twlreg_exit)
fa16a5c1 1280
c4aa6f31 1281MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1282MODULE_LICENSE("GPL");
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