mfd: twl: define all feature flags in one place.
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
2098e95c
RN
16#include <linux/of.h>
17#include <linux/of_device.h>
fa16a5c1
DB
18#include <linux/regulator/driver.h>
19#include <linux/regulator/machine.h>
2098e95c 20#include <linux/regulator/of_regulator.h>
b07682b6 21#include <linux/i2c/twl.h>
fa16a5c1
DB
22
23
24/*
c4aa6f31 25 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
26 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
27 * include an audio codec, battery charger, and more voltage regulators.
28 * These chips are often used in OMAP-based systems.
29 *
30 * This driver implements software-based resource control for various
31 * voltage regulators. This is usually augmented with state machine
32 * based control.
33 */
34
35struct twlreg_info {
36 /* start of regulator's PM_RECEIVER control register bank */
37 u8 base;
38
c4aa6f31 39 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
40 u8 id;
41
42 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
43 u8 table_len;
44 const u16 *table;
45
045f972f
JKS
46 /* regulator specific turn-on delay */
47 u16 delay;
48
49 /* State REMAP default configuration */
50 u8 remap;
51
fa16a5c1
DB
52 /* chip constraints on regulator behavior */
53 u16 min_mV;
3e3d3be7 54 u16 max_mV;
fa16a5c1 55
4d94aee5
GG
56 u8 flags;
57
fa16a5c1
DB
58 /* used by regulator core */
59 struct regulator_desc desc;
4d94aee5
GG
60
61 /* chip specific features */
62 unsigned long features;
63bfff4e
TK
63
64 /*
65 * optional override functions for voltage set/get
66 * these are currently only used for SMPS regulators
67 */
68 int (*get_voltage)(void *data);
69 int (*set_voltage)(void *data, int target_uV);
70
71 /* data passed from board for external get/set voltage */
72 void *data;
fa16a5c1
DB
73};
74
75
76/* LDO control registers ... offset is from the base of its register bank.
77 * The first three registers of all power resource banks help hardware to
78 * manage the various resource groups.
79 */
441a4505 80/* Common offset in TWL4030/6030 */
fa16a5c1 81#define VREG_GRP 0
441a4505 82/* TWL4030 register offsets */
fa16a5c1
DB
83#define VREG_TYPE 1
84#define VREG_REMAP 2
85#define VREG_DEDICATED 3 /* LDO control */
ba305e31 86#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
87/* TWL6030 register offsets */
88#define VREG_TRANS 1
89#define VREG_STATE 2
90#define VREG_VOLTAGE 3
4d94aee5 91#define VREG_VOLTAGE_SMPS 4
441a4505
RN
92/* TWL6030 Misc register offsets */
93#define VREG_BC_ALL 1
94#define VREG_BC_REF 2
95#define VREG_BC_PROC 3
96#define VREG_BC_CLK_RST 4
fa16a5c1 97
21657ebf
SH
98/* TWL6030 LDO register values for CFG_STATE */
99#define TWL6030_CFG_STATE_OFF 0x00
100#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
101#define TWL6030_CFG_STATE_OFF2 0x02
102#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 103#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
104#define TWL6030_CFG_STATE_APP_SHIFT 2
105#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
106#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
107 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 108
4d94aee5
GG
109/* Flags for SMPS Voltage reading */
110#define SMPS_OFFSET_EN BIT(0)
111#define SMPS_EXTENDED_EN BIT(1)
112
113/* twl6025 SMPS EPROM values */
114#define TWL6030_SMPS_OFFSET 0xB0
115#define TWL6030_SMPS_MULT 0xB3
116#define SMPS_MULTOFFSET_SMPS4 BIT(0)
117#define SMPS_MULTOFFSET_VIO BIT(1)
118#define SMPS_MULTOFFSET_SMPS3 BIT(6)
119
fa16a5c1 120static inline int
441a4505 121twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
122{
123 u8 value;
124 int status;
125
441a4505 126 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
127 &value, info->base + offset);
128 return (status < 0) ? status : value;
129}
130
131static inline int
441a4505
RN
132twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
133 u8 value)
fa16a5c1 134{
441a4505 135 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
136 value, info->base + offset);
137}
138
139/*----------------------------------------------------------------------*/
140
141/* generic power resource operations, which work on all regulators */
142
c4aa6f31 143static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 144{
441a4505
RN
145 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
146 VREG_GRP);
fa16a5c1
DB
147}
148
149/*
150 * Enable/disable regulators by joining/leaving the P1 (processor) group.
151 * We assume nobody else is updating the DEV_GRP registers.
152 */
441a4505
RN
153/* definition for 4030 family */
154#define P3_GRP_4030 BIT(7) /* "peripherals" */
155#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
156#define P1_GRP_4030 BIT(5) /* CPU/Linux */
157/* definition for 6030 family */
158#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
159#define P2_GRP_6030 BIT(1) /* "peripherals" */
160#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 161
b2456779 162static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 163{
c4aa6f31 164 int state = twlreg_grp(rdev);
fa16a5c1
DB
165
166 if (state < 0)
167 return state;
168
b2456779
SH
169 return state & P1_GRP_4030;
170}
171
172static int twl6030reg_is_enabled(struct regulator_dev *rdev)
173{
174 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 175 int grp = 0, val;
b2456779 176
b6f476c2
AL
177 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) {
178 grp = twlreg_grp(rdev);
179 if (grp < 0)
180 return grp;
4d94aee5 181 grp &= P1_GRP_6030;
b6f476c2 182 } else {
4d94aee5 183 grp = 1;
b6f476c2 184 }
b2456779
SH
185
186 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
187 val = TWL6030_CFG_STATE_APP(val);
188
189 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
190}
191
f8c2940b 192static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
193{
194 struct twlreg_info *info = rdev_get_drvdata(rdev);
195 int grp;
53b8a9d9 196 int ret;
fa16a5c1 197
b6f476c2 198 grp = twlreg_grp(rdev);
fa16a5c1
DB
199 if (grp < 0)
200 return grp;
201
f8c2940b 202 grp |= P1_GRP_4030;
441a4505 203
53b8a9d9
JKS
204 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
205
f8c2940b
B
206 return ret;
207}
208
209static int twl6030reg_enable(struct regulator_dev *rdev)
210{
211 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 212 int grp = 0;
f8c2940b
B
213 int ret;
214
4d94aee5 215 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 216 grp = twlreg_grp(rdev);
f8c2940b
B
217 if (grp < 0)
218 return grp;
219
220 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
221 grp << TWL6030_CFG_STATE_GRP_SHIFT |
222 TWL6030_CFG_STATE_ON);
48c936d6
AL
223 return ret;
224}
21657ebf 225
48c936d6
AL
226static int twl4030reg_enable_time(struct regulator_dev *rdev)
227{
228 struct twlreg_info *info = rdev_get_drvdata(rdev);
53b8a9d9 229
48c936d6
AL
230 return info->delay;
231}
232
233static int twl6030reg_enable_time(struct regulator_dev *rdev)
234{
235 struct twlreg_info *info = rdev_get_drvdata(rdev);
236
237 return info->delay;
fa16a5c1
DB
238}
239
0ff3897d 240static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
241{
242 struct twlreg_info *info = rdev_get_drvdata(rdev);
243 int grp;
21657ebf 244 int ret;
fa16a5c1 245
b6f476c2 246 grp = twlreg_grp(rdev);
fa16a5c1
DB
247 if (grp < 0)
248 return grp;
249
0ff3897d 250 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 251
21657ebf
SH
252 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
253
0ff3897d
B
254 return ret;
255}
256
257static int twl6030reg_disable(struct regulator_dev *rdev)
258{
259 struct twlreg_info *info = rdev_get_drvdata(rdev);
260 int grp = 0;
261 int ret;
262
4d94aee5
GG
263 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
264 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B
265
266 /* For 6030, set the off state for all grps enabled */
267 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
268 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
269 TWL6030_CFG_STATE_OFF);
21657ebf
SH
270
271 return ret;
fa16a5c1
DB
272}
273
9a0244ad 274static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 275{
c4aa6f31 276 int state = twlreg_grp(rdev);
fa16a5c1
DB
277
278 if (state < 0)
279 return state;
280 state &= 0x0f;
281
282 /* assume state != WARM_RESET; we'd not be running... */
283 if (!state)
284 return REGULATOR_STATUS_OFF;
285 return (state & BIT(3))
286 ? REGULATOR_STATUS_NORMAL
287 : REGULATOR_STATUS_STANDBY;
288}
289
9a0244ad
SH
290static int twl6030reg_get_status(struct regulator_dev *rdev)
291{
292 struct twlreg_info *info = rdev_get_drvdata(rdev);
293 int val;
294
295 val = twlreg_grp(rdev);
296 if (val < 0)
297 return val;
298
299 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
300
301 switch (TWL6030_CFG_STATE_APP(val)) {
302 case TWL6030_CFG_STATE_ON:
303 return REGULATOR_STATUS_NORMAL;
304
305 case TWL6030_CFG_STATE_SLEEP:
306 return REGULATOR_STATUS_STANDBY;
307
308 case TWL6030_CFG_STATE_OFF:
309 case TWL6030_CFG_STATE_OFF2:
310 default:
311 break;
312 }
313
314 return REGULATOR_STATUS_OFF;
315}
316
1a39962f 317static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
318{
319 struct twlreg_info *info = rdev_get_drvdata(rdev);
320 unsigned message;
321 int status;
322
323 /* We can only set the mode through state machine commands... */
324 switch (mode) {
325 case REGULATOR_MODE_NORMAL:
326 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
327 break;
328 case REGULATOR_MODE_STANDBY:
329 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
330 break;
331 default:
332 return -EINVAL;
333 }
334
335 /* Ensure the resource is associated with some group */
c4aa6f31 336 status = twlreg_grp(rdev);
fa16a5c1
DB
337 if (status < 0)
338 return status;
441a4505 339 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
340 return -EACCES;
341
c4aa6f31 342 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
343 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
344 if (status < 0)
fa16a5c1
DB
345 return status;
346
c4aa6f31 347 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 348 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
349}
350
1a39962f
SH
351static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
352{
353 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 354 int grp = 0;
1a39962f
SH
355 int val;
356
4d94aee5 357 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 358 grp = twlreg_grp(rdev);
1a39962f
SH
359
360 if (grp < 0)
361 return grp;
362
363 /* Compose the state register settings */
364 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
365 /* We can only set the mode through state machine commands... */
366 switch (mode) {
367 case REGULATOR_MODE_NORMAL:
368 val |= TWL6030_CFG_STATE_ON;
369 break;
370 case REGULATOR_MODE_STANDBY:
371 val |= TWL6030_CFG_STATE_SLEEP;
372 break;
373
374 default:
375 return -EINVAL;
376 }
377
378 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
379}
380
fa16a5c1
DB
381/*----------------------------------------------------------------------*/
382
383/*
384 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
385 * select field in its control register. We use tables indexed by VSEL
386 * to record voltages in milliVolts. (Accuracy is about three percent.)
387 *
388 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
389 * currently handled by listing two slightly different VAUX2 regulators,
390 * only one of which will be configured.
391 *
392 * VSEL values documented as "TI cannot support these values" are flagged
393 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
394 *
395 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
396 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB
397 */
398#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
399#define UNSUP_MASK 0x0000
400#else
401#define UNSUP_MASK 0x8000
402#endif
403
404#define UNSUP(x) (UNSUP_MASK | (x))
405#define IS_UNSUP(x) (UNSUP_MASK & (x))
406#define LDO_MV(x) (~UNSUP_MASK & (x))
407
408
409static const u16 VAUX1_VSEL_table[] = {
410 UNSUP(1500), UNSUP(1800), 2500, 2800,
411 3000, 3000, 3000, 3000,
412};
413static const u16 VAUX2_4030_VSEL_table[] = {
414 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
415 1500, 1800, UNSUP(1850), 2500,
416 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
417 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
418};
419static const u16 VAUX2_VSEL_table[] = {
420 1700, 1700, 1900, 1300,
421 1500, 1800, 2000, 2500,
422 2100, 2800, 2200, 2300,
423 2400, 2400, 2400, 2400,
424};
425static const u16 VAUX3_VSEL_table[] = {
426 1500, 1800, 2500, 2800,
d6bb69cf 427 3000, 3000, 3000, 3000,
fa16a5c1
DB
428};
429static const u16 VAUX4_VSEL_table[] = {
430 700, 1000, 1200, UNSUP(1300),
431 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
432 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
433 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
434};
435static const u16 VMMC1_VSEL_table[] = {
436 1850, 2850, 3000, 3150,
437};
438static const u16 VMMC2_VSEL_table[] = {
439 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
440 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
441 2600, 2800, 2850, 3000,
442 3150, 3150, 3150, 3150,
443};
444static const u16 VPLL1_VSEL_table[] = {
445 1000, 1200, 1300, 1800,
446 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
447};
448static const u16 VPLL2_VSEL_table[] = {
449 700, 1000, 1200, 1300,
450 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
451 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
452 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
453};
454static const u16 VSIM_VSEL_table[] = {
455 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
456 2800, 3000, 3000, 3000,
457};
458static const u16 VDAC_VSEL_table[] = {
459 1200, 1300, 1800, 1800,
460};
07fc493f
JKS
461static const u16 VDD1_VSEL_table[] = {
462 800, 1450,
463};
464static const u16 VDD2_VSEL_table[] = {
465 800, 1450, 1500,
466};
467static const u16 VIO_VSEL_table[] = {
468 1800, 1850,
469};
470static const u16 VINTANA2_VSEL_table[] = {
471 2500, 2750,
472};
fa16a5c1 473
3e3d3be7 474static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
475{
476 struct twlreg_info *info = rdev_get_drvdata(rdev);
477 int mV = info->table[index];
478
479 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
480}
481
fa16a5c1 482static int
dd16b1f8 483twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
484{
485 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 486
dd16b1f8
AL
487 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
488 selector);
fa16a5c1
DB
489}
490
3e3d3be7 491static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
492{
493 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
494 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
495 VREG_VOLTAGE);
fa16a5c1
DB
496
497 if (vsel < 0)
498 return vsel;
499
500 vsel &= info->table_len - 1;
501 return LDO_MV(info->table[vsel]) * 1000;
502}
503
3e3d3be7
RN
504static struct regulator_ops twl4030ldo_ops = {
505 .list_voltage = twl4030ldo_list_voltage,
66b659e6 506
dd16b1f8 507 .set_voltage_sel = twl4030ldo_set_voltage_sel,
3e3d3be7
RN
508 .get_voltage = twl4030ldo_get_voltage,
509
f8c2940b 510 .enable = twl4030reg_enable,
0ff3897d 511 .disable = twl4030reg_disable,
b2456779 512 .is_enabled = twl4030reg_is_enabled,
48c936d6 513 .enable_time = twl4030reg_enable_time,
3e3d3be7 514
1a39962f 515 .set_mode = twl4030reg_set_mode,
3e3d3be7 516
9a0244ad 517 .get_status = twl4030reg_get_status,
3e3d3be7
RN
518};
519
ba305e31
TK
520static int
521twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
522 unsigned *selector)
523{
524 struct twlreg_info *info = rdev_get_drvdata(rdev);
525 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
526
63bfff4e
TK
527 if (info->set_voltage) {
528 return info->set_voltage(info->data, min_uV);
529 } else {
530 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
531 VREG_VOLTAGE_SMPS_4030, vsel);
532 }
533
ba305e31
TK
534 return 0;
535}
536
537static int twl4030smps_get_voltage(struct regulator_dev *rdev)
538{
539 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
540 int vsel;
541
542 if (info->get_voltage)
543 return info->get_voltage(info->data);
544
545 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
546 VREG_VOLTAGE_SMPS_4030);
547
548 return vsel * 12500 + 600000;
549}
550
551static struct regulator_ops twl4030smps_ops = {
552 .set_voltage = twl4030smps_set_voltage,
553 .get_voltage = twl4030smps_get_voltage,
554};
555
34a38440
TK
556static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
557 int max_uV, unsigned *selector)
558{
559 struct twlreg_info *info = rdev_get_drvdata(rdev);
560
561 if (info->set_voltage)
562 return info->set_voltage(info->data, min_uV);
563
564 return -ENODEV;
565}
566
567static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
568{
569 struct twlreg_info *info = rdev_get_drvdata(rdev);
570
571 if (info->get_voltage)
572 return info->get_voltage(info->data);
573
574 return -ENODEV;
575}
576
577static struct regulator_ops twl6030coresmps_ops = {
578 .set_voltage = twl6030coresmps_set_voltage,
579 .get_voltage = twl6030coresmps_get_voltage,
580};
581
3e3d3be7
RN
582static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
583{
584 struct twlreg_info *info = rdev_get_drvdata(rdev);
585
586 return ((info->min_mV + (index * 100)) * 1000);
587}
588
589static int
3a93f2a9
MB
590twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
591 unsigned *selector)
3e3d3be7
RN
592{
593 struct twlreg_info *info = rdev_get_drvdata(rdev);
594 int vsel;
595
596 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
597 return -EDOM;
598
599 /*
600 * Use the below formula to calculate vsel
601 * mV = 1000mv + 100mv * (vsel - 1)
602 */
603 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 604 *selector = vsel;
3e3d3be7
RN
605 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
606
607}
608
609static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
610{
611 struct twlreg_info *info = rdev_get_drvdata(rdev);
612 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
613 VREG_VOLTAGE);
614
615 if (vsel < 0)
616 return vsel;
617
618 /*
619 * Use the below formula to calculate vsel
620 * mV = 1000mv + 100mv * (vsel - 1)
621 */
622 return (1000 + (100 * (vsel - 1))) * 1000;
623}
624
625static struct regulator_ops twl6030ldo_ops = {
626 .list_voltage = twl6030ldo_list_voltage,
627
628 .set_voltage = twl6030ldo_set_voltage,
629 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 630
f8c2940b 631 .enable = twl6030reg_enable,
0ff3897d 632 .disable = twl6030reg_disable,
b2456779 633 .is_enabled = twl6030reg_is_enabled,
48c936d6 634 .enable_time = twl6030reg_enable_time,
fa16a5c1 635
1a39962f 636 .set_mode = twl6030reg_set_mode,
fa16a5c1 637
9a0244ad 638 .get_status = twl6030reg_get_status,
fa16a5c1
DB
639};
640
641/*----------------------------------------------------------------------*/
642
643/*
644 * Fixed voltage LDOs don't have a VSEL field to update.
645 */
c4aa6f31 646static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
647{
648 struct twlreg_info *info = rdev_get_drvdata(rdev);
649
650 return info->min_mV * 1000;
651}
652
c4aa6f31 653static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
654{
655 struct twlreg_info *info = rdev_get_drvdata(rdev);
656
657 return info->min_mV * 1000;
658}
659
b2456779
SH
660static struct regulator_ops twl4030fixed_ops = {
661 .list_voltage = twlfixed_list_voltage,
662
663 .get_voltage = twlfixed_get_voltage,
664
f8c2940b 665 .enable = twl4030reg_enable,
0ff3897d 666 .disable = twl4030reg_disable,
b2456779 667 .is_enabled = twl4030reg_is_enabled,
48c936d6 668 .enable_time = twl4030reg_enable_time,
b2456779 669
1a39962f 670 .set_mode = twl4030reg_set_mode,
b2456779 671
9a0244ad 672 .get_status = twl4030reg_get_status,
b2456779
SH
673};
674
675static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 676 .list_voltage = twlfixed_list_voltage,
66b659e6 677
c4aa6f31 678 .get_voltage = twlfixed_get_voltage,
fa16a5c1 679
f8c2940b 680 .enable = twl6030reg_enable,
0ff3897d 681 .disable = twl6030reg_disable,
b2456779 682 .is_enabled = twl6030reg_is_enabled,
48c936d6 683 .enable_time = twl6030reg_enable_time,
fa16a5c1 684
1a39962f 685 .set_mode = twl6030reg_set_mode,
fa16a5c1 686
9a0244ad 687 .get_status = twl6030reg_get_status,
fa16a5c1
DB
688};
689
8e6de4a3 690static struct regulator_ops twl6030_fixed_resource = {
f8c2940b 691 .enable = twl6030reg_enable,
0ff3897d 692 .disable = twl6030reg_disable,
b2456779 693 .is_enabled = twl6030reg_is_enabled,
48c936d6 694 .enable_time = twl6030reg_enable_time,
9a0244ad 695 .get_status = twl6030reg_get_status,
8e6de4a3
B
696};
697
4d94aee5
GG
698/*
699 * SMPS status and control
700 */
701
702static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
703{
704 struct twlreg_info *info = rdev_get_drvdata(rdev);
705
706 int voltage = 0;
707
708 switch (info->flags) {
709 case SMPS_OFFSET_EN:
710 voltage = 100000;
711 /* fall through */
712 case 0:
713 switch (index) {
714 case 0:
715 voltage = 0;
716 break;
717 case 58:
718 voltage = 1350 * 1000;
719 break;
720 case 59:
721 voltage = 1500 * 1000;
722 break;
723 case 60:
724 voltage = 1800 * 1000;
725 break;
726 case 61:
727 voltage = 1900 * 1000;
728 break;
729 case 62:
730 voltage = 2100 * 1000;
731 break;
732 default:
733 voltage += (600000 + (12500 * (index - 1)));
734 }
735 break;
736 case SMPS_EXTENDED_EN:
737 switch (index) {
738 case 0:
739 voltage = 0;
740 break;
741 case 58:
742 voltage = 2084 * 1000;
743 break;
744 case 59:
745 voltage = 2315 * 1000;
746 break;
747 case 60:
748 voltage = 2778 * 1000;
749 break;
750 case 61:
751 voltage = 2932 * 1000;
752 break;
753 case 62:
754 voltage = 3241 * 1000;
755 break;
756 default:
757 voltage = (1852000 + (38600 * (index - 1)));
758 }
759 break;
760 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
761 switch (index) {
762 case 0:
763 voltage = 0;
764 break;
765 case 58:
766 voltage = 4167 * 1000;
767 break;
768 case 59:
769 voltage = 2315 * 1000;
770 break;
771 case 60:
772 voltage = 2778 * 1000;
773 break;
774 case 61:
775 voltage = 2932 * 1000;
776 break;
777 case 62:
778 voltage = 3241 * 1000;
779 break;
780 default:
781 voltage = (2161000 + (38600 * (index - 1)));
782 }
783 break;
784 }
785
786 return voltage;
787}
788
789static int
790twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
791 unsigned int *selector)
792{
793 struct twlreg_info *info = rdev_get_drvdata(rdev);
794 int vsel = 0;
795
796 switch (info->flags) {
797 case 0:
798 if (min_uV == 0)
799 vsel = 0;
a33b6e5a
LD
800 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
801 int calc_uV;
268a1641 802 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 803 vsel++;
a33b6e5a
LD
804 calc_uV = twl6030smps_list_voltage(rdev, vsel);
805 if (calc_uV > max_uV)
806 return -EINVAL;
4d94aee5
GG
807 }
808 /* Values 1..57 for vsel are linear and can be calculated
809 * values 58..62 are non linear.
810 */
811 else if ((min_uV > 1900000) && (max_uV >= 2100000))
812 vsel = 62;
813 else if ((min_uV > 1800000) && (max_uV >= 1900000))
814 vsel = 61;
815 else if ((min_uV > 1500000) && (max_uV >= 1800000))
816 vsel = 60;
817 else if ((min_uV > 1350000) && (max_uV >= 1500000))
818 vsel = 59;
819 else if ((min_uV > 1300000) && (max_uV >= 1350000))
820 vsel = 58;
821 else
822 return -EINVAL;
823 break;
824 case SMPS_OFFSET_EN:
825 if (min_uV == 0)
826 vsel = 0;
a33b6e5a
LD
827 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
828 int calc_uV;
268a1641 829 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 830 vsel++;
a33b6e5a
LD
831 calc_uV = twl6030smps_list_voltage(rdev, vsel);
832 if (calc_uV > max_uV)
833 return -EINVAL;
4d94aee5
GG
834 }
835 /* Values 1..57 for vsel are linear and can be calculated
836 * values 58..62 are non linear.
837 */
838 else if ((min_uV > 1900000) && (max_uV >= 2100000))
839 vsel = 62;
840 else if ((min_uV > 1800000) && (max_uV >= 1900000))
841 vsel = 61;
842 else if ((min_uV > 1350000) && (max_uV >= 1800000))
843 vsel = 60;
844 else if ((min_uV > 1350000) && (max_uV >= 1500000))
845 vsel = 59;
846 else if ((min_uV > 1300000) && (max_uV >= 1350000))
847 vsel = 58;
848 else
849 return -EINVAL;
850 break;
851 case SMPS_EXTENDED_EN:
0cb2f123 852 if (min_uV == 0) {
4d94aee5 853 vsel = 0;
0cb2f123 854 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 855 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL
856 vsel++;
857 }
4d94aee5
GG
858 break;
859 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 860 if (min_uV == 0) {
4d94aee5 861 vsel = 0;
0cb2f123 862 } else if ((min_uV >= 2161000) && (max_uV <= 4321000)) {
268a1641 863 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL
864 vsel++;
865 }
4d94aee5
GG
866 break;
867 }
868
869 *selector = vsel;
870
871 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
872 vsel);
873}
874
875static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
876{
877 struct twlreg_info *info = rdev_get_drvdata(rdev);
878
879 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
880}
881
882static struct regulator_ops twlsmps_ops = {
883 .list_voltage = twl6030smps_list_voltage,
884
885 .set_voltage = twl6030smps_set_voltage,
886 .get_voltage_sel = twl6030smps_get_voltage_sel,
887
888 .enable = twl6030reg_enable,
889 .disable = twl6030reg_disable,
890 .is_enabled = twl6030reg_is_enabled,
48c936d6 891 .enable_time = twl6030reg_enable_time,
4d94aee5
GG
892
893 .set_mode = twl6030reg_set_mode,
894
895 .get_status = twl6030reg_get_status,
896};
897
fa16a5c1
DB
898/*----------------------------------------------------------------------*/
899
045f972f
JKS
900#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
901 remap_conf) \
902 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 903 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A
904#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
905 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 906 0x0, TWL6030, twl6030fixed_ops)
045f972f 907
2098e95c
RN
908#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
909static struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
910 .base = offset, \
911 .id = num, \
912 .table_len = ARRAY_SIZE(label##_VSEL_table), \
913 .table = label##_VSEL_table, \
045f972f
JKS
914 .delay = turnon_delay, \
915 .remap = remap_conf, \
fa16a5c1
DB
916 .desc = { \
917 .name = #label, \
3e3d3be7 918 .id = TWL4030_REG_##label, \
66b659e6 919 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
920 .ops = &twl4030ldo_ops, \
921 .type = REGULATOR_VOLTAGE, \
922 .owner = THIS_MODULE, \
923 }, \
924 }
925
ba305e31 926#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
2098e95c 927static struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
928 .base = offset, \
929 .id = num, \
930 .delay = turnon_delay, \
931 .remap = remap_conf, \
932 .desc = { \
933 .name = #label, \
934 .id = TWL4030_REG_##label, \
935 .ops = &twl4030smps_ops, \
936 .type = REGULATOR_VOLTAGE, \
937 .owner = THIS_MODULE, \
938 }, \
939 }
940
2098e95c
RN
941#define TWL6030_ADJUSTABLE_SMPS(label) \
942static struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK
943 .desc = { \
944 .name = #label, \
945 .id = TWL6030_REG_##label, \
946 .ops = &twl6030coresmps_ops, \
947 .type = REGULATOR_VOLTAGE, \
948 .owner = THIS_MODULE, \
949 }, \
950 }
951
2098e95c
RN
952#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
953static struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 954 .base = offset, \
3e3d3be7
RN
955 .min_mV = min_mVolts, \
956 .max_mV = max_mVolts, \
3e3d3be7
RN
957 .desc = { \
958 .name = #label, \
959 .id = TWL6030_REG_##label, \
7736f11d 960 .n_voltages = (max_mVolts - min_mVolts)/100 + 1, \
3e3d3be7 961 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
962 .type = REGULATOR_VOLTAGE, \
963 .owner = THIS_MODULE, \
964 }, \
965 }
966
2098e95c
RN
967#define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
968static struct twlreg_info TWL6025_INFO_##label = { \
4d94aee5 969 .base = offset, \
4d94aee5
GG
970 .min_mV = min_mVolts, \
971 .max_mV = max_mVolts, \
972 .desc = { \
973 .name = #label, \
974 .id = TWL6025_REG_##label, \
975 .n_voltages = ((max_mVolts - min_mVolts)/100) + 1, \
976 .ops = &twl6030ldo_ops, \
977 .type = REGULATOR_VOLTAGE, \
978 .owner = THIS_MODULE, \
979 }, \
980 }
3e3d3be7 981
045f972f 982#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c
RN
983 family, operations) \
984static struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
985 .base = offset, \
986 .id = num, \
987 .min_mV = mVolts, \
045f972f
JKS
988 .delay = turnon_delay, \
989 .remap = remap_conf, \
fa16a5c1
DB
990 .desc = { \
991 .name = #label, \
c4aa6f31 992 .id = family##_REG_##label, \
66b659e6 993 .n_voltages = 1, \
b2456779 994 .ops = &operations, \
fa16a5c1
DB
995 .type = REGULATOR_VOLTAGE, \
996 .owner = THIS_MODULE, \
997 }, \
998 }
999
2098e95c
RN
1000#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
1001static struct twlreg_info TWLRES_INFO_##label = { \
8e6de4a3 1002 .base = offset, \
8e6de4a3 1003 .delay = turnon_delay, \
8e6de4a3
B
1004 .desc = { \
1005 .name = #label, \
1006 .id = TWL6030_REG_##label, \
1007 .ops = &twl6030_fixed_resource, \
1008 .type = REGULATOR_VOLTAGE, \
1009 .owner = THIS_MODULE, \
1010 }, \
1011 }
1012
2098e95c
RN
1013#define TWL6025_ADJUSTABLE_SMPS(label, offset) \
1014static struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 1015 .base = offset, \
4d94aee5
GG
1016 .min_mV = 600, \
1017 .max_mV = 2100, \
1018 .desc = { \
1019 .name = #label, \
1020 .id = TWL6025_REG_##label, \
1021 .n_voltages = 63, \
1022 .ops = &twlsmps_ops, \
1023 .type = REGULATOR_VOLTAGE, \
1024 .owner = THIS_MODULE, \
1025 }, \
1026 }
1027
fa16a5c1
DB
1028/*
1029 * We list regulators here if systems need some level of
1030 * software control over them after boot.
1031 */
2098e95c
RN
1032TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
1033TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
1034TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
1035TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
1036TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
1037TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
1038TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
1039TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
1040TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
1041TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
1042TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
1043TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
1044TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
1045TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
1046TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
1047/* VUSBCP is managed *only* by the USB subchip */
1048/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1049/* Turnon-delay and remap configuration values for 6030 are not
1050 verified since the specification is not public */
1051TWL6030_ADJUSTABLE_SMPS(VDD1);
1052TWL6030_ADJUSTABLE_SMPS(VDD2);
1053TWL6030_ADJUSTABLE_SMPS(VDD3);
1054TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1055TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1056TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1057TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1058TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1059TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1060/* 6025 are renamed compared to 6030 versions */
1061TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1062TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1063TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1064TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1065TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1066TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1067TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1068TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1069TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
1070TWL4030_FIXED_LDO(VINTANA2, 0x3f, 1500, 11, 100, 0x08);
1071TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1072TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1073TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1074TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1075TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1076TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1077TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1078TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU
1079TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1080TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
2098e95c
RN
1081TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0);
1082TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34);
1083TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10);
1084TWL6025_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1085
4d94aee5
GG
1086static u8 twl_get_smps_offset(void)
1087{
1088 u8 value;
1089
1090 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1091 TWL6030_SMPS_OFFSET);
1092 return value;
1093}
1094
1095static u8 twl_get_smps_mult(void)
1096{
1097 u8 value;
1098
1099 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1100 TWL6030_SMPS_MULT);
1101 return value;
1102}
1103
2098e95c
RN
1104#define TWL_OF_MATCH(comp, family, label) \
1105 { \
1106 .compatible = comp, \
1107 .data = &family##_INFO_##label, \
1108 }
1109
1110#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1111#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
1112#define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label)
1113#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
1114#define TWLRES_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLRES, label)
1115#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1116
1117static const struct of_device_id twl_of_match[] __devinitconst = {
1118 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1119 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1120 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1121 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1122 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1123 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1124 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1125 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1126 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1127 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1128 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1129 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1130 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1131 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1132 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1133 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1134 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1135 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1136 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1137 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1138 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1139 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1140 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1141 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
1142 TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2),
1143 TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4),
1144 TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3),
1145 TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5),
1146 TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1),
1147 TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7),
1148 TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6),
1149 TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN),
1150 TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB),
1151 TWLFIXED_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1152 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1153 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1154 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1155 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1156 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1157 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1158 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1159 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU
1160 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1161 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
2098e95c
RN
1162 TWLRES_OF_MATCH("ti,twl6030-clk32kg", CLK32KG),
1163 TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3),
1164 TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4),
1165 TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO),
1166 {},
1167};
1168MODULE_DEVICE_TABLE(of, twl_of_match);
1169
24c29020 1170static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1 1171{
2098e95c 1172 int i, id;
fa16a5c1
DB
1173 struct twlreg_info *info;
1174 struct regulator_init_data *initdata;
1175 struct regulation_constraints *c;
1176 struct regulator_dev *rdev;
63bfff4e 1177 struct twl_regulator_driver_data *drvdata;
2098e95c 1178 const struct of_device_id *match;
c172708d 1179 struct regulator_config config = { };
2098e95c
RN
1180
1181 match = of_match_device(twl_of_match, &pdev->dev);
1182 if (match) {
1183 info = match->data;
1184 id = info->desc.id;
1185 initdata = of_get_regulator_init_data(&pdev->dev,
1186 pdev->dev.of_node);
1187 drvdata = NULL;
1188 } else {
1189 id = pdev->id;
1190 initdata = pdev->dev.platform_data;
1191 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1192 info = twl_of_match[i].data;
5ade3935
AL
1193 if (info && info->desc.id == id)
1194 break;
2098e95c 1195 }
5ade3935
AL
1196 if (i == ARRAY_SIZE(twl_of_match))
1197 return -ENODEV;
1198
2098e95c
RN
1199 drvdata = initdata->driver_data;
1200 if (!drvdata)
1201 return -EINVAL;
fa16a5c1 1202 }
2098e95c 1203
fa16a5c1
DB
1204 if (!info)
1205 return -ENODEV;
1206
fa16a5c1
DB
1207 if (!initdata)
1208 return -EINVAL;
1209
2098e95c
RN
1210 if (drvdata) {
1211 /* copy the driver data into regulator data */
1212 info->features = drvdata->features;
1213 info->data = drvdata->data;
1214 info->set_voltage = drvdata->set_voltage;
1215 info->get_voltage = drvdata->get_voltage;
1216 }
4d94aee5 1217
fa16a5c1
DB
1218 /* Constrain board-specific capabilities according to what
1219 * this driver and the chip itself can actually do.
1220 */
1221 c = &initdata->constraints;
fa16a5c1
DB
1222 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1223 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1224 | REGULATOR_CHANGE_MODE
1225 | REGULATOR_CHANGE_STATUS;
2098e95c 1226 switch (id) {
205e5cd3
JKS
1227 case TWL4030_REG_VIO:
1228 case TWL4030_REG_VDD1:
1229 case TWL4030_REG_VDD2:
1230 case TWL4030_REG_VPLL1:
1231 case TWL4030_REG_VINTANA1:
1232 case TWL4030_REG_VINTANA2:
1233 case TWL4030_REG_VINTDIG:
1234 c->always_on = true;
1235 break;
1236 default:
1237 break;
1238 }
fa16a5c1 1239
2098e95c 1240 switch (id) {
4d94aee5
GG
1241 case TWL6025_REG_SMPS3:
1242 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1243 info->flags |= SMPS_EXTENDED_EN;
1244 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1245 info->flags |= SMPS_OFFSET_EN;
1246 break;
1247 case TWL6025_REG_SMPS4:
1248 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1249 info->flags |= SMPS_EXTENDED_EN;
1250 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1251 info->flags |= SMPS_OFFSET_EN;
1252 break;
1253 case TWL6025_REG_VIO:
1254 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1255 info->flags |= SMPS_EXTENDED_EN;
1256 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1257 info->flags |= SMPS_OFFSET_EN;
1258 break;
1259 }
1260
c172708d
MB
1261 config.dev = &pdev->dev;
1262 config.init_data = initdata;
1263 config.driver_data = info;
1264 config.of_node = pdev->dev.of_node;
1265
1266 rdev = regulator_register(&info->desc, &config);
fa16a5c1
DB
1267 if (IS_ERR(rdev)) {
1268 dev_err(&pdev->dev, "can't register %s, %ld\n",
1269 info->desc.name, PTR_ERR(rdev));
1270 return PTR_ERR(rdev);
1271 }
1272 platform_set_drvdata(pdev, rdev);
1273
776dc923
SH
1274 if (twl_class_is_4030())
1275 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
1276 info->remap);
1277
fa16a5c1
DB
1278 /* NOTE: many regulators support short-circuit IRQs (presentable
1279 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1280 * - SC_CONFIG
1281 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1282 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1283 * - IT_CONFIG
1284 */
1285
1286 return 0;
1287}
1288
c4aa6f31 1289static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
1290{
1291 regulator_unregister(platform_get_drvdata(pdev));
1292 return 0;
1293}
1294
c4aa6f31 1295MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1296
c4aa6f31
RN
1297static struct platform_driver twlreg_driver = {
1298 .probe = twlreg_probe,
1299 .remove = __devexit_p(twlreg_remove),
fa16a5c1 1300 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1301 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1302 */
2098e95c
RN
1303 .driver = {
1304 .name = "twl_reg",
1305 .owner = THIS_MODULE,
1306 .of_match_table = of_match_ptr(twl_of_match),
1307 },
fa16a5c1
DB
1308};
1309
c4aa6f31 1310static int __init twlreg_init(void)
fa16a5c1 1311{
c4aa6f31 1312 return platform_driver_register(&twlreg_driver);
fa16a5c1 1313}
c4aa6f31 1314subsys_initcall(twlreg_init);
fa16a5c1 1315
c4aa6f31 1316static void __exit twlreg_exit(void)
fa16a5c1 1317{
c4aa6f31 1318 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1319}
c4aa6f31 1320module_exit(twlreg_exit)
fa16a5c1 1321
c4aa6f31 1322MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1323MODULE_LICENSE("GPL");
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