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regulator: twl6030: do not write to _GRP for regulator enable
[deliverable/linux.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB		 3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
53b8a9d9 15#include <linux/delay.h>
fa16a5c1
DB		 16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
b07682b6 19#include <linux/i2c/twl.h>
fa16a5c1
DB		 20
21
22/*
c4aa6f31 23 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB		 24 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
25 * include an audio codec, battery charger, and more voltage regulators.
26 * These chips are often used in OMAP-based systems.
27 *
28 * This driver implements software-based resource control for various
29 * voltage regulators. This is usually augmented with state machine
30 * based control.
31 */
32
33struct twlreg_info {
34 /* start of regulator's PM_RECEIVER control register bank */
35 u8 base;
36
c4aa6f31 37 /* twl resource ID, for resource control state machine */
fa16a5c1
DB		 38 u8 id;
39
40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
41 u8 table_len;
42 const u16 *table;
43
045f972f
JKS		 44 /* regulator specific turn-on delay */
45 u16 delay;
46
47 /* State REMAP default configuration */
48 u8 remap;
49
fa16a5c1
DB		 50 /* chip constraints on regulator behavior */
51 u16 min_mV;
3e3d3be7 52 u16 max_mV;
fa16a5c1
DB		 53
54 /* used by regulator core */
55 struct regulator_desc desc;
56};
57
58
59/* LDO control registers ... offset is from the base of its register bank.
60 * The first three registers of all power resource banks help hardware to
61 * manage the various resource groups.
62 */
441a4505 63/* Common offset in TWL4030/6030 */
fa16a5c1 64#define VREG_GRP 0
441a4505 65/* TWL4030 register offsets */
fa16a5c1
DB		 66#define VREG_TYPE 1
67#define VREG_REMAP 2
68#define VREG_DEDICATED 3 /* LDO control */
441a4505
RN		 69/* TWL6030 register offsets */
70#define VREG_TRANS 1
71#define VREG_STATE 2
72#define VREG_VOLTAGE 3
73/* TWL6030 Misc register offsets */
74#define VREG_BC_ALL 1
75#define VREG_BC_REF 2
76#define VREG_BC_PROC 3
77#define VREG_BC_CLK_RST 4
fa16a5c1 78
21657ebf
SH		 79/* TWL6030 LDO register values for CFG_STATE */
80#define TWL6030_CFG_STATE_OFF 0x00
81#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH		 82#define TWL6030_CFG_STATE_OFF2 0x02
83#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 84#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH		 85#define TWL6030_CFG_STATE_APP_SHIFT 2
86#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
87#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
88 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 89
fa16a5c1 90static inline int
441a4505 91twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB		 92{
93 u8 value;
94 int status;
95
441a4505 96 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB		 97 &value, info->base + offset);
98 return (status < 0) ? status : value;
99}
100
101static inline int
441a4505
RN		 102twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
103 u8 value)
fa16a5c1 104{
441a4505 105 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB		 106 value, info->base + offset);
107}
108
109/*----------------------------------------------------------------------*/
110
111/* generic power resource operations, which work on all regulators */
112
c4aa6f31 113static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 114{
441a4505
RN		 115 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
116 VREG_GRP);
fa16a5c1
DB		 117}
118
119/*
120 * Enable/disable regulators by joining/leaving the P1 (processor) group.
121 * We assume nobody else is updating the DEV_GRP registers.
122 */
441a4505
RN		 123/* definition for 4030 family */
124#define P3_GRP_4030 BIT(7) /* "peripherals" */
125#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
126#define P1_GRP_4030 BIT(5) /* CPU/Linux */
127/* definition for 6030 family */
128#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
129#define P2_GRP_6030 BIT(1) /* "peripherals" */
130#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 131
b2456779 132static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 133{
c4aa6f31 134 int state = twlreg_grp(rdev);
fa16a5c1
DB		 135
136 if (state < 0)
137 return state;
138
b2456779
SH		 139 return state & P1_GRP_4030;
140}
141
142static int twl6030reg_is_enabled(struct regulator_dev *rdev)
143{
144 struct twlreg_info *info = rdev_get_drvdata(rdev);
145 int grp, val;
146
147 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
148 if (grp < 0)
149 return grp;
150
151 grp &= P1_GRP_6030;
152
153 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
154 val = TWL6030_CFG_STATE_APP(val);
155
156 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB		 157}
158
f8c2940b 159static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB		 160{
161 struct twlreg_info *info = rdev_get_drvdata(rdev);
162 int grp;
53b8a9d9 163 int ret;
fa16a5c1 164
441a4505 165 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB		 166 if (grp < 0)
167 return grp;
168
f8c2940b 169 grp |= P1_GRP_4030;
441a4505 170
53b8a9d9
JKS		 171 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
172
f8c2940b
B		 173 udelay(info->delay);
174
175 return ret;
176}
177
178static int twl6030reg_enable(struct regulator_dev *rdev)
179{
180 struct twlreg_info *info = rdev_get_drvdata(rdev);
181 int grp;
182 int ret;
183
184 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
185 if (grp < 0)
186 return grp;
187
188 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
189 grp << TWL6030_CFG_STATE_GRP_SHIFT |
190 TWL6030_CFG_STATE_ON);
21657ebf 191
53b8a9d9
JKS		 192 udelay(info->delay);
193
194 return ret;
fa16a5c1
DB		 195}
196
c4aa6f31 197static int twlreg_disable(struct regulator_dev *rdev)
fa16a5c1
DB		 198{
199 struct twlreg_info *info = rdev_get_drvdata(rdev);
200 int grp;
21657ebf 201 int ret;
fa16a5c1 202
441a4505 203 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB		 204 if (grp < 0)
205 return grp;
206
21657ebf
SH		 207 /* For 6030, set the off state for all grps enabled */
208 if (twl_class_is_6030()) {
209 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
210 (grp & (P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030)) <<
211 TWL6030_CFG_STATE_GRP_SHIFT |
212 TWL6030_CFG_STATE_OFF);
213 if (ret)
214 return ret;
215 }
216
441a4505 217 if (twl_class_is_4030())
cf9836f4 218 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 219 else
cf9836f4 220 grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030);
441a4505 221
21657ebf
SH		 222 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
223
224 /* Next, associate cleared grp in state register */
225 if (!ret && twl_class_is_6030())
226 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
227 grp << TWL6030_CFG_STATE_GRP_SHIFT |
228 TWL6030_CFG_STATE_OFF);
229
230 return ret;
fa16a5c1
DB		 231}
232
9a0244ad 233static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 234{
c4aa6f31 235 int state = twlreg_grp(rdev);
fa16a5c1
DB		 236
237 if (state < 0)
238 return state;
239 state &= 0x0f;
240
241 /* assume state != WARM_RESET; we'd not be running... */
242 if (!state)
243 return REGULATOR_STATUS_OFF;
244 return (state & BIT(3))
245 ? REGULATOR_STATUS_NORMAL
246 : REGULATOR_STATUS_STANDBY;
247}
248
9a0244ad
SH		 249static int twl6030reg_get_status(struct regulator_dev *rdev)
250{
251 struct twlreg_info *info = rdev_get_drvdata(rdev);
252 int val;
253
254 val = twlreg_grp(rdev);
255 if (val < 0)
256 return val;
257
258 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
259
260 switch (TWL6030_CFG_STATE_APP(val)) {
261 case TWL6030_CFG_STATE_ON:
262 return REGULATOR_STATUS_NORMAL;
263
264 case TWL6030_CFG_STATE_SLEEP:
265 return REGULATOR_STATUS_STANDBY;
266
267 case TWL6030_CFG_STATE_OFF:
268 case TWL6030_CFG_STATE_OFF2:
269 default:
270 break;
271 }
272
273 return REGULATOR_STATUS_OFF;
274}
275
1a39962f 276static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB		 277{
278 struct twlreg_info *info = rdev_get_drvdata(rdev);
279 unsigned message;
280 int status;
281
282 /* We can only set the mode through state machine commands... */
283 switch (mode) {
284 case REGULATOR_MODE_NORMAL:
285 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
286 break;
287 case REGULATOR_MODE_STANDBY:
288 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
289 break;
290 default:
291 return -EINVAL;
292 }
293
294 /* Ensure the resource is associated with some group */
c4aa6f31 295 status = twlreg_grp(rdev);
fa16a5c1
DB		 296 if (status < 0)
297 return status;
441a4505 298 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB		 299 return -EACCES;
300
c4aa6f31 301 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL		 302 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
303 if (status < 0)
fa16a5c1
DB		 304 return status;
305
c4aa6f31 306 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 307 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB		 308}
309
1a39962f
SH		 310static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
311{
312 struct twlreg_info *info = rdev_get_drvdata(rdev);
313 int grp;
314 int val;
315
316 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
317
318 if (grp < 0)
319 return grp;
320
321 /* Compose the state register settings */
322 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
323 /* We can only set the mode through state machine commands... */
324 switch (mode) {
325 case REGULATOR_MODE_NORMAL:
326 val |= TWL6030_CFG_STATE_ON;
327 break;
328 case REGULATOR_MODE_STANDBY:
329 val |= TWL6030_CFG_STATE_SLEEP;
330 break;
331
332 default:
333 return -EINVAL;
334 }
335
336 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
337}
338
fa16a5c1
DB		 339/*----------------------------------------------------------------------*/
340
341/*
342 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
343 * select field in its control register. We use tables indexed by VSEL
344 * to record voltages in milliVolts. (Accuracy is about three percent.)
345 *
346 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
347 * currently handled by listing two slightly different VAUX2 regulators,
348 * only one of which will be configured.
349 *
350 * VSEL values documented as "TI cannot support these values" are flagged
351 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH		 352 *
353 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
354 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB		 355 */
356#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
357#define UNSUP_MASK 0x0000
358#else
359#define UNSUP_MASK 0x8000
360#endif
361
362#define UNSUP(x) (UNSUP_MASK | (x))
363#define IS_UNSUP(x) (UNSUP_MASK & (x))
364#define LDO_MV(x) (~UNSUP_MASK & (x))
365
366
367static const u16 VAUX1_VSEL_table[] = {
368 UNSUP(1500), UNSUP(1800), 2500, 2800,
369 3000, 3000, 3000, 3000,
370};
371static const u16 VAUX2_4030_VSEL_table[] = {
372 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
373 1500, 1800, UNSUP(1850), 2500,
374 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
375 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
376};
377static const u16 VAUX2_VSEL_table[] = {
378 1700, 1700, 1900, 1300,
379 1500, 1800, 2000, 2500,
380 2100, 2800, 2200, 2300,
381 2400, 2400, 2400, 2400,
382};
383static const u16 VAUX3_VSEL_table[] = {
384 1500, 1800, 2500, 2800,
d6bb69cf 385 3000, 3000, 3000, 3000,
fa16a5c1
DB		 386};
387static const u16 VAUX4_VSEL_table[] = {
388 700, 1000, 1200, UNSUP(1300),
389 1500, 1800, UNSUP(1850), 2500,
1897e742
DB		 390 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
391 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB		 392};
393static const u16 VMMC1_VSEL_table[] = {
394 1850, 2850, 3000, 3150,
395};
396static const u16 VMMC2_VSEL_table[] = {
397 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
398 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
399 2600, 2800, 2850, 3000,
400 3150, 3150, 3150, 3150,
401};
402static const u16 VPLL1_VSEL_table[] = {
403 1000, 1200, 1300, 1800,
404 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
405};
406static const u16 VPLL2_VSEL_table[] = {
407 700, 1000, 1200, 1300,
408 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
409 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
410 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
411};
412static const u16 VSIM_VSEL_table[] = {
413 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
414 2800, 3000, 3000, 3000,
415};
416static const u16 VDAC_VSEL_table[] = {
417 1200, 1300, 1800, 1800,
418};
07fc493f
JKS		 419static const u16 VDD1_VSEL_table[] = {
420 800, 1450,
421};
422static const u16 VDD2_VSEL_table[] = {
423 800, 1450, 1500,
424};
425static const u16 VIO_VSEL_table[] = {
426 1800, 1850,
427};
428static const u16 VINTANA2_VSEL_table[] = {
429 2500, 2750,
430};
fa16a5c1 431
3e3d3be7 432static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB		 433{
434 struct twlreg_info *info = rdev_get_drvdata(rdev);
435 int mV = info->table[index];
436
437 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
438}
439
fa16a5c1 440static int
3a93f2a9
MB		 441twl4030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
442 unsigned *selector)
fa16a5c1
DB		 443{
444 struct twlreg_info *info = rdev_get_drvdata(rdev);
445 int vsel;
446
447 for (vsel = 0; vsel < info->table_len; vsel++) {
448 int mV = info->table[vsel];
449 int uV;
450
451 if (IS_UNSUP(mV))
452 continue;
453 uV = LDO_MV(mV) * 1000;
454
66b659e6
DB		 455 /* REVISIT for VAUX2, first match may not be best/lowest */
456
fa16a5c1 457 /* use the first in-range value */
3a93f2a9
MB		 458 if (min_uV <= uV && uV <= max_uV) {
459 *selector = vsel;
441a4505
RN		 460 return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
461 VREG_VOLTAGE, vsel);
3a93f2a9 462 }
fa16a5c1
DB		 463 }
464
465 return -EDOM;
466}
467
3e3d3be7 468static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB		 469{
470 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN		 471 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
472 VREG_VOLTAGE);
fa16a5c1
DB		 473
474 if (vsel < 0)
475 return vsel;
476
477 vsel &= info->table_len - 1;
478 return LDO_MV(info->table[vsel]) * 1000;
479}
480
3e3d3be7
RN		 481static struct regulator_ops twl4030ldo_ops = {
482 .list_voltage = twl4030ldo_list_voltage,
66b659e6 483
3e3d3be7
RN		 484 .set_voltage = twl4030ldo_set_voltage,
485 .get_voltage = twl4030ldo_get_voltage,
486
f8c2940b 487 .enable = twl4030reg_enable,
3e3d3be7 488 .disable = twlreg_disable,
b2456779 489 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 490
1a39962f 491 .set_mode = twl4030reg_set_mode,
3e3d3be7 492
9a0244ad 493 .get_status = twl4030reg_get_status,
3e3d3be7
RN		 494};
495
496static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
497{
498 struct twlreg_info *info = rdev_get_drvdata(rdev);
499
500 return ((info->min_mV + (index * 100)) * 1000);
501}
502
503static int
3a93f2a9
MB		 504twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
505 unsigned *selector)
3e3d3be7
RN		 506{
507 struct twlreg_info *info = rdev_get_drvdata(rdev);
508 int vsel;
509
510 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
511 return -EDOM;
512
513 /*
514 * Use the below formula to calculate vsel
515 * mV = 1000mv + 100mv * (vsel - 1)
516 */
517 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 518 *selector = vsel;
3e3d3be7
RN		 519 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
520
521}
522
523static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
524{
525 struct twlreg_info *info = rdev_get_drvdata(rdev);
526 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
527 VREG_VOLTAGE);
528
529 if (vsel < 0)
530 return vsel;
531
532 /*
533 * Use the below formula to calculate vsel
534 * mV = 1000mv + 100mv * (vsel - 1)
535 */
536 return (1000 + (100 * (vsel - 1))) * 1000;
537}
538
539static struct regulator_ops twl6030ldo_ops = {
540 .list_voltage = twl6030ldo_list_voltage,
541
542 .set_voltage = twl6030ldo_set_voltage,
543 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 544
f8c2940b 545 .enable = twl6030reg_enable,
c4aa6f31 546 .disable = twlreg_disable,
b2456779 547 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 548
1a39962f 549 .set_mode = twl6030reg_set_mode,
fa16a5c1 550
9a0244ad 551 .get_status = twl6030reg_get_status,
fa16a5c1
DB		 552};
553
554/*----------------------------------------------------------------------*/
555
556/*
557 * Fixed voltage LDOs don't have a VSEL field to update.
558 */
c4aa6f31 559static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB		 560{
561 struct twlreg_info *info = rdev_get_drvdata(rdev);
562
563 return info->min_mV * 1000;
564}
565
c4aa6f31 566static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB		 567{
568 struct twlreg_info *info = rdev_get_drvdata(rdev);
569
570 return info->min_mV * 1000;
571}
572
b2456779
SH		 573static struct regulator_ops twl4030fixed_ops = {
574 .list_voltage = twlfixed_list_voltage,
575
576 .get_voltage = twlfixed_get_voltage,
577
f8c2940b 578 .enable = twl4030reg_enable,
b2456779
SH		 579 .disable = twlreg_disable,
580 .is_enabled = twl4030reg_is_enabled,
581
1a39962f 582 .set_mode = twl4030reg_set_mode,
b2456779 583
9a0244ad 584 .get_status = twl4030reg_get_status,
b2456779
SH		 585};
586
587static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 588 .list_voltage = twlfixed_list_voltage,
66b659e6 589
c4aa6f31 590 .get_voltage = twlfixed_get_voltage,
fa16a5c1 591
f8c2940b 592 .enable = twl6030reg_enable,
c4aa6f31 593 .disable = twlreg_disable,
b2456779 594 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 595
1a39962f 596 .set_mode = twl6030reg_set_mode,
fa16a5c1 597
9a0244ad 598 .get_status = twl6030reg_get_status,
fa16a5c1
DB		 599};
600
8e6de4a3 601static struct regulator_ops twl6030_fixed_resource = {
f8c2940b 602 .enable = twl6030reg_enable,
8e6de4a3 603 .disable = twlreg_disable,
b2456779 604 .is_enabled = twl6030reg_is_enabled,
9a0244ad 605 .get_status = twl6030reg_get_status,
8e6de4a3
B		 606};
607
fa16a5c1
DB		 608/*----------------------------------------------------------------------*/
609
045f972f
JKS		 610#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
611 remap_conf) \
612 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 613 remap_conf, TWL4030, twl4030fixed_ops)
776dc923 614#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay) \
045f972f 615 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 616 0x0, TWL6030, twl6030fixed_ops)
045f972f 617
3e3d3be7 618#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) { \
fa16a5c1
DB		 619 .base = offset, \
620 .id = num, \
621 .table_len = ARRAY_SIZE(label##_VSEL_table), \
622 .table = label##_VSEL_table, \
045f972f
JKS		 623 .delay = turnon_delay, \
624 .remap = remap_conf, \
fa16a5c1
DB		 625 .desc = { \
626 .name = #label, \
3e3d3be7 627 .id = TWL4030_REG_##label, \
66b659e6 628 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN		 629 .ops = &twl4030ldo_ops, \
630 .type = REGULATOR_VOLTAGE, \
631 .owner = THIS_MODULE, \
632 }, \
633 }
634
776dc923 635#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts, num) { \
3e3d3be7
RN		 636 .base = offset, \
637 .id = num, \
638 .min_mV = min_mVolts, \
639 .max_mV = max_mVolts, \
3e3d3be7
RN		 640 .desc = { \
641 .name = #label, \
642 .id = TWL6030_REG_##label, \
643 .n_voltages = (max_mVolts - min_mVolts)/100, \
644 .ops = &twl6030ldo_ops, \
fa16a5c1
DB		 645 .type = REGULATOR_VOLTAGE, \
646 .owner = THIS_MODULE, \
647 }, \
648 }
649
3e3d3be7 650
045f972f 651#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
b2456779 652 family, operations) { \
fa16a5c1
DB		 653 .base = offset, \
654 .id = num, \
655 .min_mV = mVolts, \
045f972f
JKS		 656 .delay = turnon_delay, \
657 .remap = remap_conf, \
fa16a5c1
DB		 658 .desc = { \
659 .name = #label, \
c4aa6f31 660 .id = family##_REG_##label, \
66b659e6 661 .n_voltages = 1, \
b2456779 662 .ops = &operations, \
fa16a5c1
DB		 663 .type = REGULATOR_VOLTAGE, \
664 .owner = THIS_MODULE, \
665 }, \
666 }
667
776dc923 668#define TWL6030_FIXED_RESOURCE(label, offset, num, turnon_delay) { \
8e6de4a3
B		 669 .base = offset, \
670 .id = num, \
671 .delay = turnon_delay, \
8e6de4a3
B		 672 .desc = { \
673 .name = #label, \
674 .id = TWL6030_REG_##label, \
675 .ops = &twl6030_fixed_resource, \
676 .type = REGULATOR_VOLTAGE, \
677 .owner = THIS_MODULE, \
678 }, \
679 }
680
fa16a5c1
DB		 681/*
682 * We list regulators here if systems need some level of
683 * software control over them after boot.
684 */
c4aa6f31 685static struct twlreg_info twl_regs[] = {
045f972f
JKS		 686 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
687 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
688 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
689 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
690 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
691 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
692 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
693 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
694 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
695 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
696 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
697 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
698 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
699 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
700 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
701 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
702 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
703 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
704 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
705 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
fa16a5c1 706 /* VUSBCP is managed *only* by the USB subchip */
441a4505
RN		 707
708 /* 6030 REG with base as PMC Slave Misc : 0x0030 */
045f972f
JKS		 709 /* Turnon-delay and remap configuration values for 6030 are not
710 verified since the specification is not public */
776dc923
SH		 711 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300, 1),
712 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300, 2),
713 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300, 3),
714 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300, 4),
715 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300, 5),
716 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300, 7),
717 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0),
718 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0),
719 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0),
720 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0),
721 TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 48, 0),
fa16a5c1
DB		 722};
723
24c29020 724static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1
DB		 725{
726 int i;
727 struct twlreg_info *info;
728 struct regulator_init_data *initdata;
729 struct regulation_constraints *c;
730 struct regulator_dev *rdev;
fa16a5c1 731
c4aa6f31
RN		 732 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
733 if (twl_regs[i].desc.id != pdev->id)
fa16a5c1 734 continue;
c4aa6f31 735 info = twl_regs + i;
fa16a5c1
DB		 736 break;
737 }
738 if (!info)
739 return -ENODEV;
740
741 initdata = pdev->dev.platform_data;
742 if (!initdata)
743 return -EINVAL;
744
745 /* Constrain board-specific capabilities according to what
746 * this driver and the chip itself can actually do.
747 */
748 c = &initdata->constraints;
fa16a5c1
DB		 749 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
750 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
751 | REGULATOR_CHANGE_MODE
752 | REGULATOR_CHANGE_STATUS;
205e5cd3
JKS		 753 switch (pdev->id) {
754 case TWL4030_REG_VIO:
755 case TWL4030_REG_VDD1:
756 case TWL4030_REG_VDD2:
757 case TWL4030_REG_VPLL1:
758 case TWL4030_REG_VINTANA1:
759 case TWL4030_REG_VINTANA2:
760 case TWL4030_REG_VINTDIG:
761 c->always_on = true;
762 break;
763 default:
764 break;
765 }
fa16a5c1
DB		 766
767 rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
768 if (IS_ERR(rdev)) {
769 dev_err(&pdev->dev, "can't register %s, %ld\n",
770 info->desc.name, PTR_ERR(rdev));
771 return PTR_ERR(rdev);
772 }
773 platform_set_drvdata(pdev, rdev);
774
776dc923
SH		 775 if (twl_class_is_4030())
776 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS		 777 info->remap);
778
fa16a5c1
DB		 779 /* NOTE: many regulators support short-circuit IRQs (presentable
780 * as REGULATOR_OVER_CURRENT notifications?) configured via:
781 * - SC_CONFIG
782 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
783 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
784 * - IT_CONFIG
785 */
786
787 return 0;
788}
789
c4aa6f31 790static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB		 791{
792 regulator_unregister(platform_get_drvdata(pdev));
793 return 0;
794}
795
c4aa6f31 796MODULE_ALIAS("platform:twl_reg");
fa16a5c1 797
c4aa6f31
RN		 798static struct platform_driver twlreg_driver = {
799 .probe = twlreg_probe,
800 .remove = __devexit_p(twlreg_remove),
fa16a5c1 801 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 802 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 803 */
c4aa6f31 804 .driver.name = "twl_reg",
fa16a5c1
DB		 805 .driver.owner = THIS_MODULE,
806};
807
c4aa6f31 808static int __init twlreg_init(void)
fa16a5c1 809{
c4aa6f31 810 return platform_driver_register(&twlreg_driver);
fa16a5c1 811}
c4aa6f31 812subsys_initcall(twlreg_init);
fa16a5c1 813
c4aa6f31 814static void __exit twlreg_exit(void)
fa16a5c1 815{
c4aa6f31 816 platform_driver_unregister(&twlreg_driver);
fa16a5c1 817}
c4aa6f31 818module_exit(twlreg_exit)
fa16a5c1 819
c4aa6f31 820MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 821MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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