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Merge tag 'drm-intel-fixes-2013-11-20' of git://people.freedesktop.org/~danvet/drm...
[deliverable/linux.git] / drivers / regulator / wm831x-dcdc.c
CommitLineData
e4ee831f
MB		 1/*
2 * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
e24a04c4
MB		 22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
5a0e3ad6 24#include <linux/slab.h>
e4ee831f
MB		 25
26#include <linux/mfd/wm831x/core.h>
27#include <linux/mfd/wm831x/regulator.h>
28#include <linux/mfd/wm831x/pdata.h>
29
30#define WM831X_BUCKV_MAX_SELECTOR 0x68
31#define WM831X_BUCKP_MAX_SELECTOR 0x66
32
33#define WM831X_DCDC_MODE_FAST 0
34#define WM831X_DCDC_MODE_NORMAL 1
35#define WM831X_DCDC_MODE_IDLE 2
36#define WM831X_DCDC_MODE_STANDBY 3
37
82caa978 38#define WM831X_DCDC_MAX_NAME 9
e4ee831f
MB		 39
40/* Register offsets in control block */
41#define WM831X_DCDC_CONTROL_1 0
42#define WM831X_DCDC_CONTROL_2 1
43#define WM831X_DCDC_ON_CONFIG 2
44#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 45#define WM831X_DCDC_DVS_CONTROL 4
e4ee831f
MB		 46
47/*
48 * Shared
49 */
50
51struct wm831x_dcdc {
52 char name[WM831X_DCDC_MAX_NAME];
82caa978 53 char supply_name[WM831X_DCDC_MAX_NAME];
e4ee831f
MB		 54 struct regulator_desc desc;
55 int base;
56 struct wm831x *wm831x;
57 struct regulator_dev *regulator;
e24a04c4
MB		 58 int dvs_gpio;
59 int dvs_gpio_state;
60 int on_vsel;
61 int dvs_vsel;
e4ee831f
MB		 62};
63
e4ee831f
MB		 64static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
65
66{
67 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
68 struct wm831x *wm831x = dcdc->wm831x;
69 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
70 int val;
71
72 val = wm831x_reg_read(wm831x, reg);
73 if (val < 0)
74 return val;
75
76 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
77
78 switch (val) {
79 case WM831X_DCDC_MODE_FAST:
80 return REGULATOR_MODE_FAST;
81 case WM831X_DCDC_MODE_NORMAL:
82 return REGULATOR_MODE_NORMAL;
83 case WM831X_DCDC_MODE_STANDBY:
84 return REGULATOR_MODE_STANDBY;
85 case WM831X_DCDC_MODE_IDLE:
86 return REGULATOR_MODE_IDLE;
87 default:
88 BUG();
9ee291a4 89 return -EINVAL;
e4ee831f
MB		 90 }
91}
92
93static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
94 unsigned int mode)
95{
96 int val;
97
98 switch (mode) {
99 case REGULATOR_MODE_FAST:
100 val = WM831X_DCDC_MODE_FAST;
101 break;
102 case REGULATOR_MODE_NORMAL:
103 val = WM831X_DCDC_MODE_NORMAL;
104 break;
105 case REGULATOR_MODE_STANDBY:
106 val = WM831X_DCDC_MODE_STANDBY;
107 break;
108 case REGULATOR_MODE_IDLE:
109 val = WM831X_DCDC_MODE_IDLE;
110 break;
111 default:
112 return -EINVAL;
113 }
114
115 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
116 val << WM831X_DC1_ON_MODE_SHIFT);
117}
118
119static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
120{
121 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
122 struct wm831x *wm831x = dcdc->wm831x;
123 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
124
125 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
126}
127
128static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
129 unsigned int mode)
130{
131 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
132 struct wm831x *wm831x = dcdc->wm831x;
133 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
134
135 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
136}
137
138static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
139{
140 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
141 struct wm831x *wm831x = dcdc->wm831x;
142 int ret;
143
144 /* First, check for errors */
145 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
146 if (ret < 0)
147 return ret;
148
149 if (ret & (1 << rdev_get_id(rdev))) {
150 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
151 rdev_get_id(rdev) + 1);
152 return REGULATOR_STATUS_ERROR;
153 }
154
155 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
156 if (rdev_get_id(rdev) < 2) {
157 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
158 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
159 rdev_get_id(rdev) + 1);
160 return REGULATOR_STATUS_ERROR;
161 }
162
163 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
164 dev_dbg(wm831x->dev, "DCDC%d over current\n",
165 rdev_get_id(rdev) + 1);
166 return REGULATOR_STATUS_ERROR;
167 }
168 }
169
170 /* Is the regulator on? */
171 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
172 if (ret < 0)
173 return ret;
174 if (!(ret & (1 << rdev_get_id(rdev))))
175 return REGULATOR_STATUS_OFF;
176
177 /* TODO: When we handle hardware control modes so we can report the
178 * current mode. */
179 return REGULATOR_STATUS_ON;
180}
181
182static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
183{
184 struct wm831x_dcdc *dcdc = data;
185
186 regulator_notifier_call_chain(dcdc->regulator,
187 REGULATOR_EVENT_UNDER_VOLTAGE,
188 NULL);
189
190 return IRQ_HANDLED;
191}
192
193static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
194{
195 struct wm831x_dcdc *dcdc = data;
196
197 regulator_notifier_call_chain(dcdc->regulator,
198 REGULATOR_EVENT_OVER_CURRENT,
199 NULL);
200
201 return IRQ_HANDLED;
202}
203
204/*
205 * BUCKV specifics
206 */
207
208static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
209 unsigned selector)
210{
211 if (selector <= 0x8)
212 return 600000;
213 if (selector <= WM831X_BUCKV_MAX_SELECTOR)
214 return 600000 + ((selector - 0x8) * 12500);
215 return -EINVAL;
216}
217
b5fb77e0
AL		 218static int wm831x_buckv_map_voltage(struct regulator_dev *rdev,
219 int min_uV, int max_uV)
e4ee831f 220{
e4ee831f
MB		 221 u16 vsel;
222
223 if (min_uV < 600000)
224 vsel = 0;
225 else if (min_uV <= 1800000)
1a679930 226 vsel = DIV_ROUND_UP(min_uV - 600000, 12500) + 8;
e4ee831f
MB		 227 else
228 return -EINVAL;
229
230 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
231 return -EINVAL;
232
e24a04c4
MB		 233 return vsel;
234}
235
e24a04c4
MB		 236static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
237{
238 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
239
240 if (state == dcdc->dvs_gpio_state)
241 return 0;
242
243 dcdc->dvs_gpio_state = state;
244 gpio_set_value(dcdc->dvs_gpio, state);
245
246 /* Should wait for DVS state change to be asserted if we have
247 * a GPIO for it, for now assume the device is configured
248 * for the fastest possible transition.
249 */
250
251 return 0;
e4ee831f
MB		 252}
253
b5fb77e0
AL		 254static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
255 unsigned vsel)
e4ee831f
MB		 256{
257 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4
MB		 258 struct wm831x *wm831x = dcdc->wm831x;
259 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
260 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
b5fb77e0 261 int ret;
3a93f2a9 262
e24a04c4
MB		 263 /* If this value is already set then do a GPIO update if we can */
264 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
265 return wm831x_buckv_set_dvs(rdev, 0);
266
267 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
268 return wm831x_buckv_set_dvs(rdev, 1);
269
270 /* Always set the ON status to the minimum voltage */
271 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
272 if (ret < 0)
273 return ret;
274 dcdc->on_vsel = vsel;
275
276 if (!dcdc->dvs_gpio)
277 return ret;
278
279 /* Kick the voltage transition now */
280 ret = wm831x_buckv_set_dvs(rdev, 0);
281 if (ret < 0)
282 return ret;
283
88cda60e
MB		 284 /*
285 * If this VSEL is higher than the last one we've seen then
286 * remember it as the DVS VSEL. This is optimised for CPUfreq
287 * usage where we want to get to the highest voltage very
288 * quickly.
289 */
290 if (vsel > dcdc->dvs_vsel) {
291 ret = wm831x_set_bits(wm831x, dvs_reg,
292 WM831X_DC1_DVS_VSEL_MASK,
13ae633c 293 vsel);
88cda60e
MB		 294 if (ret == 0)
295 dcdc->dvs_vsel = vsel;
296 else
297 dev_warn(wm831x->dev,
298 "Failed to set DCDC DVS VSEL: %d\n", ret);
e24a04c4
MB		 299 }
300
e24a04c4 301 return 0;
e4ee831f
MB		 302}
303
304static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 305 int uV)
e4ee831f
MB		 306{
307 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 308 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 309 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
e24a04c4
MB		 310 int vsel;
311
b5fb77e0 312 vsel = wm831x_buckv_map_voltage(rdev, uV, uV);
e24a04c4
MB		 313 if (vsel < 0)
314 return vsel;
e4ee831f 315
e24a04c4 316 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
e4ee831f
MB		 317}
318
afb8bb80 319static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 320{
321 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 322
e24a04c4 323 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
afb8bb80 324 return dcdc->dvs_vsel;
e24a04c4 325 else
afb8bb80 326 return dcdc->on_vsel;
e4ee831f
MB		 327}
328
329/* Current limit options */
330static u16 wm831x_dcdc_ilim[] = {
331 125, 250, 375, 500, 625, 750, 875, 1000
332};
333
334static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
335 int min_uA, int max_uA)
336{
337 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
338 struct wm831x *wm831x = dcdc->wm831x;
339 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
340 int i;
341
422294de 342 for (i = ARRAY_SIZE(wm831x_dcdc_ilim) - 1; i >= 0; i--) {
a171e782
AL		 343 if ((min_uA <= wm831x_dcdc_ilim[i]) &&
344 (wm831x_dcdc_ilim[i] <= max_uA))
422294de
AL		 345 return wm831x_set_bits(wm831x, reg,
346 WM831X_DC1_HC_THR_MASK,
347 i << WM831X_DC1_HC_THR_SHIFT);
e4ee831f 348 }
e4ee831f 349
422294de 350 return -EINVAL;
e4ee831f
MB		 351}
352
353static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
354{
355 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
356 struct wm831x *wm831x = dcdc->wm831x;
357 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
358 int val;
359
360 val = wm831x_reg_read(wm831x, reg);
361 if (val < 0)
362 return val;
363
09bf14b9
AL		 364 val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
365 return wm831x_dcdc_ilim[val];
e4ee831f
MB		 366}
367
368static struct regulator_ops wm831x_buckv_ops = {
b5fb77e0 369 .set_voltage_sel = wm831x_buckv_set_voltage_sel,
afb8bb80 370 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
e4ee831f 371 .list_voltage = wm831x_buckv_list_voltage,
b5fb77e0 372 .map_voltage = wm831x_buckv_map_voltage,
e4ee831f
MB		 373 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
374 .set_current_limit = wm831x_buckv_set_current_limit,
375 .get_current_limit = wm831x_buckv_get_current_limit,
376
3d138fcc
MB		 377 .is_enabled = regulator_is_enabled_regmap,
378 .enable = regulator_enable_regmap,
379 .disable = regulator_disable_regmap,
e4ee831f
MB		 380 .get_status = wm831x_dcdc_get_status,
381 .get_mode = wm831x_dcdc_get_mode,
382 .set_mode = wm831x_dcdc_set_mode,
383 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
384};
385
e24a04c4
MB		 386/*
387 * Set up DVS control. We just log errors since we can still run
388 * (with reduced performance) if we fail.
389 */
1aa20d27
MB		 390static void wm831x_buckv_dvs_init(struct platform_device *pdev,
391 struct wm831x_dcdc *dcdc,
392 struct wm831x_buckv_pdata *pdata)
e24a04c4
MB		 393{
394 struct wm831x *wm831x = dcdc->wm831x;
395 int ret;
396 u16 ctrl;
397
398 if (!pdata || !pdata->dvs_gpio)
399 return;
400
e24a04c4
MB		 401 /* gpiolib won't let us read the GPIO status so pick the higher
402 * of the two existing voltages so we take it as platform data.
403 */
404 dcdc->dvs_gpio_state = pdata->dvs_init_state;
405
1aa20d27
MB		 406 ret = devm_gpio_request_one(&pdev->dev, pdata->dvs_gpio,
407 dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0,
408 "DCDC DVS");
e24a04c4 409 if (ret < 0) {
053fa1b7 410 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
e24a04c4 411 dcdc->name, ret);
e24a04c4
MB		 412 return;
413 }
414
415 dcdc->dvs_gpio = pdata->dvs_gpio;
b47ba9fd
MB		 416
417 switch (pdata->dvs_control_src) {
418 case 1:
419 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
420 break;
421 case 2:
422 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
423 break;
424 default:
425 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
426 pdata->dvs_control_src, dcdc->name);
427 return;
428 }
429
c439b8f4
MB		 430 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
431 * to make bootstrapping a bit smoother.
432 */
433 if (!dcdc->dvs_vsel) {
434 ret = wm831x_set_bits(wm831x,
435 dcdc->base + WM831X_DCDC_DVS_CONTROL,
436 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
437 if (ret == 0)
438 dcdc->dvs_vsel = dcdc->on_vsel;
439 else
440 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
441 ret);
442 }
443
b47ba9fd
MB		 444 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
445 WM831X_DC1_DVS_SRC_MASK, ctrl);
446 if (ret < 0) {
447 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
448 dcdc->name, ret);
449 }
e24a04c4
MB		 450}
451
a5023574 452static int wm831x_buckv_probe(struct platform_device *pdev)
e4ee831f
MB		 453{
454 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 455 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 456 struct regulator_config config = { };
137a6354 457 int id;
e4ee831f
MB		 458 struct wm831x_dcdc *dcdc;
459 struct resource *res;
460 int ret, irq;
461
137a6354
MB		 462 if (pdata && pdata->wm831x_num)
463 id = (pdata->wm831x_num * 10) + 1;
464 else
465 id = 0;
466 id = pdev->id - id;
467
e4ee831f
MB		 468 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
469
fded2f4f
MB		 470 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
471 GFP_KERNEL);
e4ee831f
MB		 472 if (dcdc == NULL) {
473 dev_err(&pdev->dev, "Unable to allocate private data\n");
474 return -ENOMEM;
475 }
476
477 dcdc->wm831x = wm831x;
478
5656098e 479 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 480 if (res == NULL) {
5656098e 481 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 482 ret = -EINVAL;
483 goto err;
484 }
485 dcdc->base = res->start;
486
487 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
488 dcdc->desc.name = dcdc->name;
82caa978
MB		 489
490 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
491 "DC%dVDD", id + 1);
492 dcdc->desc.supply_name = dcdc->supply_name;
493
e4ee831f
MB		 494 dcdc->desc.id = id;
495 dcdc->desc.type = REGULATOR_VOLTAGE;
496 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
497 dcdc->desc.ops = &wm831x_buckv_ops;
498 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 499 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
500 dcdc->desc.enable_mask = 1 << id;
e4ee831f 501
e24a04c4
MB		 502 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
503 if (ret < 0) {
504 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
505 goto err;
506 }
507 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
508
a1b81dd3 509 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
MB		 510 if (ret < 0) {
511 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
512 goto err;
513 }
514 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
515
f0b067d9 516 if (pdata && pdata->dcdc[id])
1aa20d27
MB		 517 wm831x_buckv_dvs_init(pdev, dcdc,
518 pdata->dcdc[id]->driver_data);
e24a04c4 519
c172708d 520 config.dev = pdev->dev.parent;
b7ca8788
MB		 521 if (pdata)
522 config.init_data = pdata->dcdc[id];
c172708d 523 config.driver_data = dcdc;
3d138fcc 524 config.regmap = wm831x->regmap;
c172708d 525
d73b4cb7
MB		 526 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
527 &config);
e4ee831f
MB		 528 if (IS_ERR(dcdc->regulator)) {
529 ret = PTR_ERR(dcdc->regulator);
530 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
531 id + 1, ret);
532 goto err;
533 }
534
cd99758b 535 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 536 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
537 wm831x_dcdc_uv_irq,
538 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 539 if (ret != 0) {
540 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
541 irq, ret);
d73b4cb7 542 goto err;
e4ee831f
MB		 543 }
544
cd99758b 545 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
b0c4c0c6
MB		 546 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
547 wm831x_dcdc_oc_irq,
548 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 549 if (ret != 0) {
550 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
551 irq, ret);
d73b4cb7 552 goto err;
e4ee831f
MB		 553 }
554
555 platform_set_drvdata(pdev, dcdc);
556
557 return 0;
558
e4ee831f 559err:
e4ee831f
MB		 560 return ret;
561}
562
e4ee831f
MB		 563static struct platform_driver wm831x_buckv_driver = {
564 .probe = wm831x_buckv_probe,
e4ee831f
MB		 565 .driver = {
566 .name = "wm831x-buckv",
eb66d565 567 .owner = THIS_MODULE,
e4ee831f
MB		 568 },
569};
570
571/*
572 * BUCKP specifics
573 */
574
d580cb5e 575static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
e4ee831f
MB		 576{
577 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
578 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 579 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
d580cb5e
AL		 580 int sel;
581
582 sel = regulator_map_voltage_linear(rdev, uV, uV);
583 if (sel < 0)
584 return sel;
e4ee831f 585
d580cb5e 586 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
e4ee831f
MB		 587}
588
e4ee831f 589static struct regulator_ops wm831x_buckp_ops = {
d580cb5e 590 .set_voltage_sel = regulator_set_voltage_sel_regmap,
817436e7 591 .get_voltage_sel = regulator_get_voltage_sel_regmap,
c70ad9dc 592 .list_voltage = regulator_list_voltage_linear,
d580cb5e 593 .map_voltage = regulator_map_voltage_linear,
e4ee831f
MB		 594 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
595
3d138fcc
MB		 596 .is_enabled = regulator_is_enabled_regmap,
597 .enable = regulator_enable_regmap,
598 .disable = regulator_disable_regmap,
e4ee831f
MB		 599 .get_status = wm831x_dcdc_get_status,
600 .get_mode = wm831x_dcdc_get_mode,
601 .set_mode = wm831x_dcdc_set_mode,
602 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
603};
604
a5023574 605static int wm831x_buckp_probe(struct platform_device *pdev)
e4ee831f
MB		 606{
607 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 608 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 609 struct regulator_config config = { };
137a6354 610 int id;
e4ee831f
MB		 611 struct wm831x_dcdc *dcdc;
612 struct resource *res;
613 int ret, irq;
614
137a6354
MB		 615 if (pdata && pdata->wm831x_num)
616 id = (pdata->wm831x_num * 10) + 1;
617 else
618 id = 0;
619 id = pdev->id - id;
620
e4ee831f
MB		 621 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
622
fded2f4f
MB		 623 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
624 GFP_KERNEL);
e4ee831f
MB		 625 if (dcdc == NULL) {
626 dev_err(&pdev->dev, "Unable to allocate private data\n");
627 return -ENOMEM;
628 }
629
630 dcdc->wm831x = wm831x;
631
5656098e 632 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 633 if (res == NULL) {
5656098e 634 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 635 ret = -EINVAL;
636 goto err;
637 }
638 dcdc->base = res->start;
639
640 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
641 dcdc->desc.name = dcdc->name;
82caa978
MB		 642
643 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
644 "DC%dVDD", id + 1);
645 dcdc->desc.supply_name = dcdc->supply_name;
646
e4ee831f
MB		 647 dcdc->desc.id = id;
648 dcdc->desc.type = REGULATOR_VOLTAGE;
649 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
650 dcdc->desc.ops = &wm831x_buckp_ops;
651 dcdc->desc.owner = THIS_MODULE;
817436e7
MB		 652 dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
653 dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
3d138fcc
MB		 654 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
655 dcdc->desc.enable_mask = 1 << id;
c70ad9dc
AL		 656 dcdc->desc.min_uV = 850000;
657 dcdc->desc.uV_step = 25000;
e4ee831f 658
c172708d 659 config.dev = pdev->dev.parent;
b7ca8788
MB		 660 if (pdata)
661 config.init_data = pdata->dcdc[id];
c172708d 662 config.driver_data = dcdc;
817436e7 663 config.regmap = wm831x->regmap;
c172708d 664
d73b4cb7
MB		 665 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
666 &config);
e4ee831f
MB		 667 if (IS_ERR(dcdc->regulator)) {
668 ret = PTR_ERR(dcdc->regulator);
669 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
670 id + 1, ret);
671 goto err;
672 }
673
cd99758b 674 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 675 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
676 wm831x_dcdc_uv_irq,
677 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 678 if (ret != 0) {
679 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
680 irq, ret);
d73b4cb7 681 goto err;
e4ee831f
MB		 682 }
683
684 platform_set_drvdata(pdev, dcdc);
685
686 return 0;
687
e4ee831f 688err:
e4ee831f
MB		 689 return ret;
690}
691
e4ee831f
MB		 692static struct platform_driver wm831x_buckp_driver = {
693 .probe = wm831x_buckp_probe,
e4ee831f
MB		 694 .driver = {
695 .name = "wm831x-buckp",
eb66d565 696 .owner = THIS_MODULE,
e4ee831f
MB		 697 },
698};
699
1304850d
MB		 700/*
701 * DCDC boost convertors
702 */
703
704static int wm831x_boostp_get_status(struct regulator_dev *rdev)
705{
706 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
707 struct wm831x *wm831x = dcdc->wm831x;
708 int ret;
709
710 /* First, check for errors */
711 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
712 if (ret < 0)
713 return ret;
714
715 if (ret & (1 << rdev_get_id(rdev))) {
716 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
717 rdev_get_id(rdev) + 1);
718 return REGULATOR_STATUS_ERROR;
719 }
720
721 /* Is the regulator on? */
722 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
723 if (ret < 0)
724 return ret;
725 if (ret & (1 << rdev_get_id(rdev)))
726 return REGULATOR_STATUS_ON;
727 else
728 return REGULATOR_STATUS_OFF;
729}
730
731static struct regulator_ops wm831x_boostp_ops = {
732 .get_status = wm831x_boostp_get_status,
733
3d138fcc
MB		 734 .is_enabled = regulator_is_enabled_regmap,
735 .enable = regulator_enable_regmap,
736 .disable = regulator_disable_regmap,
1304850d
MB		 737};
738
a5023574 739static int wm831x_boostp_probe(struct platform_device *pdev)
1304850d
MB		 740{
741 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 742 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 743 struct regulator_config config = { };
1304850d
MB		 744 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
745 struct wm831x_dcdc *dcdc;
746 struct resource *res;
747 int ret, irq;
748
749 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
750
751 if (pdata == NULL || pdata->dcdc[id] == NULL)
752 return -ENODEV;
753
4c60165d 754 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
1304850d
MB		 755 if (dcdc == NULL) {
756 dev_err(&pdev->dev, "Unable to allocate private data\n");
757 return -ENOMEM;
758 }
759
760 dcdc->wm831x = wm831x;
761
5656098e 762 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
1304850d 763 if (res == NULL) {
5656098e 764 dev_err(&pdev->dev, "No REG resource\n");
1304850d
MB		 765 ret = -EINVAL;
766 goto err;
767 }
768 dcdc->base = res->start;
769
770 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
771 dcdc->desc.name = dcdc->name;
772 dcdc->desc.id = id;
773 dcdc->desc.type = REGULATOR_VOLTAGE;
774 dcdc->desc.ops = &wm831x_boostp_ops;
775 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 776 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
777 dcdc->desc.enable_mask = 1 << id;
1304850d 778
c172708d 779 config.dev = pdev->dev.parent;
f0b067d9
MB		 780 if (pdata)
781 config.init_data = pdata->dcdc[id];
c172708d 782 config.driver_data = dcdc;
3d138fcc 783 config.regmap = wm831x->regmap;
c172708d 784
d73b4cb7
MB		 785 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
786 &config);
1304850d
MB		 787 if (IS_ERR(dcdc->regulator)) {
788 ret = PTR_ERR(dcdc->regulator);
789 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
790 id + 1, ret);
791 goto err;
792 }
793
cd99758b 794 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 795 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
796 wm831x_dcdc_uv_irq,
797 IRQF_TRIGGER_RISING, dcdc->name,
798 dcdc);
1304850d
MB		 799 if (ret != 0) {
800 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
801 irq, ret);
d73b4cb7 802 goto err;
1304850d
MB		 803 }
804
805 platform_set_drvdata(pdev, dcdc);
806
807 return 0;
808
1304850d 809err:
1304850d
MB		 810 return ret;
811}
812
1304850d
MB		 813static struct platform_driver wm831x_boostp_driver = {
814 .probe = wm831x_boostp_probe,
1304850d
MB		 815 .driver = {
816 .name = "wm831x-boostp",
eb66d565 817 .owner = THIS_MODULE,
1304850d
MB		 818 },
819};
820
8267a9ba
MB		 821/*
822 * External Power Enable
823 *
824 * These aren't actually DCDCs but look like them in hardware so share
825 * code.
826 */
827
828#define WM831X_EPE_BASE 6
829
830static struct regulator_ops wm831x_epe_ops = {
3d138fcc
MB		 831 .is_enabled = regulator_is_enabled_regmap,
832 .enable = regulator_enable_regmap,
833 .disable = regulator_disable_regmap,
8267a9ba
MB		 834 .get_status = wm831x_dcdc_get_status,
835};
836
a5023574 837static int wm831x_epe_probe(struct platform_device *pdev)
8267a9ba
MB		 838{
839 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 840 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 841 struct regulator_config config = { };
8267a9ba
MB		 842 int id = pdev->id % ARRAY_SIZE(pdata->epe);
843 struct wm831x_dcdc *dcdc;
844 int ret;
845
846 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
847
4c60165d 848 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
8267a9ba
MB		 849 if (dcdc == NULL) {
850 dev_err(&pdev->dev, "Unable to allocate private data\n");
851 return -ENOMEM;
852 }
853
854 dcdc->wm831x = wm831x;
855
856 /* For current parts this is correct; probably need to revisit
857 * in future.
858 */
859 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
860 dcdc->desc.name = dcdc->name;
861 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
862 dcdc->desc.ops = &wm831x_epe_ops;
863 dcdc->desc.type = REGULATOR_VOLTAGE;
864 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 865 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
866 dcdc->desc.enable_mask = 1 << dcdc->desc.id;
8267a9ba 867
c172708d 868 config.dev = pdev->dev.parent;
b7ca8788
MB		 869 if (pdata)
870 config.init_data = pdata->epe[id];
c172708d 871 config.driver_data = dcdc;
3d138fcc 872 config.regmap = wm831x->regmap;
c172708d 873
d73b4cb7
MB		 874 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
875 &config);
8267a9ba
MB		 876 if (IS_ERR(dcdc->regulator)) {
877 ret = PTR_ERR(dcdc->regulator);
878 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
879 id + 1, ret);
880 goto err;
881 }
882
883 platform_set_drvdata(pdev, dcdc);
884
885 return 0;
886
887err:
8267a9ba
MB		 888 return ret;
889}
890
8267a9ba
MB		 891static struct platform_driver wm831x_epe_driver = {
892 .probe = wm831x_epe_probe,
8267a9ba
MB		 893 .driver = {
894 .name = "wm831x-epe",
eb66d565 895 .owner = THIS_MODULE,
8267a9ba
MB		 896 },
897};
898
e4ee831f
MB		 899static int __init wm831x_dcdc_init(void)
900{
901 int ret;
902 ret = platform_driver_register(&wm831x_buckv_driver);
903 if (ret != 0)
904 pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
905
906 ret = platform_driver_register(&wm831x_buckp_driver);
907 if (ret != 0)
908 pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
909
1304850d
MB		 910 ret = platform_driver_register(&wm831x_boostp_driver);
911 if (ret != 0)
912 pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
913
8267a9ba
MB		 914 ret = platform_driver_register(&wm831x_epe_driver);
915 if (ret != 0)
916 pr_err("Failed to register WM831x EPE driver: %d\n", ret);
917
e4ee831f
MB		 918 return 0;
919}
920subsys_initcall(wm831x_dcdc_init);
921
922static void __exit wm831x_dcdc_exit(void)
923{
8267a9ba 924 platform_driver_unregister(&wm831x_epe_driver);
1304850d 925 platform_driver_unregister(&wm831x_boostp_driver);
e4ee831f
MB		 926 platform_driver_unregister(&wm831x_buckp_driver);
927 platform_driver_unregister(&wm831x_buckv_driver);
928}
929module_exit(wm831x_dcdc_exit);
930
931/* Module information */
932MODULE_AUTHOR("Mark Brown");
933MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
934MODULE_LICENSE("GPL");
935MODULE_ALIAS("platform:wm831x-buckv");
936MODULE_ALIAS("platform:wm831x-buckp");
43f1f216 937MODULE_ALIAS("platform:wm831x-boostp");
24b43150 938MODULE_ALIAS("platform:wm831x-epe");
Linux kernel - Deliverables
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