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regulator: core: Provide standard enable operations for regmap users
[deliverable/linux.git] / drivers / regulator / wm831x-dcdc.c
CommitLineData
e4ee831f
MB		 1/*
2 * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
e24a04c4
MB		 22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
5a0e3ad6 24#include <linux/slab.h>
e4ee831f
MB		 25
26#include <linux/mfd/wm831x/core.h>
27#include <linux/mfd/wm831x/regulator.h>
28#include <linux/mfd/wm831x/pdata.h>
29
30#define WM831X_BUCKV_MAX_SELECTOR 0x68
31#define WM831X_BUCKP_MAX_SELECTOR 0x66
32
33#define WM831X_DCDC_MODE_FAST 0
34#define WM831X_DCDC_MODE_NORMAL 1
35#define WM831X_DCDC_MODE_IDLE 2
36#define WM831X_DCDC_MODE_STANDBY 3
37
38#define WM831X_DCDC_MAX_NAME 6
39
40/* Register offsets in control block */
41#define WM831X_DCDC_CONTROL_1 0
42#define WM831X_DCDC_CONTROL_2 1
43#define WM831X_DCDC_ON_CONFIG 2
44#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 45#define WM831X_DCDC_DVS_CONTROL 4
e4ee831f
MB		 46
47/*
48 * Shared
49 */
50
51struct wm831x_dcdc {
52 char name[WM831X_DCDC_MAX_NAME];
53 struct regulator_desc desc;
54 int base;
55 struct wm831x *wm831x;
56 struct regulator_dev *regulator;
e24a04c4
MB		 57 int dvs_gpio;
58 int dvs_gpio_state;
59 int on_vsel;
60 int dvs_vsel;
e4ee831f
MB		 61};
62
63static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
64{
65 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
66 struct wm831x *wm831x = dcdc->wm831x;
67 int mask = 1 << rdev_get_id(rdev);
68 int reg;
69
70 reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
71 if (reg < 0)
72 return reg;
73
74 if (reg & mask)
75 return 1;
76 else
77 return 0;
78}
79
80static int wm831x_dcdc_enable(struct regulator_dev *rdev)
81{
82 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
83 struct wm831x *wm831x = dcdc->wm831x;
84 int mask = 1 << rdev_get_id(rdev);
85
86 return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
87}
88
89static int wm831x_dcdc_disable(struct regulator_dev *rdev)
90{
91 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
92 struct wm831x *wm831x = dcdc->wm831x;
93 int mask = 1 << rdev_get_id(rdev);
94
95 return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
96}
97
98static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
99
100{
101 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
102 struct wm831x *wm831x = dcdc->wm831x;
103 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
104 int val;
105
106 val = wm831x_reg_read(wm831x, reg);
107 if (val < 0)
108 return val;
109
110 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
111
112 switch (val) {
113 case WM831X_DCDC_MODE_FAST:
114 return REGULATOR_MODE_FAST;
115 case WM831X_DCDC_MODE_NORMAL:
116 return REGULATOR_MODE_NORMAL;
117 case WM831X_DCDC_MODE_STANDBY:
118 return REGULATOR_MODE_STANDBY;
119 case WM831X_DCDC_MODE_IDLE:
120 return REGULATOR_MODE_IDLE;
121 default:
122 BUG();
9ee291a4 123 return -EINVAL;
e4ee831f
MB		 124 }
125}
126
127static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
128 unsigned int mode)
129{
130 int val;
131
132 switch (mode) {
133 case REGULATOR_MODE_FAST:
134 val = WM831X_DCDC_MODE_FAST;
135 break;
136 case REGULATOR_MODE_NORMAL:
137 val = WM831X_DCDC_MODE_NORMAL;
138 break;
139 case REGULATOR_MODE_STANDBY:
140 val = WM831X_DCDC_MODE_STANDBY;
141 break;
142 case REGULATOR_MODE_IDLE:
143 val = WM831X_DCDC_MODE_IDLE;
144 break;
145 default:
146 return -EINVAL;
147 }
148
149 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
150 val << WM831X_DC1_ON_MODE_SHIFT);
151}
152
153static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
154{
155 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
156 struct wm831x *wm831x = dcdc->wm831x;
157 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
158
159 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
160}
161
162static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
163 unsigned int mode)
164{
165 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
166 struct wm831x *wm831x = dcdc->wm831x;
167 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
168
169 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
170}
171
172static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
173{
174 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
175 struct wm831x *wm831x = dcdc->wm831x;
176 int ret;
177
178 /* First, check for errors */
179 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
180 if (ret < 0)
181 return ret;
182
183 if (ret & (1 << rdev_get_id(rdev))) {
184 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
185 rdev_get_id(rdev) + 1);
186 return REGULATOR_STATUS_ERROR;
187 }
188
189 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
190 if (rdev_get_id(rdev) < 2) {
191 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
192 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
193 rdev_get_id(rdev) + 1);
194 return REGULATOR_STATUS_ERROR;
195 }
196
197 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
198 dev_dbg(wm831x->dev, "DCDC%d over current\n",
199 rdev_get_id(rdev) + 1);
200 return REGULATOR_STATUS_ERROR;
201 }
202 }
203
204 /* Is the regulator on? */
205 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
206 if (ret < 0)
207 return ret;
208 if (!(ret & (1 << rdev_get_id(rdev))))
209 return REGULATOR_STATUS_OFF;
210
211 /* TODO: When we handle hardware control modes so we can report the
212 * current mode. */
213 return REGULATOR_STATUS_ON;
214}
215
216static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
217{
218 struct wm831x_dcdc *dcdc = data;
219
220 regulator_notifier_call_chain(dcdc->regulator,
221 REGULATOR_EVENT_UNDER_VOLTAGE,
222 NULL);
223
224 return IRQ_HANDLED;
225}
226
227static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
228{
229 struct wm831x_dcdc *dcdc = data;
230
231 regulator_notifier_call_chain(dcdc->regulator,
232 REGULATOR_EVENT_OVER_CURRENT,
233 NULL);
234
235 return IRQ_HANDLED;
236}
237
238/*
239 * BUCKV specifics
240 */
241
242static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
243 unsigned selector)
244{
245 if (selector <= 0x8)
246 return 600000;
247 if (selector <= WM831X_BUCKV_MAX_SELECTOR)
248 return 600000 + ((selector - 0x8) * 12500);
249 return -EINVAL;
250}
251
e24a04c4
MB		 252static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
253 int min_uV, int max_uV)
e4ee831f 254{
e4ee831f
MB		 255 u16 vsel;
256
257 if (min_uV < 600000)
258 vsel = 0;
259 else if (min_uV <= 1800000)
260 vsel = ((min_uV - 600000) / 12500) + 8;
261 else
262 return -EINVAL;
263
264 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
265 return -EINVAL;
266
e24a04c4
MB		 267 return vsel;
268}
269
e24a04c4
MB		 270static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
271{
272 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
273
274 if (state == dcdc->dvs_gpio_state)
275 return 0;
276
277 dcdc->dvs_gpio_state = state;
278 gpio_set_value(dcdc->dvs_gpio, state);
279
280 /* Should wait for DVS state change to be asserted if we have
281 * a GPIO for it, for now assume the device is configured
282 * for the fastest possible transition.
283 */
284
285 return 0;
e4ee831f
MB		 286}
287
288static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
3a93f2a9 289 int min_uV, int max_uV, unsigned *selector)
e4ee831f
MB		 290{
291 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4
MB		 292 struct wm831x *wm831x = dcdc->wm831x;
293 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
294 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
295 int vsel, ret;
296
297 vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
298 if (vsel < 0)
299 return vsel;
300
3a93f2a9
MB		 301 *selector = vsel;
302
e24a04c4
MB		 303 /* If this value is already set then do a GPIO update if we can */
304 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
305 return wm831x_buckv_set_dvs(rdev, 0);
306
307 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
308 return wm831x_buckv_set_dvs(rdev, 1);
309
310 /* Always set the ON status to the minimum voltage */
311 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
312 if (ret < 0)
313 return ret;
314 dcdc->on_vsel = vsel;
315
316 if (!dcdc->dvs_gpio)
317 return ret;
318
319 /* Kick the voltage transition now */
320 ret = wm831x_buckv_set_dvs(rdev, 0);
321 if (ret < 0)
322 return ret;
323
88cda60e
MB		 324 /*
325 * If this VSEL is higher than the last one we've seen then
326 * remember it as the DVS VSEL. This is optimised for CPUfreq
327 * usage where we want to get to the highest voltage very
328 * quickly.
329 */
330 if (vsel > dcdc->dvs_vsel) {
331 ret = wm831x_set_bits(wm831x, dvs_reg,
332 WM831X_DC1_DVS_VSEL_MASK,
333 dcdc->dvs_vsel);
334 if (ret == 0)
335 dcdc->dvs_vsel = vsel;
336 else
337 dev_warn(wm831x->dev,
338 "Failed to set DCDC DVS VSEL: %d\n", ret);
e24a04c4
MB		 339 }
340
e24a04c4 341 return 0;
e4ee831f
MB		 342}
343
344static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 345 int uV)
e4ee831f
MB		 346{
347 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 348 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 349 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
e24a04c4
MB		 350 int vsel;
351
352 vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
353 if (vsel < 0)
354 return vsel;
e4ee831f 355
e24a04c4 356 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
e4ee831f
MB		 357}
358
afb8bb80 359static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 360{
361 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 362
e24a04c4 363 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
afb8bb80 364 return dcdc->dvs_vsel;
e24a04c4 365 else
afb8bb80 366 return dcdc->on_vsel;
e4ee831f
MB		 367}
368
369/* Current limit options */
370static u16 wm831x_dcdc_ilim[] = {
371 125, 250, 375, 500, 625, 750, 875, 1000
372};
373
374static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
375 int min_uA, int max_uA)
376{
377 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
378 struct wm831x *wm831x = dcdc->wm831x;
379 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
380 int i;
381
382 for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
a171e782
AL		 383 if ((min_uA <= wm831x_dcdc_ilim[i]) &&
384 (wm831x_dcdc_ilim[i] <= max_uA))
e4ee831f
MB		 385 break;
386 }
387 if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
388 return -EINVAL;
389
09bf14b9
AL		 390 return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK,
391 i << WM831X_DC1_HC_THR_SHIFT);
e4ee831f
MB		 392}
393
394static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
395{
396 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
397 struct wm831x *wm831x = dcdc->wm831x;
398 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
399 int val;
400
401 val = wm831x_reg_read(wm831x, reg);
402 if (val < 0)
403 return val;
404
09bf14b9
AL		 405 val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
406 return wm831x_dcdc_ilim[val];
e4ee831f
MB		 407}
408
409static struct regulator_ops wm831x_buckv_ops = {
410 .set_voltage = wm831x_buckv_set_voltage,
afb8bb80 411 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
e4ee831f
MB		 412 .list_voltage = wm831x_buckv_list_voltage,
413 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
414 .set_current_limit = wm831x_buckv_set_current_limit,
415 .get_current_limit = wm831x_buckv_get_current_limit,
416
417 .is_enabled = wm831x_dcdc_is_enabled,
418 .enable = wm831x_dcdc_enable,
419 .disable = wm831x_dcdc_disable,
420 .get_status = wm831x_dcdc_get_status,
421 .get_mode = wm831x_dcdc_get_mode,
422 .set_mode = wm831x_dcdc_set_mode,
423 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
424};
425
e24a04c4
MB		 426/*
427 * Set up DVS control. We just log errors since we can still run
428 * (with reduced performance) if we fail.
429 */
430static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
431 struct wm831x_buckv_pdata *pdata)
432{
433 struct wm831x *wm831x = dcdc->wm831x;
434 int ret;
435 u16 ctrl;
436
437 if (!pdata || !pdata->dvs_gpio)
438 return;
439
e24a04c4
MB		 440 ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
441 if (ret < 0) {
442 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
443 dcdc->name, ret);
444 return;
445 }
446
447 /* gpiolib won't let us read the GPIO status so pick the higher
448 * of the two existing voltages so we take it as platform data.
449 */
450 dcdc->dvs_gpio_state = pdata->dvs_init_state;
451
452 ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
453 if (ret < 0) {
454 dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
455 dcdc->name, ret);
456 gpio_free(pdata->dvs_gpio);
457 return;
458 }
459
460 dcdc->dvs_gpio = pdata->dvs_gpio;
b47ba9fd
MB		 461
462 switch (pdata->dvs_control_src) {
463 case 1:
464 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
465 break;
466 case 2:
467 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
468 break;
469 default:
470 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
471 pdata->dvs_control_src, dcdc->name);
472 return;
473 }
474
c439b8f4
MB		 475 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
476 * to make bootstrapping a bit smoother.
477 */
478 if (!dcdc->dvs_vsel) {
479 ret = wm831x_set_bits(wm831x,
480 dcdc->base + WM831X_DCDC_DVS_CONTROL,
481 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
482 if (ret == 0)
483 dcdc->dvs_vsel = dcdc->on_vsel;
484 else
485 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
486 ret);
487 }
488
b47ba9fd
MB		 489 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
490 WM831X_DC1_DVS_SRC_MASK, ctrl);
491 if (ret < 0) {
492 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
493 dcdc->name, ret);
494 }
e24a04c4
MB		 495}
496
e4ee831f
MB		 497static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
498{
499 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
500 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 501 struct regulator_config config = { };
137a6354 502 int id;
e4ee831f
MB		 503 struct wm831x_dcdc *dcdc;
504 struct resource *res;
505 int ret, irq;
506
137a6354
MB		 507 if (pdata && pdata->wm831x_num)
508 id = (pdata->wm831x_num * 10) + 1;
509 else
510 id = 0;
511 id = pdev->id - id;
512
e4ee831f
MB		 513 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
514
515 if (pdata == NULL || pdata->dcdc[id] == NULL)
516 return -ENODEV;
517
fded2f4f
MB		 518 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
519 GFP_KERNEL);
e4ee831f
MB		 520 if (dcdc == NULL) {
521 dev_err(&pdev->dev, "Unable to allocate private data\n");
522 return -ENOMEM;
523 }
524
525 dcdc->wm831x = wm831x;
526
527 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
528 if (res == NULL) {
529 dev_err(&pdev->dev, "No I/O resource\n");
530 ret = -EINVAL;
531 goto err;
532 }
533 dcdc->base = res->start;
534
535 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
536 dcdc->desc.name = dcdc->name;
537 dcdc->desc.id = id;
538 dcdc->desc.type = REGULATOR_VOLTAGE;
539 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
540 dcdc->desc.ops = &wm831x_buckv_ops;
541 dcdc->desc.owner = THIS_MODULE;
542
e24a04c4
MB		 543 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
544 if (ret < 0) {
545 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
546 goto err;
547 }
548 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
549
a1b81dd3 550 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
MB		 551 if (ret < 0) {
552 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
553 goto err;
554 }
555 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
556
557 if (pdata->dcdc[id])
558 wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
559
c172708d
MB		 560 config.dev = pdev->dev.parent;
561 config.init_data = pdata->dcdc[id];
562 config.driver_data = dcdc;
563
564 dcdc->regulator = regulator_register(&dcdc->desc, &config);
e4ee831f
MB		 565 if (IS_ERR(dcdc->regulator)) {
566 ret = PTR_ERR(dcdc->regulator);
567 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
568 id + 1, ret);
569 goto err;
570 }
571
572 irq = platform_get_irq_byname(pdev, "UV");
dfda9c27
MB		 573 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
574 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 575 if (ret != 0) {
576 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
577 irq, ret);
578 goto err_regulator;
579 }
580
581 irq = platform_get_irq_byname(pdev, "HC");
dfda9c27
MB		 582 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq,
583 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 584 if (ret != 0) {
585 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
586 irq, ret);
587 goto err_uv;
588 }
589
590 platform_set_drvdata(pdev, dcdc);
591
592 return 0;
593
594err_uv:
dfda9c27 595 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
e4ee831f
MB		 596err_regulator:
597 regulator_unregister(dcdc->regulator);
598err:
e24a04c4
MB		 599 if (dcdc->dvs_gpio)
600 gpio_free(dcdc->dvs_gpio);
e4ee831f
MB		 601 return ret;
602}
603
604static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
605{
606 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
e4ee831f 607
eb66d565
DT		 608 platform_set_drvdata(pdev, NULL);
609
69952369
MB		 610 free_irq(platform_get_irq_byname(pdev, "HC"), dcdc);
611 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
e4ee831f 612 regulator_unregister(dcdc->regulator);
e24a04c4
MB		 613 if (dcdc->dvs_gpio)
614 gpio_free(dcdc->dvs_gpio);
e4ee831f
MB		 615
616 return 0;
617}
618
619static struct platform_driver wm831x_buckv_driver = {
620 .probe = wm831x_buckv_probe,
621 .remove = __devexit_p(wm831x_buckv_remove),
622 .driver = {
623 .name = "wm831x-buckv",
eb66d565 624 .owner = THIS_MODULE,
e4ee831f
MB		 625 },
626};
627
628/*
629 * BUCKP specifics
630 */
631
632static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
633 unsigned selector)
634{
635 if (selector <= WM831X_BUCKP_MAX_SELECTOR)
636 return 850000 + (selector * 25000);
637 else
638 return -EINVAL;
639}
640
641static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
3a93f2a9 642 int min_uV, int max_uV, int *selector)
e4ee831f
MB		 643{
644 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
645 struct wm831x *wm831x = dcdc->wm831x;
646 u16 vsel;
647
648 if (min_uV <= 34000000)
649 vsel = (min_uV - 850000) / 25000;
650 else
651 return -EINVAL;
652
653 if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
654 return -EINVAL;
655
3a93f2a9
MB		 656 *selector = vsel;
657
e4ee831f
MB		 658 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
659}
660
661static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
3a93f2a9
MB		 662 int min_uV, int max_uV,
663 unsigned *selector)
e4ee831f
MB		 664{
665 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
666 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
667
3a93f2a9
MB		 668 return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV,
669 selector);
e4ee831f
MB		 670}
671
672static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
673 int uV)
674{
675 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
676 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
3a93f2a9 677 unsigned selector;
e4ee831f 678
3a93f2a9 679 return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector);
e4ee831f
MB		 680}
681
e4ee831f
MB		 682static struct regulator_ops wm831x_buckp_ops = {
683 .set_voltage = wm831x_buckp_set_voltage,
817436e7 684 .get_voltage_sel = regulator_get_voltage_sel_regmap,
e4ee831f
MB		 685 .list_voltage = wm831x_buckp_list_voltage,
686 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
687
688 .is_enabled = wm831x_dcdc_is_enabled,
689 .enable = wm831x_dcdc_enable,
690 .disable = wm831x_dcdc_disable,
691 .get_status = wm831x_dcdc_get_status,
692 .get_mode = wm831x_dcdc_get_mode,
693 .set_mode = wm831x_dcdc_set_mode,
694 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
695};
696
697static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
698{
699 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
700 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 701 struct regulator_config config = { };
137a6354 702 int id;
e4ee831f
MB		 703 struct wm831x_dcdc *dcdc;
704 struct resource *res;
705 int ret, irq;
706
137a6354
MB		 707 if (pdata && pdata->wm831x_num)
708 id = (pdata->wm831x_num * 10) + 1;
709 else
710 id = 0;
711 id = pdev->id - id;
712
e4ee831f
MB		 713 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
714
715 if (pdata == NULL || pdata->dcdc[id] == NULL)
716 return -ENODEV;
717
fded2f4f
MB		 718 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
719 GFP_KERNEL);
e4ee831f
MB		 720 if (dcdc == NULL) {
721 dev_err(&pdev->dev, "Unable to allocate private data\n");
722 return -ENOMEM;
723 }
724
725 dcdc->wm831x = wm831x;
726
727 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
728 if (res == NULL) {
729 dev_err(&pdev->dev, "No I/O resource\n");
730 ret = -EINVAL;
731 goto err;
732 }
733 dcdc->base = res->start;
734
735 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
736 dcdc->desc.name = dcdc->name;
737 dcdc->desc.id = id;
738 dcdc->desc.type = REGULATOR_VOLTAGE;
739 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
740 dcdc->desc.ops = &wm831x_buckp_ops;
741 dcdc->desc.owner = THIS_MODULE;
817436e7
MB		 742 dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
743 dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
e4ee831f 744
c172708d
MB		 745 config.dev = pdev->dev.parent;
746 config.init_data = pdata->dcdc[id];
747 config.driver_data = dcdc;
817436e7 748 config.regmap = wm831x->regmap;
c172708d
MB		 749
750 dcdc->regulator = regulator_register(&dcdc->desc, &config);
e4ee831f
MB		 751 if (IS_ERR(dcdc->regulator)) {
752 ret = PTR_ERR(dcdc->regulator);
753 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
754 id + 1, ret);
755 goto err;
756 }
757
758 irq = platform_get_irq_byname(pdev, "UV");
dfda9c27
MB		 759 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
760 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 761 if (ret != 0) {
762 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
763 irq, ret);
764 goto err_regulator;
765 }
766
767 platform_set_drvdata(pdev, dcdc);
768
769 return 0;
770
771err_regulator:
772 regulator_unregister(dcdc->regulator);
773err:
e4ee831f
MB		 774 return ret;
775}
776
777static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
778{
779 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
e4ee831f 780
eb66d565
DT		 781 platform_set_drvdata(pdev, NULL);
782
69952369 783 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
e4ee831f 784 regulator_unregister(dcdc->regulator);
e4ee831f
MB		 785
786 return 0;
787}
788
789static struct platform_driver wm831x_buckp_driver = {
790 .probe = wm831x_buckp_probe,
791 .remove = __devexit_p(wm831x_buckp_remove),
792 .driver = {
793 .name = "wm831x-buckp",
eb66d565 794 .owner = THIS_MODULE,
e4ee831f
MB		 795 },
796};
797
1304850d
MB		 798/*
799 * DCDC boost convertors
800 */
801
802static int wm831x_boostp_get_status(struct regulator_dev *rdev)
803{
804 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
805 struct wm831x *wm831x = dcdc->wm831x;
806 int ret;
807
808 /* First, check for errors */
809 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
810 if (ret < 0)
811 return ret;
812
813 if (ret & (1 << rdev_get_id(rdev))) {
814 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
815 rdev_get_id(rdev) + 1);
816 return REGULATOR_STATUS_ERROR;
817 }
818
819 /* Is the regulator on? */
820 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
821 if (ret < 0)
822 return ret;
823 if (ret & (1 << rdev_get_id(rdev)))
824 return REGULATOR_STATUS_ON;
825 else
826 return REGULATOR_STATUS_OFF;
827}
828
829static struct regulator_ops wm831x_boostp_ops = {
830 .get_status = wm831x_boostp_get_status,
831
832 .is_enabled = wm831x_dcdc_is_enabled,
833 .enable = wm831x_dcdc_enable,
834 .disable = wm831x_dcdc_disable,
835};
836
837static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
838{
839 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
840 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 841 struct regulator_config config = { };
1304850d
MB		 842 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
843 struct wm831x_dcdc *dcdc;
844 struct resource *res;
845 int ret, irq;
846
847 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
848
849 if (pdata == NULL || pdata->dcdc[id] == NULL)
850 return -ENODEV;
851
4c60165d 852 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
1304850d
MB		 853 if (dcdc == NULL) {
854 dev_err(&pdev->dev, "Unable to allocate private data\n");
855 return -ENOMEM;
856 }
857
858 dcdc->wm831x = wm831x;
859
860 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
861 if (res == NULL) {
862 dev_err(&pdev->dev, "No I/O resource\n");
863 ret = -EINVAL;
864 goto err;
865 }
866 dcdc->base = res->start;
867
868 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
869 dcdc->desc.name = dcdc->name;
870 dcdc->desc.id = id;
871 dcdc->desc.type = REGULATOR_VOLTAGE;
872 dcdc->desc.ops = &wm831x_boostp_ops;
873 dcdc->desc.owner = THIS_MODULE;
874
c172708d
MB		 875 config.dev = pdev->dev.parent;
876 config.init_data = pdata->dcdc[id];
877 config.driver_data = dcdc;
878
879 dcdc->regulator = regulator_register(&dcdc->desc, &config);
1304850d
MB		 880 if (IS_ERR(dcdc->regulator)) {
881 ret = PTR_ERR(dcdc->regulator);
882 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
883 id + 1, ret);
884 goto err;
885 }
886
887 irq = platform_get_irq_byname(pdev, "UV");
dfda9c27
MB		 888 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
889 IRQF_TRIGGER_RISING, dcdc->name,
890 dcdc);
1304850d
MB		 891 if (ret != 0) {
892 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
893 irq, ret);
894 goto err_regulator;
895 }
896
897 platform_set_drvdata(pdev, dcdc);
898
899 return 0;
900
901err_regulator:
902 regulator_unregister(dcdc->regulator);
903err:
1304850d
MB		 904 return ret;
905}
906
907static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
908{
909 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
1304850d 910
eb66d565
DT		 911 platform_set_drvdata(pdev, NULL);
912
dfda9c27 913 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
1304850d 914 regulator_unregister(dcdc->regulator);
1304850d
MB		 915
916 return 0;
917}
918
919static struct platform_driver wm831x_boostp_driver = {
920 .probe = wm831x_boostp_probe,
921 .remove = __devexit_p(wm831x_boostp_remove),
922 .driver = {
923 .name = "wm831x-boostp",
eb66d565 924 .owner = THIS_MODULE,
1304850d
MB		 925 },
926};
927
8267a9ba
MB		 928/*
929 * External Power Enable
930 *
931 * These aren't actually DCDCs but look like them in hardware so share
932 * code.
933 */
934
935#define WM831X_EPE_BASE 6
936
937static struct regulator_ops wm831x_epe_ops = {
938 .is_enabled = wm831x_dcdc_is_enabled,
939 .enable = wm831x_dcdc_enable,
940 .disable = wm831x_dcdc_disable,
941 .get_status = wm831x_dcdc_get_status,
942};
943
944static __devinit int wm831x_epe_probe(struct platform_device *pdev)
945{
946 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
947 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 948 struct regulator_config config = { };
8267a9ba
MB		 949 int id = pdev->id % ARRAY_SIZE(pdata->epe);
950 struct wm831x_dcdc *dcdc;
951 int ret;
952
953 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
954
955 if (pdata == NULL || pdata->epe[id] == NULL)
956 return -ENODEV;
957
4c60165d 958 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
8267a9ba
MB		 959 if (dcdc == NULL) {
960 dev_err(&pdev->dev, "Unable to allocate private data\n");
961 return -ENOMEM;
962 }
963
964 dcdc->wm831x = wm831x;
965
966 /* For current parts this is correct; probably need to revisit
967 * in future.
968 */
969 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
970 dcdc->desc.name = dcdc->name;
971 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
972 dcdc->desc.ops = &wm831x_epe_ops;
973 dcdc->desc.type = REGULATOR_VOLTAGE;
974 dcdc->desc.owner = THIS_MODULE;
975
c172708d
MB		 976 config.dev = pdev->dev.parent;
977 config.init_data = pdata->epe[id];
978 config.driver_data = dcdc;
979
980 dcdc->regulator = regulator_register(&dcdc->desc, &config);
8267a9ba
MB		 981 if (IS_ERR(dcdc->regulator)) {
982 ret = PTR_ERR(dcdc->regulator);
983 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
984 id + 1, ret);
985 goto err;
986 }
987
988 platform_set_drvdata(pdev, dcdc);
989
990 return 0;
991
992err:
8267a9ba
MB		 993 return ret;
994}
995
996static __devexit int wm831x_epe_remove(struct platform_device *pdev)
997{
998 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
999
eb66d565 1000 platform_set_drvdata(pdev, NULL);
8267a9ba 1001 regulator_unregister(dcdc->regulator);
8267a9ba
MB		 1002
1003 return 0;
1004}
1005
1006static struct platform_driver wm831x_epe_driver = {
1007 .probe = wm831x_epe_probe,
1008 .remove = __devexit_p(wm831x_epe_remove),
1009 .driver = {
1010 .name = "wm831x-epe",
eb66d565 1011 .owner = THIS_MODULE,
8267a9ba
MB		 1012 },
1013};
1014
e4ee831f
MB		 1015static int __init wm831x_dcdc_init(void)
1016{
1017 int ret;
1018 ret = platform_driver_register(&wm831x_buckv_driver);
1019 if (ret != 0)
1020 pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
1021
1022 ret = platform_driver_register(&wm831x_buckp_driver);
1023 if (ret != 0)
1024 pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
1025
1304850d
MB		 1026 ret = platform_driver_register(&wm831x_boostp_driver);
1027 if (ret != 0)
1028 pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
1029
8267a9ba
MB		 1030 ret = platform_driver_register(&wm831x_epe_driver);
1031 if (ret != 0)
1032 pr_err("Failed to register WM831x EPE driver: %d\n", ret);
1033
e4ee831f
MB		 1034 return 0;
1035}
1036subsys_initcall(wm831x_dcdc_init);
1037
1038static void __exit wm831x_dcdc_exit(void)
1039{
8267a9ba 1040 platform_driver_unregister(&wm831x_epe_driver);
1304850d 1041 platform_driver_unregister(&wm831x_boostp_driver);
e4ee831f
MB		 1042 platform_driver_unregister(&wm831x_buckp_driver);
1043 platform_driver_unregister(&wm831x_buckv_driver);
1044}
1045module_exit(wm831x_dcdc_exit);
1046
1047/* Module information */
1048MODULE_AUTHOR("Mark Brown");
1049MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
1050MODULE_LICENSE("GPL");
1051MODULE_ALIAS("platform:wm831x-buckv");
1052MODULE_ALIAS("platform:wm831x-buckp");
24b43150 1053MODULE_ALIAS("platform:wm831x-epe");
Linux kernel - Deliverables
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