Commit | Line | Data |
---|---|---|
61fc4131 PZ |
1 | config ARCH_HAS_RESET_CONTROLLER |
2 | bool | |
3 | ||
4 | menuconfig RESET_CONTROLLER | |
5 | bool "Reset Controller Support" | |
6 | default y if ARCH_HAS_RESET_CONTROLLER | |
7 | help | |
8 | Generic Reset Controller support. | |
9 | ||
10 | This framework is designed to abstract reset handling of devices | |
11 | via GPIOs or SoC-internal reset controller modules. | |
12 | ||
13 | If unsure, say no. | |
e5d76075 | 14 | |
998cd463 MY |
15 | if RESET_CONTROLLER |
16 | ||
e27b4a6e PZ |
17 | config RESET_ATH79 |
18 | bool "AR71xx Reset Driver" if COMPILE_TEST | |
19 | default ATH79 | |
20 | help | |
21 | This enables the ATH79 reset controller driver that supports the | |
22 | AR71xx SoC reset controller. | |
23 | ||
70d467ea PZ |
24 | config RESET_BERLIN |
25 | bool "Berlin Reset Driver" if COMPILE_TEST | |
26 | default ARCH_BERLIN | |
27 | help | |
28 | This enables the reset controller driver for Marvell Berlin SoCs. | |
29 | ||
cd7f4b81 PZ |
30 | config RESET_LPC18XX |
31 | bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST | |
32 | default ARCH_LPC18XX | |
33 | help | |
34 | This enables the reset controller driver for NXP LPC18xx/43xx SoCs. | |
35 | ||
44336c24 PZ |
36 | config RESET_MESON |
37 | bool "Meson Reset Driver" if COMPILE_TEST | |
38 | default ARCH_MESON | |
39 | help | |
40 | This enables the reset driver for Amlogic Meson SoCs. | |
41 | ||
6e667fac NA |
42 | config RESET_OXNAS |
43 | bool | |
44 | ||
fab3f730 PZ |
45 | config RESET_PISTACHIO |
46 | bool "Pistachio Reset Driver" if COMPILE_TEST | |
47 | default MACH_PISTACHIO | |
48 | help | |
49 | This enables the reset driver for ImgTec Pistachio SoCs. | |
50 | ||
5c91407e PZ |
51 | config RESET_SOCFPGA |
52 | bool "SoCFPGA Reset Driver" if COMPILE_TEST | |
53 | default ARCH_SOCFPGA | |
54 | help | |
55 | This enables the reset controller driver for Altera SoCFPGAs. | |
56 | ||
7e0e901d PZ |
57 | config RESET_STM32 |
58 | bool "STM32 Reset Driver" if COMPILE_TEST | |
59 | default ARCH_STM32 | |
60 | help | |
61 | This enables the RCC reset controller driver for STM32 MCUs. | |
62 | ||
0ae08419 PZ |
63 | config RESET_SUNXI |
64 | bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI | |
65 | default ARCH_SUNXI | |
66 | help | |
67 | This enables the reset driver for Allwinner SoCs. | |
68 | ||
cc7c2bb1 AD |
69 | config TI_SYSCON_RESET |
70 | tristate "TI SYSCON Reset Driver" | |
71 | depends on HAS_IOMEM | |
72 | select MFD_SYSCON | |
73 | help | |
74 | This enables the reset driver support for TI devices with | |
75 | memory-mapped reset registers as part of a syscon device node. If | |
76 | you wish to use the reset framework for such memory-mapped devices, | |
77 | say Y here. Otherwise, say N. | |
78 | ||
54e991b5 MY |
79 | config RESET_UNIPHIER |
80 | tristate "Reset controller driver for UniPhier SoCs" | |
81 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
82 | depends on OF && MFD_SYSCON | |
83 | default ARCH_UNIPHIER | |
84 | help | |
85 | Support for reset controllers on UniPhier SoCs. | |
86 | Say Y if you want to control reset signals provided by System Control | |
87 | block, Media I/O block, Peripheral Block. | |
88 | ||
6f51b860 PZ |
89 | config RESET_ZYNQ |
90 | bool "ZYNQ Reset Driver" if COMPILE_TEST | |
91 | default ARCH_ZYNQ | |
92 | help | |
93 | This enables the reset controller driver for Xilinx Zynq SoCs. | |
94 | ||
e5d76075 | 95 | source "drivers/reset/sti/Kconfig" |
f59d23c2 | 96 | source "drivers/reset/hisilicon/Kconfig" |
998cd463 MY |
97 | |
98 | endif |