Commit | Line | Data |
---|---|---|
788b1fc6 AV |
1 | /* |
2 | * Real Time Clock interface for Linux on Atmel AT91RM9200 | |
3 | * | |
4 | * Copyright (C) 2002 Rick Bronson | |
5 | * | |
6 | * Converted to RTC class model by Andrew Victor | |
7 | * | |
8 | * Ported to Linux 2.6 by Steven Scholz | |
9 | * Based on s3c2410-rtc.c Simtec Electronics | |
10 | * | |
11 | * Based on sa1100-rtc.c by Nils Faerber | |
12 | * Based on rtc.c by Paul Gortmaker | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License | |
16 | * as published by the Free Software Foundation; either version | |
17 | * 2 of the License, or (at your option) any later version. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/time.h> | |
25 | #include <linux/rtc.h> | |
26 | #include <linux/bcd.h> | |
27 | #include <linux/interrupt.h> | |
e9f08bbe | 28 | #include <linux/spinlock.h> |
788b1fc6 AV |
29 | #include <linux/ioctl.h> |
30 | #include <linux/completion.h> | |
14070ade | 31 | #include <linux/io.h> |
7c1b68d4 JE |
32 | #include <linux/of.h> |
33 | #include <linux/of_device.h> | |
8ecc0bf4 | 34 | #include <linux/uaccess.h> |
fb0d4ec4 | 35 | |
75984df0 | 36 | #include "rtc-at91rm9200.h" |
d73e3cd7 | 37 | |
d28bdfc5 JCPV |
38 | #define at91_rtc_read(field) \ |
39 | __raw_readl(at91_rtc_regs + field) | |
40 | #define at91_rtc_write(field, val) \ | |
41 | __raw_writel((val), at91_rtc_regs + field) | |
788b1fc6 | 42 | |
788b1fc6 AV |
43 | #define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ |
44 | ||
de645475 | 45 | struct at91_rtc_config { |
e9f08bbe | 46 | bool use_shadow_imr; |
de645475 JH |
47 | }; |
48 | ||
49 | static const struct at91_rtc_config *at91_rtc_config; | |
788b1fc6 | 50 | static DECLARE_COMPLETION(at91_rtc_updated); |
2fe121e1 | 51 | static DECLARE_COMPLETION(at91_rtc_upd_rdy); |
788b1fc6 | 52 | static unsigned int at91_alarm_year = AT91_RTC_EPOCH; |
d28bdfc5 JCPV |
53 | static void __iomem *at91_rtc_regs; |
54 | static int irq; | |
e9f08bbe JH |
55 | static DEFINE_SPINLOCK(at91_rtc_lock); |
56 | static u32 at91_rtc_shadow_imr; | |
788b1fc6 | 57 | |
e304fcd0 JH |
58 | static void at91_rtc_write_ier(u32 mask) |
59 | { | |
e9f08bbe JH |
60 | unsigned long flags; |
61 | ||
62 | spin_lock_irqsave(&at91_rtc_lock, flags); | |
63 | at91_rtc_shadow_imr |= mask; | |
e304fcd0 | 64 | at91_rtc_write(AT91_RTC_IER, mask); |
e9f08bbe | 65 | spin_unlock_irqrestore(&at91_rtc_lock, flags); |
e304fcd0 JH |
66 | } |
67 | ||
68 | static void at91_rtc_write_idr(u32 mask) | |
69 | { | |
e9f08bbe JH |
70 | unsigned long flags; |
71 | ||
72 | spin_lock_irqsave(&at91_rtc_lock, flags); | |
e304fcd0 | 73 | at91_rtc_write(AT91_RTC_IDR, mask); |
e9f08bbe JH |
74 | /* |
75 | * Register read back (of any RTC-register) needed to make sure | |
76 | * IDR-register write has reached the peripheral before updating | |
77 | * shadow mask. | |
78 | * | |
79 | * Note that there is still a possibility that the mask is updated | |
80 | * before interrupts have actually been disabled in hardware. The only | |
81 | * way to be certain would be to poll the IMR-register, which is is | |
82 | * the very register we are trying to emulate. The register read back | |
83 | * is a reasonable heuristic. | |
84 | */ | |
85 | at91_rtc_read(AT91_RTC_SR); | |
86 | at91_rtc_shadow_imr &= ~mask; | |
87 | spin_unlock_irqrestore(&at91_rtc_lock, flags); | |
e304fcd0 JH |
88 | } |
89 | ||
90 | static u32 at91_rtc_read_imr(void) | |
91 | { | |
e9f08bbe JH |
92 | unsigned long flags; |
93 | u32 mask; | |
94 | ||
95 | if (at91_rtc_config->use_shadow_imr) { | |
96 | spin_lock_irqsave(&at91_rtc_lock, flags); | |
97 | mask = at91_rtc_shadow_imr; | |
98 | spin_unlock_irqrestore(&at91_rtc_lock, flags); | |
99 | } else { | |
100 | mask = at91_rtc_read(AT91_RTC_IMR); | |
101 | } | |
102 | ||
103 | return mask; | |
e304fcd0 JH |
104 | } |
105 | ||
788b1fc6 AV |
106 | /* |
107 | * Decode time/date into rtc_time structure | |
108 | */ | |
e7a8bb12 AM |
109 | static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, |
110 | struct rtc_time *tm) | |
788b1fc6 AV |
111 | { |
112 | unsigned int time, date; | |
113 | ||
114 | /* must read twice in case it changes */ | |
115 | do { | |
d28bdfc5 JCPV |
116 | time = at91_rtc_read(timereg); |
117 | date = at91_rtc_read(calreg); | |
118 | } while ((time != at91_rtc_read(timereg)) || | |
119 | (date != at91_rtc_read(calreg))); | |
788b1fc6 | 120 | |
fe20ba70 AB |
121 | tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); |
122 | tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); | |
123 | tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16); | |
788b1fc6 AV |
124 | |
125 | /* | |
126 | * The Calendar Alarm register does not have a field for | |
127 | * the year - so these will return an invalid value. When an | |
25985edc | 128 | * alarm is set, at91_alarm_year will store the current year. |
788b1fc6 | 129 | */ |
fe20ba70 AB |
130 | tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */ |
131 | tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8); /* year */ | |
788b1fc6 | 132 | |
fe20ba70 AB |
133 | tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */ |
134 | tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1; | |
135 | tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24); | |
788b1fc6 AV |
136 | } |
137 | ||
138 | /* | |
139 | * Read current time and date in RTC | |
140 | */ | |
141 | static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) | |
142 | { | |
143 | at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm); | |
144 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); | |
145 | tm->tm_year = tm->tm_year - 1900; | |
146 | ||
6588208c | 147 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
148 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
149 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
788b1fc6 AV |
150 | |
151 | return 0; | |
152 | } | |
153 | ||
154 | /* | |
155 | * Set current time and date in RTC | |
156 | */ | |
157 | static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) | |
158 | { | |
159 | unsigned long cr; | |
160 | ||
6588208c | 161 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
162 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
163 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
788b1fc6 | 164 | |
2fe121e1 BB |
165 | wait_for_completion(&at91_rtc_upd_rdy); |
166 | ||
788b1fc6 | 167 | /* Stop Time/Calendar from counting */ |
d28bdfc5 JCPV |
168 | cr = at91_rtc_read(AT91_RTC_CR); |
169 | at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); | |
788b1fc6 | 170 | |
e304fcd0 | 171 | at91_rtc_write_ier(AT91_RTC_ACKUPD); |
e7a8bb12 | 172 | wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ |
e304fcd0 | 173 | at91_rtc_write_idr(AT91_RTC_ACKUPD); |
788b1fc6 | 174 | |
d28bdfc5 | 175 | at91_rtc_write(AT91_RTC_TIMR, |
fe20ba70 AB |
176 | bin2bcd(tm->tm_sec) << 0 |
177 | | bin2bcd(tm->tm_min) << 8 | |
178 | | bin2bcd(tm->tm_hour) << 16); | |
788b1fc6 | 179 | |
d28bdfc5 | 180 | at91_rtc_write(AT91_RTC_CALR, |
fe20ba70 AB |
181 | bin2bcd((tm->tm_year + 1900) / 100) /* century */ |
182 | | bin2bcd(tm->tm_year % 100) << 8 /* year */ | |
183 | | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ | |
184 | | bin2bcd(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */ | |
185 | | bin2bcd(tm->tm_mday) << 24); | |
788b1fc6 AV |
186 | |
187 | /* Restart Time/Calendar */ | |
d28bdfc5 | 188 | cr = at91_rtc_read(AT91_RTC_CR); |
2fe121e1 | 189 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV); |
d28bdfc5 | 190 | at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); |
2fe121e1 | 191 | at91_rtc_write_ier(AT91_RTC_SECEV); |
788b1fc6 AV |
192 | |
193 | return 0; | |
194 | } | |
195 | ||
196 | /* | |
197 | * Read alarm time and date in RTC | |
198 | */ | |
199 | static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
200 | { | |
201 | struct rtc_time *tm = &alrm->time; | |
202 | ||
203 | at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm); | |
204 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); | |
205 | tm->tm_year = at91_alarm_year - 1900; | |
206 | ||
e304fcd0 | 207 | alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM) |
a2db8dfc DB |
208 | ? 1 : 0; |
209 | ||
6588208c | 210 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
211 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
212 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
788b1fc6 AV |
213 | |
214 | return 0; | |
215 | } | |
216 | ||
217 | /* | |
218 | * Set alarm time and date in RTC | |
219 | */ | |
220 | static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
221 | { | |
222 | struct rtc_time tm; | |
223 | ||
224 | at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm); | |
225 | ||
226 | at91_alarm_year = tm.tm_year; | |
227 | ||
eb3c2272 LP |
228 | tm.tm_mon = alrm->time.tm_mon; |
229 | tm.tm_mday = alrm->time.tm_mday; | |
788b1fc6 AV |
230 | tm.tm_hour = alrm->time.tm_hour; |
231 | tm.tm_min = alrm->time.tm_min; | |
232 | tm.tm_sec = alrm->time.tm_sec; | |
233 | ||
e304fcd0 | 234 | at91_rtc_write_idr(AT91_RTC_ALARM); |
d28bdfc5 | 235 | at91_rtc_write(AT91_RTC_TIMALR, |
fe20ba70 AB |
236 | bin2bcd(tm.tm_sec) << 0 |
237 | | bin2bcd(tm.tm_min) << 8 | |
238 | | bin2bcd(tm.tm_hour) << 16 | |
788b1fc6 | 239 | | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); |
d28bdfc5 | 240 | at91_rtc_write(AT91_RTC_CALALR, |
fe20ba70 AB |
241 | bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ |
242 | | bin2bcd(tm.tm_mday) << 24 | |
788b1fc6 AV |
243 | | AT91_RTC_DATEEN | AT91_RTC_MTHEN); |
244 | ||
449321b3 | 245 | if (alrm->enabled) { |
d28bdfc5 | 246 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
e304fcd0 | 247 | at91_rtc_write_ier(AT91_RTC_ALARM); |
449321b3 | 248 | } |
5d4675a8 | 249 | |
6588208c | 250 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
251 | at91_alarm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, |
252 | tm.tm_min, tm.tm_sec); | |
788b1fc6 AV |
253 | |
254 | return 0; | |
255 | } | |
256 | ||
16380c15 JS |
257 | static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
258 | { | |
6588208c | 259 | dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled); |
16380c15 JS |
260 | |
261 | if (enabled) { | |
d28bdfc5 | 262 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
e304fcd0 | 263 | at91_rtc_write_ier(AT91_RTC_ALARM); |
e24b0bfa | 264 | } else |
e304fcd0 | 265 | at91_rtc_write_idr(AT91_RTC_ALARM); |
16380c15 JS |
266 | |
267 | return 0; | |
268 | } | |
788b1fc6 AV |
269 | /* |
270 | * Provide additional RTC information in /proc/driver/rtc | |
271 | */ | |
272 | static int at91_rtc_proc(struct device *dev, struct seq_file *seq) | |
273 | { | |
e304fcd0 | 274 | unsigned long imr = at91_rtc_read_imr(); |
e24b0bfa | 275 | |
e7a8bb12 | 276 | seq_printf(seq, "update_IRQ\t: %s\n", |
e24b0bfa | 277 | (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); |
e7a8bb12 | 278 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
e24b0bfa | 279 | (imr & AT91_RTC_SECEV) ? "yes" : "no"); |
788b1fc6 AV |
280 | |
281 | return 0; | |
282 | } | |
283 | ||
284 | /* | |
285 | * IRQ handler for the RTC | |
286 | */ | |
7d12e780 | 287 | static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) |
788b1fc6 | 288 | { |
e7a8bb12 | 289 | struct platform_device *pdev = dev_id; |
788b1fc6 AV |
290 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
291 | unsigned int rtsr; | |
292 | unsigned long events = 0; | |
293 | ||
e304fcd0 | 294 | rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr(); |
788b1fc6 AV |
295 | if (rtsr) { /* this interrupt is shared! Is it ours? */ |
296 | if (rtsr & AT91_RTC_ALARM) | |
297 | events |= (RTC_AF | RTC_IRQF); | |
2fe121e1 BB |
298 | if (rtsr & AT91_RTC_SECEV) { |
299 | complete(&at91_rtc_upd_rdy); | |
300 | at91_rtc_write_idr(AT91_RTC_SECEV); | |
301 | } | |
788b1fc6 AV |
302 | if (rtsr & AT91_RTC_ACKUPD) |
303 | complete(&at91_rtc_updated); | |
304 | ||
d28bdfc5 | 305 | at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ |
788b1fc6 | 306 | |
ab6a2d70 | 307 | rtc_update_irq(rtc, 1, events); |
788b1fc6 | 308 | |
6588208c | 309 | dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n", __func__, |
788b1fc6 AV |
310 | events >> 8, events & 0x000000FF); |
311 | ||
312 | return IRQ_HANDLED; | |
313 | } | |
314 | return IRQ_NONE; /* not handled */ | |
315 | } | |
316 | ||
de645475 JH |
317 | static const struct at91_rtc_config at91rm9200_config = { |
318 | }; | |
319 | ||
bba00e59 JH |
320 | static const struct at91_rtc_config at91sam9x5_config = { |
321 | .use_shadow_imr = true, | |
322 | }; | |
323 | ||
de645475 JH |
324 | #ifdef CONFIG_OF |
325 | static const struct of_device_id at91_rtc_dt_ids[] = { | |
326 | { | |
327 | .compatible = "atmel,at91rm9200-rtc", | |
328 | .data = &at91rm9200_config, | |
bba00e59 JH |
329 | }, { |
330 | .compatible = "atmel,at91sam9x5-rtc", | |
331 | .data = &at91sam9x5_config, | |
de645475 JH |
332 | }, { |
333 | /* sentinel */ | |
334 | } | |
335 | }; | |
336 | MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids); | |
337 | #endif | |
338 | ||
339 | static const struct at91_rtc_config * | |
340 | at91_rtc_get_config(struct platform_device *pdev) | |
341 | { | |
342 | const struct of_device_id *match; | |
343 | ||
344 | if (pdev->dev.of_node) { | |
345 | match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node); | |
346 | if (!match) | |
347 | return NULL; | |
348 | return (const struct at91_rtc_config *)match->data; | |
349 | } | |
350 | ||
351 | return &at91rm9200_config; | |
352 | } | |
353 | ||
ff8371ac | 354 | static const struct rtc_class_ops at91_rtc_ops = { |
788b1fc6 AV |
355 | .read_time = at91_rtc_readtime, |
356 | .set_time = at91_rtc_settime, | |
357 | .read_alarm = at91_rtc_readalarm, | |
358 | .set_alarm = at91_rtc_setalarm, | |
359 | .proc = at91_rtc_proc, | |
16380c15 | 360 | .alarm_irq_enable = at91_rtc_alarm_irq_enable, |
788b1fc6 AV |
361 | }; |
362 | ||
363 | /* | |
364 | * Initialize and install RTC driver | |
365 | */ | |
366 | static int __init at91_rtc_probe(struct platform_device *pdev) | |
367 | { | |
368 | struct rtc_device *rtc; | |
d28bdfc5 JCPV |
369 | struct resource *regs; |
370 | int ret = 0; | |
788b1fc6 | 371 | |
de645475 JH |
372 | at91_rtc_config = at91_rtc_get_config(pdev); |
373 | if (!at91_rtc_config) | |
374 | return -ENODEV; | |
375 | ||
d28bdfc5 JCPV |
376 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
377 | if (!regs) { | |
378 | dev_err(&pdev->dev, "no mmio resource defined\n"); | |
379 | return -ENXIO; | |
380 | } | |
381 | ||
382 | irq = platform_get_irq(pdev, 0); | |
383 | if (irq < 0) { | |
384 | dev_err(&pdev->dev, "no irq resource defined\n"); | |
385 | return -ENXIO; | |
386 | } | |
387 | ||
f3766250 SK |
388 | at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start, |
389 | resource_size(regs)); | |
d28bdfc5 JCPV |
390 | if (!at91_rtc_regs) { |
391 | dev_err(&pdev->dev, "failed to map registers, aborting.\n"); | |
392 | return -ENOMEM; | |
393 | } | |
394 | ||
395 | at91_rtc_write(AT91_RTC_CR, 0); | |
396 | at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */ | |
788b1fc6 AV |
397 | |
398 | /* Disable all interrupts */ | |
e304fcd0 | 399 | at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
e7a8bb12 AM |
400 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
401 | AT91_RTC_CALEV); | |
788b1fc6 | 402 | |
f3766250 | 403 | ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt, |
dac94d9e | 404 | IRQF_SHARED, |
d728b1e6 | 405 | "at91_rtc", pdev); |
788b1fc6 | 406 | if (ret) { |
6588208c | 407 | dev_err(&pdev->dev, "IRQ %d already in use.\n", irq); |
f3766250 | 408 | return ret; |
788b1fc6 AV |
409 | } |
410 | ||
5d4675a8 DB |
411 | /* cpu init code should really have flagged this device as |
412 | * being wake-capable; if it didn't, do that here. | |
413 | */ | |
414 | if (!device_can_wakeup(&pdev->dev)) | |
415 | device_init_wakeup(&pdev->dev, 1); | |
416 | ||
f3766250 | 417 | rtc = devm_rtc_device_register(&pdev->dev, pdev->name, |
e7a8bb12 | 418 | &at91_rtc_ops, THIS_MODULE); |
f3766250 SK |
419 | if (IS_ERR(rtc)) |
420 | return PTR_ERR(rtc); | |
788b1fc6 AV |
421 | platform_set_drvdata(pdev, rtc); |
422 | ||
2fe121e1 BB |
423 | /* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy |
424 | * completion. | |
425 | */ | |
426 | at91_rtc_write_ier(AT91_RTC_SECEV); | |
427 | ||
6588208c | 428 | dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n"); |
788b1fc6 AV |
429 | return 0; |
430 | } | |
431 | ||
432 | /* | |
433 | * Disable and remove the RTC driver | |
434 | */ | |
5d4675a8 | 435 | static int __exit at91_rtc_remove(struct platform_device *pdev) |
788b1fc6 | 436 | { |
788b1fc6 | 437 | /* Disable all interrupts */ |
e304fcd0 | 438 | at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
e7a8bb12 AM |
439 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
440 | AT91_RTC_CALEV); | |
788b1fc6 AV |
441 | |
442 | return 0; | |
443 | } | |
444 | ||
51a0d036 JH |
445 | static void at91_rtc_shutdown(struct platform_device *pdev) |
446 | { | |
447 | /* Disable all interrupts */ | |
448 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | | |
449 | AT91_RTC_SECEV | AT91_RTC_TIMEV | | |
450 | AT91_RTC_CALEV); | |
451 | } | |
452 | ||
6975a9c1 | 453 | #ifdef CONFIG_PM_SLEEP |
788b1fc6 AV |
454 | |
455 | /* AT91RM9200 RTC Power management control */ | |
456 | ||
e24b0bfa | 457 | static u32 at91_rtc_imr; |
788b1fc6 | 458 | |
dac94d9e | 459 | static int at91_rtc_suspend(struct device *dev) |
788b1fc6 | 460 | { |
90b4d648 DB |
461 | /* this IRQ is shared with DBGU and other hardware which isn't |
462 | * necessarily doing PM like we are... | |
463 | */ | |
e304fcd0 | 464 | at91_rtc_imr = at91_rtc_read_imr() |
e24b0bfa JH |
465 | & (AT91_RTC_ALARM|AT91_RTC_SECEV); |
466 | if (at91_rtc_imr) { | |
467 | if (device_may_wakeup(dev)) | |
d28bdfc5 | 468 | enable_irq_wake(irq); |
e24b0bfa | 469 | else |
e304fcd0 | 470 | at91_rtc_write_idr(at91_rtc_imr); |
e24b0bfa | 471 | } |
788b1fc6 AV |
472 | return 0; |
473 | } | |
474 | ||
dac94d9e | 475 | static int at91_rtc_resume(struct device *dev) |
788b1fc6 | 476 | { |
e24b0bfa JH |
477 | if (at91_rtc_imr) { |
478 | if (device_may_wakeup(dev)) | |
d28bdfc5 | 479 | disable_irq_wake(irq); |
e24b0bfa | 480 | else |
e304fcd0 | 481 | at91_rtc_write_ier(at91_rtc_imr); |
90b4d648 | 482 | } |
788b1fc6 AV |
483 | return 0; |
484 | } | |
788b1fc6 AV |
485 | #endif |
486 | ||
6975a9c1 JH |
487 | static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume); |
488 | ||
788b1fc6 | 489 | static struct platform_driver at91_rtc_driver = { |
5d4675a8 | 490 | .remove = __exit_p(at91_rtc_remove), |
51a0d036 | 491 | .shutdown = at91_rtc_shutdown, |
788b1fc6 AV |
492 | .driver = { |
493 | .name = "at91_rtc", | |
494 | .owner = THIS_MODULE, | |
6975a9c1 | 495 | .pm = &at91_rtc_pm_ops, |
7c1b68d4 | 496 | .of_match_table = of_match_ptr(at91_rtc_dt_ids), |
788b1fc6 AV |
497 | }, |
498 | }; | |
499 | ||
ac36960f | 500 | module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe); |
788b1fc6 AV |
501 | |
502 | MODULE_AUTHOR("Rick Bronson"); | |
503 | MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200"); | |
504 | MODULE_LICENSE("GPL"); | |
ad28a07b | 505 | MODULE_ALIAS("platform:at91_rtc"); |