[deliverable/linux.git] / drivers / rtc / rtc-bfin.c

/*
 * Blackfin On-Chip Real Time Clock Driver
 *  Supports BF53[123]/BF53[467]/BF54[2489]
 *
 * Copyright 2004-2007 Analog Devices Inc.
 *
 * Enter bugs at http://blackfin.uclinux.org/
 *
 * Licensed under the GPL-2 or later.
 */

/* The biggest issue we deal with in this driver is that register writes are
 * synced to the RTC frequency of 1Hz.  So if you write to a register and
 * attempt to write again before the first write has completed, the new write
 * is simply discarded.  This can easily be troublesome if userspace disables
 * one event (say periodic) and then right after enables an event (say alarm).
 * Since all events are maintained in the same interrupt mask register, if
 * we wrote to it to disable the first event and then wrote to it again to
 * enable the second event, that second event would not be enabled as the
 * write would be discarded and things quickly fall apart.
 *
 * To keep this delay from significantly degrading performance (we, in theory,
 * would have to sleep for up to 1 second everytime we wanted to write a
 * register), we only check the write pending status before we start to issue
 * a new write.  We bank on the idea that it doesnt matter when the sync
 * happens so long as we don't attempt another write before it does.  The only
 * time userspace would take this penalty is when they try and do multiple
 * operations right after another ... but in this case, they need to take the
 * sync penalty, so we should be OK.
 *
 * Also note that the RTC_ISTAT register does not suffer this penalty; its
 * writes to clear status registers complete immediately.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/bcd.h>
#include <linux/rtc.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/delay.h>

#include <asm/blackfin.h>

#define stamp(fmt, args...) pr_debug("%s:%i: " fmt "\n", __func__, __LINE__, ## args)
#define stampit() stamp("here i am")

struct bfin_rtc {
	struct rtc_device *rtc_dev;
	struct rtc_time rtc_alarm;
	spinlock_t lock;
};

/* Bit values for the ISTAT / ICTL registers */
#define RTC_ISTAT_WRITE_COMPLETE  0x8000
#define RTC_ISTAT_WRITE_PENDING   0x4000
#define RTC_ISTAT_ALARM_DAY       0x0040
#define RTC_ISTAT_24HR            0x0020
#define RTC_ISTAT_HOUR            0x0010
#define RTC_ISTAT_MIN             0x0008
#define RTC_ISTAT_SEC             0x0004
#define RTC_ISTAT_ALARM           0x0002
#define RTC_ISTAT_STOPWATCH       0x0001

/* Shift values for RTC_STAT register */
#define DAY_BITS_OFF    17
#define HOUR_BITS_OFF   12
#define MIN_BITS_OFF    6
#define SEC_BITS_OFF    0

/* Some helper functions to convert between the common RTC notion of time
 * and the internal Blackfin notion that is encoded in 32bits.
 */
static inline u32 rtc_time_to_bfin(unsigned long now)
{
	u32 sec  = (now % 60);
	u32 min  = (now % (60 * 60)) / 60;
	u32 hour = (now % (60 * 60 * 24)) / (60 * 60);
	u32 days = (now / (60 * 60 * 24));
	return (sec  << SEC_BITS_OFF) +
	       (min  << MIN_BITS_OFF) +
	       (hour << HOUR_BITS_OFF) +
	       (days << DAY_BITS_OFF);
}
static inline unsigned long rtc_bfin_to_time(u32 rtc_bfin)
{
	return (((rtc_bfin >> SEC_BITS_OFF)  & 0x003F)) +
	       (((rtc_bfin >> MIN_BITS_OFF)  & 0x003F) * 60) +
	       (((rtc_bfin >> HOUR_BITS_OFF) & 0x001F) * 60 * 60) +
	       (((rtc_bfin >> DAY_BITS_OFF)  & 0x7FFF) * 60 * 60 * 24);
}
static inline void rtc_bfin_to_tm(u32 rtc_bfin, struct rtc_time *tm)
{
	rtc_time_to_tm(rtc_bfin_to_time(rtc_bfin), tm);
}

/* Wait for the previous write to a RTC register to complete.
 * Unfortunately, we can't sleep here as that introduces a race condition when
 * turning on interrupt events.  Consider this:
 *  - process sets alarm
 *  - process enables alarm
 *  - process sleeps while waiting for rtc write to sync
 *  - interrupt fires while process is sleeping
 *  - interrupt acks the event by writing to ISTAT
 *  - interrupt sets the WRITE PENDING bit
 *  - interrupt handler finishes
 *  - process wakes up, sees WRITE PENDING bit set, goes to sleep
 *  - interrupt fires while process is sleeping
 * If anyone can point out the obvious solution here, i'm listening :).  This
 * shouldn't be an issue on an SMP or preempt system as this function should
 * only be called with the rtc lock held.
 *
 * Other options:
 *  - disable PREN so the sync happens at 32.768kHZ ... but this changes the
 *    inc rate for all RTC registers from 1HZ to 32.768kHZ ...
 *  - use the write complete IRQ
 */
static void rtc_bfin_sync_pending(void)
{
	stampit();
	while (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_COMPLETE)) {
		if (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_PENDING))
			break;
	}
	bfin_write_RTC_ISTAT(RTC_ISTAT_WRITE_COMPLETE);
}

static void rtc_bfin_reset(struct bfin_rtc *rtc)
{
	/* Initialize the RTC. Enable pre-scaler to scale RTC clock
	 * to 1Hz and clear interrupt/status registers. */
	spin_lock_irq(&rtc->lock);
	rtc_bfin_sync_pending();
	bfin_write_RTC_PREN(0x1);
	bfin_write_RTC_ICTL(0);
	bfin_write_RTC_SWCNT(0);
	bfin_write_RTC_ALARM(0);
	bfin_write_RTC_ISTAT(0xFFFF);
	spin_unlock_irq(&rtc->lock);
}

static irqreturn_t bfin_rtc_interrupt(int irq, void *dev_id)
{
	struct device *dev = dev_id;
	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	unsigned long events = 0;
	u16 rtc_istat;

	stampit();

	spin_lock_irq(&rtc->lock);

	rtc_istat = bfin_read_RTC_ISTAT();

	if (rtc_istat & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)) {
		bfin_write_RTC_ISTAT(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY);
		events |= RTC_AF | RTC_IRQF;
	}

	if (rtc_istat & RTC_ISTAT_STOPWATCH) {
		bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH);
		events |= RTC_PF | RTC_IRQF;
		bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq);
	}

	if (rtc_istat & RTC_ISTAT_SEC) {
		bfin_write_RTC_ISTAT(RTC_ISTAT_SEC);
		events |= RTC_UF | RTC_IRQF;
	}

	rtc_update_irq(rtc->rtc_dev, 1, events);

	spin_unlock_irq(&rtc->lock);

	return IRQ_HANDLED;
}

static int bfin_rtc_open(struct device *dev)
{
	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	int ret;

	stampit();

	ret = request_irq(IRQ_RTC, bfin_rtc_interrupt, IRQF_DISABLED, "rtc-bfin", dev);
	if (unlikely(ret)) {
		dev_err(dev, "request RTC IRQ failed with %d\n", ret);
		return ret;
	}

	rtc_bfin_reset(rtc);

	return ret;
}

static void bfin_rtc_release(struct device *dev)
{
	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	stampit();
	rtc_bfin_reset(rtc);
	free_irq(IRQ_RTC, dev);
}

static int bfin_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
{
	struct bfin_rtc *rtc = dev_get_drvdata(dev);

	stampit();

	switch (cmd) {
	case RTC_PIE_ON:
		stampit();
		spin_lock_irq(&rtc->lock);
		rtc_bfin_sync_pending();
		bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH);
		bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq);
		bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | RTC_ISTAT_STOPWATCH);
		spin_unlock_irq(&rtc->lock);
		return 0;
	case RTC_PIE_OFF:
		stampit();
		spin_lock_irq(&rtc->lock);
		rtc_bfin_sync_pending();
		bfin_write_RTC_SWCNT(0);
		bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_STOPWATCH);
		spin_unlock_irq(&rtc->lock);
		return 0;

	case RTC_UIE_ON:
		stampit();
		spin_lock_irq(&rtc->lock);
		rtc_bfin_sync_pending();
		bfin_write_RTC_ISTAT(RTC_ISTAT_SEC);
		bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | RTC_ISTAT_SEC);
		spin_unlock_irq(&rtc->lock);
		return 0;
	case RTC_UIE_OFF:
		stampit();
		spin_lock_irq(&rtc->lock);
		rtc_bfin_sync_pending();
		bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_SEC);
		spin_unlock_irq(&rtc->lock);
		return 0;

	case RTC_AIE_ON: {
		unsigned long rtc_alarm;
		u16 which_alarm;
		int ret = 0;

		stampit();

		spin_lock_irq(&rtc->lock);

		rtc_bfin_sync_pending();
		if (rtc->rtc_alarm.tm_yday == -1) {
			struct rtc_time now;
			rtc_bfin_to_tm(bfin_read_RTC_STAT(), &now);
			now.tm_sec = rtc->rtc_alarm.tm_sec;
			now.tm_min = rtc->rtc_alarm.tm_min;
			now.tm_hour = rtc->rtc_alarm.tm_hour;
			ret = rtc_tm_to_time(&now, &rtc_alarm);
			which_alarm = RTC_ISTAT_ALARM;
		} else {
			ret = rtc_tm_to_time(&rtc->rtc_alarm, &rtc_alarm);
			which_alarm = RTC_ISTAT_ALARM_DAY;
		}
		if (ret == 0) {
			bfin_write_RTC_ISTAT(which_alarm);
			bfin_write_RTC_ALARM(rtc_time_to_bfin(rtc_alarm));
			bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | which_alarm);
		}

		spin_unlock_irq(&rtc->lock);

		return ret;
	}
	case RTC_AIE_OFF:
		stampit();
		spin_lock_irq(&rtc->lock);
		rtc_bfin_sync_pending();
		bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY));
		spin_unlock_irq(&rtc->lock);
		return 0;
	}

	return -ENOIOCTLCMD;
}

static int bfin_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct bfin_rtc *rtc = dev_get_drvdata(dev);

	stampit();

	spin_lock_irq(&rtc->lock);
	rtc_bfin_sync_pending();
	rtc_bfin_to_tm(bfin_read_RTC_STAT(), tm);
	spin_unlock_irq(&rtc->lock);

	return 0;
}

static int bfin_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	int ret;
	unsigned long now;

	stampit();

	spin_lock_irq(&rtc->lock);

	ret = rtc_tm_to_time(tm, &now);
	if (ret == 0) {
		rtc_bfin_sync_pending();
		bfin_write_RTC_STAT(rtc_time_to_bfin(now));
	}

	spin_unlock_irq(&rtc->lock);

	return ret;
}

static int bfin_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	stampit();
	memcpy(&alrm->time, &rtc->rtc_alarm, sizeof(struct rtc_time));
	alrm->pending = !!(bfin_read_RTC_ICTL() & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY));
	return 0;
}

static int bfin_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	stampit();
	memcpy(&rtc->rtc_alarm, &alrm->time, sizeof(struct rtc_time));
	return 0;
}

static int bfin_rtc_proc(struct device *dev, struct seq_file *seq)
{
#define yesno(x) ((x) ? "yes" : "no")
	u16 ictl = bfin_read_RTC_ICTL();
	stampit();
	seq_printf(seq,
		"alarm_IRQ\t: %s\n"
		"wkalarm_IRQ\t: %s\n"
		"seconds_IRQ\t: %s\n"
		"periodic_IRQ\t: %s\n",
		yesno(ictl & RTC_ISTAT_ALARM),
		yesno(ictl & RTC_ISTAT_ALARM_DAY),
		yesno(ictl & RTC_ISTAT_SEC),
		yesno(ictl & RTC_ISTAT_STOPWATCH));
	return 0;
#undef yesno
}

/**
 *	bfin_irq_set_freq - make sure hardware supports requested freq
 *	@dev: pointer to RTC device structure
 *	@freq: requested frequency rate
 *
 *	The Blackfin RTC can only generate periodic events at 1 per
 *	second (1 Hz), so reject any attempt at changing it.
 */
static int bfin_irq_set_freq(struct device *dev, int freq)
{
	stampit();
	return -ENOTTY;
}

static struct rtc_class_ops bfin_rtc_ops = {
	.open          = bfin_rtc_open,
	.release       = bfin_rtc_release,
	.ioctl         = bfin_rtc_ioctl,
	.read_time     = bfin_rtc_read_time,
	.set_time      = bfin_rtc_set_time,
	.read_alarm    = bfin_rtc_read_alarm,
	.set_alarm     = bfin_rtc_set_alarm,
	.proc          = bfin_rtc_proc,
	.irq_set_freq  = bfin_irq_set_freq,
};

static int __devinit bfin_rtc_probe(struct platform_device *pdev)
{
	struct bfin_rtc *rtc;
	int ret = 0;

	stampit();

	rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
	if (unlikely(!rtc))
		return -ENOMEM;

	spin_lock_init(&rtc->lock);

	rtc->rtc_dev = rtc_device_register(pdev->name, &pdev->dev, &bfin_rtc_ops, THIS_MODULE);
	if (unlikely(IS_ERR(rtc))) {
		ret = PTR_ERR(rtc->rtc_dev);
		goto err;
	}
	rtc->rtc_dev->irq_freq = 1;

	platform_set_drvdata(pdev, rtc);

	return 0;

 err:
	kfree(rtc);
	return ret;
}

static int __devexit bfin_rtc_remove(struct platform_device *pdev)
{
	struct bfin_rtc *rtc = platform_get_drvdata(pdev);

	rtc_device_unregister(rtc->rtc_dev);
	platform_set_drvdata(pdev, NULL);
	kfree(rtc);

	return 0;
}

static struct platform_driver bfin_rtc_driver = {
	.driver		= {
		.name	= "rtc-bfin",
		.owner	= THIS_MODULE,
	},
	.probe		= bfin_rtc_probe,
	.remove		= __devexit_p(bfin_rtc_remove),
};

static int __init bfin_rtc_init(void)
{
	stampit();
	return platform_driver_register(&bfin_rtc_driver);
}

static void __exit bfin_rtc_exit(void)
{
	platform_driver_unregister(&bfin_rtc_driver);
}

module_init(bfin_rtc_init);
module_exit(bfin_rtc_exit);

MODULE_DESCRIPTION("Blackfin On-Chip Real Time Clock Driver");
MODULE_AUTHOR("Mike Frysinger <vapier@gentoo.org>");
MODULE_LICENSE("GPL");
Commit	Line	Data
8cc75c9a WB	1	/*
8cc75c9a WB	2	* Blackfin On-Chip Real Time Clock Driver
2c95cd71	3	* Supports BF53[123]/BF53[467]/BF54[2489]
8cc75c9a WB	4	*
	5	* Copyright 2004-2007 Analog Devices Inc.
	6	*
	7	* Enter bugs at http://blackfin.uclinux.org/
	8	*
	9	* Licensed under the GPL-2 or later.
	10	*/
	11
	12	/* The biggest issue we deal with in this driver is that register writes are
	13	* synced to the RTC frequency of 1Hz. So if you write to a register and
	14	* attempt to write again before the first write has completed, the new write
	15	* is simply discarded. This can easily be troublesome if userspace disables
	16	* one event (say periodic) and then right after enables an event (say alarm).
	17	* Since all events are maintained in the same interrupt mask register, if
	18	* we wrote to it to disable the first event and then wrote to it again to
	19	* enable the second event, that second event would not be enabled as the
	20	* write would be discarded and things quickly fall apart.
	21	*
	22	* To keep this delay from significantly degrading performance (we, in theory,
	23	* would have to sleep for up to 1 second everytime we wanted to write a
	24	* register), we only check the write pending status before we start to issue
	25	* a new write. We bank on the idea that it doesnt matter when the sync
	26	* happens so long as we don't attempt another write before it does. The only
	27	* time userspace would take this penalty is when they try and do multiple
	28	* operations right after another ... but in this case, they need to take the
	29	* sync penalty, so we should be OK.
	30	*
	31	* Also note that the RTC_ISTAT register does not suffer this penalty; its
	32	* writes to clear status registers complete immediately.
	33	*/
	34
	35	#include <linux/module.h>
	36	#include <linux/kernel.h>
	37	#include <linux/bcd.h>
	38	#include <linux/rtc.h>
	39	#include <linux/init.h>
	40	#include <linux/platform_device.h>
	41	#include <linux/seq_file.h>
	42	#include <linux/interrupt.h>
	43	#include <linux/spinlock.h>
	44	#include <linux/delay.h>
	45
	46	#include <asm/blackfin.h>
	47
64061160	48	#define stamp(fmt, args...) pr_debug("%s:%i: " fmt "\n", __func__, __LINE__, ## args)
8cc75c9a WB	49	#define stampit() stamp("here i am")
	50
	51	struct bfin_rtc {
	52	struct rtc_device *rtc_dev;
	53	struct rtc_time rtc_alarm;
	54	spinlock_t lock;
	55	};
	56
	57	/* Bit values for the ISTAT / ICTL registers */
	58	#define RTC_ISTAT_WRITE_COMPLETE 0x8000
	59	#define RTC_ISTAT_WRITE_PENDING 0x4000
	60	#define RTC_ISTAT_ALARM_DAY 0x0040
	61	#define RTC_ISTAT_24HR 0x0020
	62	#define RTC_ISTAT_HOUR 0x0010
	63	#define RTC_ISTAT_MIN 0x0008
	64	#define RTC_ISTAT_SEC 0x0004
	65	#define RTC_ISTAT_ALARM 0x0002
	66	#define RTC_ISTAT_STOPWATCH 0x0001
	67
	68	/* Shift values for RTC_STAT register */
	69	#define DAY_BITS_OFF 17
	70	#define HOUR_BITS_OFF 12
	71	#define MIN_BITS_OFF 6
	72	#define SEC_BITS_OFF 0
	73
	74	/* Some helper functions to convert between the common RTC notion of time
5c236343	75	* and the internal Blackfin notion that is encoded in 32bits.
8cc75c9a WB	76	*/
	77	static inline u32 rtc_time_to_bfin(unsigned long now)
	78	{
	79	u32 sec = (now % 60);
	80	u32 min = (now % (60 * 60)) / 60;
	81	u32 hour = (now % (60 * 60 * 24)) / (60 * 60);
	82	u32 days = (now / (60 * 60 * 24));
	83	return (sec << SEC_BITS_OFF) +
	84	(min << MIN_BITS_OFF) +
	85	(hour << HOUR_BITS_OFF) +
	86	(days << DAY_BITS_OFF);
	87	}
	88	static inline unsigned long rtc_bfin_to_time(u32 rtc_bfin)
	89	{
	90	return (((rtc_bfin >> SEC_BITS_OFF) & 0x003F)) +
	91	(((rtc_bfin >> MIN_BITS_OFF) & 0x003F) * 60) +
	92	(((rtc_bfin >> HOUR_BITS_OFF) & 0x001F) * 60 * 60) +
	93	(((rtc_bfin >> DAY_BITS_OFF) & 0x7FFF) * 60 * 60 * 24);
	94	}
	95	static inline void rtc_bfin_to_tm(u32 rtc_bfin, struct rtc_time *tm)
	96	{
	97	rtc_time_to_tm(rtc_bfin_to_time(rtc_bfin), tm);
	98	}
	99
	100	/* Wait for the previous write to a RTC register to complete.
	101	* Unfortunately, we can't sleep here as that introduces a race condition when
	102	* turning on interrupt events. Consider this:
	103	* - process sets alarm
	104	* - process enables alarm
	105	* - process sleeps while waiting for rtc write to sync
	106	* - interrupt fires while process is sleeping
	107	* - interrupt acks the event by writing to ISTAT
	108	* - interrupt sets the WRITE PENDING bit
	109	* - interrupt handler finishes
	110	* - process wakes up, sees WRITE PENDING bit set, goes to sleep
	111	* - interrupt fires while process is sleeping
	112	* If anyone can point out the obvious solution here, i'm listening :). This
	113	* shouldn't be an issue on an SMP or preempt system as this function should
	114	* only be called with the rtc lock held.
5c236343 MF	115	*
	116	* Other options:
	117	* - disable PREN so the sync happens at 32.768kHZ ... but this changes the
	118	* inc rate for all RTC registers from 1HZ to 32.768kHZ ...
	119	* - use the write complete IRQ
8cc75c9a WB	120	*/
	121	static void rtc_bfin_sync_pending(void)
	122	{
	123	stampit();
	124	while (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_COMPLETE)) {
	125	if (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_PENDING))
	126	break;
	127	}
	128	bfin_write_RTC_ISTAT(RTC_ISTAT_WRITE_COMPLETE);
	129	}
	130
	131	static void rtc_bfin_reset(struct bfin_rtc *rtc)
	132	{
	133	/* Initialize the RTC. Enable pre-scaler to scale RTC clock
	134	* to 1Hz and clear interrupt/status registers. */
	135	spin_lock_irq(&rtc->lock);
	136	rtc_bfin_sync_pending();
	137	bfin_write_RTC_PREN(0x1);
	138	bfin_write_RTC_ICTL(0);
	139	bfin_write_RTC_SWCNT(0);
	140	bfin_write_RTC_ALARM(0);
	141	bfin_write_RTC_ISTAT(0xFFFF);
	142	spin_unlock_irq(&rtc->lock);
	143	}
	144
	145	static irqreturn_t bfin_rtc_interrupt(int irq, void *dev_id)
	146	{
d7827d88 MF	147	struct device *dev = dev_id;
d7827d88 MF	148	struct bfin_rtc *rtc = dev_get_drvdata(dev);
8cc75c9a WB	149	unsigned long events = 0;
	150	u16 rtc_istat;
	151
	152	stampit();
	153
	154	spin_lock_irq(&rtc->lock);
	155
	156	rtc_istat = bfin_read_RTC_ISTAT();
	157
	158	if (rtc_istat & (RTC_ISTAT_ALARM \| RTC_ISTAT_ALARM_DAY)) {
	159	bfin_write_RTC_ISTAT(RTC_ISTAT_ALARM \| RTC_ISTAT_ALARM_DAY);
	160	events \|= RTC_AF \| RTC_IRQF;
	161	}
	162
	163	if (rtc_istat & RTC_ISTAT_STOPWATCH) {
	164	bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH);
	165	events \|= RTC_PF \| RTC_IRQF;
	166	bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq);
	167	}
	168
	169	if (rtc_istat & RTC_ISTAT_SEC) {
	170	bfin_write_RTC_ISTAT(RTC_ISTAT_SEC);
	171	events \|= RTC_UF \| RTC_IRQF;
	172	}
	173
	174	rtc_update_irq(rtc->rtc_dev, 1, events);
	175
	176	spin_unlock_irq(&rtc->lock);
	177
	178	return IRQ_HANDLED;
	179	}
	180
	181	static int bfin_rtc_open(struct device *dev)
	182	{
	183	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	184	int ret;
	185
	186	stampit();
	187
	188	ret = request_irq(IRQ_RTC, bfin_rtc_interrupt, IRQF_DISABLED, "rtc-bfin", dev);
	189	if (unlikely(ret)) {
	190	dev_err(dev, "request RTC IRQ failed with %d\n", ret);
	191	return ret;
	192	}
	193
	194	rtc_bfin_reset(rtc);
	195
	196	return ret;
	197	}
	198
	199	static void bfin_rtc_release(struct device *dev)
	200	{
	201	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	202	stampit();
	203	rtc_bfin_reset(rtc);
	204	free_irq(IRQ_RTC, dev);
	205	}
	206
	207	static int bfin_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
	208	{
	209	struct bfin_rtc *rtc = dev_get_drvdata(dev);
	210
	211	stampit();
	212
213	switch (cmd) {
214	case RTC_PIE_ON:
215	stampit();
216	spin_lock_irq(&rtc->lock);
217	rtc_bfin_sync_pending();
218	bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH);
219	bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq);
220	bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() \| RTC_ISTAT_STOPWATCH);
221	spin_unlock_irq(&rtc->lock);
222	return 0;
223	case RTC_PIE_OFF:
224	stampit();
225	spin_lock_irq(&rtc->lock);
226	rtc_bfin_sync_pending();
227	bfin_write_RTC_SWCNT(0);
228	bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_STOPWATCH);
229	spin_unlock_irq(&rtc->lock);
230	return 0;
231
232	case RTC_UIE_ON:
233	stampit();
234	spin_lock_irq(&rtc->lock);
235	rtc_bfin_sync_pending();
236	bfin_write_RTC_ISTAT(RTC_ISTAT_SEC);
237	bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() \| RTC_ISTAT_SEC);
238	spin_unlock_irq(&rtc->lock);
239	return 0;
240	case RTC_UIE_OFF:
241	stampit();
242	spin_lock_irq(&rtc->lock);
243	rtc_bfin_sync_pending();
244	bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_SEC);
245	spin_unlock_irq(&rtc->lock);
246	return 0;
247
248	case RTC_AIE_ON: {
249	unsigned long rtc_alarm;
250	u16 which_alarm;
251	int ret = 0;
252
253	stampit();
254
255	spin_lock_irq(&rtc->lock);
256
257	rtc_bfin_sync_pending();
258	if (rtc->rtc_alarm.tm_yday == -1) {
259	struct rtc_time now;
260	rtc_bfin_to_tm(bfin_read_RTC_STAT(), &now);
261	now.tm_sec = rtc->rtc_alarm.tm_sec;
262	now.tm_min = rtc->rtc_alarm.tm_min;
263	now.tm_hour = rtc->rtc_alarm.tm_hour;
264	ret = rtc_tm_to_time(&now, &rtc_alarm);
265	which_alarm = RTC_ISTAT_ALARM;
266	} else {
267	ret = rtc_tm_to_time(&rtc->rtc_alarm, &rtc_alarm);
268	which_alarm = RTC_ISTAT_ALARM_DAY;
269	}
270	if (ret == 0) {
271	bfin_write_RTC_ISTAT(which_alarm);
272	bfin_write_RTC_ALARM(rtc_time_to_bfin(rtc_alarm));
273	bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() \| which_alarm);
274	}
275
276	spin_unlock_irq(&rtc->lock);
277
278	return ret;
279	}
280	case RTC_AIE_OFF:
281	stampit();
282	spin_lock_irq(&rtc->lock);
283	rtc_bfin_sync_pending();
284	bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~(RTC_ISTAT_ALARM \| RTC_ISTAT_ALARM_DAY));
285	spin_unlock_irq(&rtc->lock);
286	return 0;
287	}
288
289	return -ENOIOCTLCMD;
290	}
291
292	static int bfin_rtc_read_time(struct device dev, struct rtc_time tm)
293	{
294	struct bfin_rtc *rtc = dev_get_drvdata(dev);
295
296	stampit();
297
298	spin_lock_irq(&rtc->lock);
299	rtc_bfin_sync_pending();
300	rtc_bfin_to_tm(bfin_read_RTC_STAT(), tm);
301	spin_unlock_irq(&rtc->lock);
302
303	return 0;
304	}
305
306	static int bfin_rtc_set_time(struct device dev, struct rtc_time tm)
307	{
308	struct bfin_rtc *rtc = dev_get_drvdata(dev);
309	int ret;
310	unsigned long now;
311
312	stampit();
313
314	spin_lock_irq(&rtc->lock);
315
316	ret = rtc_tm_to_time(tm, &now);
317	if (ret == 0) {
318	rtc_bfin_sync_pending();
319	bfin_write_RTC_STAT(rtc_time_to_bfin(now));
320	}
321
322	spin_unlock_irq(&rtc->lock);
323
324	return ret;
325	}
326
327	static int bfin_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
328	{
329	struct bfin_rtc *rtc = dev_get_drvdata(dev);
330	stampit();
331	memcpy(&alrm->time, &rtc->rtc_alarm, sizeof(struct rtc_time));
332	alrm->pending = !!(bfin_read_RTC_ICTL() & (RTC_ISTAT_ALARM \| RTC_ISTAT_ALARM_DAY));
333	return 0;
334	}
335
336	static int bfin_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
337	{
338	struct bfin_rtc *rtc = dev_get_drvdata(dev);
339	stampit();
340	memcpy(&rtc->rtc_alarm, &alrm->time, sizeof(struct rtc_time));
341	return 0;
342	}
343
344	static int bfin_rtc_proc(struct device dev, struct seq_file seq)
345	{
64061160	346	#define yesno(x) ((x) ? "yes" : "no")
8cc75c9a WB	347	u16 ictl = bfin_read_RTC_ICTL();
8cc75c9a WB	348	stampit();
64061160 MF	349	seq_printf(seq,
	350	"alarm_IRQ\t: %s\n"
	351	"wkalarm_IRQ\t: %s\n"
	352	"seconds_IRQ\t: %s\n"
	353	"periodic_IRQ\t: %s\n",
	354	yesno(ictl & RTC_ISTAT_ALARM),
	355	yesno(ictl & RTC_ISTAT_ALARM_DAY),
	356	yesno(ictl & RTC_ISTAT_SEC),
	357	yesno(ictl & RTC_ISTAT_STOPWATCH));
8cc75c9a	358	return 0;
64061160	359	#undef yesno
8cc75c9a WB	360	}
8cc75c9a WB	361
5c236343 MF	362	/**
	363	* bfin_irq_set_freq - make sure hardware supports requested freq
	364	* @dev: pointer to RTC device structure
	365	* @freq: requested frequency rate
	366	*
	367	* The Blackfin RTC can only generate periodic events at 1 per
	368	* second (1 Hz), so reject any attempt at changing it.
	369	*/
8cc75c9a WB	370	static int bfin_irq_set_freq(struct device *dev, int freq)
8cc75c9a WB	371	{
8cc75c9a	372	stampit();
5c236343	373	return -ENOTTY;
8cc75c9a WB	374	}
	375
	376	static struct rtc_class_ops bfin_rtc_ops = {
	377	.open = bfin_rtc_open,
	378	.release = bfin_rtc_release,
	379	.ioctl = bfin_rtc_ioctl,
	380	.read_time = bfin_rtc_read_time,
	381	.set_time = bfin_rtc_set_time,
	382	.read_alarm = bfin_rtc_read_alarm,
	383	.set_alarm = bfin_rtc_set_alarm,
	384	.proc = bfin_rtc_proc,
	385	.irq_set_freq = bfin_irq_set_freq,
	386	};
	387
	388	static int __devinit bfin_rtc_probe(struct platform_device *pdev)
	389	{
	390	struct bfin_rtc *rtc;
	391	int ret = 0;
	392
	393	stampit();
	394
	395	rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
	396	if (unlikely(!rtc))
	397	return -ENOMEM;
	398
	399	spin_lock_init(&rtc->lock);
	400
	401	rtc->rtc_dev = rtc_device_register(pdev->name, &pdev->dev, &bfin_rtc_ops, THIS_MODULE);
	402	if (unlikely(IS_ERR(rtc))) {
	403	ret = PTR_ERR(rtc->rtc_dev);
	404	goto err;
	405	}
5c236343	406	rtc->rtc_dev->irq_freq = 1;
8cc75c9a WB	407
	408	platform_set_drvdata(pdev, rtc);
	409
	410	return 0;
	411
5c236343	412	err:
8cc75c9a WB	413	kfree(rtc);
	414	return ret;
	415	}
	416
	417	static int __devexit bfin_rtc_remove(struct platform_device *pdev)
	418	{
	419	struct bfin_rtc *rtc = platform_get_drvdata(pdev);
	420
	421	rtc_device_unregister(rtc->rtc_dev);
	422	platform_set_drvdata(pdev, NULL);
	423	kfree(rtc);
	424
	425	return 0;
	426	}
	427
	428	static struct platform_driver bfin_rtc_driver = {
	429	.driver = {
	430	.name = "rtc-bfin",
	431	.owner = THIS_MODULE,
	432	},
	433	.probe = bfin_rtc_probe,
	434	.remove = __devexit_p(bfin_rtc_remove),
	435	};
	436
	437	static int __init bfin_rtc_init(void)
	438	{
	439	stampit();
	440	return platform_driver_register(&bfin_rtc_driver);
	441	}
	442
	443	static void __exit bfin_rtc_exit(void)
	444	{
	445	platform_driver_unregister(&bfin_rtc_driver);
	446	}
	447
	448	module_init(bfin_rtc_init);
	449	module_exit(bfin_rtc_exit);
	450
	451	MODULE_DESCRIPTION("Blackfin On-Chip Real Time Clock Driver");
	452	MODULE_AUTHOR("Mike Frysinger <vapier@gentoo.org>");
	453	MODULE_LICENSE("GPL");