Commit | Line | Data |
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7be2c7c9 DB |
1 | /* |
2 | * RTC class driver for "CMOS RTC": PCs, ACPI, etc | |
3 | * | |
4 | * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) | |
5 | * Copyright (C) 2006 David Brownell (convert to new framework) | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * The original "cmos clock" chip was an MC146818 chip, now obsolete. | |
15 | * That defined the register interface now provided by all PCs, some | |
16 | * non-PC systems, and incorporated into ACPI. Modern PC chipsets | |
17 | * integrate an MC146818 clone in their southbridge, and boards use | |
18 | * that instead of discrete clones like the DS12887 or M48T86. There | |
19 | * are also clones that connect using the LPC bus. | |
20 | * | |
21 | * That register API is also used directly by various other drivers | |
22 | * (notably for integrated NVRAM), infrastructure (x86 has code to | |
23 | * bypass the RTC framework, directly reading the RTC during boot | |
24 | * and updating minutes/seconds for systems using NTP synch) and | |
25 | * utilities (like userspace 'hwclock', if no /dev node exists). | |
26 | * | |
27 | * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with | |
28 | * interrupts disabled, holding the global rtc_lock, to exclude those | |
29 | * other drivers and utilities on correctly configured systems. | |
30 | */ | |
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/spinlock.h> | |
36 | #include <linux/platform_device.h> | |
37 | #include <linux/mod_devicetable.h> | |
38 | ||
9d8af78b BW |
39 | #ifdef CONFIG_HPET_EMULATE_RTC |
40 | #include <asm/hpet.h> | |
41 | #endif | |
42 | ||
7be2c7c9 DB |
43 | /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ |
44 | #include <asm-generic/rtc.h> | |
45 | ||
9d8af78b BW |
46 | #ifndef CONFIG_HPET_EMULATE_RTC |
47 | #define is_hpet_enabled() 0 | |
48 | #define hpet_set_alarm_time(hrs, min, sec) do { } while (0) | |
49 | #define hpet_set_periodic_freq(arg) 0 | |
50 | #define hpet_mask_rtc_irq_bit(arg) do { } while (0) | |
51 | #define hpet_set_rtc_irq_bit(arg) do { } while (0) | |
52 | #define hpet_rtc_timer_init() do { } while (0) | |
53 | #define hpet_register_irq_handler(h) 0 | |
54 | #define hpet_unregister_irq_handler(h) do { } while (0) | |
55 | extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id); | |
56 | #endif | |
7be2c7c9 DB |
57 | |
58 | struct cmos_rtc { | |
59 | struct rtc_device *rtc; | |
60 | struct device *dev; | |
61 | int irq; | |
62 | struct resource *iomem; | |
63 | ||
87ac84f4 DB |
64 | void (*wake_on)(struct device *); |
65 | void (*wake_off)(struct device *); | |
66 | ||
67 | u8 enabled_wake; | |
7be2c7c9 DB |
68 | u8 suspend_ctrl; |
69 | ||
70 | /* newer hardware extends the original register set */ | |
71 | u8 day_alrm; | |
72 | u8 mon_alrm; | |
73 | u8 century; | |
74 | }; | |
75 | ||
76 | /* both platform and pnp busses use negative numbers for invalid irqs */ | |
77 | #define is_valid_irq(n) ((n) >= 0) | |
78 | ||
79 | static const char driver_name[] = "rtc_cmos"; | |
80 | ||
bcd9b89c DB |
81 | /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; |
82 | * always mask it against the irq enable bits in RTC_CONTROL. Bit values | |
83 | * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. | |
84 | */ | |
85 | #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) | |
86 | ||
87 | static inline int is_intr(u8 rtc_intr) | |
88 | { | |
89 | if (!(rtc_intr & RTC_IRQF)) | |
90 | return 0; | |
91 | return rtc_intr & RTC_IRQMASK; | |
92 | } | |
93 | ||
7be2c7c9 DB |
94 | /*----------------------------------------------------------------*/ |
95 | ||
96 | static int cmos_read_time(struct device *dev, struct rtc_time *t) | |
97 | { | |
98 | /* REVISIT: if the clock has a "century" register, use | |
99 | * that instead of the heuristic in get_rtc_time(). | |
100 | * That'll make Y3K compatility (year > 2070) easy! | |
101 | */ | |
102 | get_rtc_time(t); | |
103 | return 0; | |
104 | } | |
105 | ||
106 | static int cmos_set_time(struct device *dev, struct rtc_time *t) | |
107 | { | |
108 | /* REVISIT: set the "century" register if available | |
109 | * | |
110 | * NOTE: this ignores the issue whereby updating the seconds | |
111 | * takes effect exactly 500ms after we write the register. | |
112 | * (Also queueing and other delays before we get this far.) | |
113 | */ | |
114 | return set_rtc_time(t); | |
115 | } | |
116 | ||
117 | static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
118 | { | |
119 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
120 | unsigned char rtc_control; | |
121 | ||
122 | if (!is_valid_irq(cmos->irq)) | |
123 | return -EIO; | |
124 | ||
125 | /* Basic alarms only support hour, minute, and seconds fields. | |
126 | * Some also support day and month, for alarms up to a year in | |
127 | * the future. | |
128 | */ | |
129 | t->time.tm_mday = -1; | |
130 | t->time.tm_mon = -1; | |
131 | ||
132 | spin_lock_irq(&rtc_lock); | |
133 | t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); | |
134 | t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); | |
135 | t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); | |
136 | ||
137 | if (cmos->day_alrm) { | |
615bb29c ML |
138 | /* ignore upper bits on readback per ACPI spec */ |
139 | t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; | |
7be2c7c9 DB |
140 | if (!t->time.tm_mday) |
141 | t->time.tm_mday = -1; | |
142 | ||
143 | if (cmos->mon_alrm) { | |
144 | t->time.tm_mon = CMOS_READ(cmos->mon_alrm); | |
145 | if (!t->time.tm_mon) | |
146 | t->time.tm_mon = -1; | |
147 | } | |
148 | } | |
149 | ||
150 | rtc_control = CMOS_READ(RTC_CONTROL); | |
151 | spin_unlock_irq(&rtc_lock); | |
152 | ||
153 | /* REVISIT this assumes PC style usage: always BCD */ | |
154 | ||
155 | if (((unsigned)t->time.tm_sec) < 0x60) | |
156 | t->time.tm_sec = BCD2BIN(t->time.tm_sec); | |
157 | else | |
158 | t->time.tm_sec = -1; | |
159 | if (((unsigned)t->time.tm_min) < 0x60) | |
160 | t->time.tm_min = BCD2BIN(t->time.tm_min); | |
161 | else | |
162 | t->time.tm_min = -1; | |
163 | if (((unsigned)t->time.tm_hour) < 0x24) | |
164 | t->time.tm_hour = BCD2BIN(t->time.tm_hour); | |
165 | else | |
166 | t->time.tm_hour = -1; | |
167 | ||
168 | if (cmos->day_alrm) { | |
169 | if (((unsigned)t->time.tm_mday) <= 0x31) | |
170 | t->time.tm_mday = BCD2BIN(t->time.tm_mday); | |
171 | else | |
172 | t->time.tm_mday = -1; | |
173 | if (cmos->mon_alrm) { | |
174 | if (((unsigned)t->time.tm_mon) <= 0x12) | |
175 | t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1; | |
176 | else | |
177 | t->time.tm_mon = -1; | |
178 | } | |
179 | } | |
180 | t->time.tm_year = -1; | |
181 | ||
182 | t->enabled = !!(rtc_control & RTC_AIE); | |
183 | t->pending = 0; | |
184 | ||
185 | return 0; | |
186 | } | |
187 | ||
188 | static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
189 | { | |
190 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
191 | unsigned char mon, mday, hrs, min, sec; | |
192 | unsigned char rtc_control, rtc_intr; | |
193 | ||
194 | if (!is_valid_irq(cmos->irq)) | |
195 | return -EIO; | |
196 | ||
197 | /* REVISIT this assumes PC style usage: always BCD */ | |
198 | ||
199 | /* Writing 0xff means "don't care" or "match all". */ | |
200 | ||
201 | mon = t->time.tm_mon; | |
202 | mon = (mon < 12) ? BIN2BCD(mon) : 0xff; | |
203 | mon++; | |
204 | ||
205 | mday = t->time.tm_mday; | |
206 | mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff; | |
207 | ||
208 | hrs = t->time.tm_hour; | |
209 | hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff; | |
210 | ||
211 | min = t->time.tm_min; | |
212 | min = (min < 60) ? BIN2BCD(min) : 0xff; | |
213 | ||
214 | sec = t->time.tm_sec; | |
215 | sec = (sec < 60) ? BIN2BCD(sec) : 0xff; | |
216 | ||
9d8af78b | 217 | hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec); |
7be2c7c9 DB |
218 | spin_lock_irq(&rtc_lock); |
219 | ||
220 | /* next rtc irq must not be from previous alarm setting */ | |
221 | rtc_control = CMOS_READ(RTC_CONTROL); | |
222 | rtc_control &= ~RTC_AIE; | |
223 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
224 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
225 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; |
226 | if (is_intr(rtc_intr)) | |
ab6a2d70 | 227 | rtc_update_irq(cmos->rtc, 1, rtc_intr); |
7be2c7c9 DB |
228 | |
229 | /* update alarm */ | |
230 | CMOS_WRITE(hrs, RTC_HOURS_ALARM); | |
231 | CMOS_WRITE(min, RTC_MINUTES_ALARM); | |
232 | CMOS_WRITE(sec, RTC_SECONDS_ALARM); | |
233 | ||
234 | /* the system may support an "enhanced" alarm */ | |
235 | if (cmos->day_alrm) { | |
236 | CMOS_WRITE(mday, cmos->day_alrm); | |
237 | if (cmos->mon_alrm) | |
238 | CMOS_WRITE(mon, cmos->mon_alrm); | |
239 | } | |
240 | ||
241 | if (t->enabled) { | |
242 | rtc_control |= RTC_AIE; | |
243 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
244 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
245 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; |
246 | if (is_intr(rtc_intr)) | |
ab6a2d70 | 247 | rtc_update_irq(cmos->rtc, 1, rtc_intr); |
7be2c7c9 DB |
248 | } |
249 | ||
250 | spin_unlock_irq(&rtc_lock); | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
57deb526 | 255 | static int cmos_irq_set_freq(struct device *dev, int freq) |
7be2c7c9 DB |
256 | { |
257 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
258 | int f; | |
259 | unsigned long flags; | |
260 | ||
261 | if (!is_valid_irq(cmos->irq)) | |
262 | return -ENXIO; | |
263 | ||
264 | /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */ | |
265 | f = ffs(freq); | |
97144c67 DB |
266 | if (f-- > 16) |
267 | return -EINVAL; | |
268 | f = 16 - f; | |
7be2c7c9 DB |
269 | |
270 | spin_lock_irqsave(&rtc_lock, flags); | |
9d8af78b BW |
271 | if (!hpet_set_periodic_freq(freq)) |
272 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT); | |
7be2c7c9 DB |
273 | spin_unlock_irqrestore(&rtc_lock, flags); |
274 | ||
275 | return 0; | |
276 | } | |
277 | ||
57deb526 AZ |
278 | static int cmos_irq_set_state(struct device *dev, int enabled) |
279 | { | |
280 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
281 | unsigned char rtc_control, rtc_intr; | |
282 | unsigned long flags; | |
283 | ||
284 | if (!is_valid_irq(cmos->irq)) | |
285 | return -ENXIO; | |
286 | ||
287 | spin_lock_irqsave(&rtc_lock, flags); | |
288 | rtc_control = CMOS_READ(RTC_CONTROL); | |
289 | ||
290 | if (enabled) | |
291 | rtc_control |= RTC_PIE; | |
292 | else | |
293 | rtc_control &= ~RTC_PIE; | |
294 | ||
295 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
296 | ||
297 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
298 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
299 | if (is_intr(rtc_intr)) | |
300 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
301 | ||
302 | spin_unlock_irqrestore(&rtc_lock, flags); | |
303 | return 0; | |
304 | } | |
305 | ||
7be2c7c9 DB |
306 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) |
307 | ||
308 | static int | |
309 | cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
310 | { | |
311 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
312 | unsigned char rtc_control, rtc_intr; | |
313 | unsigned long flags; | |
314 | ||
315 | switch (cmd) { | |
316 | case RTC_AIE_OFF: | |
317 | case RTC_AIE_ON: | |
318 | case RTC_UIE_OFF: | |
319 | case RTC_UIE_ON: | |
320 | case RTC_PIE_OFF: | |
321 | case RTC_PIE_ON: | |
322 | if (!is_valid_irq(cmos->irq)) | |
323 | return -EINVAL; | |
324 | break; | |
325 | default: | |
326 | return -ENOIOCTLCMD; | |
327 | } | |
328 | ||
329 | spin_lock_irqsave(&rtc_lock, flags); | |
330 | rtc_control = CMOS_READ(RTC_CONTROL); | |
331 | switch (cmd) { | |
332 | case RTC_AIE_OFF: /* alarm off */ | |
333 | rtc_control &= ~RTC_AIE; | |
9d8af78b | 334 | hpet_mask_rtc_irq_bit(RTC_AIE); |
7be2c7c9 DB |
335 | break; |
336 | case RTC_AIE_ON: /* alarm on */ | |
337 | rtc_control |= RTC_AIE; | |
9d8af78b | 338 | hpet_set_rtc_irq_bit(RTC_AIE); |
7be2c7c9 DB |
339 | break; |
340 | case RTC_UIE_OFF: /* update off */ | |
341 | rtc_control &= ~RTC_UIE; | |
9d8af78b | 342 | hpet_mask_rtc_irq_bit(RTC_UIE); |
7be2c7c9 DB |
343 | break; |
344 | case RTC_UIE_ON: /* update on */ | |
345 | rtc_control |= RTC_UIE; | |
9d8af78b | 346 | hpet_set_rtc_irq_bit(RTC_UIE); |
7be2c7c9 DB |
347 | break; |
348 | case RTC_PIE_OFF: /* periodic off */ | |
349 | rtc_control &= ~RTC_PIE; | |
9d8af78b | 350 | hpet_mask_rtc_irq_bit(RTC_PIE); |
7be2c7c9 DB |
351 | break; |
352 | case RTC_PIE_ON: /* periodic on */ | |
353 | rtc_control |= RTC_PIE; | |
9d8af78b | 354 | hpet_set_rtc_irq_bit(RTC_PIE); |
7be2c7c9 DB |
355 | break; |
356 | } | |
9d8af78b BW |
357 | if (!is_hpet_enabled()) |
358 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
359 | ||
7be2c7c9 | 360 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); |
bcd9b89c DB |
361 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; |
362 | if (is_intr(rtc_intr)) | |
ab6a2d70 | 363 | rtc_update_irq(cmos->rtc, 1, rtc_intr); |
9d8af78b | 364 | |
7be2c7c9 DB |
365 | spin_unlock_irqrestore(&rtc_lock, flags); |
366 | return 0; | |
367 | } | |
368 | ||
369 | #else | |
370 | #define cmos_rtc_ioctl NULL | |
371 | #endif | |
372 | ||
373 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
374 | ||
375 | static int cmos_procfs(struct device *dev, struct seq_file *seq) | |
376 | { | |
377 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
378 | unsigned char rtc_control, valid; | |
379 | ||
380 | spin_lock_irq(&rtc_lock); | |
381 | rtc_control = CMOS_READ(RTC_CONTROL); | |
382 | valid = CMOS_READ(RTC_VALID); | |
383 | spin_unlock_irq(&rtc_lock); | |
384 | ||
385 | /* NOTE: at least ICH6 reports battery status using a different | |
386 | * (non-RTC) bit; and SQWE is ignored on many current systems. | |
387 | */ | |
388 | return seq_printf(seq, | |
389 | "periodic_IRQ\t: %s\n" | |
390 | "update_IRQ\t: %s\n" | |
391 | // "square_wave\t: %s\n" | |
392 | // "BCD\t\t: %s\n" | |
393 | "DST_enable\t: %s\n" | |
394 | "periodic_freq\t: %d\n" | |
395 | "batt_status\t: %s\n", | |
396 | (rtc_control & RTC_PIE) ? "yes" : "no", | |
397 | (rtc_control & RTC_UIE) ? "yes" : "no", | |
398 | // (rtc_control & RTC_SQWE) ? "yes" : "no", | |
399 | // (rtc_control & RTC_DM_BINARY) ? "no" : "yes", | |
400 | (rtc_control & RTC_DST_EN) ? "yes" : "no", | |
401 | cmos->rtc->irq_freq, | |
402 | (valid & RTC_VRT) ? "okay" : "dead"); | |
403 | } | |
404 | ||
405 | #else | |
406 | #define cmos_procfs NULL | |
407 | #endif | |
408 | ||
409 | static const struct rtc_class_ops cmos_rtc_ops = { | |
410 | .ioctl = cmos_rtc_ioctl, | |
411 | .read_time = cmos_read_time, | |
412 | .set_time = cmos_set_time, | |
413 | .read_alarm = cmos_read_alarm, | |
414 | .set_alarm = cmos_set_alarm, | |
415 | .proc = cmos_procfs, | |
57deb526 AZ |
416 | .irq_set_freq = cmos_irq_set_freq, |
417 | .irq_set_state = cmos_irq_set_state, | |
7be2c7c9 DB |
418 | }; |
419 | ||
420 | /*----------------------------------------------------------------*/ | |
421 | ||
e07e232c DB |
422 | /* |
423 | * All these chips have at least 64 bytes of address space, shared by | |
424 | * RTC registers and NVRAM. Most of those bytes of NVRAM are used | |
425 | * by boot firmware. Modern chips have 128 or 256 bytes. | |
426 | */ | |
427 | ||
428 | #define NVRAM_OFFSET (RTC_REG_D + 1) | |
429 | ||
430 | static ssize_t | |
431 | cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr, | |
432 | char *buf, loff_t off, size_t count) | |
433 | { | |
434 | int retval; | |
435 | ||
436 | if (unlikely(off >= attr->size)) | |
437 | return 0; | |
438 | if ((off + count) > attr->size) | |
439 | count = attr->size - off; | |
440 | ||
441 | spin_lock_irq(&rtc_lock); | |
442 | for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) | |
443 | *buf++ = CMOS_READ(off); | |
444 | spin_unlock_irq(&rtc_lock); | |
445 | ||
446 | return retval; | |
447 | } | |
448 | ||
449 | static ssize_t | |
450 | cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr, | |
451 | char *buf, loff_t off, size_t count) | |
452 | { | |
453 | struct cmos_rtc *cmos; | |
454 | int retval; | |
455 | ||
456 | cmos = dev_get_drvdata(container_of(kobj, struct device, kobj)); | |
457 | if (unlikely(off >= attr->size)) | |
458 | return -EFBIG; | |
459 | if ((off + count) > attr->size) | |
460 | count = attr->size - off; | |
461 | ||
462 | /* NOTE: on at least PCs and Ataris, the boot firmware uses a | |
463 | * checksum on part of the NVRAM data. That's currently ignored | |
464 | * here. If userspace is smart enough to know what fields of | |
465 | * NVRAM to update, updating checksums is also part of its job. | |
466 | */ | |
467 | spin_lock_irq(&rtc_lock); | |
468 | for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) { | |
469 | /* don't trash RTC registers */ | |
470 | if (off == cmos->day_alrm | |
471 | || off == cmos->mon_alrm | |
472 | || off == cmos->century) | |
473 | buf++; | |
474 | else | |
475 | CMOS_WRITE(*buf++, off); | |
476 | } | |
477 | spin_unlock_irq(&rtc_lock); | |
478 | ||
479 | return retval; | |
480 | } | |
481 | ||
482 | static struct bin_attribute nvram = { | |
483 | .attr = { | |
484 | .name = "nvram", | |
485 | .mode = S_IRUGO | S_IWUSR, | |
486 | .owner = THIS_MODULE, | |
487 | }, | |
488 | ||
489 | .read = cmos_nvram_read, | |
490 | .write = cmos_nvram_write, | |
491 | /* size gets set up later */ | |
492 | }; | |
493 | ||
494 | /*----------------------------------------------------------------*/ | |
495 | ||
7be2c7c9 DB |
496 | static struct cmos_rtc cmos_rtc; |
497 | ||
498 | static irqreturn_t cmos_interrupt(int irq, void *p) | |
499 | { | |
500 | u8 irqstat; | |
8a0bdfd7 | 501 | u8 rtc_control; |
7be2c7c9 DB |
502 | |
503 | spin_lock(&rtc_lock); | |
9d8af78b BW |
504 | /* |
505 | * In this case it is HPET RTC interrupt handler | |
506 | * calling us, with the interrupt information | |
507 | * passed as arg1, instead of irq. | |
508 | */ | |
509 | if (is_hpet_enabled()) | |
510 | irqstat = (unsigned long)irq & 0xF0; | |
511 | else { | |
512 | irqstat = CMOS_READ(RTC_INTR_FLAGS); | |
513 | rtc_control = CMOS_READ(RTC_CONTROL); | |
514 | irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
515 | } | |
8a0bdfd7 DB |
516 | |
517 | /* All Linux RTC alarms should be treated as if they were oneshot. | |
518 | * Similar code may be needed in system wakeup paths, in case the | |
519 | * alarm woke the system. | |
520 | */ | |
521 | if (irqstat & RTC_AIE) { | |
9d8af78b | 522 | rtc_control = CMOS_READ(RTC_CONTROL); |
8a0bdfd7 DB |
523 | rtc_control &= ~RTC_AIE; |
524 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
525 | CMOS_READ(RTC_INTR_FLAGS); | |
526 | } | |
7be2c7c9 DB |
527 | spin_unlock(&rtc_lock); |
528 | ||
bcd9b89c | 529 | if (is_intr(irqstat)) { |
7be2c7c9 DB |
530 | rtc_update_irq(p, 1, irqstat); |
531 | return IRQ_HANDLED; | |
532 | } else | |
533 | return IRQ_NONE; | |
534 | } | |
535 | ||
41ac8df9 | 536 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
537 | #define INITSECTION |
538 | ||
539 | #else | |
7be2c7c9 DB |
540 | #define INITSECTION __init |
541 | #endif | |
542 | ||
543 | static int INITSECTION | |
544 | cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) | |
545 | { | |
546 | struct cmos_rtc_board_info *info = dev->platform_data; | |
547 | int retval = 0; | |
548 | unsigned char rtc_control; | |
e07e232c | 549 | unsigned address_space; |
7be2c7c9 DB |
550 | |
551 | /* there can be only one ... */ | |
552 | if (cmos_rtc.dev) | |
553 | return -EBUSY; | |
554 | ||
555 | if (!ports) | |
556 | return -ENODEV; | |
557 | ||
05440dfc DB |
558 | /* Claim I/O ports ASAP, minimizing conflict with legacy driver. |
559 | * | |
560 | * REVISIT non-x86 systems may instead use memory space resources | |
561 | * (needing ioremap etc), not i/o space resources like this ... | |
562 | */ | |
563 | ports = request_region(ports->start, | |
564 | ports->end + 1 - ports->start, | |
565 | driver_name); | |
566 | if (!ports) { | |
567 | dev_dbg(dev, "i/o registers already in use\n"); | |
568 | return -EBUSY; | |
569 | } | |
570 | ||
7be2c7c9 DB |
571 | cmos_rtc.irq = rtc_irq; |
572 | cmos_rtc.iomem = ports; | |
573 | ||
e07e232c DB |
574 | /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM |
575 | * driver did, but don't reject unknown configs. Old hardware | |
576 | * won't address 128 bytes, and for now we ignore the way newer | |
577 | * chips can address 256 bytes (using two more i/o ports). | |
578 | */ | |
579 | #if defined(CONFIG_ATARI) | |
580 | address_space = 64; | |
581 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) | |
582 | address_space = 128; | |
583 | #else | |
584 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. | |
585 | address_space = 128; | |
586 | #endif | |
587 | ||
87ac84f4 DB |
588 | /* For ACPI systems extension info comes from the FADT. On others, |
589 | * board specific setup provides it as appropriate. Systems where | |
590 | * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and | |
591 | * some almost-clones) can provide hooks to make that behave. | |
e07e232c DB |
592 | * |
593 | * Note that ACPI doesn't preclude putting these registers into | |
594 | * "extended" areas of the chip, including some that we won't yet | |
595 | * expect CMOS_READ and friends to handle. | |
7be2c7c9 DB |
596 | */ |
597 | if (info) { | |
e07e232c DB |
598 | if (info->rtc_day_alarm && info->rtc_day_alarm < 128) |
599 | cmos_rtc.day_alrm = info->rtc_day_alarm; | |
600 | if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) | |
601 | cmos_rtc.mon_alrm = info->rtc_mon_alarm; | |
602 | if (info->rtc_century && info->rtc_century < 128) | |
603 | cmos_rtc.century = info->rtc_century; | |
87ac84f4 DB |
604 | |
605 | if (info->wake_on && info->wake_off) { | |
606 | cmos_rtc.wake_on = info->wake_on; | |
607 | cmos_rtc.wake_off = info->wake_off; | |
608 | } | |
7be2c7c9 DB |
609 | } |
610 | ||
611 | cmos_rtc.rtc = rtc_device_register(driver_name, dev, | |
612 | &cmos_rtc_ops, THIS_MODULE); | |
05440dfc DB |
613 | if (IS_ERR(cmos_rtc.rtc)) { |
614 | retval = PTR_ERR(cmos_rtc.rtc); | |
615 | goto cleanup0; | |
616 | } | |
7be2c7c9 DB |
617 | |
618 | cmos_rtc.dev = dev; | |
619 | dev_set_drvdata(dev, &cmos_rtc); | |
cd966209 | 620 | rename_region(ports, cmos_rtc.rtc->dev.bus_id); |
7be2c7c9 DB |
621 | |
622 | spin_lock_irq(&rtc_lock); | |
623 | ||
624 | /* force periodic irq to CMOS reset default of 1024Hz; | |
625 | * | |
626 | * REVISIT it's been reported that at least one x86_64 ALI mobo | |
627 | * doesn't use 32KHz here ... for portability we might need to | |
628 | * do something about other clock frequencies. | |
629 | */ | |
7be2c7c9 | 630 | cmos_rtc.rtc->irq_freq = 1024; |
9d8af78b BW |
631 | if (!hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq)) |
632 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); | |
7be2c7c9 DB |
633 | |
634 | /* disable irqs. | |
635 | * | |
636 | * NOTE after changing RTC_xIE bits we always read INTR_FLAGS; | |
637 | * allegedly some older rtcs need that to handle irqs properly | |
638 | */ | |
639 | rtc_control = CMOS_READ(RTC_CONTROL); | |
640 | rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE); | |
641 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
642 | CMOS_READ(RTC_INTR_FLAGS); | |
643 | ||
644 | spin_unlock_irq(&rtc_lock); | |
645 | ||
646 | /* FIXME teach the alarm code how to handle binary mode; | |
647 | * <asm-generic/rtc.h> doesn't know 12-hour mode either. | |
648 | */ | |
649 | if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) { | |
650 | dev_dbg(dev, "only 24-hr BCD mode supported\n"); | |
651 | retval = -ENXIO; | |
652 | goto cleanup1; | |
653 | } | |
654 | ||
9d8af78b BW |
655 | if (is_valid_irq(rtc_irq)) { |
656 | irq_handler_t rtc_cmos_int_handler; | |
657 | ||
658 | if (is_hpet_enabled()) { | |
659 | int err; | |
660 | ||
661 | rtc_cmos_int_handler = hpet_rtc_interrupt; | |
662 | err = hpet_register_irq_handler(cmos_interrupt); | |
663 | if (err != 0) { | |
664 | printk(KERN_WARNING "hpet_register_irq_handler " | |
665 | " failed in rtc_init()."); | |
666 | goto cleanup1; | |
667 | } | |
668 | } else | |
669 | rtc_cmos_int_handler = cmos_interrupt; | |
670 | ||
671 | retval = request_irq(rtc_irq, rtc_cmos_int_handler, | |
672 | IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id, | |
ab6a2d70 | 673 | cmos_rtc.rtc); |
9d8af78b BW |
674 | if (retval < 0) { |
675 | dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); | |
676 | goto cleanup1; | |
677 | } | |
7be2c7c9 | 678 | } |
9d8af78b | 679 | hpet_rtc_timer_init(); |
7be2c7c9 | 680 | |
e07e232c DB |
681 | /* export at least the first block of NVRAM */ |
682 | nvram.size = address_space - NVRAM_OFFSET; | |
683 | retval = sysfs_create_bin_file(&dev->kobj, &nvram); | |
684 | if (retval < 0) { | |
685 | dev_dbg(dev, "can't create nvram file? %d\n", retval); | |
686 | goto cleanup2; | |
687 | } | |
7be2c7c9 DB |
688 | |
689 | pr_info("%s: alarms up to one %s%s\n", | |
cd966209 | 690 | cmos_rtc.rtc->dev.bus_id, |
7be2c7c9 DB |
691 | is_valid_irq(rtc_irq) |
692 | ? (cmos_rtc.mon_alrm | |
693 | ? "year" | |
694 | : (cmos_rtc.day_alrm | |
695 | ? "month" : "day")) | |
696 | : "no", | |
697 | cmos_rtc.century ? ", y3k" : "" | |
698 | ); | |
699 | ||
700 | return 0; | |
701 | ||
e07e232c DB |
702 | cleanup2: |
703 | if (is_valid_irq(rtc_irq)) | |
704 | free_irq(rtc_irq, cmos_rtc.rtc); | |
7be2c7c9 | 705 | cleanup1: |
05440dfc | 706 | cmos_rtc.dev = NULL; |
7be2c7c9 | 707 | rtc_device_unregister(cmos_rtc.rtc); |
05440dfc DB |
708 | cleanup0: |
709 | release_region(ports->start, ports->end + 1 - ports->start); | |
7be2c7c9 DB |
710 | return retval; |
711 | } | |
712 | ||
713 | static void cmos_do_shutdown(void) | |
714 | { | |
715 | unsigned char rtc_control; | |
716 | ||
717 | spin_lock_irq(&rtc_lock); | |
718 | rtc_control = CMOS_READ(RTC_CONTROL); | |
719 | rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE); | |
720 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
721 | CMOS_READ(RTC_INTR_FLAGS); | |
722 | spin_unlock_irq(&rtc_lock); | |
723 | } | |
724 | ||
725 | static void __exit cmos_do_remove(struct device *dev) | |
726 | { | |
727 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
05440dfc | 728 | struct resource *ports; |
7be2c7c9 DB |
729 | |
730 | cmos_do_shutdown(); | |
731 | ||
e07e232c DB |
732 | sysfs_remove_bin_file(&dev->kobj, &nvram); |
733 | ||
9d8af78b | 734 | if (is_valid_irq(cmos->irq)) { |
05440dfc | 735 | free_irq(cmos->irq, cmos->rtc); |
9d8af78b BW |
736 | hpet_unregister_irq_handler(cmos_interrupt); |
737 | } | |
7be2c7c9 | 738 | |
05440dfc DB |
739 | rtc_device_unregister(cmos->rtc); |
740 | cmos->rtc = NULL; | |
7be2c7c9 | 741 | |
05440dfc DB |
742 | ports = cmos->iomem; |
743 | release_region(ports->start, ports->end + 1 - ports->start); | |
744 | cmos->iomem = NULL; | |
745 | ||
746 | cmos->dev = NULL; | |
7be2c7c9 DB |
747 | dev_set_drvdata(dev, NULL); |
748 | } | |
749 | ||
750 | #ifdef CONFIG_PM | |
751 | ||
752 | static int cmos_suspend(struct device *dev, pm_message_t mesg) | |
753 | { | |
754 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
755 | int do_wake = device_may_wakeup(dev); | |
bcd9b89c | 756 | unsigned char tmp; |
7be2c7c9 DB |
757 | |
758 | /* only the alarm might be a wakeup event source */ | |
759 | spin_lock_irq(&rtc_lock); | |
760 | cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); | |
761 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { | |
bcd9b89c DB |
762 | unsigned char irqstat; |
763 | ||
7be2c7c9 DB |
764 | if (do_wake) |
765 | tmp &= ~(RTC_PIE|RTC_UIE); | |
766 | else | |
767 | tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE); | |
768 | CMOS_WRITE(tmp, RTC_CONTROL); | |
769 | irqstat = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
770 | irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF; |
771 | if (is_intr(irqstat)) | |
ab6a2d70 | 772 | rtc_update_irq(cmos->rtc, 1, irqstat); |
bcd9b89c | 773 | } |
7be2c7c9 DB |
774 | spin_unlock_irq(&rtc_lock); |
775 | ||
87ac84f4 DB |
776 | if (tmp & RTC_AIE) { |
777 | cmos->enabled_wake = 1; | |
778 | if (cmos->wake_on) | |
779 | cmos->wake_on(dev); | |
780 | else | |
781 | enable_irq_wake(cmos->irq); | |
782 | } | |
7be2c7c9 DB |
783 | |
784 | pr_debug("%s: suspend%s, ctrl %02x\n", | |
cd966209 | 785 | cmos_rtc.rtc->dev.bus_id, |
7be2c7c9 DB |
786 | (tmp & RTC_AIE) ? ", alarm may wake" : "", |
787 | tmp); | |
788 | ||
789 | return 0; | |
790 | } | |
791 | ||
792 | static int cmos_resume(struct device *dev) | |
793 | { | |
794 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
795 | unsigned char tmp = cmos->suspend_ctrl; | |
796 | ||
7be2c7c9 DB |
797 | /* re-enable any irqs previously active */ |
798 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { | |
799 | ||
87ac84f4 DB |
800 | if (cmos->enabled_wake) { |
801 | if (cmos->wake_off) | |
802 | cmos->wake_off(dev); | |
803 | else | |
804 | disable_irq_wake(cmos->irq); | |
805 | cmos->enabled_wake = 0; | |
806 | } | |
7be2c7c9 DB |
807 | |
808 | spin_lock_irq(&rtc_lock); | |
809 | CMOS_WRITE(tmp, RTC_CONTROL); | |
810 | tmp = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
811 | tmp &= (cmos->suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; |
812 | if (is_intr(tmp)) | |
ab6a2d70 | 813 | rtc_update_irq(cmos->rtc, 1, tmp); |
bcd9b89c | 814 | spin_unlock_irq(&rtc_lock); |
7be2c7c9 DB |
815 | } |
816 | ||
817 | pr_debug("%s: resume, ctrl %02x\n", | |
cd966209 | 818 | cmos_rtc.rtc->dev.bus_id, |
7be2c7c9 DB |
819 | cmos->suspend_ctrl); |
820 | ||
821 | ||
822 | return 0; | |
823 | } | |
824 | ||
825 | #else | |
826 | #define cmos_suspend NULL | |
827 | #define cmos_resume NULL | |
828 | #endif | |
829 | ||
830 | /*----------------------------------------------------------------*/ | |
831 | ||
e07e232c DB |
832 | /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. |
833 | * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs | |
834 | * probably list them in similar PNPBIOS tables; so PNP is more common. | |
835 | * | |
836 | * We don't use legacy "poke at the hardware" probing. Ancient PCs that | |
837 | * predate even PNPBIOS should set up platform_bus devices. | |
7be2c7c9 DB |
838 | */ |
839 | ||
41ac8df9 | 840 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
841 | |
842 | #include <linux/pnp.h> | |
843 | ||
844 | static int __devinit | |
845 | cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) | |
846 | { | |
847 | /* REVISIT paranoia argues for a shutdown notifier, since PNP | |
848 | * drivers can't provide shutdown() methods to disable IRQs. | |
849 | * Or better yet, fix PNP to allow those methods... | |
850 | */ | |
6cd8fa87 MG |
851 | if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0)) |
852 | /* Some machines contain a PNP entry for the RTC, but | |
853 | * don't define the IRQ. It should always be safe to | |
854 | * hardcode it in these cases | |
855 | */ | |
856 | return cmos_do_probe(&pnp->dev, &pnp->res.port_resource[0], 8); | |
857 | else | |
858 | return cmos_do_probe(&pnp->dev, | |
859 | &pnp->res.port_resource[0], | |
860 | pnp->res.irq_resource[0].start); | |
7be2c7c9 DB |
861 | } |
862 | ||
863 | static void __exit cmos_pnp_remove(struct pnp_dev *pnp) | |
864 | { | |
865 | cmos_do_remove(&pnp->dev); | |
866 | } | |
867 | ||
868 | #ifdef CONFIG_PM | |
869 | ||
870 | static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg) | |
871 | { | |
872 | return cmos_suspend(&pnp->dev, mesg); | |
873 | } | |
874 | ||
875 | static int cmos_pnp_resume(struct pnp_dev *pnp) | |
876 | { | |
877 | return cmos_resume(&pnp->dev); | |
878 | } | |
879 | ||
880 | #else | |
881 | #define cmos_pnp_suspend NULL | |
882 | #define cmos_pnp_resume NULL | |
883 | #endif | |
884 | ||
885 | ||
886 | static const struct pnp_device_id rtc_ids[] = { | |
887 | { .id = "PNP0b00", }, | |
888 | { .id = "PNP0b01", }, | |
889 | { .id = "PNP0b02", }, | |
890 | { }, | |
891 | }; | |
892 | MODULE_DEVICE_TABLE(pnp, rtc_ids); | |
893 | ||
894 | static struct pnp_driver cmos_pnp_driver = { | |
895 | .name = (char *) driver_name, | |
896 | .id_table = rtc_ids, | |
897 | .probe = cmos_pnp_probe, | |
898 | .remove = __exit_p(cmos_pnp_remove), | |
899 | ||
900 | /* flag ensures resume() gets called, and stops syslog spam */ | |
901 | .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, | |
902 | .suspend = cmos_pnp_suspend, | |
903 | .resume = cmos_pnp_resume, | |
904 | }; | |
905 | ||
906 | static int __init cmos_init(void) | |
907 | { | |
908 | return pnp_register_driver(&cmos_pnp_driver); | |
909 | } | |
910 | module_init(cmos_init); | |
911 | ||
912 | static void __exit cmos_exit(void) | |
913 | { | |
914 | pnp_unregister_driver(&cmos_pnp_driver); | |
915 | } | |
916 | module_exit(cmos_exit); | |
917 | ||
41ac8df9 | 918 | #else /* no PNP */ |
7be2c7c9 DB |
919 | |
920 | /*----------------------------------------------------------------*/ | |
921 | ||
41ac8df9 | 922 | /* Platform setup should have set up an RTC device, when PNP is |
bcd9b89c | 923 | * unavailable ... this could happen even on (older) PCs. |
7be2c7c9 DB |
924 | */ |
925 | ||
926 | static int __init cmos_platform_probe(struct platform_device *pdev) | |
927 | { | |
928 | return cmos_do_probe(&pdev->dev, | |
929 | platform_get_resource(pdev, IORESOURCE_IO, 0), | |
930 | platform_get_irq(pdev, 0)); | |
931 | } | |
932 | ||
933 | static int __exit cmos_platform_remove(struct platform_device *pdev) | |
934 | { | |
935 | cmos_do_remove(&pdev->dev); | |
936 | return 0; | |
937 | } | |
938 | ||
939 | static void cmos_platform_shutdown(struct platform_device *pdev) | |
940 | { | |
941 | cmos_do_shutdown(); | |
942 | } | |
943 | ||
944 | static struct platform_driver cmos_platform_driver = { | |
945 | .remove = __exit_p(cmos_platform_remove), | |
946 | .shutdown = cmos_platform_shutdown, | |
947 | .driver = { | |
948 | .name = (char *) driver_name, | |
949 | .suspend = cmos_suspend, | |
950 | .resume = cmos_resume, | |
951 | } | |
952 | }; | |
953 | ||
954 | static int __init cmos_init(void) | |
955 | { | |
956 | return platform_driver_probe(&cmos_platform_driver, | |
957 | cmos_platform_probe); | |
958 | } | |
959 | module_init(cmos_init); | |
960 | ||
961 | static void __exit cmos_exit(void) | |
962 | { | |
963 | platform_driver_unregister(&cmos_platform_driver); | |
964 | } | |
965 | module_exit(cmos_exit); | |
966 | ||
967 | ||
41ac8df9 | 968 | #endif /* !PNP */ |
7be2c7c9 DB |
969 | |
970 | MODULE_AUTHOR("David Brownell"); | |
971 | MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); | |
972 | MODULE_LICENSE("GPL"); |