Commit | Line | Data |
---|---|---|
7be2c7c9 DB |
1 | /* |
2 | * RTC class driver for "CMOS RTC": PCs, ACPI, etc | |
3 | * | |
4 | * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) | |
5 | * Copyright (C) 2006 David Brownell (convert to new framework) | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * The original "cmos clock" chip was an MC146818 chip, now obsolete. | |
15 | * That defined the register interface now provided by all PCs, some | |
16 | * non-PC systems, and incorporated into ACPI. Modern PC chipsets | |
17 | * integrate an MC146818 clone in their southbridge, and boards use | |
18 | * that instead of discrete clones like the DS12887 or M48T86. There | |
19 | * are also clones that connect using the LPC bus. | |
20 | * | |
21 | * That register API is also used directly by various other drivers | |
22 | * (notably for integrated NVRAM), infrastructure (x86 has code to | |
23 | * bypass the RTC framework, directly reading the RTC during boot | |
24 | * and updating minutes/seconds for systems using NTP synch) and | |
25 | * utilities (like userspace 'hwclock', if no /dev node exists). | |
26 | * | |
27 | * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with | |
28 | * interrupts disabled, holding the global rtc_lock, to exclude those | |
29 | * other drivers and utilities on correctly configured systems. | |
30 | */ | |
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/spinlock.h> | |
36 | #include <linux/platform_device.h> | |
37 | #include <linux/mod_devicetable.h> | |
38 | ||
39 | /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ | |
40 | #include <asm-generic/rtc.h> | |
41 | ||
42 | ||
43 | struct cmos_rtc { | |
44 | struct rtc_device *rtc; | |
45 | struct device *dev; | |
46 | int irq; | |
47 | struct resource *iomem; | |
48 | ||
87ac84f4 DB |
49 | void (*wake_on)(struct device *); |
50 | void (*wake_off)(struct device *); | |
51 | ||
52 | u8 enabled_wake; | |
7be2c7c9 DB |
53 | u8 suspend_ctrl; |
54 | ||
55 | /* newer hardware extends the original register set */ | |
56 | u8 day_alrm; | |
57 | u8 mon_alrm; | |
58 | u8 century; | |
59 | }; | |
60 | ||
61 | /* both platform and pnp busses use negative numbers for invalid irqs */ | |
62 | #define is_valid_irq(n) ((n) >= 0) | |
63 | ||
64 | static const char driver_name[] = "rtc_cmos"; | |
65 | ||
bcd9b89c DB |
66 | /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; |
67 | * always mask it against the irq enable bits in RTC_CONTROL. Bit values | |
68 | * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. | |
69 | */ | |
70 | #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) | |
71 | ||
72 | static inline int is_intr(u8 rtc_intr) | |
73 | { | |
74 | if (!(rtc_intr & RTC_IRQF)) | |
75 | return 0; | |
76 | return rtc_intr & RTC_IRQMASK; | |
77 | } | |
78 | ||
7be2c7c9 DB |
79 | /*----------------------------------------------------------------*/ |
80 | ||
81 | static int cmos_read_time(struct device *dev, struct rtc_time *t) | |
82 | { | |
83 | /* REVISIT: if the clock has a "century" register, use | |
84 | * that instead of the heuristic in get_rtc_time(). | |
85 | * That'll make Y3K compatility (year > 2070) easy! | |
86 | */ | |
87 | get_rtc_time(t); | |
88 | return 0; | |
89 | } | |
90 | ||
91 | static int cmos_set_time(struct device *dev, struct rtc_time *t) | |
92 | { | |
93 | /* REVISIT: set the "century" register if available | |
94 | * | |
95 | * NOTE: this ignores the issue whereby updating the seconds | |
96 | * takes effect exactly 500ms after we write the register. | |
97 | * (Also queueing and other delays before we get this far.) | |
98 | */ | |
99 | return set_rtc_time(t); | |
100 | } | |
101 | ||
102 | static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
103 | { | |
104 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
105 | unsigned char rtc_control; | |
106 | ||
107 | if (!is_valid_irq(cmos->irq)) | |
108 | return -EIO; | |
109 | ||
110 | /* Basic alarms only support hour, minute, and seconds fields. | |
111 | * Some also support day and month, for alarms up to a year in | |
112 | * the future. | |
113 | */ | |
114 | t->time.tm_mday = -1; | |
115 | t->time.tm_mon = -1; | |
116 | ||
117 | spin_lock_irq(&rtc_lock); | |
118 | t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); | |
119 | t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); | |
120 | t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); | |
121 | ||
122 | if (cmos->day_alrm) { | |
615bb29c ML |
123 | /* ignore upper bits on readback per ACPI spec */ |
124 | t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; | |
7be2c7c9 DB |
125 | if (!t->time.tm_mday) |
126 | t->time.tm_mday = -1; | |
127 | ||
128 | if (cmos->mon_alrm) { | |
129 | t->time.tm_mon = CMOS_READ(cmos->mon_alrm); | |
130 | if (!t->time.tm_mon) | |
131 | t->time.tm_mon = -1; | |
132 | } | |
133 | } | |
134 | ||
135 | rtc_control = CMOS_READ(RTC_CONTROL); | |
136 | spin_unlock_irq(&rtc_lock); | |
137 | ||
138 | /* REVISIT this assumes PC style usage: always BCD */ | |
139 | ||
140 | if (((unsigned)t->time.tm_sec) < 0x60) | |
141 | t->time.tm_sec = BCD2BIN(t->time.tm_sec); | |
142 | else | |
143 | t->time.tm_sec = -1; | |
144 | if (((unsigned)t->time.tm_min) < 0x60) | |
145 | t->time.tm_min = BCD2BIN(t->time.tm_min); | |
146 | else | |
147 | t->time.tm_min = -1; | |
148 | if (((unsigned)t->time.tm_hour) < 0x24) | |
149 | t->time.tm_hour = BCD2BIN(t->time.tm_hour); | |
150 | else | |
151 | t->time.tm_hour = -1; | |
152 | ||
153 | if (cmos->day_alrm) { | |
154 | if (((unsigned)t->time.tm_mday) <= 0x31) | |
155 | t->time.tm_mday = BCD2BIN(t->time.tm_mday); | |
156 | else | |
157 | t->time.tm_mday = -1; | |
158 | if (cmos->mon_alrm) { | |
159 | if (((unsigned)t->time.tm_mon) <= 0x12) | |
160 | t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1; | |
161 | else | |
162 | t->time.tm_mon = -1; | |
163 | } | |
164 | } | |
165 | t->time.tm_year = -1; | |
166 | ||
167 | t->enabled = !!(rtc_control & RTC_AIE); | |
168 | t->pending = 0; | |
169 | ||
170 | return 0; | |
171 | } | |
172 | ||
173 | static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
174 | { | |
175 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
176 | unsigned char mon, mday, hrs, min, sec; | |
177 | unsigned char rtc_control, rtc_intr; | |
178 | ||
179 | if (!is_valid_irq(cmos->irq)) | |
180 | return -EIO; | |
181 | ||
182 | /* REVISIT this assumes PC style usage: always BCD */ | |
183 | ||
184 | /* Writing 0xff means "don't care" or "match all". */ | |
185 | ||
186 | mon = t->time.tm_mon; | |
187 | mon = (mon < 12) ? BIN2BCD(mon) : 0xff; | |
188 | mon++; | |
189 | ||
190 | mday = t->time.tm_mday; | |
191 | mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff; | |
192 | ||
193 | hrs = t->time.tm_hour; | |
194 | hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff; | |
195 | ||
196 | min = t->time.tm_min; | |
197 | min = (min < 60) ? BIN2BCD(min) : 0xff; | |
198 | ||
199 | sec = t->time.tm_sec; | |
200 | sec = (sec < 60) ? BIN2BCD(sec) : 0xff; | |
201 | ||
202 | spin_lock_irq(&rtc_lock); | |
203 | ||
204 | /* next rtc irq must not be from previous alarm setting */ | |
205 | rtc_control = CMOS_READ(RTC_CONTROL); | |
206 | rtc_control &= ~RTC_AIE; | |
207 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
208 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
209 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; |
210 | if (is_intr(rtc_intr)) | |
ab6a2d70 | 211 | rtc_update_irq(cmos->rtc, 1, rtc_intr); |
7be2c7c9 DB |
212 | |
213 | /* update alarm */ | |
214 | CMOS_WRITE(hrs, RTC_HOURS_ALARM); | |
215 | CMOS_WRITE(min, RTC_MINUTES_ALARM); | |
216 | CMOS_WRITE(sec, RTC_SECONDS_ALARM); | |
217 | ||
218 | /* the system may support an "enhanced" alarm */ | |
219 | if (cmos->day_alrm) { | |
220 | CMOS_WRITE(mday, cmos->day_alrm); | |
221 | if (cmos->mon_alrm) | |
222 | CMOS_WRITE(mon, cmos->mon_alrm); | |
223 | } | |
224 | ||
225 | if (t->enabled) { | |
226 | rtc_control |= RTC_AIE; | |
227 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
228 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
229 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; |
230 | if (is_intr(rtc_intr)) | |
ab6a2d70 | 231 | rtc_update_irq(cmos->rtc, 1, rtc_intr); |
7be2c7c9 DB |
232 | } |
233 | ||
234 | spin_unlock_irq(&rtc_lock); | |
235 | ||
236 | return 0; | |
237 | } | |
238 | ||
57deb526 | 239 | static int cmos_irq_set_freq(struct device *dev, int freq) |
7be2c7c9 DB |
240 | { |
241 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
242 | int f; | |
243 | unsigned long flags; | |
244 | ||
245 | if (!is_valid_irq(cmos->irq)) | |
246 | return -ENXIO; | |
247 | ||
248 | /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */ | |
249 | f = ffs(freq); | |
97144c67 DB |
250 | if (f-- > 16) |
251 | return -EINVAL; | |
252 | f = 16 - f; | |
7be2c7c9 DB |
253 | |
254 | spin_lock_irqsave(&rtc_lock, flags); | |
255 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT); | |
256 | spin_unlock_irqrestore(&rtc_lock, flags); | |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
57deb526 AZ |
261 | static int cmos_irq_set_state(struct device *dev, int enabled) |
262 | { | |
263 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
264 | unsigned char rtc_control, rtc_intr; | |
265 | unsigned long flags; | |
266 | ||
267 | if (!is_valid_irq(cmos->irq)) | |
268 | return -ENXIO; | |
269 | ||
270 | spin_lock_irqsave(&rtc_lock, flags); | |
271 | rtc_control = CMOS_READ(RTC_CONTROL); | |
272 | ||
273 | if (enabled) | |
274 | rtc_control |= RTC_PIE; | |
275 | else | |
276 | rtc_control &= ~RTC_PIE; | |
277 | ||
278 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
279 | ||
280 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
281 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
282 | if (is_intr(rtc_intr)) | |
283 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
284 | ||
285 | spin_unlock_irqrestore(&rtc_lock, flags); | |
286 | return 0; | |
287 | } | |
288 | ||
7be2c7c9 DB |
289 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) |
290 | ||
291 | static int | |
292 | cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
293 | { | |
294 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
295 | unsigned char rtc_control, rtc_intr; | |
296 | unsigned long flags; | |
297 | ||
298 | switch (cmd) { | |
299 | case RTC_AIE_OFF: | |
300 | case RTC_AIE_ON: | |
301 | case RTC_UIE_OFF: | |
302 | case RTC_UIE_ON: | |
303 | case RTC_PIE_OFF: | |
304 | case RTC_PIE_ON: | |
305 | if (!is_valid_irq(cmos->irq)) | |
306 | return -EINVAL; | |
307 | break; | |
308 | default: | |
309 | return -ENOIOCTLCMD; | |
310 | } | |
311 | ||
312 | spin_lock_irqsave(&rtc_lock, flags); | |
313 | rtc_control = CMOS_READ(RTC_CONTROL); | |
314 | switch (cmd) { | |
315 | case RTC_AIE_OFF: /* alarm off */ | |
316 | rtc_control &= ~RTC_AIE; | |
317 | break; | |
318 | case RTC_AIE_ON: /* alarm on */ | |
319 | rtc_control |= RTC_AIE; | |
320 | break; | |
321 | case RTC_UIE_OFF: /* update off */ | |
322 | rtc_control &= ~RTC_UIE; | |
323 | break; | |
324 | case RTC_UIE_ON: /* update on */ | |
325 | rtc_control |= RTC_UIE; | |
326 | break; | |
327 | case RTC_PIE_OFF: /* periodic off */ | |
328 | rtc_control &= ~RTC_PIE; | |
329 | break; | |
330 | case RTC_PIE_ON: /* periodic on */ | |
331 | rtc_control |= RTC_PIE; | |
332 | break; | |
333 | } | |
334 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
335 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
336 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; |
337 | if (is_intr(rtc_intr)) | |
ab6a2d70 | 338 | rtc_update_irq(cmos->rtc, 1, rtc_intr); |
7be2c7c9 DB |
339 | spin_unlock_irqrestore(&rtc_lock, flags); |
340 | return 0; | |
341 | } | |
342 | ||
343 | #else | |
344 | #define cmos_rtc_ioctl NULL | |
345 | #endif | |
346 | ||
347 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
348 | ||
349 | static int cmos_procfs(struct device *dev, struct seq_file *seq) | |
350 | { | |
351 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
352 | unsigned char rtc_control, valid; | |
353 | ||
354 | spin_lock_irq(&rtc_lock); | |
355 | rtc_control = CMOS_READ(RTC_CONTROL); | |
356 | valid = CMOS_READ(RTC_VALID); | |
357 | spin_unlock_irq(&rtc_lock); | |
358 | ||
359 | /* NOTE: at least ICH6 reports battery status using a different | |
360 | * (non-RTC) bit; and SQWE is ignored on many current systems. | |
361 | */ | |
362 | return seq_printf(seq, | |
363 | "periodic_IRQ\t: %s\n" | |
364 | "update_IRQ\t: %s\n" | |
365 | // "square_wave\t: %s\n" | |
366 | // "BCD\t\t: %s\n" | |
367 | "DST_enable\t: %s\n" | |
368 | "periodic_freq\t: %d\n" | |
369 | "batt_status\t: %s\n", | |
370 | (rtc_control & RTC_PIE) ? "yes" : "no", | |
371 | (rtc_control & RTC_UIE) ? "yes" : "no", | |
372 | // (rtc_control & RTC_SQWE) ? "yes" : "no", | |
373 | // (rtc_control & RTC_DM_BINARY) ? "no" : "yes", | |
374 | (rtc_control & RTC_DST_EN) ? "yes" : "no", | |
375 | cmos->rtc->irq_freq, | |
376 | (valid & RTC_VRT) ? "okay" : "dead"); | |
377 | } | |
378 | ||
379 | #else | |
380 | #define cmos_procfs NULL | |
381 | #endif | |
382 | ||
383 | static const struct rtc_class_ops cmos_rtc_ops = { | |
384 | .ioctl = cmos_rtc_ioctl, | |
385 | .read_time = cmos_read_time, | |
386 | .set_time = cmos_set_time, | |
387 | .read_alarm = cmos_read_alarm, | |
388 | .set_alarm = cmos_set_alarm, | |
389 | .proc = cmos_procfs, | |
57deb526 AZ |
390 | .irq_set_freq = cmos_irq_set_freq, |
391 | .irq_set_state = cmos_irq_set_state, | |
7be2c7c9 DB |
392 | }; |
393 | ||
394 | /*----------------------------------------------------------------*/ | |
395 | ||
e07e232c DB |
396 | /* |
397 | * All these chips have at least 64 bytes of address space, shared by | |
398 | * RTC registers and NVRAM. Most of those bytes of NVRAM are used | |
399 | * by boot firmware. Modern chips have 128 or 256 bytes. | |
400 | */ | |
401 | ||
402 | #define NVRAM_OFFSET (RTC_REG_D + 1) | |
403 | ||
404 | static ssize_t | |
405 | cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr, | |
406 | char *buf, loff_t off, size_t count) | |
407 | { | |
408 | int retval; | |
409 | ||
410 | if (unlikely(off >= attr->size)) | |
411 | return 0; | |
412 | if ((off + count) > attr->size) | |
413 | count = attr->size - off; | |
414 | ||
415 | spin_lock_irq(&rtc_lock); | |
416 | for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) | |
417 | *buf++ = CMOS_READ(off); | |
418 | spin_unlock_irq(&rtc_lock); | |
419 | ||
420 | return retval; | |
421 | } | |
422 | ||
423 | static ssize_t | |
424 | cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr, | |
425 | char *buf, loff_t off, size_t count) | |
426 | { | |
427 | struct cmos_rtc *cmos; | |
428 | int retval; | |
429 | ||
430 | cmos = dev_get_drvdata(container_of(kobj, struct device, kobj)); | |
431 | if (unlikely(off >= attr->size)) | |
432 | return -EFBIG; | |
433 | if ((off + count) > attr->size) | |
434 | count = attr->size - off; | |
435 | ||
436 | /* NOTE: on at least PCs and Ataris, the boot firmware uses a | |
437 | * checksum on part of the NVRAM data. That's currently ignored | |
438 | * here. If userspace is smart enough to know what fields of | |
439 | * NVRAM to update, updating checksums is also part of its job. | |
440 | */ | |
441 | spin_lock_irq(&rtc_lock); | |
442 | for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) { | |
443 | /* don't trash RTC registers */ | |
444 | if (off == cmos->day_alrm | |
445 | || off == cmos->mon_alrm | |
446 | || off == cmos->century) | |
447 | buf++; | |
448 | else | |
449 | CMOS_WRITE(*buf++, off); | |
450 | } | |
451 | spin_unlock_irq(&rtc_lock); | |
452 | ||
453 | return retval; | |
454 | } | |
455 | ||
456 | static struct bin_attribute nvram = { | |
457 | .attr = { | |
458 | .name = "nvram", | |
459 | .mode = S_IRUGO | S_IWUSR, | |
460 | .owner = THIS_MODULE, | |
461 | }, | |
462 | ||
463 | .read = cmos_nvram_read, | |
464 | .write = cmos_nvram_write, | |
465 | /* size gets set up later */ | |
466 | }; | |
467 | ||
468 | /*----------------------------------------------------------------*/ | |
469 | ||
7be2c7c9 DB |
470 | static struct cmos_rtc cmos_rtc; |
471 | ||
472 | static irqreturn_t cmos_interrupt(int irq, void *p) | |
473 | { | |
474 | u8 irqstat; | |
475 | ||
476 | spin_lock(&rtc_lock); | |
477 | irqstat = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c | 478 | irqstat &= (CMOS_READ(RTC_CONTROL) & RTC_IRQMASK) | RTC_IRQF; |
7be2c7c9 DB |
479 | spin_unlock(&rtc_lock); |
480 | ||
bcd9b89c | 481 | if (is_intr(irqstat)) { |
7be2c7c9 DB |
482 | rtc_update_irq(p, 1, irqstat); |
483 | return IRQ_HANDLED; | |
484 | } else | |
485 | return IRQ_NONE; | |
486 | } | |
487 | ||
41ac8df9 | 488 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
489 | #define INITSECTION |
490 | ||
491 | #else | |
7be2c7c9 DB |
492 | #define INITSECTION __init |
493 | #endif | |
494 | ||
495 | static int INITSECTION | |
496 | cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) | |
497 | { | |
498 | struct cmos_rtc_board_info *info = dev->platform_data; | |
499 | int retval = 0; | |
500 | unsigned char rtc_control; | |
e07e232c | 501 | unsigned address_space; |
7be2c7c9 DB |
502 | |
503 | /* there can be only one ... */ | |
504 | if (cmos_rtc.dev) | |
505 | return -EBUSY; | |
506 | ||
507 | if (!ports) | |
508 | return -ENODEV; | |
509 | ||
05440dfc DB |
510 | /* Claim I/O ports ASAP, minimizing conflict with legacy driver. |
511 | * | |
512 | * REVISIT non-x86 systems may instead use memory space resources | |
513 | * (needing ioremap etc), not i/o space resources like this ... | |
514 | */ | |
515 | ports = request_region(ports->start, | |
516 | ports->end + 1 - ports->start, | |
517 | driver_name); | |
518 | if (!ports) { | |
519 | dev_dbg(dev, "i/o registers already in use\n"); | |
520 | return -EBUSY; | |
521 | } | |
522 | ||
7be2c7c9 DB |
523 | cmos_rtc.irq = rtc_irq; |
524 | cmos_rtc.iomem = ports; | |
525 | ||
e07e232c DB |
526 | /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM |
527 | * driver did, but don't reject unknown configs. Old hardware | |
528 | * won't address 128 bytes, and for now we ignore the way newer | |
529 | * chips can address 256 bytes (using two more i/o ports). | |
530 | */ | |
531 | #if defined(CONFIG_ATARI) | |
532 | address_space = 64; | |
533 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) | |
534 | address_space = 128; | |
535 | #else | |
536 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. | |
537 | address_space = 128; | |
538 | #endif | |
539 | ||
87ac84f4 DB |
540 | /* For ACPI systems extension info comes from the FADT. On others, |
541 | * board specific setup provides it as appropriate. Systems where | |
542 | * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and | |
543 | * some almost-clones) can provide hooks to make that behave. | |
e07e232c DB |
544 | * |
545 | * Note that ACPI doesn't preclude putting these registers into | |
546 | * "extended" areas of the chip, including some that we won't yet | |
547 | * expect CMOS_READ and friends to handle. | |
7be2c7c9 DB |
548 | */ |
549 | if (info) { | |
e07e232c DB |
550 | if (info->rtc_day_alarm && info->rtc_day_alarm < 128) |
551 | cmos_rtc.day_alrm = info->rtc_day_alarm; | |
552 | if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) | |
553 | cmos_rtc.mon_alrm = info->rtc_mon_alarm; | |
554 | if (info->rtc_century && info->rtc_century < 128) | |
555 | cmos_rtc.century = info->rtc_century; | |
87ac84f4 DB |
556 | |
557 | if (info->wake_on && info->wake_off) { | |
558 | cmos_rtc.wake_on = info->wake_on; | |
559 | cmos_rtc.wake_off = info->wake_off; | |
560 | } | |
7be2c7c9 DB |
561 | } |
562 | ||
563 | cmos_rtc.rtc = rtc_device_register(driver_name, dev, | |
564 | &cmos_rtc_ops, THIS_MODULE); | |
05440dfc DB |
565 | if (IS_ERR(cmos_rtc.rtc)) { |
566 | retval = PTR_ERR(cmos_rtc.rtc); | |
567 | goto cleanup0; | |
568 | } | |
7be2c7c9 DB |
569 | |
570 | cmos_rtc.dev = dev; | |
571 | dev_set_drvdata(dev, &cmos_rtc); | |
cd966209 | 572 | rename_region(ports, cmos_rtc.rtc->dev.bus_id); |
7be2c7c9 DB |
573 | |
574 | spin_lock_irq(&rtc_lock); | |
575 | ||
576 | /* force periodic irq to CMOS reset default of 1024Hz; | |
577 | * | |
578 | * REVISIT it's been reported that at least one x86_64 ALI mobo | |
579 | * doesn't use 32KHz here ... for portability we might need to | |
580 | * do something about other clock frequencies. | |
581 | */ | |
582 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); | |
583 | cmos_rtc.rtc->irq_freq = 1024; | |
584 | ||
585 | /* disable irqs. | |
586 | * | |
587 | * NOTE after changing RTC_xIE bits we always read INTR_FLAGS; | |
588 | * allegedly some older rtcs need that to handle irqs properly | |
589 | */ | |
590 | rtc_control = CMOS_READ(RTC_CONTROL); | |
591 | rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE); | |
592 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
593 | CMOS_READ(RTC_INTR_FLAGS); | |
594 | ||
595 | spin_unlock_irq(&rtc_lock); | |
596 | ||
597 | /* FIXME teach the alarm code how to handle binary mode; | |
598 | * <asm-generic/rtc.h> doesn't know 12-hour mode either. | |
599 | */ | |
600 | if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) { | |
601 | dev_dbg(dev, "only 24-hr BCD mode supported\n"); | |
602 | retval = -ENXIO; | |
603 | goto cleanup1; | |
604 | } | |
605 | ||
606 | if (is_valid_irq(rtc_irq)) | |
607 | retval = request_irq(rtc_irq, cmos_interrupt, IRQF_DISABLED, | |
cd966209 | 608 | cmos_rtc.rtc->dev.bus_id, |
ab6a2d70 | 609 | cmos_rtc.rtc); |
7be2c7c9 DB |
610 | if (retval < 0) { |
611 | dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); | |
612 | goto cleanup1; | |
613 | } | |
614 | ||
e07e232c DB |
615 | /* export at least the first block of NVRAM */ |
616 | nvram.size = address_space - NVRAM_OFFSET; | |
617 | retval = sysfs_create_bin_file(&dev->kobj, &nvram); | |
618 | if (retval < 0) { | |
619 | dev_dbg(dev, "can't create nvram file? %d\n", retval); | |
620 | goto cleanup2; | |
621 | } | |
7be2c7c9 DB |
622 | |
623 | pr_info("%s: alarms up to one %s%s\n", | |
cd966209 | 624 | cmos_rtc.rtc->dev.bus_id, |
7be2c7c9 DB |
625 | is_valid_irq(rtc_irq) |
626 | ? (cmos_rtc.mon_alrm | |
627 | ? "year" | |
628 | : (cmos_rtc.day_alrm | |
629 | ? "month" : "day")) | |
630 | : "no", | |
631 | cmos_rtc.century ? ", y3k" : "" | |
632 | ); | |
633 | ||
634 | return 0; | |
635 | ||
e07e232c DB |
636 | cleanup2: |
637 | if (is_valid_irq(rtc_irq)) | |
638 | free_irq(rtc_irq, cmos_rtc.rtc); | |
7be2c7c9 | 639 | cleanup1: |
05440dfc | 640 | cmos_rtc.dev = NULL; |
7be2c7c9 | 641 | rtc_device_unregister(cmos_rtc.rtc); |
05440dfc DB |
642 | cleanup0: |
643 | release_region(ports->start, ports->end + 1 - ports->start); | |
7be2c7c9 DB |
644 | return retval; |
645 | } | |
646 | ||
647 | static void cmos_do_shutdown(void) | |
648 | { | |
649 | unsigned char rtc_control; | |
650 | ||
651 | spin_lock_irq(&rtc_lock); | |
652 | rtc_control = CMOS_READ(RTC_CONTROL); | |
653 | rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE); | |
654 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
655 | CMOS_READ(RTC_INTR_FLAGS); | |
656 | spin_unlock_irq(&rtc_lock); | |
657 | } | |
658 | ||
659 | static void __exit cmos_do_remove(struct device *dev) | |
660 | { | |
661 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
05440dfc | 662 | struct resource *ports; |
7be2c7c9 DB |
663 | |
664 | cmos_do_shutdown(); | |
665 | ||
e07e232c DB |
666 | sysfs_remove_bin_file(&dev->kobj, &nvram); |
667 | ||
7be2c7c9 | 668 | if (is_valid_irq(cmos->irq)) |
05440dfc | 669 | free_irq(cmos->irq, cmos->rtc); |
7be2c7c9 | 670 | |
05440dfc DB |
671 | rtc_device_unregister(cmos->rtc); |
672 | cmos->rtc = NULL; | |
7be2c7c9 | 673 | |
05440dfc DB |
674 | ports = cmos->iomem; |
675 | release_region(ports->start, ports->end + 1 - ports->start); | |
676 | cmos->iomem = NULL; | |
677 | ||
678 | cmos->dev = NULL; | |
7be2c7c9 DB |
679 | dev_set_drvdata(dev, NULL); |
680 | } | |
681 | ||
682 | #ifdef CONFIG_PM | |
683 | ||
684 | static int cmos_suspend(struct device *dev, pm_message_t mesg) | |
685 | { | |
686 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
687 | int do_wake = device_may_wakeup(dev); | |
bcd9b89c | 688 | unsigned char tmp; |
7be2c7c9 DB |
689 | |
690 | /* only the alarm might be a wakeup event source */ | |
691 | spin_lock_irq(&rtc_lock); | |
692 | cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); | |
693 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { | |
bcd9b89c DB |
694 | unsigned char irqstat; |
695 | ||
7be2c7c9 DB |
696 | if (do_wake) |
697 | tmp &= ~(RTC_PIE|RTC_UIE); | |
698 | else | |
699 | tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE); | |
700 | CMOS_WRITE(tmp, RTC_CONTROL); | |
701 | irqstat = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
702 | irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF; |
703 | if (is_intr(irqstat)) | |
ab6a2d70 | 704 | rtc_update_irq(cmos->rtc, 1, irqstat); |
bcd9b89c | 705 | } |
7be2c7c9 DB |
706 | spin_unlock_irq(&rtc_lock); |
707 | ||
87ac84f4 DB |
708 | if (tmp & RTC_AIE) { |
709 | cmos->enabled_wake = 1; | |
710 | if (cmos->wake_on) | |
711 | cmos->wake_on(dev); | |
712 | else | |
713 | enable_irq_wake(cmos->irq); | |
714 | } | |
7be2c7c9 DB |
715 | |
716 | pr_debug("%s: suspend%s, ctrl %02x\n", | |
cd966209 | 717 | cmos_rtc.rtc->dev.bus_id, |
7be2c7c9 DB |
718 | (tmp & RTC_AIE) ? ", alarm may wake" : "", |
719 | tmp); | |
720 | ||
721 | return 0; | |
722 | } | |
723 | ||
724 | static int cmos_resume(struct device *dev) | |
725 | { | |
726 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
727 | unsigned char tmp = cmos->suspend_ctrl; | |
728 | ||
7be2c7c9 DB |
729 | /* re-enable any irqs previously active */ |
730 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { | |
731 | ||
87ac84f4 DB |
732 | if (cmos->enabled_wake) { |
733 | if (cmos->wake_off) | |
734 | cmos->wake_off(dev); | |
735 | else | |
736 | disable_irq_wake(cmos->irq); | |
737 | cmos->enabled_wake = 0; | |
738 | } | |
7be2c7c9 DB |
739 | |
740 | spin_lock_irq(&rtc_lock); | |
741 | CMOS_WRITE(tmp, RTC_CONTROL); | |
742 | tmp = CMOS_READ(RTC_INTR_FLAGS); | |
bcd9b89c DB |
743 | tmp &= (cmos->suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; |
744 | if (is_intr(tmp)) | |
ab6a2d70 | 745 | rtc_update_irq(cmos->rtc, 1, tmp); |
bcd9b89c | 746 | spin_unlock_irq(&rtc_lock); |
7be2c7c9 DB |
747 | } |
748 | ||
749 | pr_debug("%s: resume, ctrl %02x\n", | |
cd966209 | 750 | cmos_rtc.rtc->dev.bus_id, |
7be2c7c9 DB |
751 | cmos->suspend_ctrl); |
752 | ||
753 | ||
754 | return 0; | |
755 | } | |
756 | ||
757 | #else | |
758 | #define cmos_suspend NULL | |
759 | #define cmos_resume NULL | |
760 | #endif | |
761 | ||
762 | /*----------------------------------------------------------------*/ | |
763 | ||
e07e232c DB |
764 | /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. |
765 | * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs | |
766 | * probably list them in similar PNPBIOS tables; so PNP is more common. | |
767 | * | |
768 | * We don't use legacy "poke at the hardware" probing. Ancient PCs that | |
769 | * predate even PNPBIOS should set up platform_bus devices. | |
7be2c7c9 DB |
770 | */ |
771 | ||
41ac8df9 | 772 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
773 | |
774 | #include <linux/pnp.h> | |
775 | ||
776 | static int __devinit | |
777 | cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) | |
778 | { | |
779 | /* REVISIT paranoia argues for a shutdown notifier, since PNP | |
780 | * drivers can't provide shutdown() methods to disable IRQs. | |
781 | * Or better yet, fix PNP to allow those methods... | |
782 | */ | |
6cd8fa87 MG |
783 | if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0)) |
784 | /* Some machines contain a PNP entry for the RTC, but | |
785 | * don't define the IRQ. It should always be safe to | |
786 | * hardcode it in these cases | |
787 | */ | |
788 | return cmos_do_probe(&pnp->dev, &pnp->res.port_resource[0], 8); | |
789 | else | |
790 | return cmos_do_probe(&pnp->dev, | |
791 | &pnp->res.port_resource[0], | |
792 | pnp->res.irq_resource[0].start); | |
7be2c7c9 DB |
793 | } |
794 | ||
795 | static void __exit cmos_pnp_remove(struct pnp_dev *pnp) | |
796 | { | |
797 | cmos_do_remove(&pnp->dev); | |
798 | } | |
799 | ||
800 | #ifdef CONFIG_PM | |
801 | ||
802 | static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg) | |
803 | { | |
804 | return cmos_suspend(&pnp->dev, mesg); | |
805 | } | |
806 | ||
807 | static int cmos_pnp_resume(struct pnp_dev *pnp) | |
808 | { | |
809 | return cmos_resume(&pnp->dev); | |
810 | } | |
811 | ||
812 | #else | |
813 | #define cmos_pnp_suspend NULL | |
814 | #define cmos_pnp_resume NULL | |
815 | #endif | |
816 | ||
817 | ||
818 | static const struct pnp_device_id rtc_ids[] = { | |
819 | { .id = "PNP0b00", }, | |
820 | { .id = "PNP0b01", }, | |
821 | { .id = "PNP0b02", }, | |
822 | { }, | |
823 | }; | |
824 | MODULE_DEVICE_TABLE(pnp, rtc_ids); | |
825 | ||
826 | static struct pnp_driver cmos_pnp_driver = { | |
827 | .name = (char *) driver_name, | |
828 | .id_table = rtc_ids, | |
829 | .probe = cmos_pnp_probe, | |
830 | .remove = __exit_p(cmos_pnp_remove), | |
831 | ||
832 | /* flag ensures resume() gets called, and stops syslog spam */ | |
833 | .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, | |
834 | .suspend = cmos_pnp_suspend, | |
835 | .resume = cmos_pnp_resume, | |
836 | }; | |
837 | ||
838 | static int __init cmos_init(void) | |
839 | { | |
840 | return pnp_register_driver(&cmos_pnp_driver); | |
841 | } | |
842 | module_init(cmos_init); | |
843 | ||
844 | static void __exit cmos_exit(void) | |
845 | { | |
846 | pnp_unregister_driver(&cmos_pnp_driver); | |
847 | } | |
848 | module_exit(cmos_exit); | |
849 | ||
41ac8df9 | 850 | #else /* no PNP */ |
7be2c7c9 DB |
851 | |
852 | /*----------------------------------------------------------------*/ | |
853 | ||
41ac8df9 | 854 | /* Platform setup should have set up an RTC device, when PNP is |
bcd9b89c | 855 | * unavailable ... this could happen even on (older) PCs. |
7be2c7c9 DB |
856 | */ |
857 | ||
858 | static int __init cmos_platform_probe(struct platform_device *pdev) | |
859 | { | |
860 | return cmos_do_probe(&pdev->dev, | |
861 | platform_get_resource(pdev, IORESOURCE_IO, 0), | |
862 | platform_get_irq(pdev, 0)); | |
863 | } | |
864 | ||
865 | static int __exit cmos_platform_remove(struct platform_device *pdev) | |
866 | { | |
867 | cmos_do_remove(&pdev->dev); | |
868 | return 0; | |
869 | } | |
870 | ||
871 | static void cmos_platform_shutdown(struct platform_device *pdev) | |
872 | { | |
873 | cmos_do_shutdown(); | |
874 | } | |
875 | ||
876 | static struct platform_driver cmos_platform_driver = { | |
877 | .remove = __exit_p(cmos_platform_remove), | |
878 | .shutdown = cmos_platform_shutdown, | |
879 | .driver = { | |
880 | .name = (char *) driver_name, | |
881 | .suspend = cmos_suspend, | |
882 | .resume = cmos_resume, | |
883 | } | |
884 | }; | |
885 | ||
886 | static int __init cmos_init(void) | |
887 | { | |
888 | return platform_driver_probe(&cmos_platform_driver, | |
889 | cmos_platform_probe); | |
890 | } | |
891 | module_init(cmos_init); | |
892 | ||
893 | static void __exit cmos_exit(void) | |
894 | { | |
895 | platform_driver_unregister(&cmos_platform_driver); | |
896 | } | |
897 | module_exit(cmos_exit); | |
898 | ||
899 | ||
41ac8df9 | 900 | #endif /* !PNP */ |
7be2c7c9 DB |
901 | |
902 | MODULE_AUTHOR("David Brownell"); | |
903 | MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); | |
904 | MODULE_LICENSE("GPL"); |