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aa958f57 LW |
1 | /* |
2 | * Copyright (C) 2007-2009 ST-Ericsson AB | |
3 | * License terms: GNU General Public License (GPL) version 2 | |
4 | * Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC. | |
5 | * Author: Linus Walleij <linus.walleij@stericsson.com> | |
6 | * Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net> | |
7 | * Copyright 2006 (c) MontaVista Software, Inc. | |
8 | */ | |
9 | #include <linux/init.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/rtc.h> | |
12 | #include <linux/clk.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/pm.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/io.h> | |
5a0e3ad6 | 17 | #include <linux/slab.h> |
aa958f57 LW |
18 | |
19 | /* | |
20 | * Registers in the COH 901 331 | |
21 | */ | |
22 | /* Alarm value 32bit (R/W) */ | |
23 | #define COH901331_ALARM 0x00U | |
24 | /* Used to set current time 32bit (R/W) */ | |
25 | #define COH901331_SET_TIME 0x04U | |
26 | /* Indication if current time is valid 32bit (R/-) */ | |
27 | #define COH901331_VALID 0x08U | |
28 | /* Read the current time 32bit (R/-) */ | |
29 | #define COH901331_CUR_TIME 0x0cU | |
30 | /* Event register for the "alarm" interrupt */ | |
31 | #define COH901331_IRQ_EVENT 0x10U | |
32 | /* Mask register for the "alarm" interrupt */ | |
33 | #define COH901331_IRQ_MASK 0x14U | |
34 | /* Force register for the "alarm" interrupt */ | |
35 | #define COH901331_IRQ_FORCE 0x18U | |
36 | ||
37 | /* | |
38 | * Reference to RTC block clock | |
39 | * Notice that the frequent clk_enable()/clk_disable() on this | |
40 | * clock is mainly to be able to turn on/off other clocks in the | |
41 | * hierarchy as needed, the RTC clock is always on anyway. | |
42 | */ | |
43 | struct coh901331_port { | |
44 | struct rtc_device *rtc; | |
45 | struct clk *clk; | |
46 | u32 phybase; | |
47 | u32 physize; | |
48 | void __iomem *virtbase; | |
49 | int irq; | |
50 | #ifdef CONFIG_PM | |
51 | u32 irqmaskstore; | |
52 | #endif | |
53 | }; | |
54 | ||
55 | static irqreturn_t coh901331_interrupt(int irq, void *data) | |
56 | { | |
57 | struct coh901331_port *rtap = data; | |
58 | ||
59 | clk_enable(rtap->clk); | |
60 | /* Ack IRQ */ | |
61 | writel(1, rtap->virtbase + COH901331_IRQ_EVENT); | |
378ce74b LW |
62 | /* |
63 | * Disable the interrupt. This is necessary because | |
64 | * the RTC lives on a lower-clocked line and will | |
65 | * not release the IRQ line until after a few (slower) | |
66 | * clock cycles. The interrupt will be re-enabled when | |
67 | * a new alarm is set anyway. | |
68 | */ | |
69 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
aa958f57 | 70 | clk_disable(rtap->clk); |
378ce74b | 71 | |
aa958f57 LW |
72 | /* Set alarm flag */ |
73 | rtc_update_irq(rtap->rtc, 1, RTC_AF); | |
74 | ||
75 | return IRQ_HANDLED; | |
76 | } | |
77 | ||
78 | static int coh901331_read_time(struct device *dev, struct rtc_time *tm) | |
79 | { | |
80 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
81 | ||
82 | clk_enable(rtap->clk); | |
83 | /* Check if the time is valid */ | |
84 | if (readl(rtap->virtbase + COH901331_VALID)) { | |
85 | rtc_time_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm); | |
86 | clk_disable(rtap->clk); | |
87 | return rtc_valid_tm(tm); | |
88 | } | |
89 | clk_disable(rtap->clk); | |
90 | return -EINVAL; | |
91 | } | |
92 | ||
93 | static int coh901331_set_mmss(struct device *dev, unsigned long secs) | |
94 | { | |
95 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
96 | ||
97 | clk_enable(rtap->clk); | |
98 | writel(secs, rtap->virtbase + COH901331_SET_TIME); | |
99 | clk_disable(rtap->clk); | |
100 | ||
101 | return 0; | |
102 | } | |
103 | ||
104 | static int coh901331_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
105 | { | |
106 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
107 | ||
108 | clk_enable(rtap->clk); | |
109 | rtc_time_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time); | |
110 | alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U; | |
111 | alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U; | |
112 | clk_disable(rtap->clk); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | static int coh901331_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
118 | { | |
119 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
120 | unsigned long time; | |
121 | ||
122 | rtc_tm_to_time(&alarm->time, &time); | |
123 | clk_enable(rtap->clk); | |
124 | writel(time, rtap->virtbase + COH901331_ALARM); | |
125 | writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK); | |
126 | clk_disable(rtap->clk); | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
131 | static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
132 | { | |
133 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
134 | ||
135 | clk_enable(rtap->clk); | |
136 | if (enabled) | |
137 | writel(1, rtap->virtbase + COH901331_IRQ_MASK); | |
138 | else | |
139 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
140 | clk_disable(rtap->clk); | |
378ce74b LW |
141 | |
142 | return 0; | |
aa958f57 LW |
143 | } |
144 | ||
145 | static struct rtc_class_ops coh901331_ops = { | |
146 | .read_time = coh901331_read_time, | |
147 | .set_mmss = coh901331_set_mmss, | |
148 | .read_alarm = coh901331_read_alarm, | |
149 | .set_alarm = coh901331_set_alarm, | |
150 | .alarm_irq_enable = coh901331_alarm_irq_enable, | |
151 | }; | |
152 | ||
153 | static int __exit coh901331_remove(struct platform_device *pdev) | |
154 | { | |
155 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); | |
156 | ||
157 | if (rtap) { | |
158 | free_irq(rtap->irq, rtap); | |
159 | rtc_device_unregister(rtap->rtc); | |
8384dfeb | 160 | clk_unprepare(rtap->clk); |
aa958f57 LW |
161 | clk_put(rtap->clk); |
162 | iounmap(rtap->virtbase); | |
163 | release_mem_region(rtap->phybase, rtap->physize); | |
164 | platform_set_drvdata(pdev, NULL); | |
165 | kfree(rtap); | |
166 | } | |
167 | ||
168 | return 0; | |
169 | } | |
170 | ||
171 | ||
172 | static int __init coh901331_probe(struct platform_device *pdev) | |
173 | { | |
174 | int ret; | |
175 | struct coh901331_port *rtap; | |
176 | struct resource *res; | |
177 | ||
178 | rtap = kzalloc(sizeof(struct coh901331_port), GFP_KERNEL); | |
179 | if (!rtap) | |
180 | return -ENOMEM; | |
181 | ||
182 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
183 | if (!res) { | |
184 | ret = -ENOENT; | |
185 | goto out_no_resource; | |
186 | } | |
187 | rtap->phybase = res->start; | |
188 | rtap->physize = resource_size(res); | |
189 | ||
190 | if (request_mem_region(rtap->phybase, rtap->physize, | |
191 | "rtc-coh901331") == NULL) { | |
192 | ret = -EBUSY; | |
193 | goto out_no_memregion; | |
194 | } | |
195 | ||
196 | rtap->virtbase = ioremap(rtap->phybase, rtap->physize); | |
197 | if (!rtap->virtbase) { | |
198 | ret = -ENOMEM; | |
199 | goto out_no_remap; | |
200 | } | |
201 | ||
202 | rtap->irq = platform_get_irq(pdev, 0); | |
2f6e5f94 | 203 | if (request_irq(rtap->irq, coh901331_interrupt, 0, |
aa958f57 LW |
204 | "RTC COH 901 331 Alarm", rtap)) { |
205 | ret = -EIO; | |
206 | goto out_no_irq; | |
207 | } | |
208 | ||
209 | rtap->clk = clk_get(&pdev->dev, NULL); | |
210 | if (IS_ERR(rtap->clk)) { | |
211 | ret = PTR_ERR(rtap->clk); | |
212 | dev_err(&pdev->dev, "could not get clock\n"); | |
213 | goto out_no_clk; | |
214 | } | |
215 | ||
216 | /* We enable/disable the clock only to assure it works */ | |
8384dfeb | 217 | ret = clk_prepare_enable(rtap->clk); |
aa958f57 LW |
218 | if (ret) { |
219 | dev_err(&pdev->dev, "could not enable clock\n"); | |
8384dfeb | 220 | goto out_no_clk_prepenable; |
aa958f57 LW |
221 | } |
222 | clk_disable(rtap->clk); | |
223 | ||
9cf3b5fa | 224 | platform_set_drvdata(pdev, rtap); |
aa958f57 LW |
225 | rtap->rtc = rtc_device_register("coh901331", &pdev->dev, &coh901331_ops, |
226 | THIS_MODULE); | |
227 | if (IS_ERR(rtap->rtc)) { | |
228 | ret = PTR_ERR(rtap->rtc); | |
229 | goto out_no_rtc; | |
230 | } | |
231 | ||
aa958f57 LW |
232 | return 0; |
233 | ||
234 | out_no_rtc: | |
9cf3b5fa | 235 | platform_set_drvdata(pdev, NULL); |
8384dfeb LW |
236 | clk_unprepare(rtap->clk); |
237 | out_no_clk_prepenable: | |
aa958f57 LW |
238 | clk_put(rtap->clk); |
239 | out_no_clk: | |
240 | free_irq(rtap->irq, rtap); | |
241 | out_no_irq: | |
242 | iounmap(rtap->virtbase); | |
243 | out_no_remap: | |
244 | platform_set_drvdata(pdev, NULL); | |
245 | out_no_memregion: | |
246 | release_mem_region(rtap->phybase, SZ_4K); | |
247 | out_no_resource: | |
248 | kfree(rtap); | |
249 | return ret; | |
250 | } | |
251 | ||
252 | #ifdef CONFIG_PM | |
253 | static int coh901331_suspend(struct platform_device *pdev, pm_message_t state) | |
254 | { | |
255 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); | |
256 | ||
257 | /* | |
258 | * If this RTC alarm will be used for waking the system up, | |
259 | * don't disable it of course. Else we just disable the alarm | |
260 | * and await suspension. | |
261 | */ | |
262 | if (device_may_wakeup(&pdev->dev)) { | |
263 | enable_irq_wake(rtap->irq); | |
264 | } else { | |
265 | clk_enable(rtap->clk); | |
266 | rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK); | |
267 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
268 | clk_disable(rtap->clk); | |
269 | } | |
8384dfeb | 270 | clk_unprepare(rtap->clk); |
aa958f57 LW |
271 | return 0; |
272 | } | |
273 | ||
274 | static int coh901331_resume(struct platform_device *pdev) | |
275 | { | |
276 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); | |
277 | ||
8384dfeb | 278 | clk_prepare(rtap->clk); |
5a98c04d | 279 | if (device_may_wakeup(&pdev->dev)) { |
aa958f57 | 280 | disable_irq_wake(rtap->irq); |
5a98c04d | 281 | } else { |
aa958f57 LW |
282 | clk_enable(rtap->clk); |
283 | writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK); | |
284 | clk_disable(rtap->clk); | |
5a98c04d | 285 | } |
aa958f57 LW |
286 | return 0; |
287 | } | |
288 | #else | |
289 | #define coh901331_suspend NULL | |
290 | #define coh901331_resume NULL | |
291 | #endif | |
292 | ||
293 | static void coh901331_shutdown(struct platform_device *pdev) | |
294 | { | |
295 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); | |
296 | ||
297 | clk_enable(rtap->clk); | |
298 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
299 | clk_disable(rtap->clk); | |
8384dfeb | 300 | clk_unprepare(rtap->clk); |
aa958f57 LW |
301 | } |
302 | ||
303 | static struct platform_driver coh901331_driver = { | |
304 | .driver = { | |
305 | .name = "rtc-coh901331", | |
306 | .owner = THIS_MODULE, | |
307 | }, | |
308 | .remove = __exit_p(coh901331_remove), | |
309 | .suspend = coh901331_suspend, | |
310 | .resume = coh901331_resume, | |
311 | .shutdown = coh901331_shutdown, | |
312 | }; | |
313 | ||
314 | static int __init coh901331_init(void) | |
315 | { | |
316 | return platform_driver_probe(&coh901331_driver, coh901331_probe); | |
317 | } | |
318 | ||
319 | static void __exit coh901331_exit(void) | |
320 | { | |
321 | platform_driver_unregister(&coh901331_driver); | |
322 | } | |
323 | ||
324 | module_init(coh901331_init); | |
325 | module_exit(coh901331_exit); | |
326 | ||
327 | MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>"); | |
328 | MODULE_DESCRIPTION("ST-Ericsson AB COH 901 331 RTC Driver"); | |
329 | MODULE_LICENSE("GPL"); |