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c2a57550 OST |
1 | /* rtc-da9063.c - Real time clock device driver for DA9063 |
2 | * Copyright (C) 2013-14 Dialog Semiconductor Ltd. | |
3 | * | |
4 | * This library is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU Library General Public | |
6 | * License as published by the Free Software Foundation; either | |
7 | * version 2 of the License, or (at your option) any later version. | |
8 | * | |
9 | * This library is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
12 | * Library General Public License for more details. | |
13 | */ | |
14 | ||
80ca3277 T |
15 | #include <linux/delay.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/interrupt.h> | |
c2a57550 OST |
18 | #include <linux/kernel.h> |
19 | #include <linux/module.h> | |
80ca3277 | 20 | #include <linux/of.h> |
c2a57550 | 21 | #include <linux/platform_device.h> |
80ca3277 | 22 | #include <linux/regmap.h> |
c2a57550 OST |
23 | #include <linux/rtc.h> |
24 | #include <linux/slab.h> | |
80ca3277 T |
25 | |
26 | #include <linux/mfd/da9062/registers.h> | |
c2a57550 OST |
27 | #include <linux/mfd/da9063/registers.h> |
28 | #include <linux/mfd/da9063/core.h> | |
29 | ||
30 | #define YEARS_TO_DA9063(year) ((year) - 100) | |
31 | #define MONTHS_TO_DA9063(month) ((month) + 1) | |
32 | #define YEARS_FROM_DA9063(year) ((year) + 100) | |
33 | #define MONTHS_FROM_DA9063(month) ((month) - 1) | |
34 | ||
80ca3277 T |
35 | enum { |
36 | RTC_SEC = 0, | |
37 | RTC_MIN = 1, | |
38 | RTC_HOUR = 2, | |
39 | RTC_DAY = 3, | |
40 | RTC_MONTH = 4, | |
41 | RTC_YEAR = 5, | |
42 | RTC_DATA_LEN | |
43 | }; | |
44 | ||
45 | struct da9063_compatible_rtc_regmap { | |
46 | /* REGS */ | |
47 | int rtc_enable_reg; | |
48 | int rtc_enable_32k_crystal_reg; | |
49 | int rtc_alarm_secs_reg; | |
50 | int rtc_alarm_year_reg; | |
51 | int rtc_count_secs_reg; | |
52 | int rtc_count_year_reg; | |
53 | int rtc_event_reg; | |
54 | /* MASKS */ | |
55 | int rtc_enable_mask; | |
56 | int rtc_crystal_mask; | |
57 | int rtc_event_alarm_mask; | |
58 | int rtc_alarm_on_mask; | |
59 | int rtc_alarm_status_mask; | |
60 | int rtc_tick_on_mask; | |
61 | int rtc_ready_to_read_mask; | |
62 | int rtc_count_sec_mask; | |
63 | int rtc_count_min_mask; | |
64 | int rtc_count_hour_mask; | |
65 | int rtc_count_day_mask; | |
66 | int rtc_count_month_mask; | |
67 | int rtc_count_year_mask; | |
68 | /* ALARM CONFIG */ | |
69 | int rtc_data_start; | |
70 | int rtc_alarm_len; | |
71 | }; | |
72 | ||
73 | struct da9063_compatible_rtc { | |
74 | struct rtc_device *rtc_dev; | |
75 | struct rtc_time alarm_time; | |
76 | struct regmap *regmap; | |
77 | const struct da9063_compatible_rtc_regmap *config; | |
78 | bool rtc_sync; | |
79 | }; | |
80 | ||
81 | static const struct da9063_compatible_rtc_regmap da9063_ad_regs = { | |
82 | /* REGS */ | |
83 | .rtc_enable_reg = DA9063_REG_CONTROL_E, | |
84 | .rtc_alarm_secs_reg = DA9063_AD_REG_ALARM_MI, | |
85 | .rtc_alarm_year_reg = DA9063_AD_REG_ALARM_Y, | |
86 | .rtc_count_secs_reg = DA9063_REG_COUNT_S, | |
87 | .rtc_count_year_reg = DA9063_REG_COUNT_Y, | |
88 | .rtc_event_reg = DA9063_REG_EVENT_A, | |
89 | /* MASKS */ | |
90 | .rtc_enable_mask = DA9063_RTC_EN, | |
91 | .rtc_crystal_mask = DA9063_CRYSTAL, | |
92 | .rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K, | |
93 | .rtc_event_alarm_mask = DA9063_E_ALARM, | |
94 | .rtc_alarm_on_mask = DA9063_ALARM_ON, | |
95 | .rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM | | |
96 | DA9063_ALARM_STATUS_TICK, | |
97 | .rtc_tick_on_mask = DA9063_TICK_ON, | |
98 | .rtc_ready_to_read_mask = DA9063_RTC_READ, | |
99 | .rtc_count_sec_mask = DA9063_COUNT_SEC_MASK, | |
100 | .rtc_count_min_mask = DA9063_COUNT_MIN_MASK, | |
101 | .rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK, | |
102 | .rtc_count_day_mask = DA9063_COUNT_DAY_MASK, | |
103 | .rtc_count_month_mask = DA9063_COUNT_MONTH_MASK, | |
104 | .rtc_count_year_mask = DA9063_COUNT_YEAR_MASK, | |
105 | /* ALARM CONFIG */ | |
106 | .rtc_data_start = RTC_MIN, | |
107 | .rtc_alarm_len = RTC_DATA_LEN - 1, | |
108 | }; | |
109 | ||
110 | static const struct da9063_compatible_rtc_regmap da9063_bb_regs = { | |
111 | /* REGS */ | |
112 | .rtc_enable_reg = DA9063_REG_CONTROL_E, | |
113 | .rtc_alarm_secs_reg = DA9063_BB_REG_ALARM_S, | |
114 | .rtc_alarm_year_reg = DA9063_BB_REG_ALARM_Y, | |
115 | .rtc_count_secs_reg = DA9063_REG_COUNT_S, | |
116 | .rtc_count_year_reg = DA9063_REG_COUNT_Y, | |
117 | .rtc_event_reg = DA9063_REG_EVENT_A, | |
118 | /* MASKS */ | |
119 | .rtc_enable_mask = DA9063_RTC_EN, | |
120 | .rtc_crystal_mask = DA9063_CRYSTAL, | |
121 | .rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K, | |
122 | .rtc_event_alarm_mask = DA9063_E_ALARM, | |
123 | .rtc_alarm_on_mask = DA9063_ALARM_ON, | |
124 | .rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM | | |
125 | DA9063_ALARM_STATUS_TICK, | |
126 | .rtc_tick_on_mask = DA9063_TICK_ON, | |
127 | .rtc_ready_to_read_mask = DA9063_RTC_READ, | |
128 | .rtc_count_sec_mask = DA9063_COUNT_SEC_MASK, | |
129 | .rtc_count_min_mask = DA9063_COUNT_MIN_MASK, | |
130 | .rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK, | |
131 | .rtc_count_day_mask = DA9063_COUNT_DAY_MASK, | |
132 | .rtc_count_month_mask = DA9063_COUNT_MONTH_MASK, | |
133 | .rtc_count_year_mask = DA9063_COUNT_YEAR_MASK, | |
134 | /* ALARM CONFIG */ | |
135 | .rtc_data_start = RTC_SEC, | |
136 | .rtc_alarm_len = RTC_DATA_LEN, | |
137 | }; | |
138 | ||
139 | static const struct da9063_compatible_rtc_regmap da9062_aa_regs = { | |
140 | /* REGS */ | |
141 | .rtc_enable_reg = DA9062AA_CONTROL_E, | |
142 | .rtc_alarm_secs_reg = DA9062AA_ALARM_S, | |
143 | .rtc_alarm_year_reg = DA9062AA_ALARM_Y, | |
144 | .rtc_count_secs_reg = DA9062AA_COUNT_S, | |
145 | .rtc_count_year_reg = DA9062AA_COUNT_Y, | |
146 | .rtc_event_reg = DA9062AA_EVENT_A, | |
147 | /* MASKS */ | |
148 | .rtc_enable_mask = DA9062AA_RTC_EN_MASK, | |
149 | .rtc_crystal_mask = DA9062AA_CRYSTAL_MASK, | |
150 | .rtc_enable_32k_crystal_reg = DA9062AA_EN_32K, | |
151 | .rtc_event_alarm_mask = DA9062AA_M_ALARM_MASK, | |
152 | .rtc_alarm_on_mask = DA9062AA_ALARM_ON_MASK, | |
153 | .rtc_alarm_status_mask = (0x02 << 6), | |
154 | .rtc_tick_on_mask = DA9062AA_TICK_ON_MASK, | |
155 | .rtc_ready_to_read_mask = DA9062AA_RTC_READ_MASK, | |
156 | .rtc_count_sec_mask = DA9062AA_COUNT_SEC_MASK, | |
157 | .rtc_count_min_mask = DA9062AA_COUNT_MIN_MASK, | |
158 | .rtc_count_hour_mask = DA9062AA_COUNT_HOUR_MASK, | |
159 | .rtc_count_day_mask = DA9062AA_COUNT_DAY_MASK, | |
160 | .rtc_count_month_mask = DA9062AA_COUNT_MONTH_MASK, | |
161 | .rtc_count_year_mask = DA9062AA_COUNT_YEAR_MASK, | |
162 | /* ALARM CONFIG */ | |
163 | .rtc_data_start = RTC_SEC, | |
164 | .rtc_alarm_len = RTC_DATA_LEN, | |
165 | }; | |
166 | ||
167 | static const struct of_device_id da9063_compatible_reg_id_table[] = { | |
168 | { .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs }, | |
169 | { .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs }, | |
170 | { }, | |
c2a57550 | 171 | }; |
73798d5c | 172 | MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table); |
c2a57550 | 173 | |
80ca3277 T |
174 | static void da9063_data_to_tm(u8 *data, struct rtc_time *tm, |
175 | struct da9063_compatible_rtc *rtc) | |
c2a57550 | 176 | { |
80ca3277 T |
177 | const struct da9063_compatible_rtc_regmap *config = rtc->config; |
178 | ||
179 | tm->tm_sec = data[RTC_SEC] & config->rtc_count_sec_mask; | |
180 | tm->tm_min = data[RTC_MIN] & config->rtc_count_min_mask; | |
181 | tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask; | |
182 | tm->tm_mday = data[RTC_DAY] & config->rtc_count_day_mask; | |
c2a57550 | 183 | tm->tm_mon = MONTHS_FROM_DA9063(data[RTC_MONTH] & |
80ca3277 | 184 | config->rtc_count_month_mask); |
c2a57550 | 185 | tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] & |
80ca3277 | 186 | config->rtc_count_year_mask); |
c2a57550 OST |
187 | } |
188 | ||
80ca3277 T |
189 | static void da9063_tm_to_data(struct rtc_time *tm, u8 *data, |
190 | struct da9063_compatible_rtc *rtc) | |
c2a57550 | 191 | { |
80ca3277 T |
192 | const struct da9063_compatible_rtc_regmap *config = rtc->config; |
193 | ||
194 | data[RTC_SEC] &= ~config->rtc_count_sec_mask; | |
195 | data[RTC_SEC] |= tm->tm_sec & config->rtc_count_sec_mask; | |
c2a57550 | 196 | |
80ca3277 T |
197 | data[RTC_MIN] &= ~config->rtc_count_min_mask; |
198 | data[RTC_MIN] |= tm->tm_min & config->rtc_count_min_mask; | |
c2a57550 | 199 | |
80ca3277 T |
200 | data[RTC_HOUR] &= ~config->rtc_count_hour_mask; |
201 | data[RTC_HOUR] |= tm->tm_hour & config->rtc_count_hour_mask; | |
c2a57550 | 202 | |
80ca3277 T |
203 | data[RTC_DAY] &= ~config->rtc_count_day_mask; |
204 | data[RTC_DAY] |= tm->tm_mday & config->rtc_count_day_mask; | |
c2a57550 | 205 | |
80ca3277 | 206 | data[RTC_MONTH] &= ~config->rtc_count_month_mask; |
c2a57550 | 207 | data[RTC_MONTH] |= MONTHS_TO_DA9063(tm->tm_mon) & |
80ca3277 | 208 | config->rtc_count_month_mask; |
c2a57550 | 209 | |
80ca3277 | 210 | data[RTC_YEAR] &= ~config->rtc_count_year_mask; |
c2a57550 | 211 | data[RTC_YEAR] |= YEARS_TO_DA9063(tm->tm_year) & |
80ca3277 | 212 | config->rtc_count_year_mask; |
c2a57550 OST |
213 | } |
214 | ||
215 | static int da9063_rtc_stop_alarm(struct device *dev) | |
216 | { | |
80ca3277 T |
217 | struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev); |
218 | const struct da9063_compatible_rtc_regmap *config = rtc->config; | |
c2a57550 | 219 | |
80ca3277 T |
220 | return regmap_update_bits(rtc->regmap, |
221 | config->rtc_alarm_year_reg, | |
222 | config->rtc_alarm_on_mask, | |
223 | 0); | |
c2a57550 OST |
224 | } |
225 | ||
226 | static int da9063_rtc_start_alarm(struct device *dev) | |
227 | { | |
80ca3277 T |
228 | struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev); |
229 | const struct da9063_compatible_rtc_regmap *config = rtc->config; | |
c2a57550 | 230 | |
80ca3277 T |
231 | return regmap_update_bits(rtc->regmap, |
232 | config->rtc_alarm_year_reg, | |
233 | config->rtc_alarm_on_mask, | |
234 | config->rtc_alarm_on_mask); | |
c2a57550 OST |
235 | } |
236 | ||
237 | static int da9063_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
238 | { | |
80ca3277 T |
239 | struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev); |
240 | const struct da9063_compatible_rtc_regmap *config = rtc->config; | |
c2a57550 OST |
241 | unsigned long tm_secs; |
242 | unsigned long al_secs; | |
243 | u8 data[RTC_DATA_LEN]; | |
244 | int ret; | |
245 | ||
80ca3277 T |
246 | ret = regmap_bulk_read(rtc->regmap, |
247 | config->rtc_count_secs_reg, | |
c2a57550 OST |
248 | data, RTC_DATA_LEN); |
249 | if (ret < 0) { | |
250 | dev_err(dev, "Failed to read RTC time data: %d\n", ret); | |
251 | return ret; | |
252 | } | |
253 | ||
80ca3277 | 254 | if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) { |
c2a57550 OST |
255 | dev_dbg(dev, "RTC not yet ready to be read by the host\n"); |
256 | return -EINVAL; | |
257 | } | |
258 | ||
80ca3277 | 259 | da9063_data_to_tm(data, tm, rtc); |
c2a57550 OST |
260 | |
261 | rtc_tm_to_time(tm, &tm_secs); | |
262 | rtc_tm_to_time(&rtc->alarm_time, &al_secs); | |
263 | ||
264 | /* handle the rtc synchronisation delay */ | |
265 | if (rtc->rtc_sync == true && al_secs - tm_secs == 1) | |
266 | memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time)); | |
267 | else | |
268 | rtc->rtc_sync = false; | |
269 | ||
270 | return rtc_valid_tm(tm); | |
271 | } | |
272 | ||
273 | static int da9063_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
274 | { | |
80ca3277 T |
275 | struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev); |
276 | const struct da9063_compatible_rtc_regmap *config = rtc->config; | |
c2a57550 OST |
277 | u8 data[RTC_DATA_LEN]; |
278 | int ret; | |
279 | ||
80ca3277 T |
280 | da9063_tm_to_data(tm, data, rtc); |
281 | ret = regmap_bulk_write(rtc->regmap, | |
282 | config->rtc_count_secs_reg, | |
c2a57550 OST |
283 | data, RTC_DATA_LEN); |
284 | if (ret < 0) | |
285 | dev_err(dev, "Failed to set RTC time data: %d\n", ret); | |
286 | ||
287 | return ret; | |
288 | } | |
289 | ||
290 | static int da9063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
291 | { | |
80ca3277 T |
292 | struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev); |
293 | const struct da9063_compatible_rtc_regmap *config = rtc->config; | |
c2a57550 OST |
294 | u8 data[RTC_DATA_LEN]; |
295 | int ret; | |
296 | unsigned int val; | |
297 | ||
9cb42e2a | 298 | data[RTC_SEC] = 0; |
80ca3277 T |
299 | ret = regmap_bulk_read(rtc->regmap, |
300 | config->rtc_alarm_secs_reg, | |
301 | &data[config->rtc_data_start], | |
302 | config->rtc_alarm_len); | |
c2a57550 OST |
303 | if (ret < 0) |
304 | return ret; | |
305 | ||
80ca3277 | 306 | da9063_data_to_tm(data, &alrm->time, rtc); |
c2a57550 | 307 | |
80ca3277 | 308 | alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask); |
c2a57550 | 309 | |
80ca3277 T |
310 | ret = regmap_read(rtc->regmap, |
311 | config->rtc_event_reg, | |
312 | &val); | |
c2a57550 OST |
313 | if (ret < 0) |
314 | return ret; | |
315 | ||
80ca3277 | 316 | if (val & config->rtc_event_alarm_mask) |
c2a57550 OST |
317 | alrm->pending = 1; |
318 | else | |
319 | alrm->pending = 0; | |
320 | ||
321 | return 0; | |
322 | } | |
323 | ||
324 | static int da9063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
325 | { | |
80ca3277 T |
326 | struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev); |
327 | const struct da9063_compatible_rtc_regmap *config = rtc->config; | |
c2a57550 OST |
328 | u8 data[RTC_DATA_LEN]; |
329 | int ret; | |
330 | ||
80ca3277 | 331 | da9063_tm_to_data(&alrm->time, data, rtc); |
c2a57550 OST |
332 | |
333 | ret = da9063_rtc_stop_alarm(dev); | |
334 | if (ret < 0) { | |
335 | dev_err(dev, "Failed to stop alarm: %d\n", ret); | |
336 | return ret; | |
337 | } | |
338 | ||
80ca3277 T |
339 | ret = regmap_bulk_write(rtc->regmap, |
340 | config->rtc_alarm_secs_reg, | |
341 | &data[config->rtc_data_start], | |
342 | config->rtc_alarm_len); | |
c2a57550 OST |
343 | if (ret < 0) { |
344 | dev_err(dev, "Failed to write alarm: %d\n", ret); | |
345 | return ret; | |
346 | } | |
347 | ||
80ca3277 | 348 | da9063_data_to_tm(data, &rtc->alarm_time, rtc); |
c2a57550 OST |
349 | |
350 | if (alrm->enabled) { | |
351 | ret = da9063_rtc_start_alarm(dev); | |
352 | if (ret < 0) { | |
353 | dev_err(dev, "Failed to start alarm: %d\n", ret); | |
354 | return ret; | |
355 | } | |
356 | } | |
357 | ||
358 | return ret; | |
359 | } | |
360 | ||
80ca3277 T |
361 | static int da9063_rtc_alarm_irq_enable(struct device *dev, |
362 | unsigned int enabled) | |
c2a57550 OST |
363 | { |
364 | if (enabled) | |
365 | return da9063_rtc_start_alarm(dev); | |
366 | else | |
367 | return da9063_rtc_stop_alarm(dev); | |
368 | } | |
369 | ||
370 | static irqreturn_t da9063_alarm_event(int irq, void *data) | |
371 | { | |
80ca3277 T |
372 | struct da9063_compatible_rtc *rtc = data; |
373 | const struct da9063_compatible_rtc_regmap *config = rtc->config; | |
c2a57550 | 374 | |
80ca3277 T |
375 | regmap_update_bits(rtc->regmap, |
376 | config->rtc_alarm_year_reg, | |
377 | config->rtc_alarm_on_mask, | |
378 | 0); | |
c2a57550 OST |
379 | |
380 | rtc->rtc_sync = true; | |
381 | rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF); | |
382 | ||
383 | return IRQ_HANDLED; | |
384 | } | |
385 | ||
386 | static const struct rtc_class_ops da9063_rtc_ops = { | |
387 | .read_time = da9063_rtc_read_time, | |
388 | .set_time = da9063_rtc_set_time, | |
389 | .read_alarm = da9063_rtc_read_alarm, | |
390 | .set_alarm = da9063_rtc_set_alarm, | |
391 | .alarm_irq_enable = da9063_rtc_alarm_irq_enable, | |
392 | }; | |
393 | ||
394 | static int da9063_rtc_probe(struct platform_device *pdev) | |
395 | { | |
80ca3277 T |
396 | struct da9063_compatible_rtc *rtc; |
397 | const struct da9063_compatible_rtc_regmap *config; | |
398 | const struct of_device_id *match; | |
c2a57550 OST |
399 | int irq_alarm; |
400 | u8 data[RTC_DATA_LEN]; | |
401 | int ret; | |
402 | ||
80ca3277 T |
403 | if (!pdev->dev.of_node) |
404 | return -ENXIO; | |
c2a57550 | 405 | |
80ca3277 T |
406 | match = of_match_node(da9063_compatible_reg_id_table, |
407 | pdev->dev.of_node); | |
c2a57550 | 408 | |
9cb42e2a OST |
409 | rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); |
410 | if (!rtc) | |
411 | return -ENOMEM; | |
412 | ||
80ca3277 T |
413 | rtc->config = match->data; |
414 | if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) { | |
415 | struct da9063 *chip = dev_get_drvdata(pdev->dev.parent); | |
416 | ||
417 | if (chip->variant_code == PMIC_DA9063_AD) | |
418 | rtc->config = &da9063_ad_regs; | |
9cb42e2a OST |
419 | } |
420 | ||
80ca3277 T |
421 | rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL); |
422 | if (!rtc->regmap) { | |
423 | dev_warn(&pdev->dev, "Parent regmap unavailable.\n"); | |
424 | return -ENXIO; | |
425 | } | |
426 | ||
427 | config = rtc->config; | |
428 | ret = regmap_update_bits(rtc->regmap, | |
429 | config->rtc_enable_reg, | |
430 | config->rtc_enable_mask, | |
431 | config->rtc_enable_mask); | |
432 | if (ret < 0) { | |
433 | dev_err(&pdev->dev, "Failed to enable RTC\n"); | |
434 | return ret; | |
435 | } | |
436 | ||
437 | ret = regmap_update_bits(rtc->regmap, | |
438 | config->rtc_enable_32k_crystal_reg, | |
439 | config->rtc_crystal_mask, | |
440 | config->rtc_crystal_mask); | |
441 | if (ret < 0) { | |
442 | dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n"); | |
443 | return ret; | |
444 | } | |
445 | ||
446 | ret = regmap_update_bits(rtc->regmap, | |
447 | config->rtc_alarm_secs_reg, | |
448 | config->rtc_alarm_status_mask, | |
449 | 0); | |
c2a57550 OST |
450 | if (ret < 0) { |
451 | dev_err(&pdev->dev, "Failed to access RTC alarm register\n"); | |
80ca3277 | 452 | return ret; |
c2a57550 OST |
453 | } |
454 | ||
80ca3277 T |
455 | ret = regmap_update_bits(rtc->regmap, |
456 | config->rtc_alarm_secs_reg, | |
c2a57550 OST |
457 | DA9063_ALARM_STATUS_ALARM, |
458 | DA9063_ALARM_STATUS_ALARM); | |
459 | if (ret < 0) { | |
460 | dev_err(&pdev->dev, "Failed to access RTC alarm register\n"); | |
80ca3277 | 461 | return ret; |
c2a57550 OST |
462 | } |
463 | ||
80ca3277 T |
464 | ret = regmap_update_bits(rtc->regmap, |
465 | config->rtc_alarm_year_reg, | |
466 | config->rtc_tick_on_mask, | |
467 | 0); | |
c2a57550 OST |
468 | if (ret < 0) { |
469 | dev_err(&pdev->dev, "Failed to disable TICKs\n"); | |
80ca3277 | 470 | return ret; |
c2a57550 OST |
471 | } |
472 | ||
9cb42e2a | 473 | data[RTC_SEC] = 0; |
80ca3277 T |
474 | ret = regmap_bulk_read(rtc->regmap, |
475 | config->rtc_alarm_secs_reg, | |
476 | &data[config->rtc_data_start], | |
477 | config->rtc_alarm_len); | |
c2a57550 OST |
478 | if (ret < 0) { |
479 | dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n", | |
480 | ret); | |
80ca3277 | 481 | return ret; |
c2a57550 OST |
482 | } |
483 | ||
c2a57550 OST |
484 | platform_set_drvdata(pdev, rtc); |
485 | ||
486 | irq_alarm = platform_get_irq_byname(pdev, "ALARM"); | |
487 | ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL, | |
488 | da9063_alarm_event, | |
489 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
490 | "ALARM", rtc); | |
491 | if (ret) { | |
492 | dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n", | |
493 | irq_alarm, ret); | |
80ca3277 | 494 | return ret; |
c2a57550 OST |
495 | } |
496 | ||
c2a57550 OST |
497 | rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, DA9063_DRVNAME_RTC, |
498 | &da9063_rtc_ops, THIS_MODULE); | |
499 | if (IS_ERR(rtc->rtc_dev)) | |
500 | return PTR_ERR(rtc->rtc_dev); | |
501 | ||
80ca3277 | 502 | da9063_data_to_tm(data, &rtc->alarm_time, rtc); |
c2a57550 | 503 | rtc->rtc_sync = false; |
c2a57550 OST |
504 | return ret; |
505 | } | |
506 | ||
507 | static struct platform_driver da9063_rtc_driver = { | |
508 | .probe = da9063_rtc_probe, | |
509 | .driver = { | |
510 | .name = DA9063_DRVNAME_RTC, | |
80ca3277 | 511 | .of_match_table = da9063_compatible_reg_id_table, |
c2a57550 OST |
512 | }, |
513 | }; | |
514 | ||
515 | module_platform_driver(da9063_rtc_driver); | |
516 | ||
517 | MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>"); | |
518 | MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063"); | |
519 | MODULE_LICENSE("GPL v2"); | |
520 | MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC); |