[SCSI] hptiop: fix sense_buffer access bug
[deliverable/linux.git] / drivers / rtc / rtc-ds1307.c
CommitLineData
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1/*
2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
3 *
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/slab.h>
15#include <linux/i2c.h>
16#include <linux/string.h>
17#include <linux/rtc.h>
18#include <linux/bcd.h>
19
20
21
22/* We can't determine type by probing, but if we expect pre-Linux code
23 * to have set the chip up as a clock (turning on the oscillator and
24 * setting the date and time), Linux can ignore the non-clock features.
25 * That's a natural job for a factory or repair bench.
26 *
045e0e85
DB
27 * This is currently a simple no-alarms driver. If your board has the
28 * alarm irq wired up on a ds1337 or ds1339, and you want to use that,
29 * then look at the rtc-rs5c372 driver for code to steal...
1abb0dc9
DB
30 */
31enum ds_type {
045e0e85
DB
32 ds_1307,
33 ds_1337,
34 ds_1338,
35 ds_1339,
36 ds_1340,
37 m41t00,
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DB
38 // rs5c372 too? different address...
39};
40
1abb0dc9
DB
41
42/* RTC registers don't differ much, except for the century flag */
43#define DS1307_REG_SECS 0x00 /* 00-59 */
44# define DS1307_BIT_CH 0x80
be5f59f4 45# define DS1340_BIT_nEOSC 0x80
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DB
46#define DS1307_REG_MIN 0x01 /* 00-59 */
47#define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
c065f35c
DB
48# define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
49# define DS1307_BIT_PM 0x20 /* in REG_HOUR */
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DB
50# define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
51# define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
52#define DS1307_REG_WDAY 0x03 /* 01-07 */
53#define DS1307_REG_MDAY 0x04 /* 01-31 */
54#define DS1307_REG_MONTH 0x05 /* 01-12 */
55# define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
56#define DS1307_REG_YEAR 0x06 /* 00-99 */
57
58/* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
045e0e85
DB
59 * start at 7, and they differ a LOT. Only control and status matter for
60 * basic RTC date and time functionality; be careful using them.
1abb0dc9 61 */
045e0e85 62#define DS1307_REG_CONTROL 0x07 /* or ds1338 */
1abb0dc9 63# define DS1307_BIT_OUT 0x80
be5f59f4 64# define DS1338_BIT_OSF 0x20
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DB
65# define DS1307_BIT_SQWE 0x10
66# define DS1307_BIT_RS1 0x02
67# define DS1307_BIT_RS0 0x01
68#define DS1337_REG_CONTROL 0x0e
69# define DS1337_BIT_nEOSC 0x80
70# define DS1337_BIT_RS2 0x10
71# define DS1337_BIT_RS1 0x08
72# define DS1337_BIT_INTCN 0x04
73# define DS1337_BIT_A2IE 0x02
74# define DS1337_BIT_A1IE 0x01
045e0e85
DB
75#define DS1340_REG_CONTROL 0x07
76# define DS1340_BIT_OUT 0x80
77# define DS1340_BIT_FT 0x40
78# define DS1340_BIT_CALIB_SIGN 0x20
79# define DS1340_M_CALIBRATION 0x1f
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RG
80#define DS1340_REG_FLAG 0x09
81# define DS1340_BIT_OSF 0x80
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82#define DS1337_REG_STATUS 0x0f
83# define DS1337_BIT_OSF 0x80
84# define DS1337_BIT_A2I 0x02
85# define DS1337_BIT_A1I 0x01
86#define DS1339_REG_TRICKLE 0x10
87
88
89
90struct ds1307 {
91 u8 reg_addr;
682d73f6 92 bool has_nvram;
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DB
93 u8 regs[8];
94 enum ds_type type;
95 struct i2c_msg msg[2];
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DB
96 struct i2c_client *client;
97 struct i2c_client dev;
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DB
98 struct rtc_device *rtc;
99};
100
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DB
101struct chip_desc {
102 char name[9];
103 unsigned nvram56:1;
104 unsigned alarm:1;
105 enum ds_type type;
106};
107
108static const struct chip_desc chips[] = { {
109 .name = "ds1307",
110 .type = ds_1307,
111 .nvram56 = 1,
112}, {
113 .name = "ds1337",
114 .type = ds_1337,
115 .alarm = 1,
116}, {
117 .name = "ds1338",
118 .type = ds_1338,
119 .nvram56 = 1,
120}, {
121 .name = "ds1339",
122 .type = ds_1339,
123 .alarm = 1,
124}, {
125 .name = "ds1340",
126 .type = ds_1340,
127}, {
128 .name = "m41t00",
129 .type = m41t00,
130}, };
131
132static inline const struct chip_desc *find_chip(const char *s)
133{
134 unsigned i;
135
136 for (i = 0; i < ARRAY_SIZE(chips); i++)
137 if (strnicmp(s, chips[i].name, sizeof chips[i].name) == 0)
138 return &chips[i];
139 return NULL;
140}
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DB
141
142static int ds1307_get_time(struct device *dev, struct rtc_time *t)
143{
144 struct ds1307 *ds1307 = dev_get_drvdata(dev);
145 int tmp;
146
045e0e85 147 /* read the RTC date and time registers all at once */
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DB
148 ds1307->msg[1].flags = I2C_M_RD;
149 ds1307->msg[1].len = 7;
150
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DB
151 tmp = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent),
152 ds1307->msg, 2);
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153 if (tmp != 2) {
154 dev_err(dev, "%s error %d\n", "read", tmp);
155 return -EIO;
156 }
157
158 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
159 "read",
160 ds1307->regs[0], ds1307->regs[1],
161 ds1307->regs[2], ds1307->regs[3],
162 ds1307->regs[4], ds1307->regs[5],
163 ds1307->regs[6]);
164
165 t->tm_sec = BCD2BIN(ds1307->regs[DS1307_REG_SECS] & 0x7f);
166 t->tm_min = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f);
167 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
168 t->tm_hour = BCD2BIN(tmp);
169 t->tm_wday = BCD2BIN(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
170 t->tm_mday = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
171 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
172 t->tm_mon = BCD2BIN(tmp) - 1;
173
174 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
175 t->tm_year = BCD2BIN(ds1307->regs[DS1307_REG_YEAR]) + 100;
176
177 dev_dbg(dev, "%s secs=%d, mins=%d, "
178 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
179 "read", t->tm_sec, t->tm_min,
180 t->tm_hour, t->tm_mday,
181 t->tm_mon, t->tm_year, t->tm_wday);
182
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DB
183 /* initial clock setting can be undefined */
184 return rtc_valid_tm(t);
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DB
185}
186
187static int ds1307_set_time(struct device *dev, struct rtc_time *t)
188{
189 struct ds1307 *ds1307 = dev_get_drvdata(dev);
190 int result;
191 int tmp;
192 u8 *buf = ds1307->regs;
193
194 dev_dbg(dev, "%s secs=%d, mins=%d, "
195 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
11966adc
JG
196 "write", t->tm_sec, t->tm_min,
197 t->tm_hour, t->tm_mday,
198 t->tm_mon, t->tm_year, t->tm_wday);
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DB
199
200 *buf++ = 0; /* first register addr */
201 buf[DS1307_REG_SECS] = BIN2BCD(t->tm_sec);
202 buf[DS1307_REG_MIN] = BIN2BCD(t->tm_min);
203 buf[DS1307_REG_HOUR] = BIN2BCD(t->tm_hour);
204 buf[DS1307_REG_WDAY] = BIN2BCD(t->tm_wday + 1);
205 buf[DS1307_REG_MDAY] = BIN2BCD(t->tm_mday);
206 buf[DS1307_REG_MONTH] = BIN2BCD(t->tm_mon + 1);
207
208 /* assume 20YY not 19YY */
209 tmp = t->tm_year - 100;
210 buf[DS1307_REG_YEAR] = BIN2BCD(tmp);
211
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RG
212 switch (ds1307->type) {
213 case ds_1337:
214 case ds_1339:
1abb0dc9 215 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
be5f59f4
RG
216 break;
217 case ds_1340:
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DB
218 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
219 | DS1340_BIT_CENTURY;
be5f59f4
RG
220 break;
221 default:
222 break;
223 }
1abb0dc9
DB
224
225 ds1307->msg[1].flags = 0;
226 ds1307->msg[1].len = 8;
227
228 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
229 "write", buf[0], buf[1], buf[2], buf[3],
230 buf[4], buf[5], buf[6]);
231
045e0e85
DB
232 result = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent),
233 &ds1307->msg[1], 1);
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234 if (result != 1) {
235 dev_err(dev, "%s error %d\n", "write", tmp);
236 return -EIO;
237 }
238 return 0;
239}
240
ff8371ac 241static const struct rtc_class_ops ds13xx_rtc_ops = {
1abb0dc9
DB
242 .read_time = ds1307_get_time,
243 .set_time = ds1307_set_time,
244};
245
682d73f6
DB
246/*----------------------------------------------------------------------*/
247
248#define NVRAM_SIZE 56
249
250static ssize_t
251ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
252 char *buf, loff_t off, size_t count)
253{
254 struct i2c_client *client;
255 struct ds1307 *ds1307;
256 struct i2c_msg msg[2];
257 int result;
258
259 client = to_i2c_client(container_of(kobj, struct device, kobj));
260 ds1307 = i2c_get_clientdata(client);
261
262 if (unlikely(off >= NVRAM_SIZE))
263 return 0;
264 if ((off + count) > NVRAM_SIZE)
265 count = NVRAM_SIZE - off;
266 if (unlikely(!count))
267 return count;
268
269 msg[0].addr = client->addr;
270 msg[0].flags = 0;
271 msg[0].len = 1;
272 msg[0].buf = buf;
273
274 buf[0] = 8 + off;
275
276 msg[1].addr = client->addr;
277 msg[1].flags = I2C_M_RD;
278 msg[1].len = count;
279 msg[1].buf = buf;
280
281 result = i2c_transfer(to_i2c_adapter(client->dev.parent), msg, 2);
282 if (result != 2) {
283 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
284 return -EIO;
285 }
286 return count;
287}
288
289static ssize_t
290ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
291 char *buf, loff_t off, size_t count)
292{
293 struct i2c_client *client;
294 u8 buffer[NVRAM_SIZE + 1];
295 int ret;
296
297 client = to_i2c_client(container_of(kobj, struct device, kobj));
298
299 if (unlikely(off >= NVRAM_SIZE))
300 return -EFBIG;
301 if ((off + count) > NVRAM_SIZE)
302 count = NVRAM_SIZE - off;
303 if (unlikely(!count))
304 return count;
305
306 buffer[0] = 8 + off;
307 memcpy(buffer + 1, buf, count);
308
309 ret = i2c_master_send(client, buffer, count + 1);
310 return (ret < 0) ? ret : (ret - 1);
311}
312
313static struct bin_attribute nvram = {
314 .attr = {
315 .name = "nvram",
316 .mode = S_IRUGO | S_IWUSR,
317 .owner = THIS_MODULE,
318 },
319
320 .read = ds1307_nvram_read,
321 .write = ds1307_nvram_write,
322 .size = NVRAM_SIZE,
323};
324
325/*----------------------------------------------------------------------*/
326
1abb0dc9
DB
327static struct i2c_driver ds1307_driver;
328
c065f35c 329static int __devinit ds1307_probe(struct i2c_client *client)
1abb0dc9
DB
330{
331 struct ds1307 *ds1307;
332 int err = -ENODEV;
1abb0dc9 333 int tmp;
045e0e85 334 const struct chip_desc *chip;
c065f35c 335 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1abb0dc9 336
c065f35c
DB
337 chip = find_chip(client->name);
338 if (!chip) {
339 dev_err(&client->dev, "unknown chip type '%s'\n",
340 client->name);
341 return -ENODEV;
1abb0dc9
DB
342 }
343
c065f35c
DB
344 if (!i2c_check_functionality(adapter,
345 I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
346 return -EIO;
347
348 if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
349 return -ENOMEM;
045e0e85
DB
350
351 ds1307->client = client;
1abb0dc9
DB
352 i2c_set_clientdata(client, ds1307);
353
354 ds1307->msg[0].addr = client->addr;
355 ds1307->msg[0].flags = 0;
356 ds1307->msg[0].len = 1;
357 ds1307->msg[0].buf = &ds1307->reg_addr;
358
359 ds1307->msg[1].addr = client->addr;
360 ds1307->msg[1].flags = I2C_M_RD;
361 ds1307->msg[1].len = sizeof(ds1307->regs);
362 ds1307->msg[1].buf = ds1307->regs;
363
045e0e85
DB
364 ds1307->type = chip->type;
365
366 switch (ds1307->type) {
367 case ds_1337:
368 case ds_1339:
1abb0dc9
DB
369 ds1307->reg_addr = DS1337_REG_CONTROL;
370 ds1307->msg[1].len = 2;
371
be5f59f4 372 /* get registers that the "rtc" read below won't read... */
045e0e85 373 tmp = i2c_transfer(adapter, ds1307->msg, 2);
1abb0dc9
DB
374 if (tmp != 2) {
375 pr_debug("read error %d\n", tmp);
376 err = -EIO;
377 goto exit_free;
378 }
379
380 ds1307->reg_addr = 0;
381 ds1307->msg[1].len = sizeof(ds1307->regs);
382
be5f59f4
RG
383 /* oscillator off? turn it on, so clock can tick. */
384 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
385 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
386 ds1307->regs[0] & ~DS1337_BIT_nEOSC);
387
388 /* oscillator fault? clear flag, and warn */
389 if (ds1307->regs[1] & DS1337_BIT_OSF) {
390 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
391 ds1307->regs[1] & ~DS1337_BIT_OSF);
392 dev_warn(&client->dev, "SET TIME!\n");
1abb0dc9 393 }
045e0e85
DB
394 break;
395 default:
396 break;
397 }
1abb0dc9
DB
398
399read_rtc:
400 /* read RTC registers */
401
045e0e85 402 tmp = i2c_transfer(adapter, ds1307->msg, 2);
1abb0dc9
DB
403 if (tmp != 2) {
404 pr_debug("read error %d\n", tmp);
405 err = -EIO;
406 goto exit_free;
407 }
408
409 /* minimal sanity checking; some chips (like DS1340) don't
410 * specify the extra bits as must-be-zero, but there are
411 * still a few values that are clearly out-of-range.
412 */
413 tmp = ds1307->regs[DS1307_REG_SECS];
045e0e85 414 switch (ds1307->type) {
be5f59f4
RG
415 case ds_1340:
416 /* FIXME read register with DS1340_BIT_OSF, use that to
417 * trigger the "set time" warning (*after* restarting the
418 * oscillator!) instead of this weaker ds1307/m41t00 test.
419 */
045e0e85 420 case ds_1307:
045e0e85 421 case m41t00:
be5f59f4 422 /* clock halted? turn it on, so clock can tick. */
045e0e85 423 if (tmp & DS1307_BIT_CH) {
be5f59f4
RG
424 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
425 dev_warn(&client->dev, "SET TIME!\n");
045e0e85 426 goto read_rtc;
1abb0dc9 427 }
045e0e85 428 break;
be5f59f4
RG
429 case ds_1338:
430 /* clock halted? turn it on, so clock can tick. */
045e0e85 431 if (tmp & DS1307_BIT_CH)
be5f59f4
RG
432 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
433
434 /* oscillator fault? clear flag, and warn */
435 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
436 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
bd16f9eb 437 ds1307->regs[DS1307_REG_CONTROL]
be5f59f4
RG
438 & ~DS1338_BIT_OSF);
439 dev_warn(&client->dev, "SET TIME!\n");
440 goto read_rtc;
441 }
045e0e85 442 break;
c065f35c
DB
443 case ds_1337:
444 case ds_1339:
045e0e85 445 break;
1abb0dc9 446 }
045e0e85
DB
447
448 tmp = ds1307->regs[DS1307_REG_SECS];
1abb0dc9
DB
449 tmp = BCD2BIN(tmp & 0x7f);
450 if (tmp > 60)
c065f35c 451 goto exit_bad;
1abb0dc9
DB
452 tmp = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f);
453 if (tmp > 60)
c065f35c 454 goto exit_bad;
1abb0dc9
DB
455
456 tmp = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
457 if (tmp == 0 || tmp > 31)
c065f35c 458 goto exit_bad;
1abb0dc9
DB
459
460 tmp = BCD2BIN(ds1307->regs[DS1307_REG_MONTH] & 0x1f);
461 if (tmp == 0 || tmp > 12)
c065f35c 462 goto exit_bad;
1abb0dc9 463
1abb0dc9 464 tmp = ds1307->regs[DS1307_REG_HOUR];
c065f35c
DB
465 switch (ds1307->type) {
466 case ds_1340:
467 case m41t00:
468 /* NOTE: ignores century bits; fix before deploying
469 * systems that will run through year 2100.
470 */
471 break;
472 default:
473 if (!(tmp & DS1307_BIT_12HR))
474 break;
475
476 /* Be sure we're in 24 hour mode. Multi-master systems
477 * take note...
478 */
479 tmp = BCD2BIN(tmp & 0x1f);
480 if (tmp == 12)
481 tmp = 0;
482 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
483 tmp += 12;
1abb0dc9
DB
484 i2c_smbus_write_byte_data(client,
485 DS1307_REG_HOUR,
486 BIN2BCD(tmp));
487 }
488
1abb0dc9
DB
489 ds1307->rtc = rtc_device_register(client->name, &client->dev,
490 &ds13xx_rtc_ops, THIS_MODULE);
491 if (IS_ERR(ds1307->rtc)) {
492 err = PTR_ERR(ds1307->rtc);
493 dev_err(&client->dev,
494 "unable to register the class device\n");
c065f35c 495 goto exit_free;
1abb0dc9
DB
496 }
497
682d73f6
DB
498 if (chip->nvram56) {
499 err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
500 if (err == 0) {
501 ds1307->has_nvram = true;
502 dev_info(&client->dev, "56 bytes nvram\n");
503 }
504 }
505
1abb0dc9
DB
506 return 0;
507
c065f35c
DB
508exit_bad:
509 dev_dbg(&client->dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
510 "bogus register",
511 ds1307->regs[0], ds1307->regs[1],
512 ds1307->regs[2], ds1307->regs[3],
513 ds1307->regs[4], ds1307->regs[5],
514 ds1307->regs[6]);
515
1abb0dc9
DB
516exit_free:
517 kfree(ds1307);
1abb0dc9
DB
518 return err;
519}
520
c065f35c 521static int __devexit ds1307_remove(struct i2c_client *client)
1abb0dc9 522{
1abb0dc9
DB
523 struct ds1307 *ds1307 = i2c_get_clientdata(client);
524
682d73f6
DB
525 if (ds1307->has_nvram)
526 sysfs_remove_bin_file(&client->dev.kobj, &nvram);
527
1abb0dc9 528 rtc_device_unregister(ds1307->rtc);
1abb0dc9
DB
529 kfree(ds1307);
530 return 0;
531}
532
533static struct i2c_driver ds1307_driver = {
534 .driver = {
c065f35c 535 .name = "rtc-ds1307",
1abb0dc9
DB
536 .owner = THIS_MODULE,
537 },
c065f35c
DB
538 .probe = ds1307_probe,
539 .remove = __devexit_p(ds1307_remove),
1abb0dc9
DB
540};
541
542static int __init ds1307_init(void)
543{
544 return i2c_add_driver(&ds1307_driver);
545}
546module_init(ds1307_init);
547
548static void __exit ds1307_exit(void)
549{
550 i2c_del_driver(&ds1307_driver);
551}
552module_exit(ds1307_exit);
553
554MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
555MODULE_LICENSE("GPL");
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