Commit | Line | Data |
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1abb0dc9 DB |
1 | /* |
2 | * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. | |
3 | * | |
4 | * Copyright (C) 2005 James Chapman (ds1337 core) | |
5 | * Copyright (C) 2006 David Brownell | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/i2c.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/rtc.h> | |
18 | #include <linux/bcd.h> | |
19 | ||
20 | ||
21 | ||
22 | /* We can't determine type by probing, but if we expect pre-Linux code | |
23 | * to have set the chip up as a clock (turning on the oscillator and | |
24 | * setting the date and time), Linux can ignore the non-clock features. | |
25 | * That's a natural job for a factory or repair bench. | |
1abb0dc9 DB |
26 | */ |
27 | enum ds_type { | |
045e0e85 DB |
28 | ds_1307, |
29 | ds_1337, | |
30 | ds_1338, | |
31 | ds_1339, | |
32 | ds_1340, | |
33 | m41t00, | |
1abb0dc9 DB |
34 | // rs5c372 too? different address... |
35 | }; | |
36 | ||
1abb0dc9 DB |
37 | |
38 | /* RTC registers don't differ much, except for the century flag */ | |
39 | #define DS1307_REG_SECS 0x00 /* 00-59 */ | |
40 | # define DS1307_BIT_CH 0x80 | |
be5f59f4 | 41 | # define DS1340_BIT_nEOSC 0x80 |
1abb0dc9 DB |
42 | #define DS1307_REG_MIN 0x01 /* 00-59 */ |
43 | #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ | |
c065f35c DB |
44 | # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ |
45 | # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ | |
1abb0dc9 DB |
46 | # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ |
47 | # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ | |
48 | #define DS1307_REG_WDAY 0x03 /* 01-07 */ | |
49 | #define DS1307_REG_MDAY 0x04 /* 01-31 */ | |
50 | #define DS1307_REG_MONTH 0x05 /* 01-12 */ | |
51 | # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ | |
52 | #define DS1307_REG_YEAR 0x06 /* 00-99 */ | |
53 | ||
54 | /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) | |
045e0e85 DB |
55 | * start at 7, and they differ a LOT. Only control and status matter for |
56 | * basic RTC date and time functionality; be careful using them. | |
1abb0dc9 | 57 | */ |
045e0e85 | 58 | #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ |
1abb0dc9 | 59 | # define DS1307_BIT_OUT 0x80 |
be5f59f4 | 60 | # define DS1338_BIT_OSF 0x20 |
1abb0dc9 DB |
61 | # define DS1307_BIT_SQWE 0x10 |
62 | # define DS1307_BIT_RS1 0x02 | |
63 | # define DS1307_BIT_RS0 0x01 | |
64 | #define DS1337_REG_CONTROL 0x0e | |
65 | # define DS1337_BIT_nEOSC 0x80 | |
cb49a5e9 | 66 | # define DS1339_BIT_BBSQI 0x20 |
1abb0dc9 DB |
67 | # define DS1337_BIT_RS2 0x10 |
68 | # define DS1337_BIT_RS1 0x08 | |
69 | # define DS1337_BIT_INTCN 0x04 | |
70 | # define DS1337_BIT_A2IE 0x02 | |
71 | # define DS1337_BIT_A1IE 0x01 | |
045e0e85 DB |
72 | #define DS1340_REG_CONTROL 0x07 |
73 | # define DS1340_BIT_OUT 0x80 | |
74 | # define DS1340_BIT_FT 0x40 | |
75 | # define DS1340_BIT_CALIB_SIGN 0x20 | |
76 | # define DS1340_M_CALIBRATION 0x1f | |
be5f59f4 RG |
77 | #define DS1340_REG_FLAG 0x09 |
78 | # define DS1340_BIT_OSF 0x80 | |
1abb0dc9 DB |
79 | #define DS1337_REG_STATUS 0x0f |
80 | # define DS1337_BIT_OSF 0x80 | |
81 | # define DS1337_BIT_A2I 0x02 | |
82 | # define DS1337_BIT_A1I 0x01 | |
cb49a5e9 | 83 | #define DS1339_REG_ALARM1_SECS 0x07 |
1abb0dc9 DB |
84 | #define DS1339_REG_TRICKLE 0x10 |
85 | ||
86 | ||
87 | ||
88 | struct ds1307 { | |
cb49a5e9 | 89 | u8 regs[11]; |
1abb0dc9 | 90 | enum ds_type type; |
cb49a5e9 RG |
91 | unsigned long flags; |
92 | #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ | |
93 | #define HAS_ALARM 1 /* bit 1 == irq claimed */ | |
045e0e85 | 94 | struct i2c_client *client; |
1abb0dc9 | 95 | struct rtc_device *rtc; |
cb49a5e9 | 96 | struct work_struct work; |
1abb0dc9 DB |
97 | }; |
98 | ||
045e0e85 | 99 | struct chip_desc { |
045e0e85 DB |
100 | unsigned nvram56:1; |
101 | unsigned alarm:1; | |
045e0e85 DB |
102 | }; |
103 | ||
3760f736 JD |
104 | static const struct chip_desc chips[] = { |
105 | [ds_1307] = { | |
045e0e85 | 106 | .nvram56 = 1, |
3760f736 JD |
107 | }, |
108 | [ds_1337] = { | |
045e0e85 | 109 | .alarm = 1, |
3760f736 JD |
110 | }, |
111 | [ds_1338] = { | |
045e0e85 | 112 | .nvram56 = 1, |
3760f736 JD |
113 | }, |
114 | [ds_1339] = { | |
045e0e85 | 115 | .alarm = 1, |
3760f736 JD |
116 | }, |
117 | [ds_1340] = { | |
118 | }, | |
119 | [m41t00] = { | |
045e0e85 DB |
120 | }, }; |
121 | ||
3760f736 JD |
122 | static const struct i2c_device_id ds1307_id[] = { |
123 | { "ds1307", ds_1307 }, | |
124 | { "ds1337", ds_1337 }, | |
125 | { "ds1338", ds_1338 }, | |
126 | { "ds1339", ds_1339 }, | |
127 | { "ds1340", ds_1340 }, | |
128 | { "m41t00", m41t00 }, | |
129 | { } | |
130 | }; | |
131 | MODULE_DEVICE_TABLE(i2c, ds1307_id); | |
1abb0dc9 | 132 | |
cb49a5e9 RG |
133 | /*----------------------------------------------------------------------*/ |
134 | ||
135 | /* | |
136 | * The IRQ logic includes a "real" handler running in IRQ context just | |
137 | * long enough to schedule this workqueue entry. We need a task context | |
138 | * to talk to the RTC, since I2C I/O calls require that; and disable the | |
139 | * IRQ until we clear its status on the chip, so that this handler can | |
140 | * work with any type of triggering (not just falling edge). | |
141 | * | |
142 | * The ds1337 and ds1339 both have two alarms, but we only use the first | |
143 | * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm | |
144 | * signal; ds1339 chips have only one alarm signal. | |
145 | */ | |
146 | static void ds1307_work(struct work_struct *work) | |
147 | { | |
148 | struct ds1307 *ds1307; | |
149 | struct i2c_client *client; | |
150 | struct mutex *lock; | |
151 | int stat, control; | |
152 | ||
153 | ds1307 = container_of(work, struct ds1307, work); | |
154 | client = ds1307->client; | |
155 | lock = &ds1307->rtc->ops_lock; | |
156 | ||
157 | mutex_lock(lock); | |
158 | stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); | |
159 | if (stat < 0) | |
160 | goto out; | |
161 | ||
162 | if (stat & DS1337_BIT_A1I) { | |
163 | stat &= ~DS1337_BIT_A1I; | |
164 | i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); | |
165 | ||
166 | control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | |
167 | if (control < 0) | |
168 | goto out; | |
169 | ||
170 | control &= ~DS1337_BIT_A1IE; | |
171 | i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); | |
172 | ||
173 | /* rtc_update_irq() assumes that it is called | |
174 | * from IRQ-disabled context. | |
175 | */ | |
176 | local_irq_disable(); | |
177 | rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); | |
178 | local_irq_enable(); | |
179 | } | |
180 | ||
181 | out: | |
182 | if (test_bit(HAS_ALARM, &ds1307->flags)) | |
183 | enable_irq(client->irq); | |
184 | mutex_unlock(lock); | |
185 | } | |
186 | ||
187 | static irqreturn_t ds1307_irq(int irq, void *dev_id) | |
188 | { | |
189 | struct i2c_client *client = dev_id; | |
190 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
191 | ||
192 | disable_irq_nosync(irq); | |
193 | schedule_work(&ds1307->work); | |
194 | return IRQ_HANDLED; | |
195 | } | |
196 | ||
197 | /*----------------------------------------------------------------------*/ | |
198 | ||
1abb0dc9 DB |
199 | static int ds1307_get_time(struct device *dev, struct rtc_time *t) |
200 | { | |
201 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
202 | int tmp; | |
203 | ||
045e0e85 | 204 | /* read the RTC date and time registers all at once */ |
fed40b73 BS |
205 | tmp = i2c_smbus_read_i2c_block_data(ds1307->client, |
206 | DS1307_REG_SECS, 7, ds1307->regs); | |
207 | if (tmp != 7) { | |
1abb0dc9 DB |
208 | dev_err(dev, "%s error %d\n", "read", tmp); |
209 | return -EIO; | |
210 | } | |
211 | ||
212 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
213 | "read", | |
214 | ds1307->regs[0], ds1307->regs[1], | |
215 | ds1307->regs[2], ds1307->regs[3], | |
216 | ds1307->regs[4], ds1307->regs[5], | |
217 | ds1307->regs[6]); | |
218 | ||
fe20ba70 AB |
219 | t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); |
220 | t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); | |
1abb0dc9 | 221 | tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; |
fe20ba70 AB |
222 | t->tm_hour = bcd2bin(tmp); |
223 | t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; | |
224 | t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
1abb0dc9 | 225 | tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; |
fe20ba70 | 226 | t->tm_mon = bcd2bin(tmp) - 1; |
1abb0dc9 DB |
227 | |
228 | /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ | |
fe20ba70 | 229 | t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; |
1abb0dc9 DB |
230 | |
231 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
232 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
233 | "read", t->tm_sec, t->tm_min, | |
234 | t->tm_hour, t->tm_mday, | |
235 | t->tm_mon, t->tm_year, t->tm_wday); | |
236 | ||
045e0e85 DB |
237 | /* initial clock setting can be undefined */ |
238 | return rtc_valid_tm(t); | |
1abb0dc9 DB |
239 | } |
240 | ||
241 | static int ds1307_set_time(struct device *dev, struct rtc_time *t) | |
242 | { | |
243 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
244 | int result; | |
245 | int tmp; | |
246 | u8 *buf = ds1307->regs; | |
247 | ||
248 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
249 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
11966adc JG |
250 | "write", t->tm_sec, t->tm_min, |
251 | t->tm_hour, t->tm_mday, | |
252 | t->tm_mon, t->tm_year, t->tm_wday); | |
1abb0dc9 | 253 | |
fe20ba70 AB |
254 | buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); |
255 | buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); | |
256 | buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); | |
257 | buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); | |
258 | buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); | |
259 | buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); | |
1abb0dc9 DB |
260 | |
261 | /* assume 20YY not 19YY */ | |
262 | tmp = t->tm_year - 100; | |
fe20ba70 | 263 | buf[DS1307_REG_YEAR] = bin2bcd(tmp); |
1abb0dc9 | 264 | |
be5f59f4 RG |
265 | switch (ds1307->type) { |
266 | case ds_1337: | |
267 | case ds_1339: | |
1abb0dc9 | 268 | buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; |
be5f59f4 RG |
269 | break; |
270 | case ds_1340: | |
1abb0dc9 DB |
271 | buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN |
272 | | DS1340_BIT_CENTURY; | |
be5f59f4 RG |
273 | break; |
274 | default: | |
275 | break; | |
276 | } | |
1abb0dc9 | 277 | |
1abb0dc9 DB |
278 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", |
279 | "write", buf[0], buf[1], buf[2], buf[3], | |
280 | buf[4], buf[5], buf[6]); | |
281 | ||
fed40b73 BS |
282 | result = i2c_smbus_write_i2c_block_data(ds1307->client, 0, 7, buf); |
283 | if (result < 0) { | |
284 | dev_err(dev, "%s error %d\n", "write", result); | |
285 | return result; | |
1abb0dc9 DB |
286 | } |
287 | return 0; | |
288 | } | |
289 | ||
74d88eb2 | 290 | static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
cb49a5e9 RG |
291 | { |
292 | struct i2c_client *client = to_i2c_client(dev); | |
293 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
294 | int ret; | |
295 | ||
296 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
297 | return -EINVAL; | |
298 | ||
299 | /* read all ALARM1, ALARM2, and status registers at once */ | |
fed40b73 BS |
300 | ret = i2c_smbus_read_i2c_block_data(client, |
301 | DS1339_REG_ALARM1_SECS, 9, ds1307->regs); | |
302 | if (ret != 9) { | |
cb49a5e9 RG |
303 | dev_err(dev, "%s error %d\n", "alarm read", ret); |
304 | return -EIO; | |
305 | } | |
306 | ||
307 | dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", | |
308 | "alarm read", | |
309 | ds1307->regs[0], ds1307->regs[1], | |
310 | ds1307->regs[2], ds1307->regs[3], | |
311 | ds1307->regs[4], ds1307->regs[5], | |
312 | ds1307->regs[6], ds1307->regs[7], | |
313 | ds1307->regs[8]); | |
314 | ||
315 | /* report alarm time (ALARM1); assume 24 hour and day-of-month modes, | |
316 | * and that all four fields are checked matches | |
317 | */ | |
318 | t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); | |
319 | t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); | |
320 | t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); | |
321 | t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); | |
322 | t->time.tm_mon = -1; | |
323 | t->time.tm_year = -1; | |
324 | t->time.tm_wday = -1; | |
325 | t->time.tm_yday = -1; | |
326 | t->time.tm_isdst = -1; | |
327 | ||
328 | /* ... and status */ | |
329 | t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); | |
330 | t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); | |
331 | ||
332 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
333 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", | |
334 | "alarm read", t->time.tm_sec, t->time.tm_min, | |
335 | t->time.tm_hour, t->time.tm_mday, | |
336 | t->enabled, t->pending); | |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
74d88eb2 | 341 | static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
cb49a5e9 RG |
342 | { |
343 | struct i2c_client *client = to_i2c_client(dev); | |
344 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
345 | unsigned char *buf = ds1307->regs; | |
346 | u8 control, status; | |
347 | int ret; | |
348 | ||
349 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
350 | return -EINVAL; | |
351 | ||
352 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
353 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", | |
354 | "alarm set", t->time.tm_sec, t->time.tm_min, | |
355 | t->time.tm_hour, t->time.tm_mday, | |
356 | t->enabled, t->pending); | |
357 | ||
358 | /* read current status of both alarms and the chip */ | |
fed40b73 BS |
359 | ret = i2c_smbus_read_i2c_block_data(client, |
360 | DS1339_REG_ALARM1_SECS, 9, buf); | |
361 | if (ret != 9) { | |
cb49a5e9 RG |
362 | dev_err(dev, "%s error %d\n", "alarm write", ret); |
363 | return -EIO; | |
364 | } | |
365 | control = ds1307->regs[7]; | |
366 | status = ds1307->regs[8]; | |
367 | ||
368 | dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", | |
369 | "alarm set (old status)", | |
370 | ds1307->regs[0], ds1307->regs[1], | |
371 | ds1307->regs[2], ds1307->regs[3], | |
372 | ds1307->regs[4], ds1307->regs[5], | |
373 | ds1307->regs[6], control, status); | |
374 | ||
375 | /* set ALARM1, using 24 hour and day-of-month modes */ | |
cb49a5e9 RG |
376 | buf[0] = bin2bcd(t->time.tm_sec); |
377 | buf[1] = bin2bcd(t->time.tm_min); | |
378 | buf[2] = bin2bcd(t->time.tm_hour); | |
379 | buf[3] = bin2bcd(t->time.tm_mday); | |
380 | ||
381 | /* set ALARM2 to non-garbage */ | |
382 | buf[4] = 0; | |
383 | buf[5] = 0; | |
384 | buf[6] = 0; | |
385 | ||
386 | /* optionally enable ALARM1 */ | |
387 | buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); | |
388 | if (t->enabled) { | |
389 | dev_dbg(dev, "alarm IRQ armed\n"); | |
390 | buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ | |
391 | } | |
392 | buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); | |
393 | ||
fed40b73 BS |
394 | ret = i2c_smbus_write_i2c_block_data(client, |
395 | DS1339_REG_ALARM1_SECS, 9, buf); | |
396 | if (ret < 0) { | |
cb49a5e9 | 397 | dev_err(dev, "can't set alarm time\n"); |
fed40b73 | 398 | return ret; |
cb49a5e9 RG |
399 | } |
400 | ||
401 | return 0; | |
402 | } | |
403 | ||
404 | static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
405 | { | |
406 | struct i2c_client *client = to_i2c_client(dev); | |
407 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
408 | int ret; | |
409 | ||
410 | switch (cmd) { | |
411 | case RTC_AIE_OFF: | |
412 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
413 | return -ENOTTY; | |
414 | ||
415 | ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | |
416 | if (ret < 0) | |
417 | return ret; | |
418 | ||
419 | ret &= ~DS1337_BIT_A1IE; | |
420 | ||
421 | ret = i2c_smbus_write_byte_data(client, | |
422 | DS1337_REG_CONTROL, ret); | |
423 | if (ret < 0) | |
424 | return ret; | |
425 | ||
426 | break; | |
427 | ||
428 | case RTC_AIE_ON: | |
429 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | |
430 | return -ENOTTY; | |
431 | ||
432 | ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | |
433 | if (ret < 0) | |
434 | return ret; | |
435 | ||
436 | ret |= DS1337_BIT_A1IE; | |
437 | ||
438 | ret = i2c_smbus_write_byte_data(client, | |
439 | DS1337_REG_CONTROL, ret); | |
440 | if (ret < 0) | |
441 | return ret; | |
442 | ||
443 | break; | |
444 | ||
445 | default: | |
446 | return -ENOIOCTLCMD; | |
447 | } | |
448 | ||
449 | return 0; | |
450 | } | |
451 | ||
ff8371ac | 452 | static const struct rtc_class_ops ds13xx_rtc_ops = { |
1abb0dc9 DB |
453 | .read_time = ds1307_get_time, |
454 | .set_time = ds1307_set_time, | |
74d88eb2 JR |
455 | .read_alarm = ds1337_read_alarm, |
456 | .set_alarm = ds1337_set_alarm, | |
cb49a5e9 | 457 | .ioctl = ds1307_ioctl, |
1abb0dc9 DB |
458 | }; |
459 | ||
682d73f6 DB |
460 | /*----------------------------------------------------------------------*/ |
461 | ||
462 | #define NVRAM_SIZE 56 | |
463 | ||
464 | static ssize_t | |
465 | ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr, | |
466 | char *buf, loff_t off, size_t count) | |
467 | { | |
468 | struct i2c_client *client; | |
469 | struct ds1307 *ds1307; | |
682d73f6 DB |
470 | int result; |
471 | ||
fcd8db00 | 472 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
473 | ds1307 = i2c_get_clientdata(client); |
474 | ||
475 | if (unlikely(off >= NVRAM_SIZE)) | |
476 | return 0; | |
477 | if ((off + count) > NVRAM_SIZE) | |
478 | count = NVRAM_SIZE - off; | |
479 | if (unlikely(!count)) | |
480 | return count; | |
481 | ||
fed40b73 BS |
482 | result = i2c_smbus_read_i2c_block_data(client, 8 + off, count, buf); |
483 | if (result < 0) | |
682d73f6 | 484 | dev_err(&client->dev, "%s error %d\n", "nvram read", result); |
fed40b73 | 485 | return result; |
682d73f6 DB |
486 | } |
487 | ||
488 | static ssize_t | |
489 | ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr, | |
490 | char *buf, loff_t off, size_t count) | |
491 | { | |
492 | struct i2c_client *client; | |
fed40b73 | 493 | int result; |
682d73f6 | 494 | |
fcd8db00 | 495 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
496 | |
497 | if (unlikely(off >= NVRAM_SIZE)) | |
498 | return -EFBIG; | |
499 | if ((off + count) > NVRAM_SIZE) | |
500 | count = NVRAM_SIZE - off; | |
501 | if (unlikely(!count)) | |
502 | return count; | |
503 | ||
fed40b73 BS |
504 | result = i2c_smbus_write_i2c_block_data(client, 8 + off, count, buf); |
505 | if (result < 0) { | |
506 | dev_err(&client->dev, "%s error %d\n", "nvram write", result); | |
507 | return result; | |
508 | } | |
509 | return count; | |
682d73f6 DB |
510 | } |
511 | ||
512 | static struct bin_attribute nvram = { | |
513 | .attr = { | |
514 | .name = "nvram", | |
515 | .mode = S_IRUGO | S_IWUSR, | |
682d73f6 DB |
516 | }, |
517 | ||
518 | .read = ds1307_nvram_read, | |
519 | .write = ds1307_nvram_write, | |
520 | .size = NVRAM_SIZE, | |
521 | }; | |
522 | ||
523 | /*----------------------------------------------------------------------*/ | |
524 | ||
1abb0dc9 DB |
525 | static struct i2c_driver ds1307_driver; |
526 | ||
d2653e92 JD |
527 | static int __devinit ds1307_probe(struct i2c_client *client, |
528 | const struct i2c_device_id *id) | |
1abb0dc9 DB |
529 | { |
530 | struct ds1307 *ds1307; | |
531 | int err = -ENODEV; | |
1abb0dc9 | 532 | int tmp; |
3760f736 | 533 | const struct chip_desc *chip = &chips[id->driver_data]; |
c065f35c | 534 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
cb49a5e9 | 535 | int want_irq = false; |
fed40b73 | 536 | unsigned char *buf; |
1abb0dc9 | 537 | |
c065f35c | 538 | if (!i2c_check_functionality(adapter, |
fed40b73 BS |
539 | I2C_FUNC_SMBUS_WRITE_BYTE_DATA | |
540 | I2C_FUNC_SMBUS_I2C_BLOCK)) | |
c065f35c DB |
541 | return -EIO; |
542 | ||
543 | if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL))) | |
544 | return -ENOMEM; | |
045e0e85 DB |
545 | |
546 | ds1307->client = client; | |
1abb0dc9 | 547 | i2c_set_clientdata(client, ds1307); |
3760f736 | 548 | ds1307->type = id->driver_data; |
fed40b73 | 549 | buf = ds1307->regs; |
045e0e85 DB |
550 | |
551 | switch (ds1307->type) { | |
552 | case ds_1337: | |
553 | case ds_1339: | |
cb49a5e9 RG |
554 | /* has IRQ? */ |
555 | if (ds1307->client->irq > 0 && chip->alarm) { | |
556 | INIT_WORK(&ds1307->work, ds1307_work); | |
557 | want_irq = true; | |
558 | } | |
be5f59f4 | 559 | /* get registers that the "rtc" read below won't read... */ |
fed40b73 BS |
560 | tmp = i2c_smbus_read_i2c_block_data(ds1307->client, |
561 | DS1337_REG_CONTROL, 2, buf); | |
1abb0dc9 DB |
562 | if (tmp != 2) { |
563 | pr_debug("read error %d\n", tmp); | |
564 | err = -EIO; | |
565 | goto exit_free; | |
566 | } | |
567 | ||
be5f59f4 RG |
568 | /* oscillator off? turn it on, so clock can tick. */ |
569 | if (ds1307->regs[0] & DS1337_BIT_nEOSC) | |
cb49a5e9 RG |
570 | ds1307->regs[0] &= ~DS1337_BIT_nEOSC; |
571 | ||
572 | /* Using IRQ? Disable the square wave and both alarms. | |
573 | * For ds1339, be sure alarms can trigger when we're | |
574 | * running on Vbackup (BBSQI); we assume ds1337 will | |
575 | * ignore that bit | |
576 | */ | |
577 | if (want_irq) { | |
578 | ds1307->regs[0] |= DS1337_BIT_INTCN | DS1339_BIT_BBSQI; | |
579 | ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); | |
580 | } | |
581 | ||
582 | i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, | |
583 | ds1307->regs[0]); | |
be5f59f4 RG |
584 | |
585 | /* oscillator fault? clear flag, and warn */ | |
586 | if (ds1307->regs[1] & DS1337_BIT_OSF) { | |
587 | i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, | |
588 | ds1307->regs[1] & ~DS1337_BIT_OSF); | |
589 | dev_warn(&client->dev, "SET TIME!\n"); | |
1abb0dc9 | 590 | } |
045e0e85 DB |
591 | break; |
592 | default: | |
593 | break; | |
594 | } | |
1abb0dc9 DB |
595 | |
596 | read_rtc: | |
597 | /* read RTC registers */ | |
fed40b73 BS |
598 | tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 0, 8, buf); |
599 | if (tmp != 8) { | |
1abb0dc9 DB |
600 | pr_debug("read error %d\n", tmp); |
601 | err = -EIO; | |
602 | goto exit_free; | |
603 | } | |
604 | ||
605 | /* minimal sanity checking; some chips (like DS1340) don't | |
606 | * specify the extra bits as must-be-zero, but there are | |
607 | * still a few values that are clearly out-of-range. | |
608 | */ | |
609 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
045e0e85 DB |
610 | switch (ds1307->type) { |
611 | case ds_1307: | |
045e0e85 | 612 | case m41t00: |
be5f59f4 | 613 | /* clock halted? turn it on, so clock can tick. */ |
045e0e85 | 614 | if (tmp & DS1307_BIT_CH) { |
be5f59f4 RG |
615 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
616 | dev_warn(&client->dev, "SET TIME!\n"); | |
045e0e85 | 617 | goto read_rtc; |
1abb0dc9 | 618 | } |
045e0e85 | 619 | break; |
be5f59f4 RG |
620 | case ds_1338: |
621 | /* clock halted? turn it on, so clock can tick. */ | |
045e0e85 | 622 | if (tmp & DS1307_BIT_CH) |
be5f59f4 RG |
623 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
624 | ||
625 | /* oscillator fault? clear flag, and warn */ | |
626 | if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { | |
627 | i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, | |
bd16f9eb | 628 | ds1307->regs[DS1307_REG_CONTROL] |
be5f59f4 RG |
629 | & ~DS1338_BIT_OSF); |
630 | dev_warn(&client->dev, "SET TIME!\n"); | |
631 | goto read_rtc; | |
632 | } | |
045e0e85 | 633 | break; |
fcd8db00 R |
634 | case ds_1340: |
635 | /* clock halted? turn it on, so clock can tick. */ | |
636 | if (tmp & DS1340_BIT_nEOSC) | |
637 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); | |
638 | ||
639 | tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); | |
640 | if (tmp < 0) { | |
641 | pr_debug("read error %d\n", tmp); | |
642 | err = -EIO; | |
643 | goto exit_free; | |
644 | } | |
645 | ||
646 | /* oscillator fault? clear flag, and warn */ | |
647 | if (tmp & DS1340_BIT_OSF) { | |
648 | i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); | |
649 | dev_warn(&client->dev, "SET TIME!\n"); | |
650 | } | |
651 | break; | |
c065f35c DB |
652 | case ds_1337: |
653 | case ds_1339: | |
045e0e85 | 654 | break; |
1abb0dc9 | 655 | } |
045e0e85 | 656 | |
1abb0dc9 | 657 | tmp = ds1307->regs[DS1307_REG_HOUR]; |
c065f35c DB |
658 | switch (ds1307->type) { |
659 | case ds_1340: | |
660 | case m41t00: | |
661 | /* NOTE: ignores century bits; fix before deploying | |
662 | * systems that will run through year 2100. | |
663 | */ | |
664 | break; | |
665 | default: | |
666 | if (!(tmp & DS1307_BIT_12HR)) | |
667 | break; | |
668 | ||
669 | /* Be sure we're in 24 hour mode. Multi-master systems | |
670 | * take note... | |
671 | */ | |
fe20ba70 | 672 | tmp = bcd2bin(tmp & 0x1f); |
c065f35c DB |
673 | if (tmp == 12) |
674 | tmp = 0; | |
675 | if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | |
676 | tmp += 12; | |
1abb0dc9 DB |
677 | i2c_smbus_write_byte_data(client, |
678 | DS1307_REG_HOUR, | |
fe20ba70 | 679 | bin2bcd(tmp)); |
1abb0dc9 DB |
680 | } |
681 | ||
1abb0dc9 DB |
682 | ds1307->rtc = rtc_device_register(client->name, &client->dev, |
683 | &ds13xx_rtc_ops, THIS_MODULE); | |
684 | if (IS_ERR(ds1307->rtc)) { | |
685 | err = PTR_ERR(ds1307->rtc); | |
686 | dev_err(&client->dev, | |
687 | "unable to register the class device\n"); | |
c065f35c | 688 | goto exit_free; |
1abb0dc9 DB |
689 | } |
690 | ||
cb49a5e9 RG |
691 | if (want_irq) { |
692 | err = request_irq(client->irq, ds1307_irq, 0, | |
693 | ds1307->rtc->name, client); | |
694 | if (err) { | |
695 | dev_err(&client->dev, | |
696 | "unable to request IRQ!\n"); | |
697 | goto exit_irq; | |
698 | } | |
699 | set_bit(HAS_ALARM, &ds1307->flags); | |
700 | dev_dbg(&client->dev, "got IRQ %d\n", client->irq); | |
701 | } | |
702 | ||
682d73f6 DB |
703 | if (chip->nvram56) { |
704 | err = sysfs_create_bin_file(&client->dev.kobj, &nvram); | |
705 | if (err == 0) { | |
cb49a5e9 | 706 | set_bit(HAS_NVRAM, &ds1307->flags); |
682d73f6 DB |
707 | dev_info(&client->dev, "56 bytes nvram\n"); |
708 | } | |
709 | } | |
710 | ||
1abb0dc9 DB |
711 | return 0; |
712 | ||
cb49a5e9 RG |
713 | exit_irq: |
714 | if (ds1307->rtc) | |
715 | rtc_device_unregister(ds1307->rtc); | |
1abb0dc9 DB |
716 | exit_free: |
717 | kfree(ds1307); | |
1abb0dc9 DB |
718 | return err; |
719 | } | |
720 | ||
c065f35c | 721 | static int __devexit ds1307_remove(struct i2c_client *client) |
1abb0dc9 | 722 | { |
cb49a5e9 RG |
723 | struct ds1307 *ds1307 = i2c_get_clientdata(client); |
724 | ||
725 | if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { | |
726 | free_irq(client->irq, client); | |
727 | cancel_work_sync(&ds1307->work); | |
728 | } | |
1abb0dc9 | 729 | |
cb49a5e9 | 730 | if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) |
682d73f6 DB |
731 | sysfs_remove_bin_file(&client->dev.kobj, &nvram); |
732 | ||
1abb0dc9 | 733 | rtc_device_unregister(ds1307->rtc); |
1abb0dc9 DB |
734 | kfree(ds1307); |
735 | return 0; | |
736 | } | |
737 | ||
738 | static struct i2c_driver ds1307_driver = { | |
739 | .driver = { | |
c065f35c | 740 | .name = "rtc-ds1307", |
1abb0dc9 DB |
741 | .owner = THIS_MODULE, |
742 | }, | |
c065f35c DB |
743 | .probe = ds1307_probe, |
744 | .remove = __devexit_p(ds1307_remove), | |
3760f736 | 745 | .id_table = ds1307_id, |
1abb0dc9 DB |
746 | }; |
747 | ||
748 | static int __init ds1307_init(void) | |
749 | { | |
750 | return i2c_add_driver(&ds1307_driver); | |
751 | } | |
752 | module_init(ds1307_init); | |
753 | ||
754 | static void __exit ds1307_exit(void) | |
755 | { | |
756 | i2c_del_driver(&ds1307_driver); | |
757 | } | |
758 | module_exit(ds1307_exit); | |
759 | ||
760 | MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); | |
761 | MODULE_LICENSE("GPL"); |