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1abb0dc9 DB |
1 | /* |
2 | * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. | |
3 | * | |
4 | * Copyright (C) 2005 James Chapman (ds1337 core) | |
5 | * Copyright (C) 2006 David Brownell | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/i2c.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/rtc.h> | |
18 | #include <linux/bcd.h> | |
19 | ||
20 | ||
21 | ||
22 | /* We can't determine type by probing, but if we expect pre-Linux code | |
23 | * to have set the chip up as a clock (turning on the oscillator and | |
24 | * setting the date and time), Linux can ignore the non-clock features. | |
25 | * That's a natural job for a factory or repair bench. | |
26 | * | |
045e0e85 DB |
27 | * This is currently a simple no-alarms driver. If your board has the |
28 | * alarm irq wired up on a ds1337 or ds1339, and you want to use that, | |
29 | * then look at the rtc-rs5c372 driver for code to steal... | |
30 | * | |
1abb0dc9 DB |
31 | * If the I2C "force" mechanism is used, we assume the chip is a ds1337. |
32 | * (Much better would be board-specific tables of I2C devices, along with | |
33 | * the platform_data drivers would use to sort such issues out.) | |
34 | */ | |
35 | enum ds_type { | |
36 | unknown = 0, | |
045e0e85 DB |
37 | ds_1307, |
38 | ds_1337, | |
39 | ds_1338, | |
40 | ds_1339, | |
41 | ds_1340, | |
42 | m41t00, | |
1abb0dc9 DB |
43 | // rs5c372 too? different address... |
44 | }; | |
45 | ||
46 | static unsigned short normal_i2c[] = { 0x68, I2C_CLIENT_END }; | |
47 | ||
48 | I2C_CLIENT_INSMOD; | |
49 | ||
50 | ||
51 | ||
52 | /* RTC registers don't differ much, except for the century flag */ | |
53 | #define DS1307_REG_SECS 0x00 /* 00-59 */ | |
54 | # define DS1307_BIT_CH 0x80 | |
be5f59f4 | 55 | # define DS1340_BIT_nEOSC 0x80 |
1abb0dc9 DB |
56 | #define DS1307_REG_MIN 0x01 /* 00-59 */ |
57 | #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ | |
58 | # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ | |
59 | # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ | |
60 | #define DS1307_REG_WDAY 0x03 /* 01-07 */ | |
61 | #define DS1307_REG_MDAY 0x04 /* 01-31 */ | |
62 | #define DS1307_REG_MONTH 0x05 /* 01-12 */ | |
63 | # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ | |
64 | #define DS1307_REG_YEAR 0x06 /* 00-99 */ | |
65 | ||
66 | /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) | |
045e0e85 DB |
67 | * start at 7, and they differ a LOT. Only control and status matter for |
68 | * basic RTC date and time functionality; be careful using them. | |
1abb0dc9 | 69 | */ |
045e0e85 | 70 | #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ |
1abb0dc9 | 71 | # define DS1307_BIT_OUT 0x80 |
be5f59f4 | 72 | # define DS1338_BIT_OSF 0x20 |
1abb0dc9 DB |
73 | # define DS1307_BIT_SQWE 0x10 |
74 | # define DS1307_BIT_RS1 0x02 | |
75 | # define DS1307_BIT_RS0 0x01 | |
76 | #define DS1337_REG_CONTROL 0x0e | |
77 | # define DS1337_BIT_nEOSC 0x80 | |
78 | # define DS1337_BIT_RS2 0x10 | |
79 | # define DS1337_BIT_RS1 0x08 | |
80 | # define DS1337_BIT_INTCN 0x04 | |
81 | # define DS1337_BIT_A2IE 0x02 | |
82 | # define DS1337_BIT_A1IE 0x01 | |
045e0e85 DB |
83 | #define DS1340_REG_CONTROL 0x07 |
84 | # define DS1340_BIT_OUT 0x80 | |
85 | # define DS1340_BIT_FT 0x40 | |
86 | # define DS1340_BIT_CALIB_SIGN 0x20 | |
87 | # define DS1340_M_CALIBRATION 0x1f | |
be5f59f4 RG |
88 | #define DS1340_REG_FLAG 0x09 |
89 | # define DS1340_BIT_OSF 0x80 | |
1abb0dc9 DB |
90 | #define DS1337_REG_STATUS 0x0f |
91 | # define DS1337_BIT_OSF 0x80 | |
92 | # define DS1337_BIT_A2I 0x02 | |
93 | # define DS1337_BIT_A1I 0x01 | |
94 | #define DS1339_REG_TRICKLE 0x10 | |
95 | ||
96 | ||
97 | ||
98 | struct ds1307 { | |
99 | u8 reg_addr; | |
100 | u8 regs[8]; | |
101 | enum ds_type type; | |
102 | struct i2c_msg msg[2]; | |
045e0e85 DB |
103 | struct i2c_client *client; |
104 | struct i2c_client dev; | |
1abb0dc9 DB |
105 | struct rtc_device *rtc; |
106 | }; | |
107 | ||
045e0e85 DB |
108 | struct chip_desc { |
109 | char name[9]; | |
110 | unsigned nvram56:1; | |
111 | unsigned alarm:1; | |
112 | enum ds_type type; | |
113 | }; | |
114 | ||
115 | static const struct chip_desc chips[] = { { | |
116 | .name = "ds1307", | |
117 | .type = ds_1307, | |
118 | .nvram56 = 1, | |
119 | }, { | |
120 | .name = "ds1337", | |
121 | .type = ds_1337, | |
122 | .alarm = 1, | |
123 | }, { | |
124 | .name = "ds1338", | |
125 | .type = ds_1338, | |
126 | .nvram56 = 1, | |
127 | }, { | |
128 | .name = "ds1339", | |
129 | .type = ds_1339, | |
130 | .alarm = 1, | |
131 | }, { | |
132 | .name = "ds1340", | |
133 | .type = ds_1340, | |
134 | }, { | |
135 | .name = "m41t00", | |
136 | .type = m41t00, | |
137 | }, }; | |
138 | ||
139 | static inline const struct chip_desc *find_chip(const char *s) | |
140 | { | |
141 | unsigned i; | |
142 | ||
143 | for (i = 0; i < ARRAY_SIZE(chips); i++) | |
144 | if (strnicmp(s, chips[i].name, sizeof chips[i].name) == 0) | |
145 | return &chips[i]; | |
146 | return NULL; | |
147 | } | |
1abb0dc9 DB |
148 | |
149 | static int ds1307_get_time(struct device *dev, struct rtc_time *t) | |
150 | { | |
151 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
152 | int tmp; | |
153 | ||
045e0e85 | 154 | /* read the RTC date and time registers all at once */ |
1abb0dc9 DB |
155 | ds1307->msg[1].flags = I2C_M_RD; |
156 | ds1307->msg[1].len = 7; | |
157 | ||
045e0e85 DB |
158 | tmp = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
159 | ds1307->msg, 2); | |
1abb0dc9 DB |
160 | if (tmp != 2) { |
161 | dev_err(dev, "%s error %d\n", "read", tmp); | |
162 | return -EIO; | |
163 | } | |
164 | ||
165 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
166 | "read", | |
167 | ds1307->regs[0], ds1307->regs[1], | |
168 | ds1307->regs[2], ds1307->regs[3], | |
169 | ds1307->regs[4], ds1307->regs[5], | |
170 | ds1307->regs[6]); | |
171 | ||
172 | t->tm_sec = BCD2BIN(ds1307->regs[DS1307_REG_SECS] & 0x7f); | |
173 | t->tm_min = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); | |
174 | tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; | |
175 | t->tm_hour = BCD2BIN(tmp); | |
176 | t->tm_wday = BCD2BIN(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; | |
177 | t->tm_mday = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
178 | tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; | |
179 | t->tm_mon = BCD2BIN(tmp) - 1; | |
180 | ||
181 | /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ | |
182 | t->tm_year = BCD2BIN(ds1307->regs[DS1307_REG_YEAR]) + 100; | |
183 | ||
184 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
185 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
186 | "read", t->tm_sec, t->tm_min, | |
187 | t->tm_hour, t->tm_mday, | |
188 | t->tm_mon, t->tm_year, t->tm_wday); | |
189 | ||
045e0e85 DB |
190 | /* initial clock setting can be undefined */ |
191 | return rtc_valid_tm(t); | |
1abb0dc9 DB |
192 | } |
193 | ||
194 | static int ds1307_set_time(struct device *dev, struct rtc_time *t) | |
195 | { | |
196 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
197 | int result; | |
198 | int tmp; | |
199 | u8 *buf = ds1307->regs; | |
200 | ||
201 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
202 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
11966adc JG |
203 | "write", t->tm_sec, t->tm_min, |
204 | t->tm_hour, t->tm_mday, | |
205 | t->tm_mon, t->tm_year, t->tm_wday); | |
1abb0dc9 DB |
206 | |
207 | *buf++ = 0; /* first register addr */ | |
208 | buf[DS1307_REG_SECS] = BIN2BCD(t->tm_sec); | |
209 | buf[DS1307_REG_MIN] = BIN2BCD(t->tm_min); | |
210 | buf[DS1307_REG_HOUR] = BIN2BCD(t->tm_hour); | |
211 | buf[DS1307_REG_WDAY] = BIN2BCD(t->tm_wday + 1); | |
212 | buf[DS1307_REG_MDAY] = BIN2BCD(t->tm_mday); | |
213 | buf[DS1307_REG_MONTH] = BIN2BCD(t->tm_mon + 1); | |
214 | ||
215 | /* assume 20YY not 19YY */ | |
216 | tmp = t->tm_year - 100; | |
217 | buf[DS1307_REG_YEAR] = BIN2BCD(tmp); | |
218 | ||
be5f59f4 RG |
219 | switch (ds1307->type) { |
220 | case ds_1337: | |
221 | case ds_1339: | |
1abb0dc9 | 222 | buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; |
be5f59f4 RG |
223 | break; |
224 | case ds_1340: | |
1abb0dc9 DB |
225 | buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN |
226 | | DS1340_BIT_CENTURY; | |
be5f59f4 RG |
227 | break; |
228 | default: | |
229 | break; | |
230 | } | |
1abb0dc9 DB |
231 | |
232 | ds1307->msg[1].flags = 0; | |
233 | ds1307->msg[1].len = 8; | |
234 | ||
235 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
236 | "write", buf[0], buf[1], buf[2], buf[3], | |
237 | buf[4], buf[5], buf[6]); | |
238 | ||
045e0e85 DB |
239 | result = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
240 | &ds1307->msg[1], 1); | |
1abb0dc9 DB |
241 | if (result != 1) { |
242 | dev_err(dev, "%s error %d\n", "write", tmp); | |
243 | return -EIO; | |
244 | } | |
245 | return 0; | |
246 | } | |
247 | ||
ff8371ac | 248 | static const struct rtc_class_ops ds13xx_rtc_ops = { |
1abb0dc9 DB |
249 | .read_time = ds1307_get_time, |
250 | .set_time = ds1307_set_time, | |
251 | }; | |
252 | ||
253 | static struct i2c_driver ds1307_driver; | |
254 | ||
255 | static int __devinit | |
256 | ds1307_detect(struct i2c_adapter *adapter, int address, int kind) | |
257 | { | |
258 | struct ds1307 *ds1307; | |
259 | int err = -ENODEV; | |
260 | struct i2c_client *client; | |
261 | int tmp; | |
045e0e85 | 262 | const struct chip_desc *chip; |
1abb0dc9 DB |
263 | |
264 | if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL))) { | |
265 | err = -ENOMEM; | |
266 | goto exit; | |
267 | } | |
268 | ||
045e0e85 DB |
269 | /* REVISIT: pending driver model conversion, set up "client" |
270 | * ourselves, and use a hack to determine the RTC type (instead | |
271 | * of reading the client->name we're given) | |
272 | */ | |
273 | client = &ds1307->dev; | |
1abb0dc9 DB |
274 | client->addr = address; |
275 | client->adapter = adapter; | |
276 | client->driver = &ds1307_driver; | |
1abb0dc9 | 277 | |
045e0e85 DB |
278 | /* HACK: "force" implies "needs ds1337-style-oscillator setup", and |
279 | * that's the only kind of chip setup we'll know about. Until the | |
280 | * driver model conversion, here's where to add any board-specific | |
281 | * code to say what kind of chip is present... | |
282 | */ | |
283 | if (kind >= 0) | |
284 | chip = find_chip("ds1337"); | |
285 | else | |
286 | chip = find_chip("ds1307"); | |
287 | strlcpy(client->name, chip->name, I2C_NAME_SIZE); | |
288 | ||
289 | ds1307->client = client; | |
1abb0dc9 DB |
290 | i2c_set_clientdata(client, ds1307); |
291 | ||
292 | ds1307->msg[0].addr = client->addr; | |
293 | ds1307->msg[0].flags = 0; | |
294 | ds1307->msg[0].len = 1; | |
295 | ds1307->msg[0].buf = &ds1307->reg_addr; | |
296 | ||
297 | ds1307->msg[1].addr = client->addr; | |
298 | ds1307->msg[1].flags = I2C_M_RD; | |
299 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
300 | ds1307->msg[1].buf = ds1307->regs; | |
301 | ||
045e0e85 DB |
302 | ds1307->type = chip->type; |
303 | ||
304 | switch (ds1307->type) { | |
305 | case ds_1337: | |
306 | case ds_1339: | |
1abb0dc9 DB |
307 | ds1307->reg_addr = DS1337_REG_CONTROL; |
308 | ds1307->msg[1].len = 2; | |
309 | ||
be5f59f4 | 310 | /* get registers that the "rtc" read below won't read... */ |
045e0e85 | 311 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
312 | if (tmp != 2) { |
313 | pr_debug("read error %d\n", tmp); | |
314 | err = -EIO; | |
315 | goto exit_free; | |
316 | } | |
317 | ||
318 | ds1307->reg_addr = 0; | |
319 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
320 | ||
be5f59f4 RG |
321 | /* oscillator off? turn it on, so clock can tick. */ |
322 | if (ds1307->regs[0] & DS1337_BIT_nEOSC) | |
323 | i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, | |
324 | ds1307->regs[0] & ~DS1337_BIT_nEOSC); | |
325 | ||
326 | /* oscillator fault? clear flag, and warn */ | |
327 | if (ds1307->regs[1] & DS1337_BIT_OSF) { | |
328 | i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, | |
329 | ds1307->regs[1] & ~DS1337_BIT_OSF); | |
330 | dev_warn(&client->dev, "SET TIME!\n"); | |
1abb0dc9 | 331 | } |
045e0e85 DB |
332 | break; |
333 | default: | |
334 | break; | |
335 | } | |
1abb0dc9 DB |
336 | |
337 | read_rtc: | |
338 | /* read RTC registers */ | |
339 | ||
045e0e85 | 340 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
341 | if (tmp != 2) { |
342 | pr_debug("read error %d\n", tmp); | |
343 | err = -EIO; | |
344 | goto exit_free; | |
345 | } | |
346 | ||
347 | /* minimal sanity checking; some chips (like DS1340) don't | |
348 | * specify the extra bits as must-be-zero, but there are | |
349 | * still a few values that are clearly out-of-range. | |
350 | */ | |
351 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
045e0e85 | 352 | switch (ds1307->type) { |
be5f59f4 RG |
353 | case ds_1340: |
354 | /* FIXME read register with DS1340_BIT_OSF, use that to | |
355 | * trigger the "set time" warning (*after* restarting the | |
356 | * oscillator!) instead of this weaker ds1307/m41t00 test. | |
357 | */ | |
045e0e85 | 358 | case ds_1307: |
045e0e85 | 359 | case m41t00: |
be5f59f4 | 360 | /* clock halted? turn it on, so clock can tick. */ |
045e0e85 | 361 | if (tmp & DS1307_BIT_CH) { |
be5f59f4 RG |
362 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
363 | dev_warn(&client->dev, "SET TIME!\n"); | |
045e0e85 | 364 | goto read_rtc; |
1abb0dc9 | 365 | } |
045e0e85 | 366 | break; |
be5f59f4 RG |
367 | case ds_1338: |
368 | /* clock halted? turn it on, so clock can tick. */ | |
045e0e85 | 369 | if (tmp & DS1307_BIT_CH) |
be5f59f4 RG |
370 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
371 | ||
372 | /* oscillator fault? clear flag, and warn */ | |
373 | if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { | |
374 | i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, | |
375 | ds1307->regs[DS1337_REG_CONTROL] | |
376 | & ~DS1338_BIT_OSF); | |
377 | dev_warn(&client->dev, "SET TIME!\n"); | |
378 | goto read_rtc; | |
379 | } | |
045e0e85 DB |
380 | break; |
381 | default: | |
382 | break; | |
1abb0dc9 | 383 | } |
045e0e85 DB |
384 | |
385 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
1abb0dc9 DB |
386 | tmp = BCD2BIN(tmp & 0x7f); |
387 | if (tmp > 60) | |
388 | goto exit_free; | |
389 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); | |
390 | if (tmp > 60) | |
391 | goto exit_free; | |
392 | ||
393 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
394 | if (tmp == 0 || tmp > 31) | |
395 | goto exit_free; | |
396 | ||
397 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MONTH] & 0x1f); | |
398 | if (tmp == 0 || tmp > 12) | |
399 | goto exit_free; | |
400 | ||
401 | /* force into in 24 hour mode (most chips) or | |
402 | * disable century bit (ds1340) | |
045e0e85 DB |
403 | * |
404 | * REVISIT forcing 24 hour mode can prevent multi-master | |
405 | * configs from sharing this RTC ... don't do this. | |
be5f59f4 | 406 | * The clock needs to be reset after changing it, too... |
1abb0dc9 DB |
407 | */ |
408 | tmp = ds1307->regs[DS1307_REG_HOUR]; | |
409 | if (tmp & (1 << 6)) { | |
410 | if (tmp & (1 << 5)) | |
411 | tmp = BCD2BIN(tmp & 0x1f) + 12; | |
412 | else | |
413 | tmp = BCD2BIN(tmp); | |
414 | i2c_smbus_write_byte_data(client, | |
415 | DS1307_REG_HOUR, | |
416 | BIN2BCD(tmp)); | |
417 | } | |
418 | ||
1abb0dc9 DB |
419 | /* Tell the I2C layer a new client has arrived */ |
420 | if ((err = i2c_attach_client(client))) | |
421 | goto exit_free; | |
422 | ||
423 | ds1307->rtc = rtc_device_register(client->name, &client->dev, | |
424 | &ds13xx_rtc_ops, THIS_MODULE); | |
425 | if (IS_ERR(ds1307->rtc)) { | |
426 | err = PTR_ERR(ds1307->rtc); | |
427 | dev_err(&client->dev, | |
428 | "unable to register the class device\n"); | |
429 | goto exit_detach; | |
430 | } | |
431 | ||
432 | return 0; | |
433 | ||
434 | exit_detach: | |
435 | i2c_detach_client(client); | |
436 | exit_free: | |
437 | kfree(ds1307); | |
438 | exit: | |
439 | return err; | |
440 | } | |
441 | ||
442 | static int __devinit | |
443 | ds1307_attach_adapter(struct i2c_adapter *adapter) | |
444 | { | |
445 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) | |
446 | return 0; | |
447 | return i2c_probe(adapter, &addr_data, ds1307_detect); | |
448 | } | |
449 | ||
450 | static int __devexit ds1307_detach_client(struct i2c_client *client) | |
451 | { | |
452 | int err; | |
453 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | |
454 | ||
455 | rtc_device_unregister(ds1307->rtc); | |
456 | if ((err = i2c_detach_client(client))) | |
457 | return err; | |
458 | kfree(ds1307); | |
459 | return 0; | |
460 | } | |
461 | ||
462 | static struct i2c_driver ds1307_driver = { | |
463 | .driver = { | |
464 | .name = "ds1307", | |
465 | .owner = THIS_MODULE, | |
466 | }, | |
467 | .attach_adapter = ds1307_attach_adapter, | |
468 | .detach_client = __devexit_p(ds1307_detach_client), | |
469 | }; | |
470 | ||
471 | static int __init ds1307_init(void) | |
472 | { | |
473 | return i2c_add_driver(&ds1307_driver); | |
474 | } | |
475 | module_init(ds1307_init); | |
476 | ||
477 | static void __exit ds1307_exit(void) | |
478 | { | |
479 | i2c_del_driver(&ds1307_driver); | |
480 | } | |
481 | module_exit(ds1307_exit); | |
482 | ||
483 | MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); | |
484 | MODULE_LICENSE("GPL"); |